JP4781863B2 - Temperature detection circuit - Google Patents

Description

  The present invention relates to a highly accurate temperature detection circuit capable of performing a low voltage operation and a low power consumption operation.

Conventionally, as shown in FIG. 4, a temperature detection circuit using a field effect transistor is composed of N-channel first to third field effect transistors M101 to M103.
In FIG. 4, a first field effect transistor M101 is a depletion type field effect transistor, and a gate and a source are connected, and a substrate gate is connected to a ground voltage GND. The second and third field effect transistors M102 and M103 have the same substrate and channel doping impurity concentration, the substrate gate of the second field effect transistor M102 is the source, and the substrate of the third field effect transistor M103 is the same. The gates are connected to the ground voltage GND. The second field effect transistor M102 has a high concentration n-type gate, and the third field effect transistor M103 has a high concentration p-type gate. The second field effect transistor M102 has a gate and a source connected to form a constant current source.

  Since the current ids flows through the second field effect transistor M102 serving as the constant current source, and the third field effect transistor M103 is connected in series with the second field effect transistor M102, the second field effect transistor A current ids flows in the same manner as the transistor M102. The difference between the gate voltages Vg of the second field effect transistor M102 and the third field effect transistor M103 is the output voltage VOUT. Therefore, even if the impurity concentration of the substrate and the channel dope varies due to the process variation, the impurity concentrations of the second and third field effect transistors M102 and M103 also vary in the same manner. The difference between the threshold voltages Vth of the field effect transistors M102 and M103 is maintained, the Vg-id characteristic indicating the relationship between the gate voltage Vg and the drain current id is merely shifted to the left and right, and the absolute value of the output voltage VOUT Can be obtained with a stable output voltage VOUT.

  Here, the purpose of using the first field effect transistor M101 is that the second field effect transistor M102 corresponding to the power supply voltage of the temperature detection circuit constituted by the second and third field effect transistors M102 and M103 is used. By fixing the drain voltage, that is, the source voltage of the first field effect transistor M101, the power supply voltage dependency of the output voltage VOUT is eliminated. Thus, the substrate bias voltage Vb is generated by connecting the substrate gate of the first field effect transistor M101 to the ground voltage GND, and the voltage Vbs between the source voltage Vs of the first field effect transistor M101 is constant. The voltage is fixed. The adjustment to the desired voltage Vbs is performed by adjusting the size of the first field effect transistor M101.

Specifically, there are the following two preconditions for determining the size of the first field effect transistor M101. First, the first field effect transistor M101 must pass the same current as that determined by the second field effect transistor M102, which is a constant current source. The following conditions relate to the source voltage of the first field effect transistor M101. As shown in the following equation (a), the source voltage VsM101 of the first field effect transistor M101 is the second and third of each. It must be equal to or greater than the sum of the respective drain-source voltages VdsM102 and VdsM103 of the field effect transistors M102 and M103.
VsM101 ≧ VdsM102 + VdsM103 (a)

There is also a reference voltage generation circuit using a field effect transistor that functions in the same manner as the first field effect transistor M101 shown in FIG. 4 (see, for example, Patent Document 1).
JP 2005-71172 A

FIG. 5 is a characteristic diagram showing an example of the relationship between the source voltage Vs and the drain current ids of the first field effect transistor M101 due to a temperature change.
In FIG. 5, the threshold voltage Vth of the first field effect transistor M101 is −0.5V, the size is gate width W / gate length L = 5 μm / 15 μm, and the temperature range is −50 ° C. to 150 ° C. The current determined by the second field effect transistor M102 is a result under the condition of 0.5 μA. As can be seen from FIG. 5, since the characteristics of the first field effect transistor M101 have temperature dependence, the source voltage Vs fluctuates with a temperature change under a certain current condition.

For example, when the sum of the drain-source voltages Vds of the first field effect transistor M101 and the second field effect transistor M102 is 1.6 V, the above (a Therefore, the source voltage Vs of the first field effect transistor M101 varies in the range of 1.6V to 2.2V. That is, about 0.6 V, which is an excess of the desired 1.6 V or more, is generated as a margin. Therefore, the minimum operating voltage Vmin of the circuit of FIG. 4 is originally determined by the sum of the drain-source voltages Vds in the first to third field effect transistors M101 to M103 as shown in the following equation (b). Due to the temperature dependence of the source voltage Vs, a margin voltage indicated as a V margin is added as shown in the following equation (c), resulting in a problem that the operating voltage rises.
Vmin = VdsM101 + VdsM102 + VdsM103 (b)
Vmin = (VdsM101 + V margin) + VdsM102 + VdsM103 (c)

  The present invention has been made in order to solve the above-described problems. By setting the source voltage of the first field effect transistor to the ZTC point, a temperature detection circuit capable of low voltage operation is obtained. With the goal.

A temperature detection circuit according to the present invention is a temperature detection circuit that generates and outputs an output voltage having a predetermined temperature characteristic.
A first field effect transistor that is a depletion-type n-channel field effect transistor having a drain connected to a predetermined power supply voltage, a gate connected to a source, and a substrate gate connected to a ground voltage;
A second field effect transistor having a high concentration n-type gate having a drain connected to the source of the first field effect transistor, a gate connected to the source, and a substrate gate connected to a ground voltage;
A third field effect transistor having a high-concentration p-type gate having a drain connected to the source of the second field effect transistor, a gate connected to the drain, and a source and a substrate gate connected to a ground voltage, respectively. When,
With
The output voltage is output from the connection portion of the second and third field effect transistors, and the source voltage of the first field effect transistor is set to the ZTC point.

The temperature detection circuit according to the present invention is a temperature detection circuit that generates and outputs an output voltage having a predetermined temperature characteristic.
A first field effect transistor that is a depletion-type n-channel field effect transistor having a drain connected to a predetermined power supply voltage, a gate connected to a source, and a substrate gate connected to a ground voltage;
A second field effect transistor having a high concentration n-type gate, the drain connected to the source of the first field effect transistor, and the gate and the substrate gate connected to the source;
A third field effect transistor having a high-concentration p-type gate having a drain connected to the source of the second field effect transistor, a gate connected to the drain, and a source and a substrate gate connected to a ground voltage, respectively. When,
With
The output voltage is output from the connection portion of the second and third field effect transistors, and the source voltage of the first field effect transistor is set to the ZTC point.

  Specifically, each of the second and third field effect transistors has polysilicon gates having different conductivity types and channel lengths are made equal.

  The second and third field effect transistors may have polysilicon gates having different conductivity types and may have different channel lengths.

  According to the temperature detection circuit of the present invention, the source voltage of the first field effect transistor that supplies power to each of the second and third field effect transistors that detect the temperature is changed to the threshold voltage Vth as the temperature rises. Is set to the ZTC point where the effect of increasing the drain-source current and the effect of decreasing the mobility and decreasing the drain-source current are offset, thereby reducing the drain of the first field effect transistor. -Since the margin voltage of the source-to-source voltage can be eliminated, a stable low-voltage operation temperature detection circuit that is resistant to temperature fluctuations can be obtained.

Next, the present invention will be described in detail based on the embodiments shown in the drawings.
First embodiment.
FIG. 1 is a diagram showing a circuit example of a temperature detection circuit according to the first embodiment of the present invention.
In FIG. 1, the temperature detection circuit 1 includes n-channel field effect transistors M1 to M3, and field effect transistors M1 to M3 are connected in series between a power supply voltage VDD and a ground voltage GND. The field effect transistor M1 serves as a first field effect transistor, the field effect transistor M2 serves as a second field effect transistor, and the field effect transistor M3 serves as a third field effect transistor.

  The field effect transistor M1 is a depletion type transistor, and has a drain connected to the power supply voltage VDD, a gate and a source connected, and a substrate gate connected to the ground voltage GND. The field effect transistors M2 and M3 have the same substrate and channel doping impurity concentration, the field effect transistor M2 has a high concentration n-type gate, and the field effect transistor M3 has a high concentration p-type gate. The gates of the field effect transistors M2 and M3 are connected to the connection portion of the field effect transistors M2 and M3, and the connection portion forms an output terminal for outputting the output voltage VOUT. The substrate gates of the field effect transistors M2 and M3 are connected to the ground voltage GND, respectively.

  Since the field effect transistor M2 has a source and a gate connected to each other, it becomes a constant current source and a current ids flows therethrough. Since the field effect transistor M3 is connected in series to the field effect transistor M2, the current ids flows as in the field effect transistor M2, and the voltage difference between the gate voltages Vg of the two field effect transistors M2 and M3 is the output voltage VOUT. become. Accordingly, even if the impurity concentration of the substrate or channel dope varies due to process variations at a certain temperature, the respective concentrations of the field effect transistors M2 and M3 also vary in the same manner, so that the gate voltages of the field effect transistors M2 and M3 The temperature detection circuit 1 that generates a stable output voltage VOUT can be obtained without affecting the absolute value of the output voltage VOUT while maintaining the difference of Vg.

On the other hand, the field effect transistor M1 is set so that the source voltage Vs becomes a ZTC (Zero Temperature Coefficient) point.
Here, the ZTC point will be described.
In general, in a MOS transistor, when the drain-source voltage Vds is larger than the value obtained by subtracting the threshold voltage Vth from the gate-source voltage Vgs (Vds> Vgs-Vth), the drain when operating in the saturation region The inter-source current ids is expressed by the following equation (1).
ids = (1/2) × (W / L) × μ × Cox × (Vgs−Vth) ² (1)
Here, μ represents the carrier mobility, Cox represents the capacitance per unit area in the oxide film, W represents the channel width, and L represents the channel length.

In the above equation (1), two parameters that have temperature dependence are carrier mobility μ and threshold voltage Vth, and each temperature dependence will be considered below.
First, the threshold voltage Vth is expressed by the following equation (2).
Vth = φms−Qf / Cox + 2 × φf + QD / Cox (2)
Φms is the difference between the work function of the gate and the substrate, Qf is the fixed charge in the oxide film, φf is the Fermi level of the substrate, QD is the unit area in the depletion layer between the inversion layer and the substrate Cox represents the electrostatic capacitance of the oxide film per unit area.

Therefore, in order to know the temperature dependence of the threshold voltage Vth, it is only necessary to examine the temperature characteristics of the respective parameters constituting the equation (2). Generally, the fluctuation of the threshold voltage Vth due to the ambient temperature change is , Can be expressed as the following equation (3).
Vth (T) = Vth (T0) −α × (T−T0) (3)
Vth (T) represents the threshold voltage at the temperature T, Vth (T0) represents the threshold voltage at the temperature T0, and α represents the process such as the doping level and implantation amount of the substrate. This depends on the parameter, and is about 1-2 mV / ° C. in the case of a normal CMOS process. The equation (3) is effective in the temperature range of 200 to 400K, and it can be seen from the equation (3) that the threshold voltage Vth is inversely proportional to the temperature T. This means that the threshold voltage Vth decreases as the temperature rises, and the drain-source current ids in the equation (1) increases under the same gate-source voltage Vgs.

Next, carrier mobility will be described.
The carrier mobility μ has a strong dependence on temperature, and is expressed by the following equation (4).
μ (T) = μ0 × (T0 / T) ⁿ ............ (4)
Μ (T) represents carrier mobility at temperature T, μ0 represents carrier mobility at temperature T0, and the value of n is about 1 to 2.5. Depends on conditions and temperature range. As can be seen from the equation (4), the temperature dependence of the carrier mobility μ is proportional to T ⁻ⁿ , so that the carrier mobility μ decreases as the temperature rises. As a result, the same gate-source voltage is obtained. Under the condition of Vgs, the drain-source current ids in the equation (1) decreases.

  Therefore, the temperature characteristics of the drain-source current ids are determined depending on which of the threshold voltage Vth and the carrier mobility μ is dominant under a given bias condition. As described above, each temperature coefficient of the threshold voltage Vth and the carrier mobility μ has an opposite function to the drain-source current ids, and thus tends to be canceled at a certain bias point. The bias point at which these two effects are canceled becomes the ZTC point. The ZTC point depends on the transistor size, threshold voltage, oxide film thickness, mobility temperature coefficient, and the like.

Next, a method for setting the source voltage of the field effect transistor M1 in FIG. 1 to the ZTC point will be described.
The threshold voltage Vth of the field effect transistor M1 is expressed by the following equation (5) because the substrate bias is applied.
Vth = Vth0 + γ × {(2 × Φ−Vs) ^1/2 − (2 × Φ) ^1/2 } (5)
Vth0 represents a threshold voltage when the substrate bias is zero, and γ represents a substrate bias effect coefficient. Therefore, the drain-source current ids of the field effect transistor M1 operating in the saturation region in consideration of the substrate bias can be expressed by the following equation (6) by substituting the equation (5) into the equation (1). become.
ids = (1/2) × (W / L) × μ × Cox × [Vgs− {Vth0−γ × ((2 × Φ−Vs) ^1/2 − (2 × Φ) ^1/2 )}] ² ……………… (6)

  In the equation (6), the oxide film thickness, carrier mobility, etc. are substantially determined by the process conditions and materials. Therefore, the terms easy to control include drain-source current ids, transistor size W / L, gate-source voltage. Vgs, threshold voltage Vth0, and source voltage Vs. Here, the drain-source current ids is determined by the size of the field effect transistor M2 which is a constant current source. The source voltage Vs is determined by the sum of the drain-source voltages Vds of the field effect transistors M2 and M3, and the gate-source voltage Vgs becomes zero because the gate and source of the field effect transistor M1 are connected. . Finally, the transistor size W / L and the threshold value Vth0 can be freely controlled when setting the source voltage of the field effect transistor M1 to the ZTC point.

FIG. 2 is a diagram showing a relationship example between the source voltage Vs and the drain current ids of the field effect transistor M1 in the temperature range of −50 ° C. to 150 ° C.
In FIG. 2, the transistor size and the threshold voltage are adjusted, and the ZTC point is set under the condition that the drain-source current ids is 0.5 μA and the source voltage Vs is 1.6 V. The threshold voltage Vth is −0.7 V, and the transistor size W / L is 5 μm / 80 μm. As can be seen from FIG. 2, since the source voltage Vs is fixed at 1.6 V in the entire temperature range of −50 ° C. to 150 ° C., the margin of the drain-source voltage Vds of the field effect transistor M1 representing the minimum operating voltage. The voltage becomes zero, and the operating voltage can be reduced by the margin voltage (about 0.6 V).

Next, the final minimum operating voltage is obtained using the above equation (c).
In the case of the conventional example, the minimum operating voltage Vmin is as follows from the equation (c).
Vmin = (VdsM101 + V margin) + VdsM101 + VdsM102 = (0.5 + 0.6) + 1.6 = 2.7V
On the other hand, the minimum operating voltage Vmin in the case of the temperature detection circuit 1 of FIG. 1 is as follows.
Vmin = (VdsM1 + V margin) + VdsM2 + VdsM3 = (0.7 + 0) + 1.6 = 2.3V
As can be seen from the above results, the minimum operating voltage Vmin for stable operation in the temperature range of −50 ° C. to 150 ° C. is 2.7 V in the conventional case, whereas 2.3 V in the case of FIG. As a result, there is an effect of reducing the operating voltage of about 0.4V.

FIG. 3 is a diagram illustrating another circuit example of the temperature detection circuit according to the first embodiment of the present invention. In FIG. 3, the same or similar parts as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted here, and only differences from FIG. 1 will be described.
3 is different from FIG. 1 in that the substrate gate of the field effect transistor M2 of FIG. 1 is connected to the source of the field effect transistor M2.
Also in FIG. 3, as in the case of FIG. 1, the field effect transistor M2 forms a constant current source, and the minimum operating voltage Vmin is also the same as in FIG. 1, so that the source voltage of the field effect transistor M1 is set at the ZTC point. By setting, it is possible to obtain a temperature detection circuit capable of a stable low-voltage operation that is resistant to temperature fluctuations.

1 and 3, the threshold voltages of the field effect transistors M2 and M3 are made equal by equalizing the channel lengths L of the field effect transistors M2 and M3 having polysilicon gates having different conductivity types. A temperature detection circuit having a negative temperature coefficient with respect to a change in ambient temperature can be obtained from the temperature characteristic of Vth.
1 and 3, the channel lengths L of the field effect transistors M2 and M3 are made different by making the channel lengths L of the field effect transistors M2 and M3 having polysilicon gates having different conductivity types different from each other. Is equal to 1, when the channel length ratio of the field effect transistors M2 and M3 is smaller than 1, the direction is a positive temperature coefficient. When the channel length ratio is larger than 1, the negative temperature coefficient is further increased. A temperature detection circuit having the same can be obtained.

It is the figure which showed the circuit example of the temperature detection circuit in the 1st Embodiment of this invention. It is the figure which showed the example of relationship between the source voltage Vs of the field effect transistor M1, and the drain current ids. It is the figure which showed the other circuit example of the temperature detection circuit in the 1st Embodiment of this invention. It is the figure which showed the circuit example of the conventional temperature detection circuit using a field effect transistor. It is the characteristic view which showed the example of relationship between the source voltage Vs of the field effect transistor M101, and the drain current ids.

Explanation of symbols

1 Temperature Detection Circuit M1-M3 Field Effect Transistor

Claims (4)

In a temperature detection circuit that generates and outputs an output voltage having a predetermined temperature characteristic,
A first field effect transistor that is a depletion-type n-channel field effect transistor having a drain connected to a predetermined power supply voltage, a gate connected to a source, and a substrate gate connected to a ground voltage;
A second field effect transistor having a high concentration n-type gate having a drain connected to the source of the first field effect transistor, a gate connected to the source, and a substrate gate connected to a ground voltage;
A third field effect transistor having a high-concentration p-type gate having a drain connected to the source of the second field effect transistor, a gate connected to the drain, and a source and a substrate gate connected to a ground voltage, respectively. When,
With
The temperature detection circuit, wherein the output voltage is output from a connection portion between the second and third field effect transistors, and the source voltage of the first field effect transistor is set to a ZTC point. In a temperature detection circuit that generates and outputs an output voltage having a predetermined temperature characteristic,
A first field effect transistor that is a depletion-type n-channel field effect transistor having a drain connected to a predetermined power supply voltage, a gate connected to a source, and a substrate gate connected to a ground voltage;
A second field effect transistor having a high concentration n-type gate, the drain connected to the source of the first field effect transistor, and the gate and the substrate gate connected to the source;
A third field effect transistor having a high-concentration p-type gate having a drain connected to the source of the second field effect transistor, a gate connected to the drain, and a source and a substrate gate connected to a ground voltage, respectively. When,
With
The temperature detection circuit, wherein the output voltage is output from a connection portion between the second and third field effect transistors, and the source voltage of the first field effect transistor is set to a ZTC point.   3. The temperature detecting circuit according to claim 1, wherein the second and third field effect transistors have polysilicon gates having different conductivity types and have equal channel lengths. 3. The temperature detection circuit according to claim 1, wherein the second and third field effect transistors have polysilicon gates having different conductivity types and have different channel lengths.

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