JP4800352B2 - Automatic gain control circuit, tuner, TV receiver and set top box - Google Patents

Description

  The present invention relates to an automatic gain control circuit applied to a tuner or the like.

  AGC control of the conventional feedback type RF-VGA will be described with reference to FIGS.

  FIG. 11 is a block diagram showing a configuration of a conventional automatic gain control circuit 101. The automatic gain control circuit 101 includes a VGA 2, a switching selection unit 3, a switching order setting unit 4, a gain measurement unit 5, an addition / subtraction unit 6, and a determination unit 7. A target gain setting unit 8 is provided outside the automatic gain control circuit 101. A high frequency signal from the input terminal IN of the automatic gain control circuit 101 is input to the VGA 2.

  As shown in FIG. 12, the VGA 2 includes four amplifiers 21a to 21d and four switches 22a to 22d. The amplifier 21a and the switch 22a, the amplifier 21b and the switch 22b, the amplifier 21c and the switch 22c, and the amplifier 21d and the switch 22d are connected to each other in series, and the series circuit of the amplifier 21a and the switch 22a, the amplifier 21b and the switch 22b, The series circuit of the amplifier 21c and the switch 22c and the series circuit of the amplifier 21d and the switch 22d are connected in parallel to each other.

  The switching selector 3 shown in FIG. 11 performs selection / non-selection of the amplifiers 21a to 21d by controlling ON / OFF of the switches 22a to 22d. As a result, the gain of the high-frequency signal input to the VGA 2 is controlled.

  The switching order setting unit 4 includes a register, and outputs a register value indicating a switching order, which will be described later, to the switching selection unit 3. The switching selection unit 3 controls ON / OFF of the switches 22a to 22d based on a control signal from the switching order setting unit 4.

  The target gain setting unit 8 stores a data table shown in FIG. In the data table, a switching order is assigned for each combination of ON / OFF control of the switches 22 a to 22 d by the switching selection unit 3. The combination of ON / OFF control of the switches 22a to 22d is based on the gains of the amplifiers 21a to 21d when the frequency of the high frequency signal is a normal level, and the target gain indicating the gain of the VGA 2 increases as the switching order increases. Is set to That is, as shown in FIG. 13B, the target gain indicating the gain of the VGA 2 is set to have linearity with respect to the switching order.

  For example, when the target gain of VGA 2 is 5.0 dB, the switching order setting unit 4 outputs a register value indicating the switching order “5” corresponding to the target gain of 5.0 dB to the switching selection unit 3. On the other hand, the switching selection unit 3 refers to the data table stored in the target gain setting unit 8 and performs ON / OFF control corresponding to the switching order “5”. Thereby, the switching selection unit 3 selects the amplifier 21a and the amplifier 21d, and controls the gain of the VGA 2 to be 5.0 dB.

  11 detects an output signal from the VGA 2 and a high-frequency signal from the input terminal IN, and outputs a digital value indicating an actual gain of the VGA 2 to the adder / subtractor 6.

  As described above, when the target gain of VGA 2 is 5.0 dB, the target gain setting unit 8 outputs a digital value “5” corresponding to the target gain of 5.0 dB to the addition / subtraction unit 6.

  The addition / subtraction unit 6 outputs a value obtained by subtracting the digital value from the gain measurement unit 5 from the digital value from the target gain setting unit 8 to the determination unit 7. If the output value of the addition / subtraction unit 6 is “0” or a negative value, the determination unit 7 outputs “0” to the switching order setting unit 4. If the output value of the addition / subtraction unit 6 is a positive value, the positive value is output to the switching order setting unit 4. In this manner, the digital value from the target gain setting unit 8 and the digital value from the gain measurement unit 5 are compared by the addition / subtraction unit 6 and the determination unit 7, and whether or not the actual gain of the VGA 2 exceeds the target gain. Is judged.

  When the output from the determination unit 7 is “0”, the switching order setting unit 4 maintains the register value output to the switching selection unit 3 as “5”. Therefore, the combination of ON / OFF control of the switches 22a to 22d by the switching selection unit 3 does not change.

  On the other hand, for example, when the target gain of VGA 2 is changed from 5.0 dB to 4.0 dB, the target gain setting unit 8 outputs a digital value “4” corresponding to the target gain 4.0 dB to the addition / subtraction unit 6. At this time, since the output from the gain measurement unit 5 is “5”, the addition / subtraction unit 6 outputs “1” to the determination unit 7, and the determination unit 7 outputs “1” as it is to the switching order setting unit 4. . That is, since the output from the determination unit 7 becomes a positive value, the switching order setting unit 4 decrements the output register value by “1” and outputs the register value indicating the switching order “4” to the switching selection unit 3. To do.

  The switching selection unit 3 refers to the data table stored in the target gain setting unit 8 and performs ON / OFF control corresponding to the switching order “4”. Thereby, only the amplifier 21d is selected, and the gain of the VGA 2 is controlled to be 4.0 dB which is the target gain.

The same technique as the feedback type AGC control is also disclosed in the following Patent Documents 1 to 4.
JP 2000-201039 A (published July 18, 2000) JP 2005-192060 A (published July 1, 2005) Japanese Patent Laid-Open No. 11-355078 (published December 24, 1999) JP 2005-502233 Gazette (announced on January 20, 2005)

  However, the gains of the amplifiers 21a to 21d provided in the VGA 2 vary depending on the input high frequency. For example, when the frequency of the high frequency signal changes, the gain of the amplifiers 21a to 21c shown in FIG. 12 changes from 1.0 dB to 1.6 dB, and the gain of the amplifier 21d changes from 4.0 dB to 4.4 dB. As shown in FIGS. 14A and 14B, the gain characteristic of the real gain, which is the actual gain of the VGA 2, becomes a gain characteristic having a non-linear region.

  For example, when the target gain is set to 5.0 dB and the register value of the switching order setting unit 4 shown in FIG. 11 is “5”, the gains of the amplifiers 21 a to 21 c are set to 1. When the gain changes to 6 dB and the gain of the amplifier 21 d changes to 4.4 dB, the actual gain of the VGA 2 becomes 6.0 dB as shown in FIG. In this case, since the output from the determination unit 7 is “1”, the register value of the switching order setting unit 4 is reduced by 1 to “4”. In response to this, the switching selection unit 3 performs ON / OFF control of the switches 22a to 22d corresponding to the switching order “4”, and the gain of the VGA 2 becomes 4.4 dB. As a result, the output from the determination unit 7 becomes “0”, the register value of the switching order setting unit 4 is maintained at “4”, and the gain of the VGA 2 remains 4.4 dB.

  In this case, since the target gain is 5.0 dB, the difference from the target gain is 0.6 dB. However, since the real gain corresponding to the switching order “3” is 4.8 dB, the switching order is “3”. The difference between the real gain and the target gain becomes larger than the case where When the register value output by the switching order setting unit 4 is “4” and the outputs of the addition / subtraction unit 6 and the determination unit 7 become positive values by further lowering the target gain, the switching order setting unit 4 Will lower the register value to “3”, but the real gain once rises to 4.8 dB as shown in FIG.

  As described above, when the switching order and the actual gain are in a non-linear relationship due to the change in the frequency of the high frequency signal, the gain of the VGA 2 cannot be appropriately controlled, and the output signal level from the VGA 2 varies greatly depending on the input frequency. This causes a problem.

  The present invention has been made in view of the above problems, and an object thereof is to realize an automatic gain control circuit capable of suppressing variations in output signal level due to changes in the frequency of an input signal.

  In order to solve the above problems, an automatic gain control circuit according to the present invention includes a plurality of signal increase / decrease means for amplifying or attenuating an input signal, and the gain of the input signal is controlled by selection / non-selection of each signal increase / decrease means. Gain control means, gain measurement means for detecting the gain of the gain control means, comparison means for comparing a predetermined target gain with the gain detected by the gain measurement means, and comparison of the comparison means Switching selection means for selecting / deselecting the signal increase / decrease means based on the result, a rank is assigned to each combination of the signal increase / decrease means to be selected, and the frequency of the input signal is a predetermined frequency, The gain of the gain control means is set so as to have linearity with respect to the rank, and the switching selection means uses the gain measurement means in the comparison result by the comparison means. An automatic gain control circuit configured to lower the order of combinations of signal increase / decrease means to be selected when the detected gain is larger than the target gain, the gain control means being changed by changing the frequency A selection restricting means for restricting the switching selecting means from selecting a signal increasing / decreasing means related to a combination of orders not satisfying a linear relationship with the gain of the gain control means when It is characterized by that.

  According to the above configuration, the gain of the input signal is controlled by selection / non-selection of each signal increase / decrease means provided in the gain control means, and selection / non-selection of each signal increase / decrease means is performed by the switching selection means. Further, a gain measuring means for detecting the gain of the gain control means and a comparing means for comparing a predetermined target gain with the gain detected by the gain measuring means are provided. Based on the comparison result of the comparison means, each signal increase / decrease means is selected / deselected.

  In addition, a rank is assigned to each combination of signal increase / decrease means to be selected, and when the frequency of the input signal is a predetermined frequency, the gain of the gain control means is set to have linearity with respect to the rank. Yes. Further, the switching selection means selects a signal to be selected when the gain detected by the gain measurement means is larger than the target gain in the comparison result by the comparison means, that is, when the actual gain of the gain control means is larger than the target gain. It is configured to lower the order of combination of the increase / decrease means. Therefore, at the predetermined input frequency, when the switching selection unit lowers the order of the combination of the signal increase / decrease units to be selected, the gain of the gain control unit is controlled to decrease.

  Here, since the gain or attenuation rate of the signal increasing / decreasing means changes depending on the change of the frequency of the input signal, the gain of the gain control means may be nonlinear with respect to the rank. On the other hand, the selection restricting means restricts the switching selecting means from selecting the signal increasing / decreasing means related to the combination of ranks that do not satisfy the linear relationship with the gain of the gain control means. Can maintain substantially linearity. Therefore, there is an effect that it is possible to realize an automatic gain control circuit that can suppress variations in the output signal level due to changes in the frequency of the input signal.

  In the automatic gain control circuit according to the present invention, the input signal may be a high-frequency signal.

  In the automatic gain control circuit according to the present invention, the plurality of signal increase / decrease means are a plurality of amplifiers connected in parallel to each other, each amplifier is connected to a switch means, and the switching selection means is each The amplifier may be selected / unselected by ON / OFF control of the switch means.

  According to the above configuration, the sum of the gains of the selected amplifiers becomes the gain of the gain control means.

  In the automatic gain control circuit according to the present invention, the plurality of signal increasing / decreasing means are a single amplifier and a plurality of attenuators, and each attenuator is connected in parallel to each other and connected to the output terminal of the amplifier. In addition, each attenuator may be connected to a switch means, and the switching selection means may be configured to select / deselect the attenuator by controlling each switch means on / off. .

  According to the above configuration, a value obtained by subtracting the sum of the attenuation factors of the selected attenuators from the gain of the amplifier becomes the gain of the gain control means.

  In the automatic gain control circuit according to the present invention, the plurality of signal increase / decrease means are a plurality of amplifiers and attenuators connected in parallel to each other, and a switch means is connected to each amplifier and each attenuator, The switching selection means may be configured to select / deselect the amplifier and the attenuator by ON / OFF control of each switch means.

  According to the above configuration, the sum of the gain of the selected amplifier and the attenuation rate of the selected attenuator becomes the gain of the gain control means.

  The tuner according to the present invention includes a frequency selection unit and a frequency conversion unit, and the automatic gain control circuit is provided between the frequency selection unit and the frequency conversion unit.

  The tuner according to the present invention may include a frequency selection unit and a frequency conversion unit, and the automatic gain control circuit may be provided at a subsequent stage of the frequency conversion unit.

  According to the above configuration, a tuner with a stable output level can be realized.

  A tuner according to the present invention includes a frequency selection unit and a frequency conversion unit, and the automatic gain control circuit is provided between the frequency selection unit and the frequency conversion unit and at a subsequent stage of the frequency conversion unit. It is preferable.

  According to the above configuration, a tuner with a more stable output level can be realized.

  The television receiver and the set top box according to the present invention include the tuner.

  According to said structure, a television receiver and a set top box with favorable receiving performance are realizable.

  As described above, the automatic gain control circuit according to the present invention includes a plurality of signal increase / decrease means for amplifying or attenuating the input signal, and the gain of the input signal is controlled by selection / non-selection of each signal increase / decrease means. Based on the comparison result of the control means, the gain measurement means for detecting the gain of the gain control means, the comparison means for comparing a predetermined target gain with the gain detected by the gain measurement means, and the comparison result of the comparison means Switching selection means for selecting / deselecting the signal increasing / decreasing means, and a rank is assigned to each combination of the selected signal increasing / decreasing means, and the gain control is performed when the frequency of the input signal is a predetermined frequency. The gain of the means is set to have linearity with respect to the rank, and the switching selection means is detected by the gain measuring means in the comparison result by the comparison means. When the gain is larger than the target gain, the automatic gain control circuit is configured to lower the order of the combination of the signal increase / decrease means to be selected, and the gain of the gain control means is changed when the frequency is changed. When it becomes non-linear with respect to rank, since it includes a selection limiting means for restricting the switching selection means from selecting a signal increase / decrease means related to a combination of ranks that does not satisfy the linear relationship with the gain of the gain control means, There is an effect that it is possible to realize an automatic gain control circuit capable of suppressing variations in the output signal level due to changes in the frequency of the input signal.

[Embodiment 1]
The first embodiment of the present invention will be described with reference to FIGS. 1 and 2 as follows.

  FIG. 1 is a block diagram showing a configuration of an automatic gain control circuit 1 according to the present embodiment. The automatic gain control circuit 1 is configured to further include a SKIPPER 9 in the automatic gain control circuit 101 shown in FIG. The SKIPPER 9 has a configuration corresponding to the selection limiting means described in the claims, and the switch selection unit 3 turns on / off the switches 22a to 22d according to a predetermined switching order according to the frequency of the input high-frequency signal. It has a function of controlling the register value of the switching order setting unit 4 so as not to perform control.

  For example, when the gain of the amplifiers 21a to 21c is changed to 1.6 dB and the gain of the amplifier 21d is changed to 4.4 dB due to the change of the frequency of the high frequency signal, the real gain is changed to the switching order as shown in FIG. On the other hand, it becomes non-linear. Here, the SKIPPER 9 restricts the switching order setting unit 4 from outputting the register value “4”. Thereby, the switching selection unit 3 is controlled not to perform the ON / OFF control corresponding to the switching order (hereinafter referred to as “nonlinear order”) “4” that does not satisfy the linear relationship with the real gain.

  FIG. 2A is a table showing the switching order, combinations of ON / OFF control of the switches 22a to 22d, and the actual gain when the ON / OFF control corresponding to the switching order “4” is limited. FIG. 2B is a graph showing the relationship between the switching order and the real gain. As described above, the SKIPPER 9 causes the switching order setting unit 4 to skip the register value “4”, so that the real gain can be kept linear with respect to the switching order.

  In other words, the non-linear order can also be expressed as a linear order in which the corresponding real gain is smaller than the real gain corresponding to the lower order switching order when the real gain is monotonically increasing with respect to the switching order. Further, the non-linear order can also be expressed as a linear order in which the corresponding real gain is larger than the real gain corresponding to the lower order switching order when the real gain is monotonously decreasing with respect to the switching order.

  For example, when a positive value signal is input from the determination unit 7 while the switching order setting unit 4 outputs the register value “5”, the switching order setting unit 4 sets the register value “4”. The switching order setting unit 4 is controlled to output the register value “3” by SKIP. As a result, the switching selector 3 performs the ON / OFF control corresponding to the switching order “3”, so that the substantial gain is controlled to 4.8 dB. That is, when a positive value signal is input from the determination unit 7 in a state where the switching order setting unit 4 outputs the register value “5” as in the conventional automatic gain control circuit 101, the register value “4”. The difference between the real gain and the target gain can be reduced compared to the case of outputting.

  As shown in FIG. 13, when the real gain has linearity with respect to the switching order, SKIPPER 9 does not limit the output of the register value to the switching order setting unit 4. The SKIPPER 9 stores data of a frequency range (hereinafter referred to as “non-linear range”) of a high-frequency signal in which the real gain is nonlinear with respect to the switching order. Based on the data, the SKIPPER 9 controls the switching order setting unit 4 not to output a register value corresponding to the nonlinear order only when the input frequency is in the nonlinear range.

  Further, when the nonlinear order differs depending on the input frequency, SKIPPER 9 also stores data indicating the correspondence between the input frequency range and the nonlinear order. These nonlinear range and nonlinear order data can be grasped beforehand by converting electrical characteristics including gain characteristics with respect to the input frequency into data at the circuit design stage.

  In this way, the SKIPPER 9 restricts the switching selection unit 3 from performing the ON / OFF control corresponding to the switching order that becomes a non-linear point due to the change of the input frequency, so that the difference between the real gain and the target gain is reduced. Therefore, variation in the output signal level of the VGA 2 due to a change in the input frequency can be suppressed.

  As shown in FIG. 12, the VGA 2 is configured to select / unselect the amplifiers 21a to 21d by ON / OFF control of the switches 22a to 22d connected in series to the amplifiers 21a to 21d, respectively. It is not limited to. For example, a switch may be disposed between each of the amplifiers 21a to 21d and the power supply line, and each switch may be controlled on / off. In this way, the amplifiers 21a to 21d may be selected / unselected by controlling the operations of the amplifiers 21a to 21d themselves.

[Embodiment 2]
A second embodiment of the present invention will be described below with reference to FIGS. In the first embodiment, the case where the VGA is configured by an amplifier has been described. In the present embodiment, the case where the VGA is configured by an amplifier and an attenuator (ATT) will be described.

  FIG. 3 is a circuit diagram showing a configuration of the VGA 2a according to the present embodiment. The VGA 2a includes one amplifier 21e, four switches 22a to 22d, and four ATTs 23a to 23d. The ATT 23a and the switch 22a, the ATT 23b and the switch 22b, the ATT 23c and the switch 22c, and the ATT 23d and the switch 22d are connected to each other in series, and a series circuit of the ATT 23a and the switch 22a, a series circuit of the ATT 23b and the switch 22b, The series circuit with the switch 22c and the series circuit with the ATT 23d and the switch 22d are connected in parallel between the output terminal of the amplifier 21e and the output terminal of the VGA 2a.

  When the frequency of the high frequency signal is a normal level, the attenuation rate (loss) of the ATTs 23a to 23c is −1.0 dB, and the loss of the ATT 23d is −4.0 dB. The gain of the amplifier 21e is 10.0 dB regardless of the input frequency. As in the case of the first embodiment, the switches 22a to 22d are ON / OFF controlled by the switching selector 3 shown in FIG. 1, and the total gain of the amplifier 21e and the ATTs 23a to 23d becomes the gain of the VGA 2a.

  FIG. 4A shows a data table stored in the target gain setting unit 8 shown in FIG. As a result, as shown in FIG. 4B, when the input frequency is a normal level, the target gain has linearity with respect to the switching order.

  Here, assuming that the loss of the ATTs 23a to 23c changes to -1.6 dB and the loss of the ATT 23d changes to -4.4 dB due to the change of the input frequency, as shown in FIGS. 5 (a) and 5 (b). The real gain is non-linear with respect to the switching order. In this case, since the switching order “5” is a non-linear order, the SKIPPER 9 shown in FIG. 1 does not perform the ON / OFF control corresponding to the switching order “5”. Is controlled not to output the register value “5”.

  As a result, as shown in FIGS. 6A and 6B, since the real gain can be kept linear with respect to the switching order, the variation in the output signal level of the VGA 2a due to the change of the input frequency can be suppressed. it can.

  Next, another modification of the VGA will be described.

  FIG. 7 is a circuit diagram showing a configuration of the VGA 2b according to the present embodiment. The VGA 2b includes four amplifiers 21f to 21i, eight switches 22a to 22h, and four ATTs 23e to 23h. Amplifier 21f and switch 22a, amplifier 21g and switch 22b, amplifier 21h and switch 22c, amplifier 21i and switch 22d, ATT23e and switch 22e, ATT23f and switch 22f, ATT23g and switch 22g, and ATT23i and switch 22i are connected in series with each other. A series circuit of an amplifier 21f and a switch 22a, a series circuit of an amplifier 21g and a switch 22b, a series circuit of an amplifier 21h and a switch 22c, a series circuit of an amplifier 21i and a switch 22d, and an ATT 23e and a switch 22e. The series circuit, the series circuit of ATT 23f and switch 22f, the series circuit of ATT 23g and switch 22g, and the series circuit of ATT 23i and switch 22i are connected in parallel to each other. The switches 22a to 22h are ON / OFF controlled by the switching selector 3 shown in FIG. 1, and the total gain of the amplifiers 21f to 21i and ATTs 23e to 23h becomes the gain of the VGA 2b.

  Here, when the switching order assigned for each combination of ON / OFF control of the switches 22a to 22h and the gain of the VGA 2b are in a linear relationship at a predetermined input frequency, the switching order and the VGA 2b are changed due to a change in the input frequency. When the gain becomes nonlinear, the SKIPPER 9 shown in FIG. 1 does not output a register value indicating the nonlinear order to the switching order setting unit 4 so that the switching selection unit 3 does not perform ON / OFF control corresponding to the nonlinear order. To control.

  As a result, the gain of the VGA 2b can maintain linearity with respect to the switching order, and variations in the output signal level of the VGA 2b due to changes in the input frequency can be suppressed.

[Embodiment 3]
A third embodiment of the present invention will be described below with reference to FIGS. In this embodiment, an example in which the automatic gain control circuit according to the present invention is used for a tuner of a receiver will be described.

  FIG. 8 is a block diagram illustrating a configuration of the tuner 30 according to the present embodiment. The tuner 30 includes a high-pass filter 31, an ATT 32, three AGC amplifiers 33a to 33c, three band-pass filters 34a to 34c, a mixer 35 and a transmitter 36, and further includes an automatic gain control circuit 1 according to the present invention. I have. In FIG. 8, the automatic gain control circuit 1 is provided between the bandpass filter 34 a and the bandpass filter 34 b, but is not limited to this, and is provided between the bandpass filter 34 a and the mixer 35. It only has to be.

  Thereby, a tuner having a stable output level can be realized.

  FIG. 9 is a block diagram illustrating a configuration of a tuner 40 according to a modification of the present embodiment. The tuner 40 has a configuration in which the positions of the automatic gain control circuit 1 and the AGC amplifier 33c are exchanged in the tuner 30 shown in FIG. As described above, the automatic gain control circuit 1 may be provided in the subsequent stage of the mixer 35.

  FIG. 10 is a block diagram illustrating a configuration of a tuner 50 according to another modification of the present embodiment. The tuner 50 has a configuration in which the automatic gain control circuit 1 is provided in place of the AGC amplifier 33c in the tuner 30 shown in FIG. Thus, the automatic gain control circuit 1 according to the present invention may be provided both between the band-pass filter 34 a and the mixer 35 and at the subsequent stage of the mixer 35. Thereby, the output level of the tuner can be further stabilized.

  Further, by providing these tuners in a television receiver or set-top box, the reception performance of the television receiver or set-top box can be improved.

[Summary of Embodiment]
In each of the above embodiments, the high-frequency signal is input to the automatic gain control circuit. However, the present invention is not limited to this, and may be a signal of another frequency such as an intermediate frequency signal.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The automatic gain control circuit according to the present invention can be suitably applied to a television receiver, a set top box, and the like.

1 is a block diagram showing a configuration of an automatic gain control circuit according to a first embodiment of the present invention. (A) is a table showing the switching order, the combination of switch ON / OFF control, and the actual gain when the ON / OFF control of the switching selection unit is restricted by SKIPPER, (b) It is a graph which shows the relationship between the switching order in a table, and a real gain. It is a circuit diagram which shows the structure of VGA based on the 2nd Embodiment of this invention. (A) is a data table memorize | stored in the target gain setting part of the said automatic gain control circuit, (b) is a graph which shows the relationship between the switching order in the said data table, and a target gain. (A) is a table showing a switching order, a combination of switch ON / OFF control, and a substantial gain when the gain of the VGA amplifier shown in FIG. 3 is changed, and (b) is a table showing switching in the table. It is a graph which shows the relationship between an order | rank and a real gain. (A) is a table showing the switching order, the combination of switch ON / OFF control, and the actual gain when the ON / OFF control of the switching selection unit is restricted by SKIPPER, (b) It is a graph which shows the relationship between the switching order in a table, and a real gain. It is a circuit diagram which shows the structure of VGA which concerns on the modification of the 2nd Embodiment of this invention. It is a block diagram which shows the structure of the tuner which concerns on the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the tuner which concerns on the modification of the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the tuner which concerns on the other modification of the 3rd Embodiment of this invention. It is a block diagram which shows the structure of the conventional automatic gain control circuit. It is a circuit diagram which shows the structure of VGA of the said automatic gain control circuit. (A) is a data table memorize | stored in an external target gain setting part, (b) is a graph which shows the relationship between the switching order in the said data table, and a target gain. (A) is a table showing a switching order, a combination of switch ON / OFF control, and a substantial gain when the gain of the VGA amplifier shown in FIG. 12 changes, and (b) is a table showing switching in the table. It is a graph which shows the relationship between an order | rank and a real gain.

Explanation of symbols

1 Automatic gain control circuit 2, 2a, 2b VGA (gain control means)
3 switching selection section (switching selection means)
4. Switching order setting part (switching selection means)
5 Gain measurement section (gain measurement means)
6 Addition / subtraction unit (comparison means)
7 Judgment part (switching selection means)
9 SKIPPER (selection restriction means)
21a-21i amplifier (amplifier, signal increase / decrease means)
22a to 22h switch (switch means)
23a-23h ATT (attenuator, signal increase / decrease means)
30, 40, 50 Tuner 34a Band pass filter (frequency selection means)
35 Mixer (frequency conversion means)

Claims (10)

A gain control means comprising a plurality of signal increase / decrease means for amplifying or attenuating an input signal, wherein the gain of the input signal is controlled by selection / non-selection of each signal increase / decrease means;
Gain measuring means for detecting the gain of the gain control means;
A comparison means for comparing a predetermined target gain with the gain detected by the gain measurement means;
Switching selection means for selecting / deselecting the signal increase / decrease means based on the comparison result of the comparison means,
A rank is assigned to each combination of signal increase / decrease means selected,
When the frequency of the input signal is a predetermined frequency, the gain of the gain control means is set to have linearity with respect to the rank,
The switching selecting means is configured to automatically lower the order of combinations of signal increasing / decreasing means to be selected when the gain detected by the gain measuring means is larger than the target gain in the comparison result by the comparing means. A gain control circuit,
When the gain of the gain control means becomes non-linear with respect to the rank due to the change of the frequency, the switching selection means selects a signal increase / decrease means related to a combination of ranks that does not satisfy the linear relationship with the gain of the gain control means. An automatic gain control circuit comprising selection limiting means for limiting selection so as not to select.   The automatic gain control circuit according to claim 1, wherein the input signal is a high-frequency signal. The plurality of signal increasing / decreasing means are a plurality of amplifiers connected in parallel to each other,
Each amplifier is connected to a switch means,
3. The automatic gain control circuit according to claim 1, wherein the switching selection means performs selection / non-selection of the amplifier by ON / OFF control of each switch means. The plurality of signal increasing / decreasing means are a single amplifier and a plurality of attenuators,
Each attenuator is connected in parallel with each other and connected to the output terminal of the amplifier,
A switch means is connected to each attenuator,
3. The automatic gain control circuit according to claim 1, wherein the switching selection means performs selection / non-selection of the attenuator by ON / OFF control of each switch means. The plurality of signal increasing / decreasing means are a plurality of amplifiers and attenuators connected in parallel to each other,
A switch means is connected to each amplifier and each attenuator,
3. The automatic gain control circuit according to claim 1, wherein the switching selection means performs selection / non-selection of the amplifier and the attenuator by performing ON / OFF control of each switch means. A frequency selection means and a frequency conversion means,
6. A tuner, wherein the automatic gain control circuit according to claim 1 is provided between the frequency selection means and the frequency conversion means. A frequency selection means and a frequency conversion means,
6. A tuner, wherein the automatic gain control circuit according to claim 1 is provided at a subsequent stage of the frequency conversion means. A frequency selection means and a frequency conversion means,
6. A tuner characterized in that the automatic gain control circuit according to claim 1 is provided between said frequency selection means and said frequency conversion means and at a subsequent stage of said frequency conversion means. .   A television receiver comprising the tuner according to claim 6.   A set top box comprising the tuner according to any one of claims 6 to 8.

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