JP4800642B2 - Multi-value storage means and multi-stable circuit - Google Patents

Description

The first invention relates to a multi-value storage means that can store or input / output a voltage or a potential corresponding to the numerical value or the like in three or three or more possible numerical values (or meanings or contents).
This multi-value storage means can be used as multi-value memory cell, multi-value memory, multi-adic memory or multi-stable circuit, multi-value (or multi-adic) logic circuit, multi-value (or multi-adic) operation Circuit, multi-value computer (or multi-value computer, especially 4, 8, “10”, 16, 32, 64, “100”, 128-base computer), multi-value modulation communication means, multi-value recording means or multi-value (Or multi-adic) can be used as a component of the control means.
The second invention relates to a multi-value storage means capable of reducing the total on-voltage of each one-way on / off control switching means used in the multi-value storage means of the first invention as much as possible.
The third invention relates to a multistable circuit using the multilevel storage means of the first or second invention as a multistable circuit.

The multi-value storage means disclosed in Japanese Patent No. 2853041 (Patent Document 1) has a problem that “the number of parts is large even though the bidirectional pull means described later is not configured”. Of course, even if such a bidirectional pulling means can be constructed, the number of parts is increased.

And, although the multi-value memory means disclosed in JP-2004-88763 (Patent Document 2) can be composed of Nomaryi-off switching means, "highest potential, each voltage supply means for excluding potential supply means minimum potential output There is a problem that bidirectional pulling means (pull-up or pull-down means) is not configured.
This problem causes the following problems. When the potential of the “connected external data line” is higher than the potential of the pull-up means, the external data line cannot be pulled down because there is no pull-down function, and moreover than the potential of the pull-down means. When the potential of the “connected external data line” is lower, the external data line cannot be pulled up because there is no pull-up function, or conversely, the external data line is multi-valued due to its charge. The potential of the input / output terminal of the storage means is pulled up higher than the potential of the pull-up means, or pulled down lower than the potential of the pull-down means. Change, reading of wrong stored contents, or delay of reading time ”.

●● Related technology: Japanese Patent Application No. 2004-303564
(Multi-value storage means, the same invention of the inventor's previous application, unpublished at the time of filing this application)

Patent No. 2853041 (multi-value storage means, application of the present inventor) JP 2004-88763 (same as above) (priority date: June 24, 2002)

● Non-patent document 1: “Electrical Society of Electrical Technical Terminology No. 9 Power Electronics, Author: “The Electrotechnical Society, Electrical Terminology Standards Special Committee”, “The Institute of Electrical Engineers, Semiconductor Power Converter Terminology Subcommittee”, Editor: The Institute of Electrical Engineers of Japan, Corona Co., Ltd. February 28, 2000 Issued the first revised edition of Japan.
“* Definition of“ controllable switching means ”and“ on / off control switching means ”.
● Non-patent document 2: “Power Electronics Circuit”, Author: The Institute of Electrical Engineers of Japan, Semiconductor Power Conversion System Research Special Committee / Many Members, Editor: The Institute of Electrical Engineers of Japan, Semiconductor Power Conversion System Research Special Committee, Ohm Corporation Issued the first edition of the first edition on November 30, 2000.
“* Definition of“ controllable switching means ”and“ on / off control switching means ”.

■■ Problems to be solved by the first invention ■■
The conventional problems "or often parts, Or, the highest potential, or not configured the bidirectional pull means for output to each potential supply means except potential supply means of the lowest potential" is to be is there. ( Task )
Accordingly, the first invention provides a "come in reduce the number of parts, bidirectional pull means can be constituted for output to each potential supply means, excluding the highest potential, the potential supply means of the lowest potential" multilevel storage means The purpose is to do. (Object of the first invention)
■■ Problems to be solved by the second invention ■■
It is desired that the total on-voltage of each one-way on / off control switching means used in the multi-value storage means of the first invention is made as small as possible. ( Task )
Therefore, the second invention provides a multi-value storage means that “the total on-voltage of each unidirectional on / off control switching means used in the multi-value storage means of the first invention can be reduced as much as possible”. It is aimed. (Object of the second invention)
■■ Problems to be solved by the third invention ■■
An object of the present invention is to provide a multi-stable circuit using the multi-value storage means of the first or second invention.
(Object of the third invention)

■■ Means for the first invention to solve the problem ■■
That is, the first invention is the multivalue storage means described in claim 1. There is no problem even if one binary storage means is provided between each potential supply means from the first potential supply means to the Nth potential supply means, and the input / output parts of all the binary storage means are connected. In addition, regarding the binary storage means between the first and second potential supply means, the output pull-up ON / OFF control switching means is made unidirectional, and between the (N-1) th and Nth potential supply means. With respect to the binary storage means, the output pull-down on / off control switching means is made unidirectional, and when N> 3, binary storage is performed between the second to (N-1) potential supply means. an on-off control switching section for the output pull-up the on-off control the switching means of the output pull-down-is in one direction with respect to means. These unidirectional on / off control switching means are completely reverse-blocking, and can be kept off with respect to the reverse voltage even during on-drive.

As a result, the (N−1) number of binary storage means operate in cooperation as a multi-value storage means. As described above, at least a specific output pull-up on / off control switching means and a specific output pull-down on / off control switching means are unidirectional on / off control so as not to short-circuit the power supply between them. Switching means.
Moreover, a combination of output pull-up on / off control switching means and output pull-down on / off control switching means is connected to each of the second to (N-1) potential supply means. In other words, each combination of both on / off control switching means constitutes one bidirectional pull means.
For example , when the multi-value storage means holds one potential among the first potential to the Nth potential, the output pull-down on / off for the potential and the potential more than the potential with the potential as a boundary. All the off- control switching means and all the on-off control switching means for the output pull-up below the potential and the potential are driven on. However, as described above, since at least a specific on / off control switching means is unidirectional and is off with respect to the reverse voltage even when it is turned on, its potential “ on / off for output pull-up” Since only the control switching means or the output pull-down on / off control switching means or both "is turned on, a power supply short circuit does not occur. When only both of them are on, both function as bidirectional pulling means.

■■ Means for the second invention to solve the problem ■■
That is, according to the second invention, each of the unidirectional on / off control switching means “when the on / off control switching means is on”, the roles of the drain and source can be interchanged depending on the applied voltage direction 2. The multi-value storage means according to claim 1, wherein the gate of the “insulated gate type FET” is connected in series so as to connect the gate to the source and the back gate.

■■ Means for the third invention to solve the problem ■■
That is, the third invention is a multi-stable circuit using the multi-value storage means of claim 1 or 2 as a multi-stable circuit.

■■ Effects of the first invention ■■
The multi-level storage unit of the first invention has at least a "parts, deer can also configure the bidirectional pull means for outputting the highest potential, the potential supply means excluding the potential supply means minimum potential ”Has the effect.
Accordingly, since the bidirectional pulling means is substantially formed from the second potential supply means to the (N-1) th potential supply means, the external data line is connected to the entrance / exit means (eg, input / output). When the stored data is read out by being connected to the terminal, etc.), the external data line is stored in the memory regardless of whether the potential of the external data line is higher or lower than the potential of the “memory content at the time of reading”. Depending on the content, it may be pulled up or pulled down, so there is no readability, no change in the memory content at the time of reading, no reading of the wrong memory content, and a short reading time. The multi-value storage means of the present invention also has the effect.

■■ Effects of the second invention ■■
Thereby, the ON voltage of the on-off control the switching means to be its components in that the unidirectional on-off control the switching means each (each) is equivalent - the "role insulated gate FET diode means" Since it is included in the forward voltage, the total ON voltage of each one-way ON / OFF control switching means can be reduced as much as possible.

■■ Effects of the third invention ■■
Accordingly, the configuration of the multistable circuit of the third invention is exactly the same as the configuration of the multivalue storage means of the first or second invention, and only the field of use is widened. It can be used as a stable circuit.

  In order to explain each invention in more detail, this will be described with reference to the accompanying drawings. Note that the potential of the power supply line V0 is represented by the potential v0, the potential of the power supply line V1 is represented by the potential v1, and thereafter, similarly, the potential v2 to the potential v (n-1) from the power supply line V2 to the power supply line V (n-1). ). Further, the potential increases in order from the potential v0 to the potential v (n-1).

The first embodiment (first and third inventions) shown in FIG. 1 is a 10-value multi-value storage means, where N (= n) is 10 and the potentials v0 to v9 are sequentially described above. The power supply line V0 to the power supply line V9 correspond to the first potential supply means to the Nth potential supply means, respectively, and the input / output terminal Tio serves as the entrance / exit means described above. Equivalent to. In FIG. 1, the conductive wires having the same reference numerals with respect to the reference symbols ct1 to ct3 are in a conductive state.
Nine complementary bipolar binary memories are connected between the power supply lines V0 to V9. One-way on / off control switching means (PNP and PNP) are connected to the output pull-up switching means of the memory between the power supply line V0 and the power supply line V1 so that there is no problem even if all binary memory input / output parts are connected. A series circuit of diodes), and a unidirectional on / off control switching means ( " PNP ") for the output pull-up switching means and the output pull-down switching means of the memory between the power supply lines V1 to V8. ”And “ diode series circuit ” and “ diode and NPN series circuit ” ), and a unidirectional on / off control switching means (diode) for the output pull-down switching means of the memory between the power supply line V8 and the power supply line V9. And NPN series circuit).
After all, each of the power supply lines V1 to V8 is connected to one pair of "the above-described unidirectional " output pull-up switching means and output pull-down switching means " ". One directional pulling means is formed. This bidirectional pull means is the same in other embodiments. In addition, when the multi-value storage means of the present invention including the embodiment of FIG. 1 is used as a memory cell, a word selection method can be used.

Input-output type that is, each binary memory: is used "to input the write signal, the portion and outputs a read signal (= entrance means example.. Input and output terminals) common type."
The first embodiment uses, for example, the potential of the power supply line V0 corresponding to the numerical value “0”, the potential of the power supply line V1 corresponding to the numerical value “1”,..., And the potential of the power supply line V9 corresponding to the numerical value “9”. Then, the external data line is connected to the input / output terminal Tio by a selection switch or the like at the time of writing and reading. At the time of writing, the potential of the input / output terminal Tio is pulled up or down to “a potential corresponding to the written numerical value”.
Of course, it is possible to use each power supply potential in correspondence with an arbitrary code, meaning, or content. For example, numerical values “−2” to “7” or characters “a” to “j” may be used instead of the numerical values “0” to “9”.
1 indicates that the diode indicated by the dotted line may or may not be present. However, in the event that the potential of the input / output terminal Tio is lower than the potential of the power supply line V0 or higher than the potential of the power supply line V9. It is a diode for protection when it becomes. When both diodes are present, the configuration of all binary memories is exactly the same, which is convenient for IC implementation. Similarly, in other embodiments described later, these protective diodes or diode means may be connected.
Further, since each transistor on the left side of FIG. 1 in each binary memory is difficult to be turned off due to the presence of each diode including the protective diode, the diagram in each binary memory is improved in order to improve each off drive. Instead of each resistor on the left side, it is possible to use one “resistor and diode series circuit” one by one. This also applies to the embodiment shown in FIG.
Then, if the on-drive voltage polarity is the same as that of each bipolar transistor, a bipolar mode SIT or GTBT (bipolar FET having a grounded groove electrode) can be used one by one instead.
The 10-value multi-value storage means (Embodiment 1) can be used as a 10-stable multi-stable circuit, that is, a 10-stable circuit.

In the embodiment shown in FIG. 1, the "power supply (not shown) and all circuit components" between the power supply line V8 and the power supply line V1 are removed, leaving the input / output terminal Tio, and the power supply line V8 and the power supply line V1 are directly connected. Thus, an embodiment (first and third inventions) of ternary multi-value storage means in which both power supply lines are made common is possible. That is, it is a ternary storage means in which a binary memory between the power supply line V9 and the power supply line V8, a binary memory between the power supply line V1 and the power supply line V0, and an input / output terminal Tio are connected. This also applies to the other embodiments described later. The binary memory having the highest potential, the binary memory having the lowest potential, and the input / output terminal Tio are left in the same manner, and the binary memory is directly connected to the upper and lower sides. Storage means (first and third inventions) are possible.
In the embodiment of FIG. 1, the “power supply (not shown) and binary memory” between the power supply line V2 and the power supply line V1 is removed, and the power supply line V2 and the power supply line V1 are directly connected to share both power supply lines. The embodiment of the nine-value multi-value storage means (first and third inventions) is possible, and further, the “power supply (not shown) and binary memory” between the power supply line V3 and the power supply line V2 are removed, An embodiment (first and third inventions) of an eight-value multivalue storage means in which the power supply lines V1 to V3 are directly connected and the three power supply lines are made common is possible. Similarly, when “removal of power supply and binary memory and common use of power supply line” are sequentially performed, each of the 7-value to 4-value multivalue storage means (first and third inventions) becomes possible.
The same applies to other embodiments described later, and different embodiments having different multi-value numbers (for example, N of N values, 10 for 10 values, and so on) can be configured.
Of course, each of these multi-value storage means can be used one by one as a multi-stable circuit.

The third embodiment (first and third inventions) shown in FIG. 2 is a multi-value storage means of n (= N ≧ 3) values, and all MOS FETs are normally-off type, that is, enhancement mode FETs.
As a matter of course, this n-value multi-value storage means can be used as an n-stable multi-stable circuit, that is, an n-stable circuit.
The power supply line V0 to the power supply line V (n-1) correspond to the first potential supply means to the Nth potential supply means, respectively, in order, and between the power supply lines V0 to V (n-1). One binary CMOS memory is connected to each other, and there are (n−1) in total.
One pair of power supply line V1 to power supply line V (n-2) is connected to either "" P-channel MOS / FET and diode series circuit "or" Diode and N-channel MOS / FET series circuit ". Also constitutes a unidirectional on / off control switching means so that the power supply short-circuit does not occur when the (n-1) binary C / MOS memories cooperate to perform n-value memory operation and storage operation. Are connected to diodes DU1 to DU (n-2) and DL2 to DL (n-1).
Usually, the potential v0 is made to correspond to the numerical value “0”, the potential v1 to the numerical value “1”, and similarly to the potential v (n−1), and the potential v (n−1) to the numerical value “n−1”. Of course, other uses are possible.

Specifically, when the input / output terminal Tio holds the potential v0, the transistors QL1 to QL (n-1) are on, but the diodes DL2 to DL (n-1) are turned on to the transistors QL2 to QL ( n-1) and the power supply short circuit between the transistor QL1 are prevented.
Further, when the input / output terminal Tio holds the potential v (n-1), the transistors QU1 to QU (n-1) are on, but the diodes DU1 to DU (n-2) are turned on to the transistor QU (n-1). And the power supply short circuit of the transistors QU1 to QU (n-2) is prevented.
Further, when the input / output terminal Tio holds the potential v1, the transistors QU1 and QL2 to QL (n-1) are on, but the diodes DL3 to DL (n-1) are connected to the transistors QL3 to QL (n-1). The power supply short circuit of the transistor QL2 is prevented. Moreover, the parallel circuit of “the series circuit of the transistor QU1 and the diode DU1” and “the series circuit of the diode DL2 and the transistor QL2” is substantially a bidirectional pulling means, that is, “a means for pulling up or pulling down”. Constitute.
Similarly, when the input / output terminal Tio holds the potentials v2 to v (n−2), a similar parallel circuit substantially constitutes a bidirectional pulling unit.

Note that the multi-value storage means of the present invention performs writing by pulling up / down the input / output terminal Tio and holding it at a predetermined potential or voltage, and reading it detects the potential or voltage at the input / output terminal Tio. And do it.
If the on-drive voltage polarity is the same as that of each MOS • FET, normally-off voltage-driven switching means (eg, IGBT) can be used one by one, and the on-drive voltage polarity is in each direction. If it is the same as the on / off control switching means, one-way IGBT or the like can be used one by one instead.
Furthermore, the back gate of each PMOS • FET is connected to its source or “a power supply line having a higher potential than its source”, while the back gate of each NMOS • FET is connected to its source or “a power supply line having a lower potential than its source”. Etc. ".
Then, in order to completely turn off the transistors QP1 to QP (n-2) and the transistors QN2 to QN (n-1), their on / off threshold voltages are increased by the forward voltage of each diode. Better.

The fourth embodiment (first and third inventions) shown in FIG. 3 is a five-value multivalue storage means (n = 5) . Since the gates of the transistors on the left side of FIG. 3 are directly connected to the drains of the transistors on the right side of FIG. 3 without using a diode, the transistors QP1 to QP (n-2) and the transistors QN2 to QN (n-1) are connected. Since the range of the voltage applied between each gate and source is narrowed, there is an advantage that the burden of applying these voltages is reduced. This advantage is also in Example 5 6,8 4 to 5 and 7 to be described later.
The 5-value multi-value storage means (Embodiment 4) can be used as a 5-stable multi-stable circuit, that is, a 5-stable circuit.

In the fifth embodiment (first and third inventions) shown in FIG. 4, “in the fourth embodiment in FIG. 3, the quinary storage is changed to the quaternary storage, and instead of each diode, its gate, back gate and source are directly connected. "4-value multi-value storage means using one P-type or N-type MOS-FET diode means" one by one.
In each MOS FET functioning as a diode means, the roles of the drain and the source are interchanged depending on the applied voltage direction, and the ON / OFF threshold voltage is the forward voltage of the PN junction between the drain and the back gate. When the on-drive channel and the PN junction operate in parallel. Of course, an embodiment in which only the PN junction operates is also possible. This also applies to Examples 6 to 9 shown in FIGS.
Further, the four-value multi-value storage means (Embodiment 5) can be used as a 4-stable multi-stable circuit, that is, a 4-stable circuit.

Example 6 (first and third inventions) shown in FIG. 5 is also changed from “5-value storage in Example 4 of FIG. 3 to 4-value storage, and instead of each diode, its gate, back gate and source are directly connected. "4-value multi-value storage means using one P-type or N-type MOS-FET diode means" one by one.
This quaternary multi-value storage means (Embodiment 6) can also be used as a 4-stable multi-stable circuit, that is, a 4-stable circuit.

Example 7 (first to third inventions) shown in FIG. 6 is also a quaternary multi-value storage means. Also in the seventh embodiment, when the roles of the drain and source of the diode means can be interchanged depending on the applied voltage direction as described above, in order to reduce the total on-voltage of each “series circuit of the transistor and the diode means” as much as possible. The on-voltage of the transistor is included in the equivalent / forward voltage of the diode means.
Specifically, when the “first MOS FE T functioning as a transistor ” is turned on, the gate of the “ second MOS FE T functioning as a diode means ” is “turned on and the first MOS as a pair partner” - through the FE T "is connected to his back gate and source.
In this case, when a reverse voltage is applied to the “series circuit of both MOS / FETs” while the “ first MOS / FEET to be paired ” is externally turned on, Since the gate of the functioning second MOS • FE T is connected to the back gate and the source via the first MOS • FE T, the second MOS • FE T is driven off by the normal function of the drain and source. The "series circuit of transistor and diode means", that is, the "series circuit of both MOS / FETs" can be kept off with respect to the reverse voltage even when it is externally driven on.
This quaternary multi-value storage means (Embodiment 7) can also be used as a 4-stable multi-stable circuit, that is, a 4-stable circuit.

Example 8 (first to third inventions) shown in FIG. 7 is “transistors constituting the constituent elements of each one-way on / off control switching unit in Example 6 of FIG. 5 as in Example 7 of FIG. the oN voltage of "a" multilevel storage means 4 values were included in the equivalent-forward voltage of the diode means "serving as the pair partner". The eighth embodiment of FIG. 7 has the effect that “the problems of the fourth to sixth embodiments of FIGS. 3 to 5 can be solved”.
The problem will be described with reference to Example 4 in FIG. For example, when the transistors QU2 and QN2 are on and the transistors QP2 and QL2 are off, if the potential of the input / output terminal Tio is held at the potential v1 of the power supply line V1 by writing, the transistor QN2 cannot be directly driven off due to the diode DL2. . Eventually, the transistor QN2 is driven off via the transistors QP2 and QL2, which causes a problem that “the writing time cannot be smoothly performed and the writing time becomes long”.
On the other hand, in the eighth embodiment shown in FIG. 7, when the transistor QN2 is driven off by holding the potential of the input / output terminal Tio at the potential v1 of the power supply line V1 in the same manner, Since the transistor QQ2P is directly turned on by this charge as long as “ charge enough to drive the transistor QQ2P ” remains in the capacitor, the charge is directly sucked from the input / output terminal Tio through the transistor QQ2P.
As a result, the eighth embodiment of FIG. 7 has the effect of “smooth writing and shorter writing time than the fourth embodiment of FIG.
This quaternary multi-value storage means (Embodiment 8) can also be used as a 4-stable multi-stable circuit, that is, a 4-stable circuit.

In the ninth embodiment (first to third inventions) shown in FIG. 8, the “ on-voltage of the “ transistor constituting the unidirectional on / off control switching means ” is set to “ the same as in the seventh embodiment of FIG. The “ four-value multi-value storage means” included in the equivalent forward voltage of the “ diode means to be paired ” is an exchange of the upper and lower connections of the transistor and the diode means. However, when switching the connection, the MOS-FET (power supply line side) of the diode means is changed to “P type is N type” and “N type is P type”.
When the transistor is driven off, the MOS FET (on the power supply line side) of the diode means is driven on, so that the discharge of the gate-source capacitance of the transistor is not hindered. If each diode means of the ninth embodiment is a normal diode or "diode means used in the embodiments of FIGS. 4 and 5," etc., the discharge of the gate-source capacitance of the transistor is disturbed. Therefore, Example 9 does not function as a storage unit.
This quaternary multi-value storage means (Embodiment 9) can also be used as a 4-stable multi-stable circuit, that is, a 4-stable circuit.

A tenth embodiment (first and third inventions) shown in FIG. 9 is a 12-value multi-value storage means, and N described above is 12. The tenth embodiment uses n = 12 in the third embodiment of FIG. 2 and uses one resistor instead of each P-channel MOS • FET on the left side of FIG. 2.
Similarly, in the third embodiment of FIG. 2, one resistor can be used instead of each N-channel type MOS • FET on the left side of FIG.
Similarly, in each of Examples 4 to 9 in FIGS. 3 to 8, “Embodiments using one resistor instead of each P-channel type MOS • FET on the left side of each figure” and “Each example on the left side of each figure”. An embodiment in which resistors are used one by one instead of an N-channel type MOS • FET ”is possible.
These multivalue storage means can also be used as a multistable circuit.

An eleventh embodiment (first and third inventions) shown in FIG. 10 is a 10-value multivalue storage means, and N described above is 10. In the first embodiment of FIG. 1, instead of the NPN transistors on the left side of FIG. 1, “resistors having a resistance value smaller than that of each base resistor” are used one by one.
Similarly, in the first embodiment of FIG. 1, “a resistor having a resistance value smaller than that of each base resistor” may be used one by one instead of each PNP transistor on the left side of FIG. 1. In addition, the conducting wire which attached | subjected the same code | symbol regarding code | symbol ct1'-ct3 'is in a conduction | electrical_connection state.
These 10-value multivalue storage means can be used as a 10-stable multistable circuit, that is, a 10-stable circuit.

Finally, in each embodiment, instead of each diode, “bipolar transistor with its collector and base directly connected”, “junction FET with its drain and source directly connected”, “bipolar mode SIT with its drain and gate directly connected” "GTBT", "Normally-off type MOS FET with its gate, back gate and source connected", "Normally off-type MOS FET with its gate and back gate, source and drain connected" or " It is possible to use one normally-off type MOS FET that maintains its back gate potential so that the drain-back gate and the source-back gate do not conduct each other and connects the drain to the gate.
For convenience of explanation, it is called an input / output terminal (corresponding to the entrance / exit means in claim 1), but it does not actually exist as a terminal but is simply a lead or electrode in many cases. This is the same as what is called a base terminal, a base electrode, and a base lead wire of a transistor, for example.

By the way, in the case of binary one digit (digit) and two inputs, there are 4 combinations of input variables, that is, the square of 2 = 4 sets, and in each of the 4 sets, the output method has numerical values “0” and “1” of 2 Therefore, there are 2 4 = 16 types of logic functions and logic processes. Decimal system with 10 values and 1 digit 2 inputs, "10 to the 100th power" type, 10 values with 1 digit and 3 inputs, "10 to the 1000th power" type, 10 values with 2 digits and 2 inputs, "10 to 10,000th power There are multi-valued logic functions and multi-valued logic processing of 10 types, 2 digits and 3 inputs, and “10 to the power of 1 million”, which is exactly “super-astronomical numbers”. Practically, it can be called “infinite”, there is anything, and there is no logical processing that cannot be done (???).
On the other hand, it is said that it is very difficult to maintain quantum coherence. In the case of “Binary Quantum Computer”, “the calculation speed is fast” is “10 to the tens of power” times. “Diversity of logical processing of super-astronomical numbers” and “computation speed of tens of powers / multiple of 10” are not directly compared with each other, but a decimal computer may be more advantageous.

It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to the 1st-3rd invention. It is a circuit diagram which shows one Example common to the 1st-3rd invention. It is a circuit diagram which shows one Example common to the 1st-3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention. It is a circuit diagram which shows one Example common to 1st, 3rd invention.

Claims (3)

When three or three or more predetermined plurals are represented by N,
Having a first potential supply means to an Nth potential supply means for supplying N potentials whose potentials increase in numerical order from the first potential to the Nth potential;
“ Gateway means for inputting a write signal or outputting a read signal therefrom, normally-off one-way on / off control switching means for output pull-up, and normally-off for output pull-down the first binary storage means "having an on-off control the switching means off before and Symbol first potential supply means is provided between said second potential supplying means,
" Entrance means for inputting a write signal or outputting a read signal therefrom, normally-off on / off control switching means for output pull-up, and normally-off 1 for output pull-down provided between the second binary storage means "previous SL (N-1) th potential supply means and the second N potential supply means having a directional on-off control the switching means,
When the N = 4, "and inputs a write signal therefrom, the entrance means and outputs a read signal, a unidirectional on-off control switching means Nomaryi off for output pull-up, the output a third binary storage means "having 1 directional on-off controlling the switching means Nomaryi off of the pull-down and pre-Symbol second potential supply means is provided between said third potential supply means,
When N> 4, each of the third binary storage means is “one two adjacent to each other at the height of the potential from the second potential supply means to the (N−1) th potential supply means”. Between each of the potential supply means,
A multi-value storage means characterized in that all the entrance / exit means are connected and combined into one entrance / exit means. The gate 1 each directional on-off control the switching means is "on-off control switching means and a drain and an insulated gate FET role of the source can be interchanged with each other by 'the applied voltage direction when the on" 2. The multi-value storage means according to claim 1 , wherein both are connected in series so as to be connected to the source and back gate thereof . A multi-stable circuit using the multi-value storage means according to claim 1 as a multi-stable circuit .

Images