JP4803139B2 - Multilayer wiring structure of semiconductor device and moisture detection method of semiconductor device having multilayer wiring - Google Patents

Description

  The present invention relates to a wiring structure of a semiconductor device provided with a multilayer wiring, and more particularly to a multilayer wiring structure of a semiconductor device capable of evaluating moisture resistance and a method of detecting moisture in a semiconductor device having the multilayer wiring.

Conventionally, a multilayer wiring is used in a semiconductor device having a high degree of integration such as an LSI because of the demand for miniaturization. In recent years, due to demands for higher IC speeds and smaller chips, multilayer wiring structures of three or more layers, fine wiring, and low dielectric constant interlayer insulation films have been adopted. Since the mechanical strength is weak, defects are easily introduced, and moisture penetrates from the defects to corrode the wiring material. For example, resistance variation of the resistor occurs, resulting in a decrease in reliability.
Various measures have been studied in order to prevent this phenomenon. For example, Patent Document 1 discloses a technique for covering a metal wiring layer with a silicon nitride film.
Japanese Patent Laid-Open No. 9-17860

As a reliability evaluation method related to the moisture resistance of a semiconductor device, a pressure cooker test (PCT) and a high temperature and high humidity bias (PCT-Bias) are performed.
Conventional semiconductor devices and the like have been subjected to these reliability tests and evaluated the influence of moisture by measuring device characteristic fluctuations using an evaluation element formed on a semiconductor substrate.
In semiconductor devices that require high reliability such as in-vehicle ICs, it is important to measure the presence or absence of moisture in the wiring layer. However, according to conventional evaluation methods, the presence or absence of moisture in the wiring layer is directly measured. There was a problem that it was difficult to do.

  Accordingly, an object of the present invention is to realize a wiring structure capable of directly evaluating the presence or absence of moisture in a wiring layer in a semiconductor device having multilayer wiring and a method for detecting moisture in the semiconductor device having multilayer wiring.

In order to achieve the above object, according to the first aspect of the present invention, in the first aspect of the present invention, a wiring formed on the semiconductor substrate on which the semiconductor element is formed and electrically connected to the semiconductor element, an interlayer insulating film, In a wiring structure of a semiconductor device having a multilayer wiring formed by laminating a wiring layer having an upper side, a thin film resistor formed of a material that is more easily corroded than the wiring is disposed in at least one wiring layer. The resistance value of the thin film resistor can be measured, and a positive potential is applied to the wiring of the wiring layer in which the thin film resistor is disposed or to the wiring of the lower wiring layer adjacent to the wiring layer. The technical means that it is configured to be applied to the thin film resistor is used.

According to the first aspect of the present invention, a wiring layer having a wiring formed in electrical connection with a semiconductor element and an interlayer insulating film is laminated on the semiconductor substrate on which the semiconductor element is formed. In a wiring structure of a semiconductor device having a formed multilayer wiring, a thin film resistor formed of a material that is more easily corroded than wiring is arranged in at least one wiring layer, and the resistance value of the thin film resistor can be measured Therefore, if moisture exists in the wiring layer due to moisture intrusion, etc., the moisture moves through the wiring layer and reaches the thin film resistor, and the thin film resistor is corroded and the resistance rapidly increases. The presence or absence of moisture in the wiring layer can be directly detected by measuring the resistance value of the thin film resistor.
Further, the thin film resistor is configured so that a positive potential can be applied to the thin film resistor with respect to the wiring of the wiring layer in which the thin film resistor is disposed or the wiring of the lower wiring layer adjacent to the wiring layer. Compared to the case where a positive potential is not applied to the substrate, moisture (OH ⁻ in the moisture ) existing between the wiring and the thin film resistor can be accelerated and moved toward the thin film resistor. Thereby, the presence or absence of moisture can be detected with higher sensitivity in a shorter time.

According to a second aspect of the present invention, in the wiring structure of the semiconductor device according to the first aspect , a technical means is used in which the thin film resistors are respectively disposed in all the wiring layers of the multilayer wiring. .

According to the invention described in claim 2 , since the thin film resistors are respectively disposed in all the wiring layers of the multilayer wiring, it is possible to evaluate the presence or absence of moisture in all the wiring layers at a time.

According to a third aspect of the present invention, a wiring layer having a wiring formed by being electrically connected to the semiconductor element and an interlayer insulating film is laminated on the semiconductor substrate on which the semiconductor element is formed. A thin film resistor having a multilayer wiring formed therein, wherein a thin film resistor formed of a material that is more easily corroded by moisture than the wiring is disposed in at least one of the wiring layers, and a resistance value of the thin film resistor is determined. A semiconductor device having a wiring structure configured so as to be measurable is prepared, and the semiconductor device is held under a high-temperature and high-humidity condition rather than a use condition. Moisture present in the wiring layer is detected by applying a positive potential to the thin film resistor with respect to the wiring in the lower wiring layer adjacent to the wiring layer and measuring the resistance value of the thin film resistor. Using the technical means of.

According to a third aspect of the present invention, a wiring layer having a wiring formed by being electrically connected to the semiconductor element and an interlayer insulating film is laminated on the semiconductor substrate on which the semiconductor element is formed. A thin film resistor formed of a material that is more easily corroded by moisture than the wiring is disposed in at least one wiring layer, and the resistance value of the thin film resistor is measured. A semiconductor device having a wiring structure that can be configured is prepared, and the semiconductor device is held under a high temperature and high humidity condition rather than a use condition, and the wiring layer in which the thin film resistor is disposed or the wiring layer A semiconductor device manufacturing process for detecting moisture present in a wiring layer by applying a positive potential to a thin film resistor to a wiring in an adjacent lower wiring layer and measuring a resistance value of the thin film resistor In If moisture has penetrated into the wiring layer, the semiconductor device is held at a higher temperature and higher humidity than the operating conditions, and a positive potential is applied to the thin film resistor, so that the moisture in the wiring layer is reduced. Since diffusion is accelerated and corrosion of the thin film resistor proceeds, the presence of moisture can be detected. Further, whether or not the semiconductor device has a high moisture resistance structure can be evaluated by examining whether or not moisture penetrates into the wiring layer when the semiconductor device is held under high temperature and high humidity conditions.

A wiring structure of a semiconductor device for evaluating moisture resistance according to the present invention will be described with reference to the drawings. FIG. 1 is an explanatory cross-sectional view showing a wiring structure of a semiconductor device for evaluating moisture resistance. FIG. 2 is a schematic diagram showing a wiring structure of the moisture detection circuit. FIG. 3 is an explanatory view showing an example of changing the arrangement position of the thin film resistors.
In each figure, for the sake of explanation, a part is enlarged and exaggerated. In addition, in the following description, when it is described that a certain layer exists on the other layer, a case where the certain layer exists directly on the other layer and a certain layer between the other layer and The case where a 3rd layer is interposed is shown.

(Structure of semiconductor device)
In the present embodiment, a semiconductor device 1 for evaluating moisture resistance in which a CMOS transistor is formed will be described as an example. The CMOS transistor is composed of a PMOS transistor and an NMOS transistor that are separated by a field insulating film formed on the substrate surface 10a of the semiconductor substrate 10.

  The semiconductor device 1 includes a semiconductor substrate 10 on which a PMOS transistor and an NMOS transistor are formed, and a first wiring layer 31, a second wiring layer 32, and a third wiring layer 33 that are sequentially formed on the semiconductor substrate 10. ing. FIG. 1 shows an enlarged portion of a region where the source 10b of the NMOS transistor, the contact silicide film 10c, and the STI film 10d for element isolation are formed.

The first wiring layer 31 is formed on the substrate surface 10 a of the semiconductor substrate 10 and includes the first interlayer insulating film 11 and the first wiring 21.
The first interlayer insulating film 11 is formed of a TEOS film. The first interlayer insulating film 11 is preferably formed of a low dielectric constant low-k film in order to reduce crosstalk, and SiO ₂ , SiOC containing a large amount of carbon in the SiO ₂ film, fluorine-doped silicate It can be formed of a material having a low dielectric constant such as glass (FSG), phosphorus-containing silicate glass (PSG), or boron-phosphorus-containing silicate glass (BPSG).
The first wiring layer 31 is formed with a first via groove 31a for connecting the first wiring 21 to the silicide film 10c.

The first wiring 21 is formed by filling the first wiring part 21a exposed on the upper surface of the second interlayer insulating film 13 formed of Al alloy by sputtering and the first via groove 31a with Al alloy. The first via portion 21b. The first wiring 21 is formed through a barrier layer (not shown) formed of a TiN film or the like in order to prevent diffusion of Al alloy into the first interlayer insulating film 11.
The first wiring 21 is electrically connected to the source 10b of the NMOS transistor via the silicide film 10c at the lower end of the first via portion 21b via the first via groove 31a.

  The second wiring layer 32 is formed on the upper surface of the first wiring layer 31, and the P-SiN film 12 formed to cover the first wiring portion 21 a of the first wiring 21 and the first interlayer insulating film 11. A second interlayer insulating film 13 stacked on the P-SiN film 12, a first SOG (Spin On Glass) film 14 stacked on the second interlayer insulating film 13 for planarization, and a first SOG A third interlayer insulating film 15 laminated on the film 14 and a second wiring 22 are provided.

The second interlayer insulating film 13 and the third interlayer insulating film 15 are formed of a TEOS film. Similar to the first interlayer insulating film 11, the second interlayer insulating film 13 can be formed of another material having a low dielectric constant.
In the P-SiN film 12, the second interlayer insulating film 13, the first SOG film 14, and the third interlayer insulating film 15, a second via groove 32a for connecting the first wiring 21 to the second wiring 22 is formed. ing.

  The second wiring 22 is formed in the same structure as the first wiring 21, and the second wiring portion 22a exposed on the upper surface of the second interlayer insulating film 13 and the second via groove 32a are filled with Al alloy. The second via portion 22b. The second wiring 22 is electrically connected to the first wiring portion 21a of the first wiring 21 at the lower end of the second via portion 22b.

The third wiring layer 33 is formed on the upper surface of the second wiring layer 32, and the fourth interlayer insulating film 16, the thin film resistors 20a and 20b, the fifth interlayer insulating film 17, the second SOG film 18, and the sixth interlayer insulating film. A film 19 and third wirings 23 and 24 are provided.
The fourth interlayer insulating film 16 is formed to cover the second wiring portion 22 a of the second wiring 22 and the third interlayer insulating film 15.

The thin film resistors 20 a and 20 b are strip-like electrode films made of a CrSi film, and are formed side by side on the upper surface of the fourth interlayer insulating film 16. The thin film resistor 20b is disposed below the third wiring 24 described later. The moisture detection circuit 50 including the thin film resistors 20a and 20b and the third wiring 24 will be described later.
The thin film resistors 20a and 20b can be formed of a material other than CrSi as long as it is a conductive material that is easily corroded by an acceleration factor such as applying voltage or applying temperature in the presence of moisture. For example, Ti, Cr, W, Ta, TiW, Cu, etc. can be used.

The fifth interlayer insulating film 17 is laminated to cover the fourth interlayer insulating film 16 and the thin film resistors 20a and 20b. On the fifth interlayer insulating film 17, a second SOG film 18 that flattens the unevenness of the fifth interlayer insulating film 17 is laminated. A sixth interlayer insulating film 19 is stacked on the second SOG film 18.
The fourth interlayer insulating film 16, the fifth interlayer insulating film 17, and the sixth interlayer insulating film 19 are formed of a TEOS film. Similar to the first interlayer insulating film 11, these interlayer insulating films can be formed of other materials having a low dielectric constant.

  In the fourth interlayer insulating film 16, the fifth interlayer insulating film 17, the second SOG film 18, and the sixth interlayer insulating film 19, a third via groove 33a for connecting the second wiring 22 to the third wiring 23 is formed through. Has been.

The third wiring 23 is formed in the same structure as the first wiring 21, and the third wiring portion 23a exposed on the upper surface of the sixth interlayer insulating film 19 and the third via groove 33a are filled with Al alloy. The third via portion 23b. The third wiring 23 is electrically connected to the second wiring portion 22a of the second wiring 22 at the lower end of the third via portion 23b.
The third wiring 24 is formed on the upper surface of the sixth interlayer insulating film 19 and is grounded by an external wiring.

  A protective film 25 made of a P-SiN film or a P-TEOS film is formed so as to cover the upper surface of the third wiring layer 33 and the third wirings 23 and 24.

  Note that an Al alloy such as an Al—Cu alloy or an Al—Si—Cu alloy can be used as the wiring material. In addition, any material other than an Al alloy can be used as long as the material can form a wiring by a sputtering method. By using an Al alloy as the wiring material, it is possible to form a wiring in which the wiring material is less likely to diffuse into the insulating film even when used in a semiconductor device that is exposed to high temperatures such as in-vehicle use.

Next, a wiring structure of a moisture detection circuit that detects moisture present in an interlayer insulating film will be described with reference to FIG.
For example, since the first SOG film 14 or the second SOG film 18 has low mechanical strength, there is a possibility that defects such as cracks may occur. Moreover, since it is porous, moisture easily enters. Therefore, since there is a risk of moisture intrusion depending on the manufacturing process and use environment, it is necessary to examine a structure with high moisture resistance.
Here, the wiring structure of the moisture detection circuit 50 for detecting moisture in the third wiring layer 33 is shown.

FIG. 2 is a schematic view of the moisture detection circuit 50 (M portion in FIG. 1) viewed from above. As shown in FIG. 2, the moisture detection circuit 50 includes thin film resistors 20a and 20b, a third wiring 23, and external wiring that connects them.
The thin film resistors 20a and 20b are formed in a bellows shape, one end of each being grounded by an external wiring via the resistors Ra and Rb, and the other end being connected to a power source Vb. The third wiring 23 is formed in a comb shape above the thin film resistor 20b and is grounded by an external wiring.

Next, a method for evaluating moisture resistance of the semiconductor device 1 will be described.
First, as a moisture resistance evaluation test of the semiconductor device 1, a pressure cooker test (PCT) is performed. The PCT is performed, for example, by holding at a temperature of 121 ° C. and RH 100% for 12 hours.

  Subsequently, a high temperature and high humidity bias (PCT-Bias) is performed. For example, PCT-Bias is performed by applying a voltage of, for example, 30 V to the thin film resistors 20a and 20b by the power source Vb for a certain period of time under the conditions of a temperature of 121 ° C. and RH 85%.

When moisture penetrates into the third wiring layer 33 by the moisture resistance evaluation test, when a positive potential is applied to the third wiring 24 as described above, OH ⁻ derived from moisture is removed from the thin film resistor 20b side. Move to. CrSi constituting the thin film resistor 20b is easily corroded by moisture, and the following reaction occurs in the thin film resistor 20b.

2Cr + 6OH ⁻ = Cr ₂ O ₃ .3H ₂ O + 6e ⁻ (1)

When CrSi is corroded, the resistance value of the thin film resistor 20b increases rapidly compared to the resistance value of the thin film resistor 20a. Therefore, by measuring the resistance value of the thin film resistor 20b, the presence of OH ⁻ , that is, The presence of moisture can be detected directly with high sensitivity.
Here, the evaluation of the presence or absence of moisture is performed, for example, by measuring the resistance value of the thin film resistor 20b by holding for 20 to 30 hours in PCT-Bias. In the present embodiment, if the resistance value of the thin film resistor 20b increases rapidly after being held for 25 hours, moisture exists in the third wiring layer 33, and if the resistance value does not increase, the third wiring layer 33 is present. It can be determined that there is no moisture in it.

If moisture has penetrated into the third wiring layer 33 in the manufacturing process, diffusion of moisture in the third wiring layer 33 is accelerated by PCT and PCT-Bias, and corrosion of the thin film resistor 20b proceeds. The presence of moisture can be detected in a short time.
Whether or not the semiconductor device 1 has a high moisture resistance structure can be evaluated by examining whether or not moisture penetrates into the third wiring layer 33 by a moisture resistance evaluation test.

In the embodiment described above, the thin film resistors 20a and 20b are formed between the fourth interlayer insulating film 16 and the fifth interlayer insulating film 17 in the third wiring layer 33, but are limited to this position. It is not a thing.
For example, as shown in FIG. 3, the second wiring layer 32 is disposed on the upper surface of the P-SiN film 12 (for example, the A portion in the drawing) or the upper surface of the second interlayer insulating film 13 (for example, the B portion in the drawing). You can also. According to this, moisture in the second wiring layer 32 can be detected.
It can also be disposed in the first interlayer insulating film 11 of the first wiring layer 31 (for example, C portion in the figure). According to this, moisture in the first wiring layer 31 can be detected.

The moisture detection circuit 50 may be configured between the second wiring 22 of the lower second wiring layer 32 adjacent to the third wiring layer 33. According to this configuration, moisture between the second wiring 22 and the thin film resistor 20b can be detected.
When the configuration in which the thin film resistors 20a and 20b are respectively disposed in the first wiring layer 31, the second wiring layer 32, and the third wiring layer 33 is used, the moisture resistance of each wiring layer is evaluated by a single moisture resistance evaluation test. be able to.
Here, the positions where the thin film resistors 20a and 20b are arranged are arbitrary as long as the thin film resistors 20a and 20b are close to the wiring above the arranged wiring layer.

  The number of wiring layers in the semiconductor device 1 described above is an example, and can be applied to various semiconductor devices having multilayer wiring.

[Effect of the best form]
(1) In the multilayer wiring structure of the semiconductor device 1, at least one thin film resistor 20a, 20b formed of a material that is more easily corroded than each wiring of the first wiring layer 31, the second wiring layer 32, and the third wiring layer 33. Within one wiring layer, in this embodiment the third wiring layer 33 is arranged so that the resistance values of the thin film resistors 20a and 20b can be measured, so that moisture exists in the wiring layer due to the intrusion of moisture and the like. In this case, moisture moves through the wiring layer and reaches the thin film resistors 20a and 20b, and the thin film resistors 20a and 20b are corroded to increase the resistance, so that the resistance values of the thin film resistors 20a and 20b are measured. By doing so, it is possible to directly detect the presence or absence of moisture in the wiring layer.

(2) Since the thin film resistors 20a and 20b are configured to be able to apply a positive potential to the third wiring 24, the third wiring 24 and the thin film resistor are compared with the case where no positive potential is applied. Moisture (OH ⁻ in the water) existing between 20a and 20b can be accelerated and moved toward the thin film resistors 20a and 20b. Thereby, the presence or absence of moisture can be detected with higher sensitivity in a shorter time.

(3) As a moisture resistance evaluation test of the semiconductor device 1, by performing a pressure cooker test (PCT) and a high temperature and high humidity bias (PCT-Bias) that are held under a high temperature and high humidity condition rather than a use condition, If moisture has penetrated into the third wiring layer 33, the diffusion of moisture in the third wiring layer 33 is accelerated and corrosion of the thin film resistor 20b proceeds, so that the presence of moisture can be detected. .
Whether or not the semiconductor device 1 has a high moisture resistance structure can be evaluated by examining whether or not moisture penetrates into the third wiring layer 33 by a moisture resistance evaluation test.

(4) Once the thin film resistors 20a and 20b are respectively disposed in all the wiring layers (first wiring layer 31, second wiring layer 32, and third wiring layer 33) of the multilayer wiring, The moisture resistance of each wiring layer can be evaluated by the moisture resistance evaluation test.

[Other Embodiments]
(1) In this embodiment, a semiconductor device including a CMOS is shown as the semiconductor device 1, but the present invention is not limited to this. For example, a semiconductor device including an LDMOS, a bipolar transistor, or the like can be used. In addition, since the semiconductor device 1 of the present embodiment is configured to evaluate the moisture resistance of the wiring structure, it is not always necessary to form a device.

(2) In this embodiment, the change in resistance value of the thin film resistor 20b is measured in PCT-Bias. However, the moisture resistance evaluation of the semiconductor device 1 is performed by measuring the change in resistance value of the thin film resistor 20b in PCT. Can also be done. That is, it is not necessary to apply a voltage to the thin film resistors 20a and 20b.

It is sectional explanatory drawing which shows the wiring structure of the semiconductor device for moisture resistance evaluation. It is a schematic diagram which shows the wiring structure of a moisture detection circuit. It is explanatory drawing which shows the example of a change of the arrangement position of a thin film resistor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 10 Semiconductor substrate 11 1st interlayer insulation film 13 2nd interlayer insulation film 14 1st SOG film 15 3rd interlayer insulation film 16 4th interlayer insulation film 17 5th interlayer insulation film 18 2nd SOG film 19 6th interlayer insulation film 20a, 20b Thin film resistor 21 First wiring 22 Second wiring 23, 24 Third wiring 31 First wiring layer 32 Second wiring layer 33 Third wiring layer 50 Moisture detection circuit

Claims (3)

A semiconductor device comprising a multi-layer wiring formed by laminating a wiring layer having a wiring and an interlayer insulating film, which are electrically connected to the semiconductor element, on a semiconductor substrate on which the semiconductor element is formed. In the wiring structure of
A thin film resistor formed of a material that is more easily corroded than the wiring is disposed in at least one of the wiring layers, and is configured to be able to measure a resistance value of the thin film resistor ,
A positive potential may be applied to the thin film resistor with respect to the wiring of the wiring layer in which the thin film resistor is disposed or the wiring of the lower wiring layer adjacent to the wiring layer. Semiconductor device wiring structure. 2. The wiring structure of a semiconductor device according to claim 1, wherein the thin film resistors are respectively disposed in all wiring layers of the multilayer wiring . A semiconductor device comprising a multi-layer wiring formed by laminating a wiring layer having a wiring and an interlayer insulating film, which are electrically connected to the semiconductor element, on a semiconductor substrate on which the semiconductor element is formed. A wiring structure in which a thin film resistor formed of a material that is more easily corroded by moisture than the wiring is disposed in at least one of the wiring layers, and the resistance value of the thin film resistor can be measured. A semiconductor device having
  The semiconductor device is held at a higher temperature and higher humidity than use conditions, and has a positive potential with respect to the wiring of the wiring layer in which the thin film resistor is disposed or the wiring of the lower wiring layer adjacent to the wiring layer A moisture detection method for a semiconductor device having a multilayer wiring, wherein moisture present in the wiring layer is detected by measuring the resistance value of the thin film resistor.

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