JP4823089B2 - 積層型半導体装置の製造方法 - Google Patents
積層型半導体装置の製造方法 Download PDFInfo
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- JP4823089B2 JP4823089B2 JP2007021060A JP2007021060A JP4823089B2 JP 4823089 B2 JP4823089 B2 JP 4823089B2 JP 2007021060 A JP2007021060 A JP 2007021060A JP 2007021060 A JP2007021060 A JP 2007021060A JP 4823089 B2 JP4823089 B2 JP 4823089B2
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- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
- H10W70/465—Bumps or wires
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- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
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- H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
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- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07531—Techniques
- H10W72/07532—Compression bonding, e.g. thermocompression bonding
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- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07531—Techniques
- H10W72/07532—Compression bonding, e.g. thermocompression bonding
- H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
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- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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- H10W72/531—Shapes of wire connectors
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- H10W72/541—Dispositions of bond wires
- H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
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- H10W72/00—Interconnections or connectors in packages
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- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
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- H10W72/874—On different surfaces
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- H10W90/231—Configurations of stacked chips the stacked chips being on both top and bottom sides of an auxiliary carrier having no electrical connection structure
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- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
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- H10W90/00—Package configurations
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- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
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- H10W90/00—Package configurations
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- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
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- H—ELECTRICITY
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- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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- Wire Bonding (AREA)
Description
Claims (3)
- 回路基材の素子搭載部に第1の半導体素子を搭載する工程と、
前記第1の半導体素子の電極パッド上に金属バンプを形成する工程と、
前記回路基材の接続部に、ボンディングツールに支持された金属ワイヤの先端に形成された金属ボールを圧着して接続した後、前記金属ワイヤを繰り出してワイヤリングしつつ前記ボンディングツールを移動させる工程と、
前記金属ワイヤを、前記第1の半導体素子の前記電極パッドの周囲を覆うように設けられた絶縁性保護膜に接触させつつ、前記電極パッド上に形成された前記金属バンプに接続した後、前記ボンディングツールをワイヤ入線方向またはその反対側の方向に移動させる工程と、
前記第1の半導体素子上にスペーサ層を介して第2の半導体素子を積層する工程と
を具備することを特徴とする積層型半導体装置の製造方法。 - 前記ボンディングツールを前記ワイヤ入線方向またはその反対側の方向に移動させることにより、前記金属バンプを潰すことを特徴とする、請求項1記載の積層型半導体装置の製造方法。
- 前記ボンディングツールを前記金属ボールの頂上付近に押し当てることにより、前記金属ボールを前記金属ワイヤの一部と共に潰すことを特徴とする、請求項1記載の積層型半導体装置の製造方法。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007021060A JP4823089B2 (ja) | 2007-01-31 | 2007-01-31 | 積層型半導体装置の製造方法 |
| US12/021,780 US8039970B2 (en) | 2007-01-31 | 2008-01-29 | Stacked semiconductor device and method of manufacturing the same |
| TW097103558A TWI368977B (en) | 2007-01-31 | 2008-01-30 | Stacked semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007021060A JP4823089B2 (ja) | 2007-01-31 | 2007-01-31 | 積層型半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008187109A JP2008187109A (ja) | 2008-08-14 |
| JP4823089B2 true JP4823089B2 (ja) | 2011-11-24 |
Family
ID=39667039
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007021060A Expired - Fee Related JP4823089B2 (ja) | 2007-01-31 | 2007-01-31 | 積層型半導体装置の製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8039970B2 (ja) |
| JP (1) | JP4823089B2 (ja) |
| TW (1) | TWI368977B (ja) |
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| KR20120062366A (ko) * | 2010-12-06 | 2012-06-14 | 삼성전자주식회사 | 멀티칩 패키지의 제조 방법 |
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| JP5595314B2 (ja) * | 2011-03-22 | 2014-09-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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| US20080179757A1 (en) | 2008-07-31 |
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| TWI368977B (en) | 2012-07-21 |
| US8039970B2 (en) | 2011-10-18 |
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