JP4827386B2 - Schottky barrier diode - Google Patents

Description

The present invention relates to a Schottky barrier diode having a guard ring, an N ⁻ layer containing impurities, and an N ⁺ substrate, and in particular, the concentration of impurities contained in the N ⁻ layer is different from that of the guard ring and N ^- than if it is maintained constant regardless of the depth from the interface between the layers, while increasing the share of the electric field at the depth deeper portion from the boundary surface, is possible to increase the breakdown voltage Further, the present invention relates to a Schottky barrier diode that can reduce electric field concentration at a guard ring corner.

  Specifically, the present invention relates to a Schottky barrier diode having a Zener diode function.

  Conventionally, as a power semiconductor element for a relatively large current and high withstand voltage application, a two-terminal diode, a three-terminal structure, a PNP / NPN three-layer Bip-Tr (bipolar transistor) / MOSFET, Many device structures such as SCR (Thyristor) / IGBT having a four-layer structure of PNPN / NPNP are known.

  By the way, a device having any structure always has an ON mode and an OFF mode, and the ultimate ideal characteristic is that the resistance value R = 0 in the ON mode and the resistance value R = ∞ in the OFF mode. Is well known.

  However, in an actual device, the resistance value R ≠ 0 in the ON mode and the resistance value R ≠ ∞ in the OFF mode. That is, in general, a finite forward loss always exists in the ON mode, and a reverse loss exists in the OFF mode.

  Furthermore, since these devices are switched in the operation of the application circuit, these devices also have switching losses, especially in high frequency applications, in addition to the above losses.

  The inventors of the art are working on improving the characteristics of these devices day and night. Among the power semiconductors described above, the types of diodes having a two-terminal structure (and two-layer structure) are further subdivided. Typically, a PN junction diode or a Schottky barrier diode (hereinafter referred to as “SBD”) is known as a diode having a two-terminal structure (two-layer structure). It is also well known that PN junction diodes are bipolar devices and SBDs are (basically) unipolar devices.

  In order to improve the reverse characteristic in the OFF mode of the SBD, that is, in order to obtain a reverse characteristic that has a higher breakdown voltage and can suppress the leakage current IR in a state where a high reverse bias voltage VR is applied. Many techniques for providing a guard ring around the active region on the device surface side have been known.

  For example, Japanese Patent Application Laid-Open No. 5-75100 describes a basic type of such technology and an improved type thereof. FIG. 5 shows a basic type of an SBD with a guard ring structure described in Japanese Patent Laid-Open No. 5-75100, and FIG. 6 shows an improved version of the SBD with a guard ring structure described in Japanese Patent Laid-Open No. 5-75100. FIG. 7 shows the relationship between the reverse bias voltage VR and the leakage current IR described in Japanese Patent Laid-Open No. 5-75100. 5 and 6, 101 is a semiconductor substrate, 102 and 103 are main electrodes, 104 is an insulating film, 111 and 112 are main surfaces, 113 is a first semiconductor region, 114 is a second semiconductor region, and 115 is a first electrode. The third semiconductor region 116 is a fourth semiconductor region.

  In the structure shown in FIG. 5, it is described in JP-A-5-75100 that a guard ring by a pn junction between the third semiconductor region 115 and the first semiconductor region 113 is provided. . In addition, in the electric field intensity distribution at the time of reverse voltage application in the active region near the guard ring (that is, near the end of the active region), the electric field strength near the broken line in FIG. As a result, as shown by curve (1) in FIG. 7, it is described in Japanese Patent Laid-Open No. 5-75100 that an increase in leakage current was caused when a high voltage was applied. ing.

  Further, as a countermeasure, as shown in FIG. 6, by adding the fourth semiconductor region 116, the distribution of the electric field strength is improved. As a result, the reverse characteristic of the SBD is the curve (2) in FIG. JP-A-5-75100 discloses that this is improved as shown in FIG.

  If no protective measures such as a guard ring are provided in the SBD, is the relationship between the reverse bias voltage VR and the leakage current IR as shown by the curve (1) + curve (3) in FIG. Or, the leakage current IR will be more. On the other hand, by providing a guard ring (basic type) as shown in FIG. 5, the relationship between the reverse bias voltage VR and the leakage current IR is shown by curve (1) to point P1 to curve (2 ′) in FIG. ) Will be improved.

  In other words, in the state where no guard ring is provided, the leakage current is not increased until the local breakdown occurs due to the so-called edge effect at the SBD interface or rather at the edge of the SBD active region. The curve will stretch along the curve (3) to a high value and eventually the device will probably be permanently destroyed locally.

  In other words, when the guard ring is provided in the SBD, the edge effect at the edge of the active region and the breakdown due to the high electric field (formation) at the SBD interface are accelerated before the guard ring portion. It can be said that the SBD device main body is protected (protected) by the occurrence of a serious breakdown.

  In other words, it can be said that the presence of the guard ring prevents the device from being destroyed by forcibly (intentionally) shifting the breakdown position from the active region forming portion to the guard ring portion. . As a result, the breakdown voltage of the SBD is limited to the breakdown voltage of the guard ring structure, not the breakdown voltage of the SBD main body. Although the withstand voltage is limited, the leakage current can be kept below a certain value, so that breakdown becomes reversible and does not become an irreversible phenomenon such as permanent destruction. Thus, the device can be used repeatedly, which has the purpose and value of providing a guard ring.

  Thus, it can be considered that the guard ring provides the SBD with a function similar to a known Zener diode. That is, by forming the guard ring structure closer to a Zener diode, or by providing a Zener diode in one place of the device structure in addition to the guard ring structure, the breakdown voltage of the device is reduced. However, the waveform at the time of breakdown can be changed to a sharper waveform (hard breakdown waveform) near a predetermined voltage (VZ).

  Curve (4) in FIG. 7 shows the reverse characteristics when a Zener diode is provided. As described above, the withstand voltage of an SBD with a guard ring is determined by the withstand voltage of the guard ring, but is usually designed and manufactured so that the withstand voltage of the Zener diode is lower than the withstand voltage of the guard ring. The breakdown voltage of an SBD with a Zener diode is determined by the breakdown voltage (VZ) of the Zener diode.

  Details of the reverse withstand voltage (withstand voltage) of the device obtained by the guard ring structure are described in, for example, Japanese Patent Laid-Open No. 5-190831. In Japanese Patent Laid-Open No. 5-190831, the radius of curvature of the PN junction surface forming the guard ring portion is substantially the junction depth (Xj), and the radius of curvature (= junction depth Xj) should be increased. It is described that a breakdown voltage close to that of a parallel plate PN junction can be obtained, and that the breakdown voltage can be further increased by increasing the number of guard rings.

An example of a structure in which the guard ring structure itself has the function of a Zener diode is described in, for example, Japanese Patent Application Laid-Open No. 9-9522. FIG. 8 is a diagram for explaining an example of the structure of a diode described in Japanese Patent Laid-Open No. 9-9522. FIG. 9 is a diagram for explaining another example of the structure of a diode described in Japanese Patent Laid-Open No. 9-9522. FIG. 8 and 9, 161 is an n ⁺ substrate, 162 is an n ^- voltage layer, 163 is a P-type guard ring, 164 is a P ⁺ low resistance layer, 165 is a metal film, 166 is a protective insulating film, and S is a bonding surface. , Z is a pn junction, 163a is a P-type guard ring, and 164a is an n-type region.

As shown in FIG. 8, the PN junction formed by the P region (163) and the n ⁻ epitaxial layer (162) forms a Zener diode, thereby realizing an SBD with a Zener diode. JP-A-9-9522 discloses that this can be done.

Further, as shown in FIG. 9, by forming an n layer (164a) under the P ⁺ layer (163a), the n layer (164a) and the n ⁻ epitaxial layer (162) are converted into a P ⁺ layer ( Japanese Patent Laid-Open No. 9-9522 discloses that the PN junction formed by 163a) forms a Zener diode, thereby realizing an SBD with a Zener diode.

  FIG. 10 is a diagram showing symbols generally indicating PN junction diodes, SBDs, and Zener diodes.

  The present applicant has disclosed an example in which a Zener diode structure is newly added to one place of an SBD device structure with a guard ring in FIG. 11 of Japanese Patent Application No. 2004-56119. FIG. 11 is a diagram showing a device structure of an SBD with a guard ring to which a Zener diode structure disclosed in Japanese Patent Application No. 2004-56119 is added. Specifically, FIG. 11A is a plan view of the device structure, and FIG. 11B is a cross-sectional view of the device structure. As shown in FIG. 11, in this structure, the Zener diode portion provided in the central portion of the SBD active region breaks down before the guard ring region portion provided around the SBD active region, Even when an excessive reverse voltage is applied, the SBD body will be protected more safely by the Zener diode part (and the guard ring part).

Specifically, since the n ⁻ epitaxial layer below the deeper P ⁺ layer at the center of FIG. 11B is thinner than the region other than the center of FIG. 11B, the center of FIG. The electric field strength at the PN junction surface of the portion becomes the highest earlier and as a result, the Zener diode portion at the center of FIG. 11B breaks down first.

  Next, a technique relating to a vertical density profile along the line L1-L1 'in FIG. 11B, for example, of a material wafer used when manufacturing an SBD will be described.

  Issued in March 1979, IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-26, NO. 3 (P243 to P244), FIG. 1 shows a recommended concentration distribution profile. FIG. 12 is an IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-26, NO. 3 of FIG. FIG.

  The above document describes that when the recommended concentration distribution profile in the graph of FIG. 12 is adopted, the minimum forward resistance (Rmin) of the SBD and MOSFET and the desired withstand voltage characteristic can be obtained. That is, the basic idea that the characteristics of the device as a whole are improved as compared with the normal flat concentration profile in the graph of FIG. 12 has been known.

12, W is the thickness (cm) of the n epitaxial layer, VB is the breakdown voltage (V), and Ec is the critical voltage (≈2.2 × 10 ⁵ ( V / cm), Nd = 1.0 × 10 ¹⁴ (1 / cm ³ )), E (x) is the electric field strength (V / cm) at the position x, and Nd (x) is the concentration of the n layer at the position x. (1 / cm ³ ), ε is a dielectric constant (= εo · εsi = 8.854 × 10 ⁻¹⁴ (F / cm) × 11.9 = 1.504 × 10 ⁻¹² (F / cm)), and q is It is the elementary charge (= 1.602 × 10 ⁻¹⁹ (C)).

In addition, E (x) in the equation (11) in FIG. 12 and Nd (x) in the equation (12) are modified, and the concentration profile value normalized by dividing both sides by (3qVB / εEc ² ), A one-dimensional plot is made in the graph of FIG.

  If the concentration profile of the equation (12) that gradually increases (non-linear) as shown in the graph of FIG. 12, the electric field is not linear compared to the conventional flat concentration profile shown in the graph of FIG. It is described in the above-mentioned document that it is eliminated and becomes rounded, and that the total thickness can be reduced by Δt.

  Further, as an SBD in which the concentration of impurities contained in the epitaxial layer is increased as the depth from the surface of the device is increased, an SBD described in, for example, Japanese Patent Application Laid-Open No. 2000-261006 is known. (The structure in which the concentration of impurities contained in the epitaxial layer is increased as the depth from the surface of the device increases is hereinafter referred to as “graded epitaxial layer structure”.) FIG. 13 is described in Japanese Patent Application Laid-Open No. 2000-261006. FIG. 6 is a diagram showing a concentration distribution of impurities contained in an epitaxial layer of SBD that has been formed. Specifically, FIG. 13A shows the relationship between the concentration of impurities contained in the SBD epitaxial layer and the depth X from the surface of the SBD, and FIG. 13B shows the space charge of the epitaxial layer and the SBD. FIG. 13C shows the relationship between the electric field strength of the epitaxial layer and the depth X from the surface of the SBD.

  In the SBD described in Japanese Patent Laid-Open No. 2000-261006, as indicated by a solid line in FIG. 13A, the concentration of impurities contained in the epitaxial layer is such that the depth X from the surface of the SBD is a predetermined depth. It is maintained at a constant concentration until Further, when the depth X from the surface of the SBD becomes deeper than the predetermined depth, the concentration of impurities contained in the epitaxial layer is gradually increased as the depth X increases. The space charge distribution formed at this time is as shown by a solid line in FIG.

  Furthermore, when the depth X from the surface of the SBD becomes deeper to the vicinity of the silicon substrate, the concentration of impurities contained in the epitaxial layer is rapidly increased.

  As described above, as shown in FIG. 13C, the effect that the electric field of the surface that becomes the SBD interface decreases from “b” to “b” is obtained.

  Specifically, when the concentration of impurities contained in the epitaxial layer is constant regardless of the depth X from the surface of the SBD, as shown by a broken line in FIG. As indicated by “B” in (c), it decreases linearly from the SBD interface. On the other hand, when the concentration of impurities contained in the epitaxial layer is set as indicated by a solid line in FIG. 13A, the electric field strength is rounded as indicated by “A” in FIG. The distribution is tinged.

That is, when “B” is shown in FIG. 13C, there are many portions with high electric field strength on the surface side of the SBD. On the other hand, in the case indicated by “A” in FIG. 13C, the burden on the surface side of the SBD is reduced, and the burden (electric field) on the deeper inside of the n ⁻ layer and on the N ⁺ substrate side is correspondingly reduced. As a result, the slope of the electric field intensity distribution is also reduced, and the electric field is distributed not only in a part of the n ⁻ layer but in the entire depth X direction.

Therefore, in the case indicated by “A” in FIG. 13C, the electric field strength at the surface, that is, the SBD interface can be lowered as compared with the case indicated by “RO” in FIG. In other words, by reducing the electric field strength at the SBD interface, the leakage current can be reduced, and many good characteristics such as reduction of the mirror image effect and reduction of the Φ _B (barrier height) reduction phenomenon can be obtained. Obtainable.

  Both the equation in FIG. 12 and the graph in FIG. 13A show that the concentration of impurities contained in the epitaxial layer increases as the depth from the surface of the SBD increases. In the graph as shown in FIG. 13A, it is easier to grasp numerically what the concentration of impurities contained in the epitaxial layer is.

  The fact that it is easy to grasp numerically also leads to good controllability of the concentration of impurities contained in the epitaxial layer in the process of growing the epitaxial layer. In addition, when performing device simulation, it is easy to set the impurity concentration regardless of the numerical calculation method or the analysis method. Therefore, it will be very useful in examining the relationship between the characteristics of the prototype sample and the materials and process conditions used.

  The technical background described above can be summarized as follows.

(1) For SBD, it is necessary to have a guard ring structure in order to safely protect the SBD (interface, active region) portion of the main body and to withstand severe operation for a long period of time. It is.

(2) For the SBD, having a guard ring structure may not be sufficient depending on the use conditions (operating conditions) and in a reverse resistance test such as an avalanche resistance. That is, there is a case where it is desired to break down the device earlier near a desired voltage (hereinafter referred to as “the Zener voltage (VZ)). Thereby, a lower resistance and a thinner n ^−. In such a case, it may be necessary to add a Zener diode function in addition to the guard ring structure described above. .

(3) When adding a Zener diode to the SBD, there are a method of modifying with a guard ring structure and a case where a Zener diode part is separately provided in a part of the SBD structure.

(4) When manufacturing an SBD with a guard ring and a Zener diode, the electric field strength can be made smaller including the SBD main body and other parts, and local breakdown can be avoided. If a structure such as an inclined epitaxial layer structure is not used, a good device cannot be obtained when viewed comprehensively.

A Zener diode utilizes Zener breakdown (an emission phenomenon due to an internal electric field). In other words, this is a PN junction when the concentration on the n ⁻ layer side is higher than that of a normal PN junction that can be approximated by a so-called one-side stepped junction. Therefore, as a general interpretation, there are many cases where the Zener voltage VZ is about 5 to 8 (V). In this specification, in view of the needs on the application circuit, a intensive and sharper breakdown waveform is generated at a desired Zener voltage of VZ = 10 to 100 (V), unlike a general interpretation. Including the one shown, it is called a Zener diode in a broader sense.

  FIG. 14 is a diagram showing a circuit of a one-stone forward converter described in Japanese Patent Laid-Open No. 5-336749. The circuit shown in FIG. 14 is used as, for example, a power application circuit for charging a battery or the like from an in-vehicle generator. Of the two diodes D1 and D2 in FIG. 14, D1 is called a rectifying diode and D2 is called a flywheel diode.

  In the circuit shown in FIG. 14, the first mode in which the smoothing capacitor C is charged through the coil L through the rectifying diode D1 and the energy (charge) stored in the smoothing capacitor C are used for the flywheel. There is provided a second mode that circulates through the diode D2. In the first mode, the rectifying diode D1 is turned on and the flywheel diode D2 is turned off. On the other hand, in the second mode, the rectifying diode D1 is turned off and the flywheel diode D2 is turned on. That is, the rectifying diode D1 and the flywheel diode D2 are repeatedly turned ON / OFF alternately.

  FIG. 15 is a diagram showing the voltage VD2 applied to the flywheel diode D2 shown in FIG. 14, the current ID2 flowing therethrough, and the like. Specifically, FIG. 15A shows a relationship between the voltage VD2 applied to the flywheel diode D2 and the time t, and FIG. 15B shows the current ID2 flowing through the flywheel diode D2 and the time t. FIG. 15C showing the relationship is an enlarged view of the voltage VD2 applied to the flywheel diode D2 near the time t1 and the current ID2 flowing therethrough.

  As shown in FIG. 15, at the time t1 when the circuit shown in FIG. 14 is switched from the second mode to the first mode and the flywheel diode D2 is switched from ON to OFF, the flywheel diode D2 A rising voltage VSP (spike voltage) is generated.

  Specifically, as shown in FIG. 15C, the splashing voltage VSP may take the maximum value at the inflection point when the current ID2 flowing through the flywheel diode D2 is reversely recovered (during recovery). Are known.

  FIG. 16 is a diagram showing in detail the vicinity where the jumping voltage VSP is generated. As shown in FIG. 16, for example, V0 = 10 (depending on circuit use conditions such as L value, (di / dt) value, circuit operating frequency, etc. used in the circuit shown in FIG. Even if it is set to V), VSP = 100 (V) may be reached.

  In such a case, the breakdown voltage (VR) of the SBD used as the flywheel diode D2 needs to be at least VR> VSP. Therefore, for example, an SBD having a high breakdown voltage of VR≈120 (V) will be selected.

  In addition to the above description, as a higher breakdown voltage application example, when a 200 (V) power supply is used, for example, a device with a VR = 600 (V) rating is usually selected. Further, in consideration of the spike voltage VSP, a safety factor of 2 times is applied, and a device with a VR = 1200 (V) rating may be selected. These are not rare cases. In particular, the higher the operating frequency, the more annoying the generation of a high spike voltage VSP (= −L · (di / dt)).

  For example, in the circuit shown in FIG. 14, the generation of the spike voltage VSP is inevitable, and the generation of a voltage up to a certain level must be permitted. It is assumed that a voltage (VSP) higher than the withstand voltage VZ of the Zener diode and a level (VSP) that occurs almost rarely is borne by the characteristics of the Zener diode. The Zener diode almost completely cuts the voltage higher than the withstand voltage VZ of the Zener diode. For example, in the above example, when the withstand voltage VZ of the Zener diode is set to 80 (V), the Zener diode Even if the variation of the withstand voltage VZ of the diode is taken into consideration, a device (SBD) with an SBD withstand voltage VR≈VZ (= 80 (V)) + 10 (V) = 90 (V) rated is sufficient.

That is, when applied to the example shown in FIG. 5, a first semiconductor region ^- it is possible to reduce the thickness of the (n epitaxial layer) 113, a first semiconductor region ^- specific resistance of the (n epitaxial layer) 113 ([rho ) Can be reduced.

  As described above, with an SBD with a Zener diode, there is a possibility that the loss during operation can be significantly reduced in many other application circuits including the application circuit shown in FIG.

FIG. 17 is a diagram showing current concentration in a guard ring corner portion of a conventional SBD. Specifically, FIG. 17 is a diagram corresponding to FIG. 8 of JP-A-2002-203955. FIG. 18 is an enlarged view of a part of FIG. Specifically, FIG. 18 is a diagram corresponding to FIG. 11 of Japanese Patent Laid-Open No. 2002-203955. 17 and 18, 201 is an SBD, 202 is a silicon substrate, 203 is an N ^- layer, 204 is a guard ring, 205 is a depletion layer, 209 is an outer corner of the guard ring, 210 is an electron, 211 is an oxide film, Reference numeral 212 denotes a contact opening end.

In Japanese Patent Laid-Open No. 2002-203955, an SBD having a guard ring structure as shown in FIGS. 5 and 17 in a normal (n ⁻ layer / N ⁺ substrate layer) material wafer is as follows. It is described that there is a problem.

(1) In the guard ring outer corner portion 209 (inside the shaded portion in FIGS. 17 and 18), the electric field tends to concentrate under the reverse bias condition.

(2) Since the hole (Jp) current generated in the portion is attracted directly below the SiO ₂ film under the anode metal (field plate) electrode and moved in the lateral direction, it is absorbed by the anode electrode. , Avalanche breakdown is likely to occur near the Si bulk opening end of the n ⁻ layer.

  As a countermeasure, Japanese Patent Laid-Open No. 2002-203955 newly proposes a structure (concentration arrangement) of a p-layer region serving as a guard ring.

Japanese Patent Application Laid-Open No. 2002-246609 proposes a distribution for improving the avalanche resistance with respect to a longitudinal concentration distribution profile that vertically crosses the guard ring / n ⁻ layer / N ⁺ layer.

  That is, the above-mentioned problems (1) and (2) are known, and appropriate measures are required to realize an SBD having a Zener diode function while improving the avalanche resistance.

  Based on the above points, the inventors conducted device simulation (by numerical method) on the device shown in FIG. 5, that is, the most basic (conventional) device of the SBD with a guard ring structure, and actually The problem like this is lurking, and I confirmed how I can cope with the problem.

FIG. 19 is a diagram showing a simulation (implementation) area for a conventional device. The area A′B′C′D ′ shown in FIG. 19 is the most basic type of SBD with a guard ring structure as shown in FIG. 5, and is surrounded by the rectangle ABCD shown in the upper right of FIG. This corresponds to the area within the frame. In FIG. 19, the dimension in the X direction indicates a range of 0 to 40 μm, and the dimension in the Y direction indicates a range of −1.2 to 6.0 μm. Specifically, the n ⁻ layer surface corresponds to Y = 0 μm, and the positive value increases as the depth from the n ⁻ layer surface increases.

  In the simulation of the conventional device, the shape of the guard ring of the conventional device is set to a shape as shown in FIG. Specifically, as shown in FIG. 19, Xj≈1.5 μm, and the coordinates of the corner Q1 of the guard ring are (10.0, 1.5).

  FIG. 20 is a diagram showing a simulation result of the density profile along the line A′-B ′ shown in FIG. 19. In FIG. 20, the curve shown as “conventional” corresponds to the simulation result of the conventional device shown in FIG. 19, and the curve shown as “present invention” corresponds to the simulation result of the device of the present invention described later. It corresponds.

In the simulation, as shown in FIG. 20, the surface concentration (Csp) of the p layer forming the guard ring was set to Csp = 5 × 10 ¹⁸ (1 / cm ³ ). The remaining Si bulk region was an n ⁻ layer region (40 μm × 6.0 μm), and the concentration of the n ⁻ layer was set to 1 × 10 ¹⁵ to 1 × 10 ¹⁶ (1 / cm ³ ).

Further, in the simulation, as shown in FIG. 19, the surface of the n ⁻ layer was set so as to be covered with a 0.8 μm thick SiO ₂ film while leaving an opening in the range of 0 to 5 μm. Furthermore, the anode metal having a thickness of 0.2 μm was set so as to cover the opening of the Si surface (n ⁻ layer) and a part of the SiO ₂ film in the range of 0 to 20 μm.

  FIG. 21 is a diagram showing a simulation result of the relationship between the reverse voltage VR and the leakage current IR. In FIG. 21, the curve shown as “conventional” corresponds to the simulation result of the conventional device shown in FIG. 19, and the curve shown as “present invention” corresponds to the simulation result of the device of the present invention described later. It corresponds.

In the simulation, as shown in FIGS. 19 and 21, VR = 90 (V) between the anode electrode and the cathode electrode (not shown. The potential of the B′-C ′ line in FIG. 19 is +90 V). ) The calculation voltage was gradually increased until a reverse voltage of a certain degree was applied, and the calculation was repeated until the leak current IR value exceeded 1 × 10 ⁻¹¹ (A / μm).

FIG. 22 is a diagram in which an N ⁺ substrate side region is added to FIG. The simulation region shown in FIG. 19 or the concentration profile distribution shown in FIG. 20 does not consider the N ⁺ substrate side region shown in FIG. Has determined that the presence or absence of the N ⁺ substrate side region does not affect the calculation results. That is, only the junction depth and concentration profile of the PN junction and the n ⁻ epitaxial layer on the left side of the MM ′ line in FIG. 22 were determined to be main parameters.

  FIG. 23 is a diagram showing a simulation result of the electric field distribution in the vertical direction at the position of the opening end (x = 5 μm). In FIG. 23, the curve shown as “conventional” corresponds to the simulation result of the conventional device shown in FIG. 19, and the curve shown as “present invention” corresponds to the simulation result of the device of the present invention described later. It corresponds.

In the simulation, as shown in FIG. 23, an electric field strength MAX point was generated at the depth y = 1.5 μm (Xjp), that is, at the PN junction portion forming the guard ring. The distribution of the electric field strength is distributed in a substantially triangular shape (left-right imbalance type), about 0.7 μm (y = 0.8 to 1.5 μm) on the P side with the apex as a boundary, and N ⁻ It spreads on the side with a width of about 6 μm (y = 1.5 to 7.5 μm). This triangular portion indicates a depletion layer (a layer in which carriers are depleted) formed at the PN junction inside the device.

  FIG. 24 is a diagram showing a simulation result of the electric field distribution in the lateral direction at the position of the Si surface (y = 0.1 μm depth). In FIG. 24, the curve shown as “conventional” corresponds to the simulation result of the conventional device shown in FIG. 19, and the curve shown as “present invention” corresponds to the simulation result of the device of the present invention described later. It corresponds.

  In the simulation, as shown in FIG. 19, since the PN junction is exposed on the Si surface, as shown in FIG. 24, at the position (x≈10.6 μm) corresponding to the position shown in FIG. The electric field strength in the lateral direction on the Si bulk (y = 0.1 μm depth) surface, that is, a sharp (pointed) peak of the surface lateral electric field strength was generated. That is, the electric field strength of the portion of the PN junction exposed on the surface is locally high.

  FIG. 25 is a diagram showing a simulation result of current distribution. Specifically, FIG. 25A shows a simulation result of the conventional device shown in FIG. 19, and FIG. 25B shows a simulation result of the device of the present invention described later.

In the simulation, as shown in FIG. 25A, most of the reverse current (IR) flowing from the substrate side to the anode electrode passes through the PN junction sidewall portion (within a range of x≈10 to 11 μm). A current distribution indicating that was obtained. The current that passed through the PN junction side wall (in the range of x≈10 to 11 μm) was then attracted directly under the SiO ₂ film under the field plate and attracted to the anode electrode at the open end.

  FIG. 26 shows a simulation result of the current density distribution. Specifically, FIG. 26A shows a simulation result of the conventional device shown in FIG. 19, and FIG. 26B shows a simulation result of the device of the present invention described later.

  In the simulation, as shown in FIG. 26A, the current was most concentrated at the outer corner portion of the guard ring.

  FIG. 27 is a diagram showing a simulation result of the lateral current density on the Si surface (y = 0.1 μm depth). Specifically, FIG. 27A shows a simulation result of the conventional device shown in FIG. 19, and FIG. 27B shows a simulation result of the device of the present invention described later.

In the simulation, as shown in FIG. 27A, the current density on the Si surface (y = 0.1 μm) was most concentrated at the position of the open end (x = 5 μm). Next, the current flowed in the lateral direction on the guard ring region (x = 5 to 10 μm), that is, the surface of the P layer region immediately below the SiO ₂ film under the field plate, and then was attracted to the anode electrode.

In FIG. 27A, not only the surface but also the current density at a depth of 1.5 μm (PN junction depth Xjp) and 7.0 μm (the deepest part of the n ⁻ layer) are displayed. . In the simulation, as shown in FIG. 27A, a considerable current was still concentrated even at a PN junction depth (Xjp).

  The simulation results of the conventional device shown in FIG. 19 are summarized as follows.

(1) It has been reconfirmed that the concern known from the past as described with reference to FIGS.

(2) That is, the local electric field concentration at the guard ring corner, the electric field concentration at the PN junction side wall, and the local current concentration at the oxide film opening end were reconfirmed. Furthermore, it was reconfirmed that the current reached the anode electrode after running in the lateral direction through the guard ring (P layer) region directly below the SiO ₂ film under the field plate through the PN junction side wall. Furthermore, it was reconfirmed that the electric field strength at the PN junction side wall portion remains high on the Si surface.

(3) The reconfirmed point described above results in an unsatisfactory result of the overall characteristics of the SBD with a guard ring. Therefore, to improve the overall characteristics of the SBD with a guard ring, some improvement is required. Can be said to be necessary.

  The problems of the prior art described above are summarized as follows.

(1) There is a need for an SBD with a relatively large current and a Zener diode function for high voltage applications.

(2) Many measures have been taken for this purpose, but in the structure shown in FIGS. 6, 8, 9, 11, and 17, a fourth area or a new process must be added. Don't be.

(3) Regarding the n ^- layer epitaxial layer concentration profile in the vertical direction, the profile shown in the graph of FIG. 12 must be managed based on the complicated formula shown in FIG. In the case of the profile shown in FIG. 13A, a flat n ⁻ layer must be added last (on the surface side, on the left side of FIG. 2A).

(4) In the conventional device having the basic structure with only the guard ring subjected to the above-described simulation, any concern that has been known so far has not been solved.

JP-A-5-75100

Japanese Patent Laid-Open No. 5-190831

JP-A-9-9522

Issued in March 1979, IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-26, NO. 3 P243-P244

JP 2000-261006 A

JP-A-5-336749

JP 2002-203955 A

JP 2002-246609 A

There is a need to provide a new SBD structure with a Zener diode function by using a lower specific resistance ρ and a thinner n ^- epitaxial layer structure.

  However, in order to realize this, it is indispensable to have a structure that does not require additional processes as much as possible.

  The new SBD to be realized must be able to solve many problems found in the basic type of the conventional guard ring structure.

The n ^- epitaxial layer structure can also be described by a simpler expression method, and must not involve complicated control such as concentration control or an additional process.

  It should be a SBD with a Zener diode function of a new structure that is commercially available, mass-productive, highly reliable, and inexpensive.

View of the foregoing, the present invention is, N ^- than if it is maintained constant regardless of the depth from the interface between the layers, ^- the concentration of the impurity which is the additional inclusion in the layer guard ring and N Provided a Schottky barrier diode that can increase the breakdown voltage while increasing the burden of the electric field in the deep part from the boundary surface, and further reduce the concentration of the electric field in the guard ring corner part. The purpose is to do.

According to the invention described in claim 1, the guard ring (1), the N ⁻ layer (2) containing impurities, the N ⁺ substrate (3), the field plate (4), and the SiO ₂ film (6) and have a,
Of the surface of the N ⁻ layer (2), the portion on the inner diameter side of the guard ring (1) is covered with the field plate (4),
Covering the inner diameter side portion of the surface (8) of the guard ring (1) with the field plate (4),
A portion on the outer diameter side of the surface (8) of the guard ring (1 ) is covered with the SiO ₂ film (6),
Of the surface of the N ⁻ layer (2), a portion on the outer diameter side of the guard ring (1 ) is covered with the SiO ₂ film (6),
A Schottky barrier in which an outer diameter side end (4 ′) of the field plate (4) is disposed on the outer diameter side of the guard ring (1) on the SiO ₂ film (6). In the diode,
As the depth from the horizontal portion (7) of the interface between the guard ring (1) and the N ⁻ layer (2) toward the N ⁺ substrate (3) increases, the N ⁻ layer (2) The logarithm of the concentration of impurities therein increases linearly with the first concentration gradient, and
In the first concentration gradient, a logarithmic increase in the concentration of impurities in the N ⁻ layer (2) per depth of 20 μm is 5 or more and 1000 or less, and
As the depth from the boundary surface between the N ⁻ layer (2) and the N ⁺ substrate (3) increases, the logarithm of the concentration of impurities in the N ⁺ substrate (3) is larger than the first concentration gradient. Increasing with a second concentration gradient, and
When the logarithm of the concentration of impurities in the N ⁺ substrate (3) increases to the maximum value, regardless of the increase in depth from the interface between the N ⁻ layer (2) and the N ⁺ substrate (3), The logarithm of the concentration of impurities in the N ⁺ substrate (3) is constant, and
The surface of the layer (2) ^- the N at immediately below the end of the outer diameter side (4 ') of said field plate (4) ^- the N field of the surface of the layer (2) is, in the guard ring corners (9) Stronger than the electric field, and
Such that about 75% of the reverse current flows vertically through the horizontal portion (7) towards the field plate (4) ,
The concentration of impurities in the N ⁻ layer (2) is set, and the depth from the surface (8) of the guard ring (1) to the horizontal portion (7) is set to 2.0 μm or more and 3.5 μm or less. In addition, the thickness of the N ⁻ layer (2) sandwiched between the horizontal portion (7) and the N ⁺ substrate (3) is set to 2.5 μm or more and 4 μm or less. A Schottky barrier diode is provided.

According to the invention described in claim 2, wherein the Schottky barrier diode 20 (V) or 100 (V) The following Schottky barrier diode according to claim 1, characterized in that it is allowed to break down zener voltage provided Is done.

The Schottky barrier diode according to claim 1, the guard ring and the N ^- layer ^- N according depth from the horizontal portions of the boundary surface towards the horizontal portion N ⁺ substrate side of the interface between the layers is increased Impurities are contained in the N ⁻ layer so that the logarithm of the concentration of the contained impurities increases linearly. Therefore, in the portion where the depth from the horizontal portion of the boundary surface is deeper than in the case where the concentration of the impurity contained in the N ⁻ layer is kept constant regardless of the depth from the horizontal portion of the boundary surface. The burden of the electric field can be increased, whereby the electric field in the vicinity of the PN junction (near the horizontal portion of the boundary surface) and the guard ring corner can be weakened. Of course, in the Schottky barrier diode according to the first aspect, as shown in FIGS. 12 and 13, the electric field lowering effect on the SBD surface obtained conventionally is not impaired at all.

Furthermore, in the Schottky barrier diode according to claim 1, the depth from the guard ring surface to the horizontal portion of the boundary surface is increased as compared with the conventional case, and N is sandwiched between the guard ring and the N ⁺ substrate. ^The layer thickness is reduced compared to the conventional case. Preferably, the depth from the guard ring surface to the horizontal portion of the interface is increased to about twice the conventional value. Therefore, the breakdown voltage can be made higher than in the conventional case. Furthermore, unlike the conventional case where the electric field in the guard ring corner had become stronger, beneath the guard ring, i.e., the horizontal portion of the PN junction, i.e., the guard ring and the N ^- horizontal boundary surface between the layers The electric field in the portion can be strengthened, and the strong electric field can be concentratedly distributed in the portion. Thereby, the concentration of the electric field in the guard ring corner portion can be reduced, and the burden of the electric field in the guard ring corner portion can be reduced.

In other words, in the Schottky barrier diode according to claim 1, the depth from the guard ring surface to the horizontal portion of the boundary surface is set to 2.0 μm or more and 3.5 μm or less, and between the guard ring and the N ⁺ substrate. The thickness of the N ⁻ layer sandwiched between the layers is set to 2.5 μm or more and 4 μm or less. Therefore, the depth from the guard ring surface to the horizontal portion of the boundary surface is set to less than 2.0 μm, and the thickness of the N ⁻ layer sandwiched between the guard ring and the N ⁺ substrate is set to a value larger than 4 μm. The breakdown voltage can be made higher than in the conventional case where it is set. Furthermore, unlike the conventional case where the electric field in the guard ring corner had become stronger, beneath the guard ring, i.e., the horizontal portion of the PN junction, i.e., the guard ring and the N ^- horizontal boundary surface between the layers The electric field in the portion can be strengthened, and the strong electric field can be concentratedly distributed in the portion. Thereby, the concentration of the electric field in the guard ring corner portion can be reduced, and the burden of the electric field in the guard ring corner portion can be reduced.

Furthermore, in the Schottky barrier diode according to claim 1, when the depth from the horizontal portion of the boundary surface toward the N ⁺ substrate side from the horizontal portion of the boundary surface between the guard ring and the N ⁻ layer increases by 20 μm, ^- and impurities is made to contain in the layer ^- N as the logarithm of the concentration of impurities that are allowed to contain in the layer increases linearly 5 to 1,000.

The Schottky barrier diode according to claim 1, N at immediately below the end of the field plate ^- so stronger than the electric field of the layer surface, N ^{- -} field layer surface, N in the guard ring corner contained in the layer The concentration of the impregnated impurities, the depth from the guard ring surface to the boundary surface, and the thickness of the N ⁻ layer sandwiched between the guard ring and the N ⁺ substrate are set. Therefore, the electric field on the surface of the N ⁻ layer just below the edge of the field plate can be made stronger than the electric field on the surface of the N ⁻ layer at the guard ring corner portion.

Further, the Schottky barrier diode according to claim 1, about 75% of the reverse current passes through the horizontal portion of the PN junction, to flow vertically toward the anode electrode, N ^- are the additional inclusion in the layer The impurity concentration, the depth from the guard ring surface to the boundary surface, and the thickness of the N ⁻ layer sandwiched between the guard ring and the N ⁺ substrate are set.

Further, the Schottky barrier diode according to claim 2, the Schottky barrier diode is caused to breakdown at 20 (V) or 100 (V) below zener voltage.

FIG. 1 is a cross-sectional view of a first embodiment of the SBD of the present invention having the function of a Zener diode. In FIG. 1, 1 is a guard ring, 2 is an N ⁻ epitaxial layer, 3 is an N ⁺ substrate, 4 is a field plate (barrier metal, anode metal), and 4 ′ is an end of the field plate 4. 5 is a cathode metal, 6 is a SiO ₂ film, 7 is a boundary surface between the guard ring 1 and the N ⁻ epitaxial layer 2 (specifically, a horizontal portion of the PN junction), 8 is a guard ring surface, and 9 is a guard ring corner portion. It is.

FIG. 2 is a diagram showing a concentration profile of the SBD of the first embodiment along the line NN ′ in FIG. Specifically, the vertical axis in FIG. 2 indicates the logarithm of density. In FIG. 2, Xj1 indicates the depth from the guard ring surface 8 of the boundary surface 7 between the guard ring 1 and the N ⁻ epitaxial layer 2 in the SBD of the first embodiment, and Xj2 indicates the guard ring in the conventional SBD. The depth from the guard ring surface of the boundary surface between N ^{and the} epitaxial layer is shown.

As shown in FIGS. 1 and 2, in the SBD of the first embodiment, the total thickness of the guard ring 1 and the N ⁻ epitaxial layer 2 is set thinner than the conventional one. Specifically, as shown in FIG. 2, the conventional SBD is set to 9.0 μm, for example, while the SBD of the first embodiment is set to 5.99 μm.

As shown in FIGS. 1 and 2, in the SBD of the first embodiment, the depth Xj1 from the guard ring surface 8 of the boundary surface 7 between the guard ring 1 and the N ⁻ epitaxial layer 2 is equal to the conventional guard. The depth is set to about twice the depth Xj2 from the guard ring surface at the interface between the ring and the N ⁻ epitaxial layer. Specifically, as shown in FIG. 2, in the conventional SBD, the boundary surface depth Xj2 is set to 1.5 μm, for example, whereas in the SBD of the first embodiment, the boundary surface depth Xj1 Is set to 2.8 μm.

Further, as shown in FIGS. 1 and 2, in the SBD of the first embodiment, the N ⁻ epitaxial layer 2 is formed in a tilted epitaxial layer structure. That is, the concentration of impurities contained in the N ⁻ epitaxial layer 2 is increased as the depth from the boundary surface 7 is increased.

  Specifically, as shown in FIG. 2, in the SBD of the first embodiment, the slope (Slope) of the logarithm of concentration (vertical axis in FIG. 2) with respect to the depth from the boundary surface 7 (horizontal axis in FIG. 2). However, it is set to 100/20 μm, and the logarithm of the concentration is linearly increased as the depth from the boundary surface 7 becomes deeper.

In the SBD of the first embodiment, as shown in FIG. 2, the slope (Slope) is set to 100/20 μm, but in the SBDs of other embodiments, the slope (Slope) is 5/20 μm or more and 1000 / 20 μm or less can be set to any value. By setting the slope (Slope) to a value of 5/20 μm or more and 100/20 μm or less, the N ⁻ epitaxial layer 2 can be stably mass-produced.

  Also, as shown in FIG. 1, in the SBD of the first embodiment, unlike the conventional example shown in FIG. 5, for example, no depression is provided in the active region portion on the surface.

In the SBD of the first embodiment, as shown in FIGS. 1 and 2, the N ⁻ epitaxial layer 2 is formed thin, and the specific resistance ρ of the N ⁻ epitaxial layer 2 is set to a low value. A PN junction at a higher concentration can be obtained. Thereby, the SBD having the function of a Zener diode can be achieved with the basic form of the guard ring structure.

Further, in the modification of the SBD of the first embodiment, similarly to the SBD of first embodiment shown in FIGS. 1 and 2, the depth Xj1 of interface 7 is set deep, N ^- epitaxial layer 2 Therefore, even if the specific resistance ρ of the N ⁻ epitaxial layer 2 is set to be the same as that in the conventional case, a higher breakdown voltage can be achieved.

Further, in the SBD of the first embodiment, as shown in FIGS. 1 and 2, as the depth Xj1 of the boundary surface 7 is set deeper, the N ⁻ epitaxial layer 2 and the N ⁺ substrate 3 Since the distance between the boundary and the boundary surface 7 becomes narrow, the electric field directly below the guard ring 1, that is, the boundary surface 7 (= horizontal portion of the PN junction) is strengthened, and a strong electric field is concentratedly distributed in this portion. become. As a result, it is possible to reduce the concentration of the electric field and the burden of the electric field in the guard ring corner portion 9 as occurs in the conventional SBD. That is, the electric field concentration and the electric field burden can be shifted from the guard ring corner portion 9 to the horizontal portion (7) of the PN junction.

  Next, the characteristics of the present invention will be confirmed while referring to the results of the simulation performed on the SBD of the first embodiment.

FIG. 3 is a diagram showing a simulation (implementation) area for the SBD of the first embodiment. In the SBD simulation of the first embodiment, the shape of the guard ring (specifically, the depth of the guard ring) and the thickness of the N ^- epitaxial layer are changed as compared with the conventional SBD simulation shown in FIG. It has been.

Specifically, in the conventional SBD simulation shown in FIG. 19, the coordinates of the point Q1 located at the corner of the guard ring are set to (10.0, 1.5), whereas FIG. In the SBD simulation of the first embodiment, the coordinates of the point Q1 ′ located at the corner of the guard ring are set to (10.0, 2.8). Therefore, in the conventional SBD simulation shown in FIG. 19, the depth Xj2 (see FIG. 2) of the boundary surface between the guard ring (P layer) and the N ⁻ epitaxial layer was set to 1.5 μm. In the SBD simulation of the first embodiment shown in FIG. 3, the depth Xj1 (see FIGS. 1 and 2) of the boundary surface 7 between the guard ring 1 and the N ⁻ epitaxial layer 2 is set to 2.8 μm. Yes. That is, the depth Xj1 is set to about twice the depth Xj2.

A curve indicated as “present invention” in FIG. 20 indicates the concentration profile of the SBD of the first embodiment along the vertical axis in FIG. 3. As shown in FIG. 20, in the SBD simulation of the first embodiment, the N ⁻ epitaxial layer is formed in a tilted epitaxial layer structure. That, N ^- concentration of impurities in the epitaxial layer, the guard ring and the N ^- depth from the interface between the epitaxial layer is caused to increase with increasing depth.

Specifically, as shown in FIG. 20, in the SBD of the first embodiment, the logarithm of the concentration (the logarithm of the concentration (the horizontal axis in FIG. 20) becomes deeper from the boundary surface between the guard ring and the N ⁻ epitaxial layer (horizontal axis). The vertical axis in FIG. 20 is linearly increased.

More specifically, in the SBD simulation of the first embodiment, as shown in FIG. 2, the logarithmic slope of the concentration (Slope) is Slope = (C20 / CS) / 20 μm = 100/20 μm (depth). The density is set to 10/10 μm (the density is 10 times at a depth of 10 μm). As shown in FIG. 2 and FIG. 20, as CS1, since ρs = 5 (Ω · cm) of the surface and 9.27 × 10 ¹⁴ (1 / cm ³ ), the concentration (point) on the N ⁺ substrate side The concentration of R1 is (9.27 × 10 ¹⁴ ) × (100) ^{(5.99 / 20)} = 3.68 × 10 ¹⁵ (1 / cm ³ ), and the point CS1 and the point R1 The interval is linear.

Table 1 is a table in which the concentration profiles between the points CS1 and R1 and between the points CS2 and R2 in FIG. 2 are calculated at intervals of 0.25 μm. In FIG. 2, the coordinates of the point CS1 are (0 (μm), 9.27 × 10 ¹⁴ (1 / cm ³ )), and the coordinates of the point R1 are (5.99 (μm), 3.68 × 10 ¹⁵ ). (1 / cm ³ )), the coordinates of the point CS2 are (0 (μm), 2.61 × 10 ¹⁵ (1 / cm ³ )), and the coordinates of the point R2 are (9.0 (μm), 2.61 × 10 ¹⁵ (1 / cm ³ )).

As shown in Table 1, the average concentration between CS1 and R1 (the average concentration of “present invention” in Table 1) is 1.95 × 10 ¹⁵ (1 / cm ³ ), and the average between CS2 and R2 Concentration (average concentration of “conventional” in Table 1) was 2.61 × 10 ¹⁵ (1 / cm ³ ). Further, ρ between CS1 and R1 is 2.40 (Ω · cm), ρt product between CS1 and R1 is 1.44 × 10 ⁻³ (Ω), and ρ between CS2 and R2 is 1.80 ( Ω · cm), and the ρt product between CS2 and R2 = 1.62 × 10 ⁻³ (Ω). That is, the ρt product between CS1 and R1 (present invention) is 88.9% of the ρt product between CS2 and R2 (conventional), and 11.1% smaller than the ρt product between CS2 and R2 (conventional). It was.

  Further, the relationship between the reverse voltage VR and the leakage current IR in the SBD simulation of the first embodiment is as shown by a curve indicated as “present invention” in FIG. Specifically, as shown in FIG. 21, in the SBD simulation of the first embodiment, the breakdown voltage is 91.1 (V), and in the conventional SBD simulation, the breakdown voltage is 90 (V). Became. More specifically, since the SBD simulation conditions of the first embodiment are set so that the breakdown voltage of the SBD of the first embodiment and the breakdown voltage of the conventional SBD are substantially equal, the SBD of the first embodiment The breakdown voltage waveform and the breakdown voltage waveform of the conventional SBD are inevitably almost equal.

Further, the electric field distribution in the vertical direction at the position of the opening end (x = 5 μm) in the simulation of the SBD of the first embodiment is a curve indicated as “present invention” in FIG. Specifically, in the SBD simulation of the first embodiment, as shown in FIG. 23, Emax = 3.05 × 10 ⁵ (V /) at a depth of 2.8 μm (Xj1 in FIG. 2) from the surface. cm) of electric field distribution peak. The electric field distribution peak (Emax = 3.05 × 10 ⁵ (V / cm)) of the SBD of the first embodiment is the electric field distribution peak (Emax = 2.12 × 10 ⁵ (V / cm)) of the conventional SBD. Bigger than. More specifically, in the SBD simulation of the first embodiment, the electric field distribution peak generation point is shifted to a position deeper than the conventional SBD. Unlike the electric field distribution curve of the conventional SBD that is linearly reduced, the electric field distribution curve is a curved curve in a convex shape in the SBD simulation of the first embodiment.

That is, in the SBD simulation of the first embodiment, since the concentration of impurities contained in the N ⁻ epitaxial layer is increased linearly as shown in FIG. 20, the deep position as shown in FIG. Thus, the electric field distribution peak generation point is shifted, and the electric field distribution curve is a curved curve. That is, the burden of the electric field in the deep part is increased, and as a result, the electric field in the vicinity of the PN junction and in the guard ring corner part is weaker than in the conventional case.

  Further, the electric field distribution in the lateral direction at the position of the Si surface (y = 0.1 μm depth) in the SBD simulation of the first embodiment is as shown by a curve shown as “present invention” in FIG. became. Specifically, in the SBD simulation of the first embodiment, as shown in FIG. 23, since the electric field distribution peak is embedded at a deep position, the position of the Si surface (y = 0.1 μm depth). The horizontal electric field distribution peak in FIG. 5 is not at the position of x = 10 μm (PN junction surface, that is, the side wall surface of the guard ring 1), but at the position of x = 20 μm (directly below the end 4 ′ of the field plate 4, FIG. 1). More specifically, the electric field on the Si surface (y = 0.1 μm depth) at the position of x = 20 μm was 2.0E5 (V / cm). Further, the electric field of the Si surface (y = 0.1 μm depth) at the position of x = 10 μm (PN junction surface, that is, the side wall surface of the guard ring 1) is 2.75E5 (V / V) in the conventional SBD simulation. cm), but decreased to 1.75E5 (V / cm).

Furthermore, the current distribution in the SBD simulation of the first embodiment is as shown in FIG. Specifically, in the SBD simulation of the first embodiment, as shown in FIG. 25B, about 75% of the total reverse current IR passes through the horizontal portion of the PN junction (the bottom surface of the guard ring 1). And flowed vertically toward the anode electrode. That is, about 75% of the total reverse current IR has passed through the left side of the point Q1 ′, that is, directly below the guard ring 1. As a result, most of the current passes through the horizontal portion of the PN junction (the bottom surface of the guard ring 1) without being attracted under the SiO ₂ film 6 immediately below the field plate 4 and directly toward the contact opening. Flowed into. Only the remaining 25% of the current passed through the side wall portion of the PN junction (side wall surface of the guard ring 1), bent gently, and flowed toward the contact opening.

  In addition, the current density distribution in the SBD simulation of the first embodiment is as shown in FIG. Specifically, in the SBD simulation of the first embodiment, as shown in FIG. 26 (B), the opening end and the side wall of the PN junction (on the side of the guard ring 1) seen in FIG. The current concentration at the wall surface was almost eliminated, and the current concentration was reduced to such a degree that the trace was left slightly at the opening end.

Further, the lateral current density on the Si surface (y = 0.1 μm depth) in the SBD simulation of the first embodiment is as shown in FIG. Specifically, the lateral current density at the Si surface (y = 0.1 μm depth) at the SiO ₂ opening end (x = 5 μm) is 0 as shown in FIG. 27A in the conventional SBD simulation. While it was .0012 (A / cm ² ), in the SBD simulation of the first embodiment, it decreased to 0.0004 (A / cm ² ) as shown in FIG. In the conventional SBD simulation, as shown in FIG. 27A, the lateral current density at the PN junction depth (Xj2 = 1.5 μm, see FIG. 2) is 0.00082 (A / cm ^2). On the other hand, in the SBD simulation of the first embodiment, as shown in FIG. 27B, the lateral current density at the PN junction depth (Xj1 = 2.8 μm, see FIG. 2). Decreased to 0.00019 (A / cm ² ).

Further, in the conventional SBD simulation, as shown in FIG. 27A, the lateral current density at the position of depth of 7.0 μm from the guard ring surface, that is, the position deep in the N ⁻ epitaxial layer is 0. Whereas .00012 (A / cm ² ), in the SBD simulation of the first embodiment, as shown in FIG. 27B, the position at a depth of 5.5 μm from the guard ring surface 8, That is, the lateral current density at a deep position of the N ⁻ epitaxial layer 2 was reduced to 0.00019 (A / cm ² ). These are because the generation of the reverse current IR itself is reduced in the total amount, and in particular, the PN junction on the side wall of the guard ring 1 and the guard ring (P layer) directly under the SiO ₂ film 6 under the field plate 4. This is a result of the local current concentration in the region being reduced to such an extent that it is virtually no longer a problem.

  In the simulation described above, the breakdown voltage is about 90 (V).

When guaranteeing the VR = 90 (V) rating, each graded profile of the N ⁻ epitaxial layer (Slope = 5/20 μm, 10) with a margin of 10 (V) to obtain VR≈100 (V) FIG. 4 shows a plot of the trade-off characteristics between VF (forward voltage drop) and IR (reverse current) at / 20 μm, 100/20 μm, and 1000/20 μm) in comparison with the conventional case (Flat profile). That is, FIG. 4 is a diagram showing the VF-IR trade-off characteristics in each gradient profile of the N ⁻ epitaxial layer in the breakdown voltage 100 (V) system. The following can be seen from FIG.

(1) Compared to the flat profile of the N ^- epitaxial layer of the conventional SBD, the SBD with a Zener diode function according to the present invention in which the concentration of the N ^- epitaxial layer has a slope is the origin of the trade-off curve. Is approaching, giving better trade-off characteristics.

(2) Moreover, if the concentration of the N ⁻ epitaxial layer has a slope, the higher the slope, the better the trade-off characteristics. That is, in terms of trade-off characteristics, in the example shown in FIG. 4, inclination = 1000/20 μm is most preferable, then inclination = 100/20 μm is preferable, then inclination = 10/20 μm is preferable, Inclination = 5/20 μm is preferable.

(3) This is a phenomenon also seen in other devices, but in order to obtain the same VR = 100 (V) breakdown on the same trade-off curve, the graph shown in FIG. 4 using a higher ρt product profile N ^- epitaxial layer yields a device with high VR and low IR characteristics, while the graph of FIG. If a lower ρt product profile N ^- epitaxial layer located on the left is used, a device with low VR and high IR characteristics will be obtained.

In the SBD of the first embodiment, as shown in FIGS. 1 and 2, the depth from the boundary surface 7 toward the N ⁺ substrate 3 side from the boundary surface 7 between the guard ring 1 and the N ⁻ epitaxial layer 2 is deep. and impurities is made to contain in the epitaxial layer 2 ^- logarithm of the concentration of impurities that are allowed to contain in the epitaxial layer 2 is N so as to increase linearly ^- N accordance is increases. Therefore, the concentration of the impurity contained in the N ⁻ epitaxial layer is kept constant regardless of the depth from the boundary surface, compared to the conventional case where the depth of the electric field in the portion deep from the boundary surface 7 is increased. The burden can be increased, whereby the electric field in the vicinity of the PN junction (near the boundary surface 7) and the guard ring corner portion 9 can be weakened.

Furthermore, in the SBD of the first embodiment, as shown in FIGS. 1 and 2, the depth Xj1 from the guard ring surface 8 to the boundary surface 7 is increased more than the depth Xj2 in the conventional case, and the guard The thickness of the N ⁻ epitaxial layer 2 sandwiched between the ring 1 and the N ⁺ substrate 3 is made smaller than the thickness in the conventional case. Specifically, the depth Xj1 (= 2.8 μm) from the guard ring surface 8 to the boundary surface 7 is increased to about twice the conventional depth Xj2 (= 1.5 μm). Therefore, the breakdown voltage can be made higher than in the conventional case. Further, unlike the conventional case where the electric field at the guard ring corner portion 9 is strong, the horizontal portion of the PN junction, that is, the guard ring 1 and the N ⁻ epitaxial layer 2, just below the guard ring 1. The electric field at the boundary surface 7 can be strengthened, and a strong electric field can be concentratedly distributed in that portion. Thereby, the concentration of the electric field in the guard ring corner portion 9 can be reduced, and the burden of the electric field in the guard ring corner portion 9 can be reduced.

Although not shown, in the modified example of the SBD of the first embodiment, the depth from the guard ring surface to the boundary surface is set to 2.0 μm or more and 3.5 μm or less, and is sandwiched between the guard ring and the N ⁺ substrate. The thickness of the N ⁻ epitaxial layer is set to 2.5 μm or more and 4 μm or less. Therefore, according to the modification of the SBD of the first embodiment, the depth from the guard ring surface to the boundary surface is set to be less than 2.0 μm, and N ⁻ sandwiched between the guard ring and the N ⁺ substrate. The breakdown voltage can be made higher than in the conventional case where the layer thickness is set to a value larger than 4 μm. Furthermore, unlike the conventional case where the electric field at the guard ring corner portion is strong, the electric field directly below the guard ring, that is, the horizontal portion of the PN junction, that is, the boundary surface between the guard ring and the N ⁻ layer. And a strong electric field can be intensively distributed in that portion. Thereby, the concentration of the electric field in the guard ring corner portion can be reduced, and the burden of the electric field in the guard ring corner portion can be reduced.

In the SBD of the first embodiment, as shown in FIGS. 1 and 2, the thickness of the N ⁻ epitaxial layer 2 sandwiched between the guard ring 1 and the N ⁺ substrate 3 (= 5.99 μm). The ratio of the depth Xj1 (= 2.8 μm) from the guard ring surface 8 to the boundary surface 7 with respect to −2.8 μm = 3.19 μm) is set to about 0.88. Although not shown, in another modification of the SBD of the first embodiment, the depth from the guard ring surface to the boundary surface with respect to the thickness of the N ⁻ epitaxial layer sandwiched between the guard ring and the N ⁺ substrate is changed. The ratio is set to 0.3 or more. Therefore, according to another modification of the SBD of the first embodiment, the ratio of the depth from the guard ring surface to the boundary surface with respect to the thickness of the N ⁻ epitaxial layer is set to less than 0.3. The breakdown voltage can be increased as compared with the case. Furthermore, unlike the conventional case where the electric field at the guard ring corner portion is strong, the electric field directly below the guard ring, that is, the horizontal portion of the PN junction, that is, the boundary surface between the guard ring and the N ⁻ layer. And a strong electric field can be intensively distributed in that portion. Thereby, the concentration of the electric field in the guard ring corner portion can be reduced, and the burden of the electric field in the guard ring corner portion can be reduced.

Although not shown, in another modification of the SBD of the first embodiment, it is preferable that the boundary surface from the guard ring surface to the thickness of the N ⁻ epitaxial layer sandwiched between the guard ring and the N ⁺ substrate. The ratio of the depth until is set to 0.4 or more.

Furthermore, in the SBD of the first embodiment, as shown in FIGS. 1 and 2, from the boundary surface 7 between the guard ring 1 and the N ⁻ epitaxial layer 2 toward the N ⁺ substrate 3 side, the depth of the increases 20 [mu] m, N ^- has the impurity is made to contain in the epitaxial layer 2 ^- N as the logarithm of the concentration of impurities that are allowed to contain in the epitaxial layer 2 increases to 100 linearly.

Further, the SBD of other embodiments, as shown in FIG. 4, the guard ring and the N ^- the depth from the boundary surface towards the N ⁺ substrate side from the interface between the epitaxial layer is increased 20 [mu] m, N ^- and impurities is made to contain in the layer ^- N as the logarithm of the concentration of impurities that are allowed to contain in the epitaxial layer increases linearly 5 to 1,000.

Furthermore, in the SBD of the first embodiment, as shown in FIGS. 1 and 24, the electric field (= 2.0E5 (V / V) on the surface of the N ⁻ epitaxial layer 2 immediately below the end 4 ′ of the field plate 4. cm)) is stronger than the electric field (= 1.75E5 (V / cm)) of the surface of the N ⁻ epitaxial layer 2 in the guard ring corner portion 9, and the impurities contained in the N ⁻ epitaxial layer 2 , The depth from the guard ring surface 8 to the boundary surface 7, and the thickness of the N ⁻ epitaxial layer 2 sandwiched between the guard ring 1 and the N ⁺ substrate 3 are set. Therefore, the electric field on the surface of N ⁻ epitaxial layer 2 immediately below end 4 ′ of field plate 4 can be made stronger than the electric field on the surface of N ⁻ epitaxial layer 2 in guard ring corner portion 9.

In the SBD of the first embodiment, as shown in FIGS. 1 and 25B, about 75% of the reverse current passes through the horizontal portion (boundary surface 7) of the PN junction, and the field plate 4 The concentration of impurities contained in the N ⁻ epitaxial layer 2, the depth from the guard ring surface 8 to the boundary surface 7, the guard ring 1 and the N ⁺ substrate 3 so as to flow vertically toward the (anode electrode). The thickness of the N ⁻ epitaxial layer 2 sandwiched between the two is set.

Further, although not shown, in the SBDs of the first and other embodiments, the Schottky barrier diode is included in the N ^- epitaxial layer 2 so that the Schottky barrier diode can be broken down at a Zener voltage of 20 (V) or more and 100 (V) or less. The concentration of the impurities, the depth from the guard ring surface 8 to the boundary surface 7, and the thickness of the N ⁻ epitaxial layer 2 sandwiched between the guard ring 1 and the N ⁺ substrate 3 are set.

It is sectional drawing of 1st Embodiment of SBD of this invention which has a function of a Zener diode. It is the figure which showed the density | concentration profile of SBD of 1st Embodiment along the N-N 'line | wire in FIG. It is the figure which showed the simulation (implementation) area | region about SBD of 1st Embodiment. It is the figure which showed the trade-off characteristic of VF-IR in each inclination profile of the N < ^- > epitaxial layer in a breakdown voltage 100 (V) system. It is the figure which showed the basic type of SBD with a guard ring structure described in Unexamined-Japanese-Patent No. 5-75100. It is the figure which showed the improved type | mold of SBD with a guard ring structure described in Unexamined-Japanese-Patent No. 5-75100. It is the figure which showed the relationship between reverse bias voltage VR and leakage current IR which were described in Unexamined-Japanese-Patent No. 5-75100. It is a figure for demonstrating an example of the structure of the diode described in Unexamined-Japanese-Patent No. 9-9522. It is a figure for demonstrating the other structural example of the diode described in Unexamined-Japanese-Patent No. 9-9522. It is the figure which showed the symbol which shows a PN junction diode, SBD, and a Zener diode generally. It is the figure which showed the device structure of SBD with a guard ring which added the Zener diode structure disclosed by Japanese Patent Application No. 2004-56119. Issued in March 1979, IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-26, NO. 3 of FIG. FIG. It is the figure which showed concentration distribution etc. of the impurity contained in the epitaxial layer of SBD described in Unexamined-Japanese-Patent No. 2000-261006. It is the figure which showed the circuit of the 1 stone type | mold forward converter described in Unexamined-Japanese-Patent No. 5-336749. It is the figure which showed voltage VD2 concerning the flywheel diode D2 shown in FIG. 14, current ID2 etc. which flow through it. It is the figure which showed in detail the vicinity where the splashing voltage VSP is generated. It is the figure which showed the current concentration in the guard ring corner part of the conventional SBD. It is the figure which expanded and showed a part of FIG. It is the figure which showed the simulation (implementation) area | region about the conventional device. FIG. 20 is a diagram illustrating a simulation result of a concentration profile along the line A′-B ′ illustrated in FIG. 19. It is the figure which showed the simulation result of the relationship between reverse direction voltage VR and leak current IR. It is the figure which added the N ⁺ board ^| substrate side area | region to FIG. It is the figure which showed the simulation result of the electric field distribution of the vertical direction in the position of an opening end (x = 5 micrometer). It is the figure which showed the simulation result of the electric field distribution of the horizontal direction in the position of Si surface (y = 0.1 micrometer depth). It is the figure which showed the simulation result of electric current distribution. It is the figure which showed the simulation result of current density distribution. It is the figure which showed the simulation result of the horizontal direction current density in Si surface (y = 0.1 micrometer depth).

Explanation of symbols

1 Guard ring 2 N ⁻ Epitaxial layer 3 N ⁺ Substrate 4 Field plate (barrier metal, anode metal)
4 'Field plate edge 5 Cathode metal 6 SiO ₂ film 7 Interface (horizontal part of PN junction)
8 Guard ring surface 9 Guard ring corner

Claims (2)

It possesses a layer (2), and the ^{N +} substrate (3), a field plate (4), and a SiO ₂ film (6), ^- a guard ring (1), N containing impurities
Of the surface of the N ⁻ layer (2), the portion on the inner diameter side of the guard ring (1) is covered with the field plate (4),
Covering the inner diameter side portion of the surface (8) of the guard ring (1) with the field plate (4),
A portion on the outer diameter side of the surface (8) of the guard ring (1 ) is covered with the SiO ₂ film (6),
Of the surface of the N ⁻ layer (2), a portion on the outer diameter side of the guard ring (1 ) is covered with the SiO ₂ film (6),
A Schottky barrier in which an outer diameter side end (4 ′) of the field plate (4) is disposed on the outer diameter side of the guard ring (1) on the SiO ₂ film (6). In the diode,
As the depth from the horizontal portion (7) of the interface between the guard ring (1) and the N ⁻ layer (2) toward the N ⁺ substrate (3) increases, the N ⁻ layer (2) The logarithm of the concentration of impurities therein increases linearly with the first concentration gradient, and
In the first concentration gradient, a logarithmic increase in the concentration of impurities in the N ⁻ layer (2) per depth of 20 μm is 5 or more and 1000 or less, and
As the depth from the boundary surface between the N ⁻ layer (2) and the N ⁺ substrate (3) increases, the logarithm of the concentration of impurities in the N ⁺ substrate (3) is larger than the first concentration gradient. Increasing with a second concentration gradient, and
When the logarithm of the concentration of impurities in the N ⁺ substrate (3) increases to the maximum value, regardless of the increase in depth from the interface between the N ⁻ layer (2) and the N ⁺ substrate (3), The logarithm of the concentration of impurities in the N ⁺ substrate (3) is constant, and
The surface of the layer (2) ^- the N at immediately below the end of the outer diameter side (4 ') of said field plate (4) ^- the N field of the surface of the layer (2) is, in the guard ring corners (9) Stronger than the electric field, and
Such that about 75% of the reverse current flows vertically through the horizontal portion (7) towards the field plate (4) ,
The concentration of impurities in the N ⁻ layer (2) is set, and the depth from the surface (8) of the guard ring (1) to the horizontal portion (7) is set to 2.0 μm or more and 3.5 μm or less. In addition, the thickness of the N ⁻ layer (2) sandwiched between the horizontal portion (7) and the N ⁺ substrate (3) is set to 2.5 μm or more and 4 μm or less. Schottky barrier diode.   2. The Schottky barrier diode according to claim 1, wherein the Schottky barrier diode is broken down at a Zener voltage of 20 (V) or more and 100 (V) or less.

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