JP4836183B2 - Charge / discharge monitoring device and semiconductor integrated circuit - Google Patents

Description

  The present invention relates to a charge / discharge monitoring apparatus for monitoring charge / discharge of a battery formed by connecting a plurality of battery cells in multiple stages.

  A cell voltage detection circuit for a battery comprising a plurality of cells in series, particularly a cell voltage detection circuit capable of detecting a voltage with high accuracy by shifting the voltage of each cell having a different ground potential to the same ground potential (for example, (See, for example, FIG. 1 of Patent Document 1).

  By the way, it is known that in a battery in which a large number of cells are connected in series, when the charging and discharging are repeated and continuously used, the cell voltage varies in level. Therefore, in addition to monitoring the total voltage of all cells, there is a need for a management system that monitors the voltage of each cell and prevents any cell from being used continuously in an overcharged or overdischarged state. The

JP 2001-201522 A

  When charging / discharging is monitored by a single monitoring circuit in a battery comprising a plurality of battery cells in series, the voltage value of the battery comprising a number of battery cells in series increases. A device withstand voltage is required.

  On the other hand, in a battery comprising a plurality of battery cells connected in series, in a method in which a charge / discharge monitoring circuit is arranged for each battery cell, a high voltage element is not required because the applied voltage value is low. A logical operation is performed on the outputs of a plurality of charge / discharge monitoring circuits, and charge / discharge control of the entire battery is required based on the logical operation result. Since the charge / discharge monitoring circuit is supplied with the power supply voltage from the corresponding battery cell, the output voltage level varies depending on the electromotive force of each battery cell. From this, depending on the electromotive force of each battery cell, there is a possibility that the logical operation of the plurality of charge / discharge monitoring circuit outputs is not performed correctly. Therefore, in such a circuit, a voltage adjustment circuit such as a level shifter or a photocoupler must be arranged before the logical operation so that correct logical operation is performed regardless of the electromotive force for each battery cell. However, if a voltage adjustment circuit such as a level shifter or a photocoupler is disposed before the logical operation, the circuit may be complicated or power consumption may increase.

  An object of the present invention is to provide a technique for eliminating the need for a voltage adjustment circuit such as a level shifter or a photocoupler when a charge / discharge monitoring circuit is arranged for each battery cell.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  That is, in a charging / discharging monitoring device for monitoring charging / discharging of a battery in which a plurality of battery cells are coupled in multiple stages, the overdischarge voltage of the corresponding battery cell is arranged corresponding to the battery cell, and A plurality of charge / discharge monitoring circuits capable of detecting an overcharge voltage and a control circuit for controlling charge / discharge of the battery according to the monitoring results of the plurality of charge / discharge monitoring circuits are provided. The charge / discharge monitoring circuit includes a first logic circuit that synthesizes and outputs an overdischarge voltage detection result of a corresponding battery cell and an overdischarge voltage detection result of another adjacent monitoring circuit, and an overcharge of the corresponding battery cell. And a second logic circuit that synthesizes and outputs the charge voltage detection result and the overcharge voltage detection result in the other adjacent monitoring circuit.

  Further, in a charge / discharge monitoring device for monitoring charge / discharge of a battery in which a plurality of battery cells are connected in multiple stages, the overdischarge voltage of the corresponding battery cell is arranged corresponding to the battery cell, and A plurality of charge / discharge monitoring circuits capable of detecting an overcharge voltage and a control circuit for controlling charge / discharge of the battery according to the monitoring results of the plurality of charge / discharge monitoring circuits are provided. At this time, the charge / discharge monitoring circuit receives the overdischarge voltage detection result of the adjacent other monitoring circuit, the overdischarge voltage detection result of the corresponding battery cell, and the first input terminal. A first logic circuit for synthesizing the detected overdischarge voltage detection result, a first output terminal for externally outputting the synthesis result in the first logic circuit, and overcharging in the other adjacent charge / discharge monitoring circuit A second input terminal for taking in the voltage detection result, a second logic circuit for combining the overcharge voltage detection result of the corresponding battery cell and the overcharge voltage detection result taken in via the second input terminal; And a second output terminal for externally outputting the result of synthesis in the second logic circuit.

  According to said means, the said 1st logic circuit synthesize | combines and outputs the overdischarge voltage detection result of a corresponding battery cell, and the overdischarge voltage detection result in another adjacent monitoring circuit. The second logic circuit synthesizes and outputs the overcharge voltage detection result of the corresponding battery cell and the overcharge voltage detection result of the other adjacent monitoring circuit. Since the overdischarge voltage detection result and overcharge voltage detection result are combined in this way, it is necessary to provide a separate voltage adjustment circuit such as a level shifter or a photocoupler for the logical operation of multiple charge / discharge monitoring circuit outputs. There is no.

  The control circuit is located in a final stage among the first switch element coupled to one electrode of the battery, the second switch connected in series to the first switch element, and the plurality of charge / discharge monitoring circuits. A first driver for controlling the opening / closing operation of the first switch based on an output signal from the first output terminal in the circuit; and a second driver in the charge / discharge monitoring circuit located in the final stage. And a second driver for controlling the opening / closing operation of the second switch based on the output signal.

  The first logic circuit is connected in series to a first p-channel MOS transistor including a gate electrode to which an overdischarge voltage detection result taken in via the first input terminal is transmitted, and the first p-channel MOS transistor. A first constant current source, a first NOR gate that performs a logical operation of an output from the drain electrode of the first p-channel MOS transistor and an overdischarge voltage detection result in a monitoring circuit including the first logic circuit. Can be configured.

  The second logic circuit is connected in series to a second p-channel MOS transistor including a gate electrode to which an overcharge voltage detection result taken in via the second input terminal is transmitted, and the second p-channel MOS transistor. A second constant current source, an output from the drain electrode of the second p-channel MOS transistor, and a second NOR gate for performing a logical operation on an overcharge voltage detection result in a monitoring circuit including the second logic circuit. Can be configured.

  Here, in order to reduce power consumption, a depletion type may be applied as the first p-channel MOS transistor and the second p-channel MOS transistor.

  The first logic circuit is connected in series to a first n-channel MOS transistor including a gate electrode to which an overdischarge voltage detection result taken in via the first input terminal is transmitted, and the first n-channel MOS transistor. A first AND gate that performs a logical operation of an output from a drain electrode of the first n-channel MOS transistor and an overdischarge voltage detection result in a monitoring circuit including the first logic circuit; Can be configured.

  The second logic circuit is connected in series to a second n-channel MOS transistor including a gate electrode to which an overcharge voltage detection result taken in via the second input terminal is transmitted, and the second n-channel MOS transistor. A fourth constant current source, an output from the drain electrode of the second n-channel MOS transistor, and a second AND gate for performing a logical operation on an overcharge voltage detection result in a monitoring circuit including the second logic circuit; Can be configured.

  Here, in order to reduce power consumption, it is preferable to apply a depletion type as the first n-channel MOS transistor and the second n-channel MOS transistor.

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, when a charge / discharge monitoring circuit is arranged for each battery cell, a voltage adjustment circuit such as a level shifter or a photocoupler is not required.

  FIG. 1 shows a battery pack including a charge / discharge monitoring device according to the present invention.

  The battery pack shown in FIG. 1 includes a battery and a charge / discharge monitoring device for monitoring charge / discharge of the battery. The battery is formed by connecting a plurality of battery cells 11 to 15 in multiple stages. The plurality of battery cells 11 to 15 are connected in series to each other. The charging / discharging monitoring device is arranged corresponding to the battery cell, and a plurality of charging / discharging monitoring circuits 21 to 25 capable of detecting an overdischarge voltage and an overcharge voltage of the corresponding battery cell, and the plurality of charging / discharging monitoring circuits. A charge / discharge control circuit 60 for controlling the charge / discharge of the battery according to the monitoring result of the charge / discharge monitoring circuit. The battery pack has a positive electrode side terminal 71 and a negative electrode side terminal 72. The positive electrode side terminal 71 and the negative electrode side terminal 72 can be coupled to a power supply terminal of an electronic device (not shown) or a charging terminal of a charger. .

  The charge / discharge monitoring circuit 21 includes a resistor 31 and a capacitor 41 for absorbing noise included in the output voltage of the corresponding battery cell 11, and a charge / discharge monitoring IC 51 operated by the power supply voltage Vcc supplied through the resistor 31. Including. The charge / discharge monitoring circuit 22 includes a resistor 32 and a capacitor 42 for absorbing noise included in the output voltage of the corresponding battery cell 12, and a charge / discharge monitoring IC 52 operated by the power supply voltage Vcc supplied through the resistor 32. Including. The charge / discharge monitoring circuit 23 includes a resistor 33 and a capacitor 43 for absorbing noise included in the output voltage of the corresponding battery cell 13, and a charge / discharge monitoring IC 53 operated by the power supply voltage Vcc supplied through the resistor 33. Including. The charge / discharge monitoring circuit 24 includes a resistor 34 and a capacitor 44 for absorbing noise included in the output voltage of the corresponding battery cell 14, and a charge / discharge monitoring IC 54 operated by the power supply voltage Vcc supplied through the resistor 34. Including. The charge / discharge monitoring circuit 25 includes a resistor 35 and a capacitor 45 for absorbing noise included in the output voltage of the corresponding battery cell 15, and a charge / discharge monitoring IC 55 operated by the power supply voltage Vcc supplied through the resistor 35. Including.

  The charge / discharge monitoring ICs 51 to 55 have input terminals DCHI and CHGI for capturing charge / discharge monitoring results, and output terminals DCHO and CHGO for outputting charge / discharge monitoring results separately from the terminals for capturing the power supply voltage. And have.

  The power supply voltage Vcc is supplied to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 51. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 51 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 52 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 52 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 53 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 53 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 54 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 54 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 55 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 55 are transmitted to the charge / discharge control circuit 60.

  The charge / discharge control circuit 60 has a function of controlling charge / discharge of the battery cells 11 to 15 based on output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 55, and is a switch coupled to the negative electrode side of the battery An element 607, a switch element 608 connected in series thereto, a driver (DCH Driver) 605 for driving the switch element 607 based on an output signal from an output terminal DCHO in the charge / discharge monitoring IC 55, and the charge / discharge A driver (CHG Driver) 606 for driving the switch element 608 based on an output signal from the overcharge voltage detection result output terminal CHGO in the monitoring IC 55 is included. The monitoring results of the plurality of charge / discharge monitoring circuits 21 to 25 are reflected in the output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 55. When a discharge abnormality or a charge abnormality is detected in any of the plurality of charge / discharge monitoring circuits 21 to 25, the switch element 607 or 608 is turned off by the driver 605 or 606.

  FIG. 2 shows a configuration example of the charge / discharge monitoring ICs 51 to 55.

  The charge / discharge monitoring ICs 51 to 55 are not particularly limited, but have the same configuration, and are formed on a single semiconductor substrate such as a single crystal silicon substrate by a known semiconductor integrated circuit manufacturing technique.

  A series connection circuit of resistors 301 to 304 is provided between the power supply terminal (Vcc) and the ground terminal (GND). The series connection circuit of the resistors 301 to 304 is provided for detecting the terminal voltage of the corresponding battery cell. A comparison circuit 306 for comparing the potential of the series connection node of the resistors 301 and 302 with the reference voltage 305 is provided. When the potential of the series connection node of the resistors 301 and 302 is lower than the potential of the reference voltage 305, an overdischarge state is established, and the output of the comparator 306 is transitioned from the previous high level to the low level. The output signal of the comparator 306 is transmitted to one input terminal of the 2-input NOR gate 310 via the inverter 307 at the subsequent stage.

  A comparator 312 for comparing the potential of the series connection node of the resistors 303 and 304 with the reference voltage 311 is provided. When the potential of the series connection node of the resistors 303 and 304 exceeds the potential of the reference voltage 311, an overcharge state is established, and the output of the comparator 312 is transitioned from the previous high level to the low level. The output signal of the comparator 312 is transmitted to one input terminal of the 2-input NOR gate 316 via the inverter 313 at the subsequent stage.

  A depletion type p-channel MOS transistor (PDMOS transistor) 308 is provided, and the gate electrode of the PDMOS transistor 308 is coupled to the input terminal DCHI. The PDMOS transistor 308 and the constant current circuit 314 are connected in series, and this series connection node is coupled to the other input terminal of the two-input NOR gate 310. As a result, the logical operation of the signal input from the input terminal DCHI and the output signal of the inverter 307 is enabled. The output signal of the two-input NOR gate 310 is output to the outside via the output terminal DCHO. The coupling circuit of the PDMOS transistor 308, the constant current circuit 314, and the two-input NOR gate 310 is an example of the first logic circuit in the present invention.

  A PDMOS transistor 309 is provided, and the gate electrode of the PDMOS transistor 309 is coupled to the input terminal CHGI. A PDMOS transistor 309 and a constant current circuit 315 are connected in series, and this series connection node is coupled to the other input terminal of the two-input NOR gate 316. Thereby, a logical operation of the signal input from the input terminal CHGI and the output signal of the inverter 313 is enabled. The output signal of the two-input NOR gate 316 is externally output via the output terminal CHGO. The coupling circuit of the PDMOS transistor 309, the current circuit 315 and the 2-input NOR gate 316 is an example of the second logic circuit in the present invention.

  According to the above example, the following effects can be obtained.

  (1) Charge / discharge monitoring ICs 51 to 55 are provided corresponding to the battery cells 11 to 15, and the charge / discharge monitoring of the corresponding battery cells 11 to 15 is performed in the individual charge / discharge monitoring ICs 51 to 55. Then, the charge / discharge monitoring result in the charge / discharge monitoring IC 51 is transmitted to the charge / discharge monitoring IC 52, where it is combined with the charge / discharge monitoring result of the battery cell 12 and transmitted to the charge / discharge monitoring IC 53. . As described above, the charge / discharge monitoring result of the charge / discharge monitoring IC is transmitted to the adjacent charge / discharge monitoring IC, so that the output signals from the output terminals DCHO and CHGO of the charge / discharge monitoring IC 55 are output by the charge / discharge monitoring ICs 51 to 55. The charge / discharge monitoring results are reflected. Therefore, when a charging abnormality or a discharging abnormality is detected in any of the charge / discharge monitoring ICs 51 to 55, the switch element 608 or 607 in the charge / discharge control circuit 60 is turned off, and the safety of the circuit is maintained.

  (2) When the charge / discharge monitoring result of the charge / discharge monitoring IC is transmitted to the adjacent charge / discharge monitoring IC, the output signals from the output terminals DCHO and CHGO of the charge / discharge monitoring IC 55 are output by the charge / discharge monitoring ICs 51 to 55. Therefore, there is no need to individually extract the charge / discharge monitoring results of the charge / discharge monitoring ICs 51 to 55. Therefore, there is no need to arrange a voltage adjustment circuit such as a level shifter or a photocoupler corresponding to the charge / discharge monitoring ICs 51 to 55, so that there is no possibility that the circuit is complicated or the power consumption is increased.

  (3) Even when the number of battery cells is changed, it is only necessary to increase or decrease the number of charge / discharge monitoring ICs accordingly. Therefore, it is possible to easily cope with the development of battery pack types.

  (4) The charge / discharge monitoring ICs 51 to 55 are sufficient to have a low withstand voltage corresponding to the output voltages of the corresponding battery cells 11 to 15. Since the low withstand voltage element is inexpensive, the cost of the charge / discharge monitoring ICs 51 to 55 can be reduced, and further the cost of the voltage pack including it can be reduced.

  Although the invention made by the present inventor has been specifically described above, the present invention is not limited thereto, and it goes without saying that various changes can be made without departing from the scope of the invention.

  For example, as shown in FIG. 3, a charge / discharge control circuit 60 can be provided on the positive electrode side path of the battery. That is, the switch elements 607 and 608 are provided between the positive electrode on the battery cell 11 and the positive terminal 71, and the switch elements 607 and 608 are driven by the drivers 605 and 606. In this case, it is necessary to slightly change the logical configuration of the charge / discharge monitoring ICs 51 to 55. That is, a constant current source 314 and a depletion type n-channel MOS transistor (NDMOS transistor) 508 are connected in series, and an AND gate 510 that obtains an AND logic between the logic of this series connection node and the output logic of the comparator 306. A constant current source 315 and an NDMOS transistor 509 are connected in series, and an AND gate 516 for obtaining an AND logic between the logic of this series connection node and the output logic of the comparator 312 is provided. The output of the AND gate 510 is externally output via the output terminal DCHO, and the output of the AND gate 516 is externally output via the output terminal CHGO. In this case, the connection relationship between the charge / discharge monitoring ICs 51 to 55 shown in FIG. 1 is changed as follows.

  Input terminals DCHI and CHGI in the charge / discharge monitoring IC 55 are coupled to the ground GND. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 55 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 54 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 54 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 53 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 53 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 52 adjacent thereto. Output signals from the output terminals DCHO and CHGO in the charge / discharge monitoring IC 52 are transmitted to the input terminals DCHI and CHGI in the charge / discharge monitoring IC 51 adjacent thereto.

  Further, the PDMOS transistors 308 and 309 and the NDMOS transistors 508 and 509 can be changed to an enhancement type. However, in order to reduce power consumption, it is better to use a depletion type.

  In the above description, the case where the invention made mainly by the present inventor is applied to the battery pack which is the field of use as the background has been described, but the present invention is not limited to this and is applied to various power supply devices. be able to.

  The present invention can be applied on condition that at least charging / discharging of the battery is monitored.

1 is a configuration circuit diagram of a battery pack including a charge / discharge monitoring device according to the present invention. FIG. 2 is a circuit diagram illustrating a configuration example of a main part in FIG. It is another structure circuit diagram of the principal part in the said battery pack.

Explanation of symbols

11-15 battery cells 21-25 charge / discharge monitoring circuit 51-55 charge / discharge monitoring IC
60 Charge / Discharge Control Circuit 71 Positive Side Terminal 72 Negative Side Terminal 607,608 Switch Element 605,606 Driver

Claims (11)

A charge / discharge monitoring device for monitoring charge / discharge of a battery comprising a plurality of battery cells coupled in multiple stages,
A plurality of monitoring circuits capable of detecting overdischarge voltage and overcharge voltage in the battery, and a control circuit for controlling charging / discharging of the battery according to a monitoring result of the plurality of monitoring circuits, Each of the monitoring circuits includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first logic circuit, and a second logic circuit,
The first logic circuit includes an overdischarge voltage detecting means for detecting the overdischarge voltage, and a gate electrode to which an overdischarge voltage detection result in another adjacent monitoring circuit transmitted via the first input terminal is input. A depletion type first MOS transistor including: a first logical operation means for outputting a logical operation result of a signal from the overdischarge voltage detection means and an output signal from the first MOS transistor from the first output terminal; Prepared
The second logic circuit receives an overcharge voltage detection means for detecting the overcharge voltage and an overcharge voltage detection result in the other adjacent monitoring circuit transmitted via the second input terminal. a first 2MOS transistor depletion type including a gate electrodes, a second logical operation means for outputting a logical operation result of the output signal from the signal and the first 2MOS transistor from the overcharge voltage detection means from said second output terminal And comprising
The plurality of monitoring circuits each input an overdischarge voltage or overcharge voltage detection result transmitted from an adjacent monitoring circuit to a corresponding gate electrode of the MOS transistor and transmitted from the adjacent monitoring circuit. The logical operation result of the detected result and the detection result of the one monitoring circuit is sequentially transmitted to the next-stage monitoring circuit, and the output of the monitoring circuit located at the last stage is transmitted to the control circuit. discharge monitoring device according to claim. A charge / discharge monitoring device for monitoring charge / discharge of a battery comprising a plurality of battery cells coupled in multiple stages,
Each of the battery cells coupled in multiple stages is arranged in parallel with the corresponding battery cell, and the overdischarge voltage and overcharge voltage of each of the corresponding battery cells can be individually detected. Each of the monitoring circuits includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal, and is adjacent to the first input terminal of the one monitoring circuit. Via a first connection part for connecting the first output terminal of the first monitoring circuit, and via a second connection part for connecting the second input terminal of the one monitoring circuit and the second output terminal of the adjacent monitoring circuit. A plurality of monitoring circuits arranged sequentially connected to each other;
In order to control charging / discharging of a battery composed of the battery cells connected in multiple stages according to the monitoring result obtained from the first output terminal and the second output terminal of the monitoring circuit located at the last stage of the connection array. A control circuit,
Each of the monitoring circuits monitors a first logic circuit that synthesizes the overdischarge voltage detection result of the battery cell monitored by itself and the overdischarge voltage detection result taken in via the first connection unit, and the monitoring circuit itself. includes a second logic circuit for combining the overcharge voltage detection result taken in through the over-charge current pressure detection result and the second connecting portion,
The synthesis result in the first logic circuit is output from the first output terminal, and the synthesis result in the second logic circuit is sequentially output from the second output terminal to the adjacent monitoring circuit. A charge / discharge monitoring apparatus, wherein the monitoring circuit located in the stage outputs to the control circuit. The control circuit includes a first switch coupled to one electrode of the battery configured with the multiple stages connected battery cells, a second switch connected in series to said first switch, said plurality of superintendent a first driver for controlling the opening and closing operation of the first switch based on an output signal from the first output terminal of the circuit located at the last stage of the visual circuit, Ki監 view on which is located the final stage discharge monitoring device of the second driver for controlling the opening and closing operation of the second switch based on an output signal from the second output terminal, comprising a composed claim 1 or 2, wherein in the circuit. A semiconductor integrated circuit in which a plurality of monitoring circuits sensed configured to be able to over-discharge voltage and the overcharge voltage is formed on a semiconductor board in to the battery configured with multiple stages coupled battery cells,
Each of the monitoring circuits includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first logic circuit, and a second logic circuit,
The first logic circuit, and over-discharge voltage detecting unit, the 1p-channel depletion type comprising a gate electrode above overdischarge voltage detection result via the first input terminal is taken from adjacent monitoring circuit is transmitted A MOS transistor; a first constant current source connected in series to a source / drain current path of the first p-channel MOS transistor; an output from the drain electrode of the first p-channel MOS transistor; and the overdischarge voltage detecting means. And a first logical operation means for outputting a logical operation result with the overdischarge voltage detection result in the first output terminal,
Said second logic circuit includes a overcharge voltage detecting means, the 2p-channel depletion type comprising a gate electrode in the overcharge voltage detection result via the second input terminal has been taken from the next adjacent monitoring circuit is transmitted A MOS transistor; a second constant current source connected in series to a source / drain current path of the second p-channel MOS transistor; an output from the drain electrode of the second p-channel MOS transistor; and the overcharge voltage detecting means. And a second logical operation means for outputting a logical operation result with the overcharge voltage detection result from the second output terminal,
The plurality of monitoring circuits are further connected to a second input terminal of the one monitoring circuit via a first connection unit that connects a first input terminal of the one monitoring circuit and a first output terminal of the adjacent monitoring circuit. via a second connecting portion for connecting the second output terminal adjacent said monitoring circuit, it is placed in successively connected respectively, the first output terminal and a second monitoring circuit located at the last stage of the connection sequence the semiconductor integrated circuit for charging and discharging monitoring device output terminal to the feature in that it comprises an arrangement which is connected to a control circuit for controlling the charging and discharging of the battery. A plurality of monitoring circuits configured to be able to detect an overdischarge voltage and an overcharge voltage in a battery composed of battery cells coupled in multiple stages, is a semiconductor integrated circuit formed on a single semiconductor substrate,
Each of the monitoring circuits includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first logic circuit, and a second logic circuit,
The first logic circuit is a depletion-type first n- channel type including overdischarge voltage detection means and a gate electrode to which an overdischarge voltage detection result taken from an adjacent monitoring circuit is transmitted via the first input terminal. and MOS transistor, a first constant current source connected in series with the source-drain current path of said first 1n channel type MOS transistor, and an output from the drain electrode of the first 1n channel type MOS transistor, the overdischarge voltage detection First logical operation means for performing logical operation on the overdischarge voltage detection result in the means,
Said second logic circuit includes a overcharge voltage detecting means, the de-flop Re' Deployment type including a gate electrode overcharge voltage detection result taken from the monitoring circuit you neighbor is transmitted through said second input terminal A second n-channel MOS transistor; a second constant current source connected in series to a source / drain current path of the second n-channel MOS transistor; an output from the drain electrode of the second n-channel MOS transistor; A second logical operation means for outputting a logical operation result with an overcharge voltage detection result in the charge voltage detection means from the second output terminal,
The plurality of monitoring circuits are further connected to a second input terminal of the one monitoring circuit via a first connection unit that connects a first input terminal of the one monitoring circuit and a first output terminal of the adjacent monitoring circuit. A first output terminal and a second output terminal of the monitoring circuit which are sequentially connected to each other via the second connection portion connecting the second output terminals of the adjacent monitoring circuits, and are located at the final stage of the connection arrangement. A semiconductor integrated circuit for a charge / discharge monitoring device, comprising: a battery connected to a control circuit for controlling charge / discharge of the battery. A plurality of monitoring circuits configured to be able to detect overdischarge voltage and overcharge voltage in a battery composed of battery cells coupled in multiple stages, is a semiconductor integrated circuit formed on a semiconductor substrate,
Each of the monitoring circuits includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first logic circuit, and a second logic circuit,
The first logic circuit, and over-discharge voltage detecting means, a first constant current source, a gate electrode is the first connected to the input terminal source-drain current path of the monitoring circuit through the constant current source A depletion-type first MOSFET connected between the highest potential and the lowest potential, and a signal from the connection point of the first MOSFET and the first constant current source as one input, and the detection result of the overdischarge voltage detection means as the other And a first logical operation means connected to a configuration for outputting the logical operation result of the one input and the other input from the first output terminal,
The second logic circuit includes an overcharge voltage detecting means, a second constant current source, a gate electrode connected to the second input terminal, and a source / drain current path through the constant current source. a first 2MOSFET of connected de-flop Re' Deployment type between the potential and the lowest potential, the detection result of the first 2MOSFET and said second constant current source signals from the connection point as one input the overcharge voltage detection means And a second logical operation means connected to a configuration for outputting the logical operation result of the one input and the other input from the second output terminal.
The plurality of monitoring circuits are further connected to a second input terminal of the one monitoring circuit via a first connection unit that connects a first input terminal of the one monitoring circuit and a first output terminal of the adjacent monitoring circuit. The first output terminal and the second output of the monitoring circuit located in the last stage of the connection array are sequentially connected to each other via the second connection portions that connect the second output terminals of the adjacent monitoring circuits. A semiconductor integrated circuit comprising a configuration in which a force terminal is connected to a control circuit for controlling charging and discharging of the battery. A semiconductor collection circuit used in a charge / discharge monitoring device including a plurality of monitoring circuits configured to be able to detect an overdischarge voltage and an overcharge voltage in a battery composed of battery cells coupled in multiple stages,
The monitoring circuit included in the semiconductor integrated circuit includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first logic circuit, a second logic circuit, With
The first logic circuit includes an overdischarge voltage detecting means, a first constant current source, a gate electrode connected to the first input terminal, and a source / drain current path via the constant current source. on the other hand a second 1MOSFET of connected depletion type between the potential and the lowest potential, a detection result of the first 1MOSFET and said first constant-current source a signal from the connection point as one input the overdischarge voltage detection means And a first logical operation means connected to a configuration for performing a logical operation of the one input and the other input and outputting the operation result from the first output terminal, and connected to the first input terminal. The logic operation result of the first logic operation means in the monitoring circuit adjacent to the gate electrode is arranged to be input,
The second logic circuit includes an overcharge voltage detecting means, a second constant current source, a gate electrode connected to the second input terminal, and a source / drain current path through the constant current source. A depletion type second MOSFET connected between the potential and the lowest potential, and a signal from the connection point of the second MOSFET and the second constant current source as one input, and the detection result of the overcharge voltage detecting means as the other And a second logical operation means connected to a configuration for performing a logical operation of the one input and the other input as an input and outputting the operation result from the second output terminal, and connected to the second input terminal It is arranged so that the logical operation result of the second logical operation means in the monitoring circuit adjacent to the gate electrode is input, and when the monitoring circuit is located at the final stage, the first output terminal Beauty semiconductor integrated circuit in which the second output terminal is characterized by comprising a structure which is connected to a control circuit for controlling the charging and discharging of the battery. The plurality of monitoring circuits, according to one of claims 4 to 7, characterized in that formed on the semiconductor base plate on the withstand voltage corresponding to a and the battery cell 1 output voltage same configuration to each other Semiconductor integrated circuit. A semiconductor integrated circuit used in a monitoring device for controlling charging / discharging of a battery formed by connecting a plurality of battery cells in multiple stages,
The monitoring circuit formed on the semiconductor integrated circuit is a depletion type in which a constant current source and a source-drain current path are connected between the highest potential and the lowest potential of the monitoring circuit via the constant current source. and MOSFET, two includes inputs and logic operation means, detection means for detecting at least either overdischarge or overcharge electricity in the charging and discharging, and when incorporated into the monitoring device, the output from the previous stage of the monitoring circuit Is input to the gate electrode of the MOSFET, and the two-input logic operation means performs a logical operation on the signal from the connection point of the MOSFET and the constant current source and the signal from the detection means, and the operation result is monitored in the next stage Controlling charging / discharging of a battery characterized by comprising a configuration for outputting to a control circuit that controls the charging / discharging of the battery when it is output to a circuit or located in the final stage The semiconductor integrated circuit for use in viewing device.   2. The charge / discharge monitoring apparatus according to claim 1, wherein the output of the logic operation means of the preceding stage is directly inputted to the gate electrode of the depletion type MOSFET or MOS transistor.   10. The semiconductor integrated circuit according to claim 4, wherein the output of the preceding logical operation means is directly inputted to each gate electrode of the depletion type MOSFET or MOS transistor.

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