JP4845952B2 - Window type semiconductor package - Google Patents

Description

  The present invention relates to a semiconductor device, and more particularly to a window type semiconductor package that avoids the occurrence of a peeling phenomenon at a kind of mold inlet.

  In a conventional semiconductor package, a chip is attached to a substrate via a die attaching layer and sealed with a mold resin. When the substrate has a window for internal electrical connection, a narrow mold inlet is formed between the upper surface of the substrate and the window when the mold sealing body is formed on the substrate and the window. The impact of the resin injection pressure generated at the time of forming applies stress to the die attaching layer on both sides of the mold inlet, so that the die attaching layer is compressed and deformed, and further, the die attaching boundary surface is invaded and the mounting quality is deteriorated. End up.

  As shown in FIG. 1, the known window type semiconductor package 100 mainly includes one substrate 110, one chip 130, one die attaching layer 140, a plurality of bonding wires 160, and one mold sealing body 160. The substrate 110 includes one substrate core layer 120 and only one lower solder mask layer 114. The substrate core layer 120 has one upper surface 121, one lower surface 122, and one slot 123 penetrating the upper and lower surfaces as a window. Have FIG. 2 is a diagram showing the upper surface 121 of the substrate core layer 120 of the substrate 110. The upper surface 121 of the substrate core layer 120 is a smooth surface like a solder mask layer that may not include the solder mask layer completely. Therefore, it is possible to enhance the adhesion effect of directly attaching to the die attaching layer 140. As shown in FIG. 2, one die attach area 124 is defined on the upper surface 121 of the substrate core layer 120, and the slot 123 exceeding the die attach area 124 is dependent on the mold flow direction 161 that forms the mold encapsulant 160. One mold inlet 123A is formed at one end and one mold outlet 123B is formed at the other end of the slot 123, but the mold inlet 123A and the mold outlet 123B cannot be covered with the chip 130. The chip 130 has one main surface 131 and a plurality of electrodes 132 installed on the main surface 131. When the main surface 131 of the chip 130 is attached to the substrate core layer 120 of the substrate 110 via the die attaching layer 140, the plurality of electrodes 132 of the chip 130 are aimed in the slot 123. The plurality of bonding wires 160 pass through the slots 123 to electrically connect the plurality of electrodes 132 of the chip 130 to the fingers 117 corresponding to the substrate 110. The mold sealing body 160 is formed on the substrate 110 and in the slot 123 to seal the chip 130 and the plurality of bonding wires 160. Further, during the mold resin injection operation in which a plurality of solder balls 170 are installed on the ball pad 113 of the substrate 110 to form the mold sealing body 160, as shown in FIG. 2, the mold flow direction 161 is from the mold inlet 123A. The slot 123 is sufficiently filled by flowing out from the inflow mold inlet 123B. The die attachment layers 140 on both side edges of the mold inlet 123A are easily subjected to mold flow pressure, are compressed and deformed, and are damaged by the silicon filling and solid granules of the mold sealing body 160. The portion of the die attaching layer 140 in the vicinity has no stress relaxation action, and the mold sealing body 160 further occupies a part of the die attaching boundary surface of the original die attaching layer 140 at both side edges of the mold inlet 123A. As a result, a peeling phenomenon occurs at the mold inlet 123A.

  In addition, the Chinese patent NO. In I291,761, a kind of package for preventing contamination of a bonding pad of a chip with a die attach agent is submitted. In such a package, at least one die attach is provided on a solder mask layer on a die attach surface of a substrate. An agent guide opening is formed, and one solder mask bar is formed on each side of the wire bonding slot. As a result, the die attach agent can be prevented from contaminating the chip bonding pad during the die attaching operation, but the die attaching layer on both side edges of the mold inlet receives a mold flow impact, which causes deformation and peeling. It cannot be resolved effectively. Furthermore, both ends of the slot (including the mold inlet) are covered with a solder mask layer, so that the mold inlet becomes narrower and part of the die attaching layer on both sides of the mold inlet is subjected to the impact of the mold flow pressure. As a result, adverse effects are further increased, affecting the reliability of products and the yield rate of manufacturing.

Taiwan Patent No. Specification of I291,761

A main object of the present invention is to provide a window type semiconductor package which avoids the occurrence of a peeling phenomenon at a kind of mold inlet.
Another object of the present invention is to provide a window type semiconductor package that avoids the occurrence of a peeling phenomenon at a kind of mold inlet, and such a package can maintain a constant die attachment interval, and overflow of the die attachment layer. The object is to provide a window type semiconductor package that improves the phenomenon.

  In order to achieve the above object, the following techniques are proposed in the present invention. According to the present invention, a window type semiconductor package that avoids the occurrence of a peeling phenomenon at a kind of mold inlet mainly includes one substrate, one chip, one die attaching layer, a plurality of bonding wires, and one mold sealing body. . The substrate includes one substrate core layer, one first mold flow obstruction and one second mold flow obstruction. The substrate core layer has one upper surface, one lower surface and one slot penetrating the upper and lower surfaces, defining one die attach area on the upper surface, one at one end of the slot beyond the die attach area. Form a mold inlet. The first mold flow obstruction and the second mold flow obstruction adhere to the upper surface of the substrate core layer and are located at the intersection of one edge of the die attach area and both side edges of the slot, and further at the mold inlet. Slightly protrudes on both sides. The chip has one main surface and a plurality of electrodes placed on the main surface, and the dimensions of the main surface correspond to the die attach area. The die attaching layer attaches the main surface of the chip to the upper surface of the substrate core layer of the substrate, and aims the plurality of electrodes of the chip within the slot. The plurality of bonding wires pass through the slots to electrically connect the plurality of electrodes of the chip to the substrate. The mold sealing body is formed on the upper surface of the substrate core layer. As a forming method, the slot is filled from the mold inlet and the plurality of bonding wires are sealed.

In order to achieve the above object, the present invention adopts still another technique.
In the above-described window type semiconductor package, the first mold flow obstacle and the second mold flow obstacle may be part of one solder mask layer, but they are installed independently without being interconnected.
In the above-mentioned window type semiconductor package, the gap between the first mold flow obstacle and the second mold flow obstacle may not be smaller than the width of the slot.

In the window type semiconductor package described above, the area covered by the first mold flow obstacle and the second mold flow obstacle on the upper surface of the substrate core layer may not be larger than 10%.
In the above-described window-type semiconductor package, the first mold flow obstacle and the second mold flow obstacle in the die attach area may have an elongated outer shape of the first mold flow obstacle and the second mold flow obstacle. And has a length along the opposite edges of the slot, which is longer than the length of the slight protrusions of the first mold flow obstruction and the second mold flow obstruction, and More than one width of the first mold flow obstruction and the second mold flow obstruction.

In the above-described window type semiconductor package, the first mold flow obstacle and the second mold flow obstacle may contact the main surface of the chip.
In the above-described window type semiconductor package, the substrate further includes a plurality of ball pads and one lower solder mask layer, the plurality of ball pads are disposed on the lower surface of the substrate core layer, and the lower solder mask layer is the lower surface of the substrate core layer. A plurality of ball pads are exposed.

In the above-described window type semiconductor package, one mold outlet is formed at the other end of the slot beyond the die attach area, and a plurality of support bumps are provided on both sides of the mold outlet, and the plurality of support bumps are formed on the substrate core layer. Adhere to the upper surface of
In the above-described window type semiconductor package, the plurality of support bumps may be part of the same solder mask layer as the first mold flow obstacle and the second mold flow obstacle, and are installed independently without being interconnected. .

In the above-described window type semiconductor package, the slot may be one central slot. The substrate core layer further includes a plurality of peripheral slots penetrating the upper and lower surfaces.
In the above-described window-type semiconductor package, a plurality of supporting projection bars are installed in a plurality of peripheral slots at one edge of the die attach area, and the plurality of supporting projection bars adhere to the upper surface of the substrate core layer.

In the above-described window-type semiconductor package, the plurality of support protrusions may be part of the same solder mask layer as the first mold flow obstacle and the second mold flow obstacle, and are installed independently without being interconnected. The
In the above-described window type semiconductor package, the plurality of support bumps and the plurality of support protrusion bars may slightly protrude into the die attaching area.
In the above-described window-type semiconductor package, the substrate core layer further has a plurality of stress release holes, and the die attach area has a plurality of corners aiming at the plurality of stress release holes.

As described above, the window type semiconductor package according to the present invention has the following advantages and effects.
The impact of the mold flow through the slight protrusions of the first mold flow obstruction and the second mold flow obstruction resists the stress applied to the die attach layer and is damaged by the silicon filling and solid granules of the mold seal. This reduces the occurrence of a peeling phenomenon and the deformation of the die attaching layer at the mold inlet.
Sites where the first mold flow obstruction and the second mold flow obstruction are in the die attach area can maintain a constant die attach spacing, thereby improving the overflow phenomenon of the die attach layer.

  An embodiment of the present invention will be described below with reference to the drawings. However, these drawings are all simplified, and are used as an explanation of the basic structure and implementation method of the present invention, showing only the elements related to the present invention, and the number, shape and dimensions of the elements actually implemented are shown. Can't show. For example, the dimensions may have been modified to be enlarged or simplified to provide an easy-to-understand diagram. The number, shape, and dimensions of the elements actually implemented can be selected according to the design, and the detailed element arrangement may be more complicated.

FIG. 3 shows a cross section of the mold inlet along the chip side and a slot along the lateral direction of the center line of the window type semiconductor package which avoids the occurrence of peeling phenomenon at a kind of mold inlet in one embodiment of the present invention. An example will be described with reference to FIG. 4 showing a cross section. The window type semiconductor package 200 mainly includes one substrate 210, one chip 230, one die attaching layer 240, a plurality of bonding wires 260, and one mold sealing body 260. Substrate 210 includes one substrate core layer 220, wherein, Figure 5 shows the upper surface, Fig. 6 showing the lower surface, in FIG. 7 and FIG. 5 shows a cross section taken along line 7-7 of FIG. 5 8 FIG. 8 shows a cross section along line 8.

  The substrate core layer 220 has one upper surface 221, one lower surface 222 and one slot 223, and the slot 223 passes through the upper and lower surfaces 221 and 222. As shown in FIG. 4, the upper surface 221 is used for the substrate core layer 220 for mounting the chip 230, and the lower surface 222 is used for the substrate core layer 220 for installing external connection terminals. The slot 223 can be used as a window for passing an internal electrical connection element, such as a bonding wire. As shown in FIG. 6, one die attachment area 224 is defined on the upper surface 221, and one mold inlet 223 </ b> A is formed at one end of the slot 223 beyond the die attachment area 224. The mold inlet 223A is a passage that fills the slot 223 from the upper surface 221 with a liquid mold resin that forms the mold sealing body 260 after the die attaching operation. One mold outlet 223B can be formed at the other end of the slot 223 beyond the die attach area 224, and the mold flow direction 261 (liquid mold resin filling direction) is from the mold inlet 223A toward the mold outlet 223B. It begins to flow. The substrate core layer 220 which is a base material layer of the substrate 210 is formed by laminating a single layer or a plurality of layers of glass fiber reinforced resin, and thus provides the basic strength and tenacity of the substrate 210. In one embodiment, the substrate core layer 220 further includes a solder mask layer (not shown) that entirely covers the upper surface 221, which may reduce die attach strength. The fixing force and height of the mold flow obstacles 211 and 212 can be increased. In this embodiment, the substrate core layer 220 is formed entirely of glass fiber reinforced resin, and a large area (60% or more) of the upper surface 221 in the die attach area 224 is provided for direct die attach. There are effects such as enhancement of die attaching strength and reduction of package height. In addition, the area of the upper surface 221 outside the die attach area 224 is directly covered with the mold sealing body 260, so that the bonding force between the substrate 210 and the mold sealing body 260 can be enhanced. .

  The substrate 210 further includes a first mold flow obstruction 211 and a second mold flow obstruction 212, both attached to the upper surface 221 of the substrate core layer 220 and one first edge of the die attach area 224. It is located at the intersection of the portion 224A and the side edges 223C of the slot 223, and slightly protrudes on both sides of the mold inlet 223A. The arrangement of the first mold flow obstruction 211 and the second mold flow obstruction 212 described above has several effects to be described. First, the pressure of the mold flow flowing into the mold inlet 223A is made possible by intensively resisting the stress applied to the die attaching layer 240 on both sides of the mold inlet 223A. Avoid uneven die attachment strength due to random intrusion. Second, the die attachment layer 240 can be maintained at a constant interval to improve the overflow phenomenon of the die attachment layer 240. However, the die attachment layer 240 is not resisted by the containment method, and thus the die sealing body 260 is not sufficiently filled. Avoid gaps. Third, the first mold flow obstruction 211 and the second mold flow obstruction 212 on the upper surface 221 of the substrate core layer 220 through the use of the first mold flow obstruction 211 and the second mold flow obstruction 212 in the form of a small block. The occupied area can be reduced, and the die attaching strength and the bonding force of the mold sealing body 260 are not affected. Typically, the area occupied by the first mold flow obstruction 211 and the second mold flow obstruction 212 on the upper surface 221 of the substrate core layer 220 may not be greater than 10%.

  The first mold flow obstruction 211 and the second mold flow obstruction 212 may adopt the same material as the solder mask layer or other materials, and it is preferable if they become a part of the same solder mask layer. In addition, by being installed independently without being interconnected, they can be formed not only through the primary patterning exposure step of the solder mask layer but also by controlling the installation at a very precise predetermined position. Furthermore, since they have the same altitude, it is possible to provide a low-cost and highly accurate obstacle installation. In one embodiment, the gap S1 between the first mold flow obstruction 211 and the second mold flow obstruction 212 may not be smaller than the width S2 of the slot 223 (as shown in FIG. 6), thus the mold It does not affect the resistance of the inlet 223A to the mold flow.

More specifically, by installing a plurality of support bumps 21 5 on either side of the mold outlet 223B, a plurality of the supporting bumper 21 5 is deposited on the surface 221 of the substrate core layer 220. The plurality of support bumps 21 5 may become part of the first mold flow obstacle 211 and the second mold flow obstacles 212 in the same solder mask layer is placed independently not be interconnected. Also, the convenience of internal electrical connection is provided so that the electrode of the chip is aimed in the slot in order to adjust the slot shape, quantity, and position of the substrate 210 according to the mounting chip. In this embodiment, the slot 223 may be a single central slot, substrate core layer 220 has a plurality of peripheral slots 22 5 to further penetrate the upper and lower surfaces 221 and 222, one second edge of the die-attaching area 224 the plurality of peripheral slots 22 5 in the section 224B capable of installing a plurality of support protrusions rod 216. The plurality of support protrusions 216 attach to the upper surface 221 of the substrate core layer 220 and may be part of the same solder mask layer as the first mold flow obstruction 211 and the second mold flow obstruction 212. Instead, they are installed independently. A plurality of supporting bumper 21 5 and a plurality of support protrusions rod 216 is preferably be slightly protruded die-attaching area 224, whereby the chip 230 examines whether suit sights on die-attaching area 224 in the optical and visual Is possible. On the other hand, if not aimed, first mold flow obstacle 211, some of the second mold flow obstruction 212, a plurality of supporting bumper 21 5 and a plurality of support protrusions rod 216, a small projecting portion in the chip 230 May be shielded.

  Now, the specific shapes of the first mold flow obstacle 211 and the second mold flow obstacle 212 will be described. As shown in FIG. 6, the first mold flow obstacle 211 and the second mold flow obstacle 212 may be elongated, but more specifically, they are closer to a rectangle than the elongated shape. The first mold flow obstruction 211 and the second mold flow obstruction 212 within the die attach area 224 have one length along opposite sides 223C of the slot 223, and this length is the first mold flow obstruction. Not only is the length of the slightly protruding portion of the flow obstruction 211 and the second mold flow obstruction 212 longer than the length of the first mold flow obstruction 211 and the second mold flow obstruction 212, so The first mold flow obstruction 211 and the second mold flow obstruction 211 in the same direction as the mold flow direction 261 and the area proportion of the first mold flow obstruction 211 and the second mold flow obstruction 212 inside and outside the touching area 224 The object 212 can be adjusted to be elongated, so that the first mold flow obstruction 211 and the second mold flow obstruction 212 are molded. Le can be ensured Isaono to resist the, it does not move even Tsu shocked. The length along which the first mold flow obstruction 211 and the second mold flow obstruction 212 extend along the opposite side edges 223C of the slot 223 is the central area of the opposite side edges 223C of the slot 223 (see FIGS. 7 and 8). Therefore, the gap length between the first mold flow obstacle 211 and the second mold flow obstacle 212 and the die attaching layer 240 can be shortened. For example, even if there is a die attachment gap between the first mold flow obstacle 211 and the second mold flow obstacle 212 with the die attaching layer 240, the mold sealing body 260 filled in the slot 223 is sufficiently filled. .

  In this embodiment, as shown in FIGS. 6 and 8, the substrate 210 further includes a plurality of ball pads 213 and one lower solder mask layer 214, and the plurality of ball pads 213 are formed on the lower surface 222 of the substrate core layer 220. The lower solder mask layer 214 is formed on the lower surface 222 of the substrate core layer 220 to expose the plurality of ball pads 213 (as shown in FIG. 8).

  3 and 4 again, the chip 230 has one main surface 231 and a plurality of electrodes 232 disposed on the main surface 231, and an integrated circuit (for example, a memory element) of the chip 230 is formed on the main surface 231. The plurality of electrodes 232 are used as external connection terminals of the integrated circuit, and bonding pads usually made of aluminum or copper are employed, or conductive bumps protruding from the main surface 231 can also be used. The size of the main surface 231 of the chip 230 corresponds to the die attach area 224. In one specific structure, the size of the die attach area 224 is substantially smaller than the upper surface 221 of the substrate core layer 220 and becomes a CSP (Chip Size PACkAge). Applies to In the present embodiment, as shown in FIG. 4, the plurality of electrodes 232 are disposed in the central area of the main surface 231, and the chip 230 further includes a plurality of peripheral electrodes 233 disposed in the peripheral area of the main surface 231.

  When the main surface 231 of the chip 230 is attached to the upper surface 221 of the substrate core layer 220 of the substrate 210 via the die attaching layer 240, the plurality of electrodes 232 of the chip 230 are aimed in the slot 223. The die attach layer 240 is manufactured using a B-stage adhesive, a liquid adhesive, a double-sided adhesive tape, or a well-known die attaching member, where the B-stage adhesive has an appropriate tackiness and denseness during the process. This is relatively applicable. The die attaching layer 240 usually contains a thermosetting resin. In the present embodiment, as shown in FIG. 6, the length of the first mold flow obstacle 211 and the second mold flow obstacle 212 along the opposite edges 223C of the slot 223 is the length of the opposite edges 223C of the slot 223. The mold encapsulant 260 is interposed between the die attach layer 240 and the adjacent first mold flow obstruction 211 and the second mold flow obstruction 212 via the slot 223 because it does not exceed the central portion or is shorter. The resulting die attach gap can be sufficiently filled.

Referring again to FIG. 4, the bonding wires 260 pass through the slots 223 to electrically connect the plurality of electrodes 232 of the chip 230 to the plurality of fingers 217 of the substrate 210. (Not shown) to be electrically connected to the corresponding ball pad 213. A plurality of bonding wires 260 can be gold wires formed by wire bonding or substrate leads for inner lead bonding. In the present embodiment, further includes a plurality of peripheral bonding wires 261 electrically peripheral electrode 233 of the chip 230 the plurality of peripheral bonding wires 261 passes through a peripheral slot 22 5 to a plurality of peripheral fingers 218 of the substrate 210 Connect to.

  The mold sealing body 260 is formed on the upper surface 221 of the substrate core layer 220 and is filled into the slot 223 through the mold inlet 223A to seal the plurality of bonding wires 260. Since the mold sealing body 260 is formed by using transfer molding (TrAnSfer Molding) technology, resin injection pressure is generated during the molding process, but the first mold flow obstruction 211 and the second mold flow of the present invention. Due to the slight protrusion of the obstacle 212, the resin injection pressure can be realized without applying excessive pressure to the die attaching layer 240 on both sides of the mold inlet 223A.

On the other hand, as shown in FIG. 4, a plurality of bonding balls 270 as external connection terminals of the package are installed on a plurality of ball pads 213 of the substrate 210.
In the embodiment, as illustrated in FIG. 3, the first mold flow obstacle 211 and the second mold flow obstacle 212 may contact the main surface 231 of the chip 230, but are not limited thereto.

  As shown in FIGS. 5, 6, and 7, it is preferable that the substrate core layer 220 further has a plurality of stress release holes 226, and the die attach area 224 has a plurality of corners aiming at the plurality of stress release holes 226. If the die attach layer 240 is not sufficiently filled with the die attachment interval between the chip 230 and the substrate 210, the corners of the chip 230 are covered with the mold sealing body 260, so that the substrate 210 is not directly pressed. .

  Accordingly, the slight impact of the first mold flow obstruction 211 and the second mold flow obstruction 212 is utilized, and the flow impact of the mold sealing body 260 resists the stress applied to the die attaching layer 240, and the mold sealing is performed. The occurrence of a peeling phenomenon and the deformation of the die attaching layer 240 are improved at the mold inlet 223A by reducing damage to the silicon filler and solid granules of the body 260. Also, the first mold flow obstruction 211 and the second mold flow obstruction 212 in the die attach area 224 can maintain a constant die attach interval, thereby improving the overflow phenomenon of the die attaching layer 240. ing.

  Although the present invention has been described based on the preferred embodiments thereof, the scope of protection of the present invention is limited by the scope of patent application that is attached later, and within the spirit and scope of the present invention based on this scope of protection. Any changes or modifications mentioned are within the protection scope of the present invention.

It is sectional drawing which shows the conventional window type semiconductor package. It is a figure which shows the upper surface of the board | substrate of the conventional window type semiconductor package. FIG. 5 is a cross-sectional view showing a mold inlet cut along a side of a chip in a window type semiconductor package according to an embodiment of the present invention. 4 is a cross-sectional view showing a slot of a substrate cut along a center line in the window type semiconductor package according to an embodiment of the present invention. FIG. It is a figure which shows the upper surface of the board | substrate of this window type semiconductor package by one Example of this invention. It is a figure which shows the lower surface of the board | substrate of this window type semiconductor package by one Example of this invention. FIG. 7 is a cross-sectional view showing a cross section of the substrate taken along line 7-7 of FIG. 5 according to an embodiment of the present invention. FIG. 8 is a cross-sectional view showing a cross section of the substrate taken along line 8-8 of FIG. 5 according to an embodiment of the present invention.

Explanation of symbols

S1: gap between the first mold flow obstacle and the second mold flow obstacle, S2: width of the slot, 100: window type semiconductor package, 110: substrate, 113: ball pad, 114: lower solder mask layer, 117: Finger, 120: Substrate core layer, 121: Upper surface, 122: Lower surface, 123: Slot, 123A: Mold inlet, 123B: Mold outlet die attaching area, 130: Chip, 131: Main surface, 132: Electrode, 140: Die attaching layer, 160: Bonding wire, 160: Mold sealing body, 161: Mold flow direction, 170: Bonding ball, 200: Window type semiconductor package, 210: Substrate, 211: First mold flow obstacle 212: Second mold flow obstruction, 213: Bo 214: Lower solder mask layer, 21 5 : Support bump, 216: Support protrusion rod, 217: Finger, 218: Peripheral finger, 220: Substrate core layer, 221: Upper surface, 222: Lower surface, 223: Slot, 223A: Mold inlet, 223B: Mold outlet, 223C: Side edge, 224: Die attaching area, 224A: First edge, 224B: Second edge, 22 5 : Peripheral slot, 226: Stress release hole, 230 : Chip, 231: Main surface, 232: Electrode, 233: Peripheral electrode, 240: Die attaching layer, 2 5 0: Bonding wire, 2 5 1: Peripheral bonding wire, 260: Mold sealing body, 261: Mold flow direction 262: Mold flow passage 270: Bonding ball

Claims (10)

A window type semiconductor package that avoids the occurrence of peeling phenomenon at the mold inlet,
One first mold flow obstruction, one second mold flow obstruction, one upper surface, one lower surface and one slot penetrating the upper and lower surfaces, one die attachment on this upper surface Defining a zone and forming a mold inlet at one end of the slot beyond the die attach zone, wherein the first mold flow obstruction and the second mold flow obstruction adhere to the upper surface of the substrate core layer. One substrate having a substrate core layer located at the intersection of one edge of the touching area and both side edges of the slot and projecting on both sides of the mold inlet;
One main surface and a plurality of electrodes disposed on the main surface, the size of the main surface being one chip corresponding to the die attach area;
A die attaching layer for attaching the main surface of the chip to the upper surface of the substrate core layer of the substrate and aiming an electrode group of the chip within a slot;
A plurality of bonding wires that pass through the slot to electrically connect the electrode group of the chip to the substrate;
One mold sealing body that is formed on the upper surface of the substrate core layer and that fills the slot from the mold inlet and seals the bonding wire group ;
One mold outlet is formed at the other end of the slot beyond the die attach area, and support bumps are installed on both sides of the mold outlet, and the support bumps adhere to the upper surface of the substrate core layer, The slot is a central slot located at the center of the substrate core layer, and the substrate core layer has a plurality of peripheral slots penetrating the upper and lower surfaces, and a supporting protrusion rod on the peripheral slot at the edge of the die attaching area There is provided, the window type semiconductor package the supporting projection bar attached to the top surface of the substrate core layer, the supporting bumper and the support protrusion bar, characterized in Rukoto protruding into the die-attaching area. Wherein the first mold flow obstacle second mold flow obstacle becomes part of the top of one solder mask layer, the window according to claim 1, characterized in that it is installed independently without being interconnected Type semiconductor package.   2. The window type semiconductor package according to claim 1, wherein a gap between the first mold flow obstacle and the second mold flow obstacle is not smaller than a width of the slot.   2. The window type semiconductor package according to claim 1, wherein an area covered by the first mold flow obstacle and the second mold flow obstacle on an upper surface of the substrate core layer is not larger than 10%. The outer shapes of the first mold flow obstacle and the second mold flow obstacle are elongated, and the portions of the first mold flow obstacle and the second mold flow obstacle in the die attach area are slots. has a first length along the two opposite side edges, the first length is longer than the second length of the small protruding portions of the first mold flow obstacle and the second mold flow obstacle is formed, according to claim 1, characterized in that it is formed longer than the width that is perpendicular to said first length before Symbol said second mold flow obstacle and the first mold flow obstacle Window type semiconductor package.   2. The window type semiconductor package according to claim 1, wherein the first mold flow obstacle and the second mold flow obstacle are in contact with a main surface of the chip.   The substrate further includes a plurality of ball pads and one lower solder mask layer, the ball pad group is disposed on the lower surface of the substrate core layer, and the lower solder mask layer is formed on the lower surface of the substrate core layer. 2. The window type semiconductor package according to claim 1, wherein the group is exposed.   A mold outlet is formed at the other end of the slot beyond the die attach area, and a plurality of support bumps are provided on both sides of the mold outlet, and the plurality of support bumps adhere to the upper surface of the substrate core layer. The window type semiconductor package according to claim 1, wherein: The plurality of support bumps may be part of the same solder mask layer as the first mold flow obstacle and the second mold flow obstacle, and may be independently installed without being interconnected. 9. The window type semiconductor package according to 8.
  2. The window type semiconductor according to claim 1, wherein the substrate core layer further includes a plurality of stress release holes, and the die attach area includes a plurality of corners aiming at the stress release holes. package.

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