JP4852891B2 - Wafer holder, wafer stacking method, and stacked semiconductor device manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing a stacked semiconductor device, and more particularly to a technique for transporting aligned wafers used in a step of stacking and connecting wafers on which high-definition semiconductor devices are formed.

  In recent years, portable electronic devices such as mobile phones, notebook computers, portable audio devices, and digital cameras have made remarkable progress. Along with this, in addition to improving the performance of the chip itself as well as the performance of the chip itself, improvements in the chip mounting technology are also required, especially from the viewpoint of reducing the chip mounting area and driving the semiconductor device at high speed. There is a need for improved packaging technology.

  In order to reduce the chip mounting area, stacking chips is used to increase the amount of mounted chips without increasing the mounting area, thereby reducing the effective mounting area. For example, JP-A-2001-257307, 2002-050735, and JP-A-2000-349228 disclose such a technique. The first one is based on a wire bond system in which a chip and a chip or a chip and a mounting substrate are connected by a wire. The second one is based on a flip chip method in which a chip and a chip or a chip and a mounting substrate are connected via a micro bump provided on the back surface of the chip. In the third method, the chip and the chip or the chip and the mounting substrate are connected by using both the wire bond method and the flip chip method.

  In order to increase the driving speed of a semiconductor device, a method realized by reducing the thickness of the chip and using a through electrode is effective. For example, Japanese Patent Laid-Open No. 2000-208702 shows an example of mounting with a thickness of micron.

  In the wire bond method, a wire is stretched around the semiconductor bare chip. For this reason, a large occupied area larger than the occupied area of the semiconductor bare chip itself is required, and it takes time because the wires are stretched one by one. On the other hand, in the flip-chip method, since the connection is made by the micro bump formed on the back surface of the semiconductor bare chip, the area for connection is not particularly required, and the area necessary for mounting the semiconductor bare chip is the semiconductor bare chip. It can be almost equal to its own area. Further, since the connection surface can have all the bumps necessary for connection, connection to the wiring board can be performed in a lump. Therefore, the flip-chip method is the most suitable method for minimizing the occupation area necessary for mounting the semiconductor bare chip to achieve high-density mounting, reducing the size of the electronic device and shortening the construction period.

  In addition to the improvement of the chip-mounting substrate and the connection method between the chip and the chip, as a means of reducing the manufacturing cost, a rewiring layer or the like is formed before separating the wafer on which the semiconductor chip is formed into individual chips. Connection bumps are formed, and in some cases, sealing with resin is performed. A semiconductor device in which processing at the wafer level is effective is a semiconductor device having a high manufacturing yield and a small number of pins, and has many advantages particularly in the production of memory. (NIKKEI MICRODEVICE February 2000, page 56 and NIKKEI ELECTRONICS 2003.9.1 P.127).

  On the other hand, development of a manufacturing apparatus for manufacturing such a semiconductor device has also been earnestly performed. For example, the literature introduces an apparatus for aligning and bonding wafers to be bonded. (P. Lindner et al .: 2002 Electronic Component and Technology Conference P.1439). In addition, a similar technique is disclosed in Japanese Patent Laid-Open No. 9-148207.

  By the way, as described above, bumps are generally formed for electrode bonding by flip chip, and bonding between bumps and pads and between bumps and bumps is performed. For this joining, a low melting point metal sympathetic bonding method such as solder, a mechanical pressing method using shrinkage during curing of a nonconductive resin, an anisotropic conductive material in which conductive fine particles are dispersed. There are a method of bonding with conductive fine particles with a conductive resin interposed, and a method of metal diffusion bonding in which bump bumps are heated and pressed to diffuse the metal molecules of the bumps.

  A problem in the case of bonding using such bumps is that heat treatment is involved. The first problem when performing the heat treatment is that if the alignment apparatus between the wafers and the electrode bonding apparatus are used in the same apparatus, the temperature of the apparatus rises and the mechanical members are thermally expanded to have a predetermined mechanical accuracy. Is no longer maintained. The second problem is that the heat treatment generally takes a long time. As a result, the ratio of the heat treatment time in the operation time of the laminated joining apparatus is increased, and the productivity is deteriorated. This second problem is also a problem that arises in electrode joining methods that do not involve heating, and is where improvement in productivity is desired.

To solve this problem, it is considered that the alignment process and superposition process of the two wafers to be laminated and the electrode connection process are performed by separate devices, and provisional connection is made so that positional displacement does not occur after the superposition process. The process of temporary fixing is made. As this kind of technology, a temporary attachment method using a resin is proposed in Patent Document 1 (Japanese Patent No. 2932840), and a temporary connection method using low pressure is proposed in Patent Document 2 (Japanese Patent Application Laid-Open No. 10-112476). Patent Document 3 (Japanese Patent No. 3030201) discloses a temporary fixing process using a thermosetting resin and a process of transferring the substrate to the main fixing process. Patent Document 4 (Japanese Patent Application Laid-Open No. 7-326641) discloses a temporary fixing by a magnet and a transporting process.
Japanese Patent No. 2932840 JP-A-10-112476 Japanese Patent No. 3030201 Japanese Patent Laid-Open No. 7-326641 JP 2004-103799 A

  However, in the temporary connection by the resin disclosed in Patent Documents 1 and 2 and the temporary fixing of the electrode itself, when the holding force of the temporary bonding is released, the positional deviation is likely to occur, and it takes time for the resin to be semi-cured. . In the method disclosed in Patent Document 4, since the temporary joining force is adjusted by controlling the gap distance between the holders, the reproducibility is low, and it is mechanically difficult to carry while maintaining the gap distance. Furthermore, in the methods of Patent Documents 3 and 4 that require a process of holding and transporting two aligned wafers, a fixing force must be applied so that the wafers do not shift each other during transfer. As a fixing force, Patent Document 5 (Japanese Patent Application Laid-Open No. 2004-103799) has proposed that an electromagnet and a permanent magnet be used in combination to fix a plate holding a substrate to a base member. Therefore, a favorable result has not been obtained.

That is, it has become clear that the conventional temporary connection method cannot maintain the alignment accuracy with respect to the minimum line width of the semiconductor chip that is further narrowed.
The present invention has been made in order to solve such problems. A wafer laminate in which two wafers are superposed with submicron positional accuracy is temporarily connected (temporarily fixed) while maintaining the alignment accuracy. Another object of the present invention is to provide a wafer holder, a method of laminating wafers using the wafer holder, and a method of manufacturing a laminated semiconductor device.

Means for solving the above problems are:
A pair of holder members sandwiching and holding two wafers aligned with each other ;
A plurality of coupling members for coupling the pair of holder members to each other;
A fixing member to which the coupling member is fixed to said coupling member so as to be displaceable only in the direction perpendicular to the holder surface of substantially the holder member to the outer peripheral portion of the holder member,
Have
The coupling member has a coupling force source that enables the pair of holder members to be controlled in a coupled state and a released state.

Thus, by fixing with a binding member that displaces was how the holder member in a direction perpendicular to the holder surface, force is greatly reduced in the wafer each other which is sandwiched between the holder member held displaced in the junction plane directions As a result, the alignment accuracy is maintained. Further, since the holder members are coupled by a coupling force source that can control the coupling and release states, the time required for the temporary bonding is not required, and the temporary bonding force can be easily controlled. With respect to the mounting position of the fixing member, three fixing members mounted on the outer peripheral portion form an isosceles triangle. When a parallel leaf spring is used as such a fixing member, necessary characteristics can be obtained with a simple structure.
Further, the electromagnet when using the electromagnetic force source which combines an electromagnet and a permanent magnet as a coupling force source, together to secure the holder member by a magnetic force of the permanent magnet without exciting the electromagnet during transport, separating the holder member fixed to each other If the control is performed so that the electromagnet is not energized during conveyance, the holder member is prevented from being deformed by heat, and it is not necessary to supply power to the conveyance device during conveyance. To be easy.

In the present invention, the fixing member includes a first parallel plate spring, a second parallel plate spring, and a relay member, and the first parallel plate spring is fixed to the holder member and the relay member, and the second These parallel leaf springs may be fixed to the relay member and the coupling member .

By using such a fixing member, it is possible to prevent the holder member from being deformed when the coupling force is applied to the holder member and causing a positional deviation from each other, and to maintain a uniformly joined state. Can be completely prevented.

Further, as the outer shape of the two sets of parallel plates to be used, if the folded shape of the two sets of parallel plates forms a truss structure with the coupling member as the apex, the holder is applied when force is applied to the holder member. Thus, no in-plane force is generated, so that the deformation of the wafer holder can be completely prevented, and stable temporary bonding can be maintained.

Other means for solving the above problems are as follows:
A wafer lamination joining method,
Wafer holding step of holding to be bonded wafer wafer holder, respectively,
Alignment process for aligning wafers,
Wafer overlaying process for overlaying aligned wafers,
A transporting process for transporting a wafer holder for holding the superposed wafers;
Having a bonding step of pressing and bonding the stacked wafers;
In each step
A wafer lamination bonding method using any of the above-mentioned wafer holders .

  By laminating and bonding wafers using this means, time is not required for temporary fixing, and pressurization can be performed while controlling the force required for the temporary process. Productivity and yield can be improved.

Still another means for solving the above problems is as follows:
A method for manufacturing a stacked semiconductor device, comprising:
A laminated semiconductor device manufacturing method comprising a wafer preparation step, a wafer lamination bonding step, and a chip separation step,
The wafer lamination joining process includes:
Wafer holding step of holding to be bonded wafer wafer holder, respectively,
Alignment process for aligning wafers,
Wafer overlaying process for overlaying aligned wafers,
A transporting process for transporting a wafer holder for holding the superposed wafers;
Having a wafer bonding step of pressing and bonding the superposed wafers;
One of the above-described wafer holders is used in the transporting process.

  The present invention can be transferred to the electrode bonding apparatus while maintaining the alignment of the stacked wafers, and greatly contributes to the improvement of the manufacturing yield of the stacked semiconductor device.

First, a wafer holder of the present invention is shown in FIG. In the figure, reference numeral 101 denotes a holder member of the wafer holder , and a coupling member 103 fixed to the holder member by a fixing member 102 is attached to the periphery thereof. A cross-sectional view at AA ′ of this wafer holder is shown in FIG. The fixing member 102 is hardly deformed in the holder surface direction of the holder member, and can be deformed only in a direction perpendicular to the holder surface. For this reason, the displacement direction of the coupling member 103 attached to the fixing member 102 is also limited to the direction perpendicular to the holder member 101 . A fixing member having such characteristics is a parallel leaf spring 104 as shown in FIG. Such parallel leaf springs are made of SUS, Ti, phosphor bronze plates having a thickness of 0.1 to 0.5 mm. In addition, this parallel leaf | plate spring may be formed by one leaf | plate spring each on the upper and lower sides, and each upper and lower leaf | plate spring may be comprised by the some leaf | plate spring isolate | separated within the same surface.

The wafer 100 to be laminated on the holder member 101 is fixed by, for example, vacuum chucking or electrostatic chucking (not shown), aligned with each other, and the connecting member is operated so as to maintain the positional relationship so as to sandwich the wafer. Hold. FIG. 2 shows this state. In this manner, by temporarily holding and using the bonding member that is displaced only in the direction perpendicular to the holder surface, provisional bonding that holds the positional relationship between the two aligned wafers is obtained.

The coupling force source of the coupling member includes an electromagnetic adsorption force obtained by energizing the coil 301 as shown in FIG. 3A, a vacuum adsorption force in which a conduit 302 as shown in FIG. It is possible to use the electrostatic attraction force in which the electrostatic electrode 303 is arranged as in (1). These coupling force sources can electrically control the state of adsorption and release, and are suitable coupling force sources. When electromagnetic force is used, a magnetic material may be used instead of an electromagnet for the joining member provided on the other holder member that sandwiches the wafer 100, or a permanent magnet may be used. In addition, when using vacuum suction force, the fixing member provided on one holder member is provided with a vacuum exhaust conduit, and the joining member provided on the other holder member has a non-suction surface close to a mirror surface. Will be provided. In the case of electrostatic attraction force, it is not necessary to arrange an electrostatic electrode on the other holder member, and it is only necessary to provide a relatively smooth surface.

A more suitable coupling force source as this coupling force source is to use a permanent magnet 304 and an electromagnet 305 in parallel. When this coupling source is used, when the wafer is held and transported, the excitation of the electromagnet is stopped and the permanent magnet is used as the coupling force source. When the transported wafer is taken out from the holder member , the electromagnet is excited and permanently By demagnetizing the magnetic force of the magnets, the holder members are released. FIG. 3D shows a conceptual diagram of the coupling member when the permanent magnet and the electromagnet are arranged side by side as a coupling force.

With regard to the arrangement of the connecting members, it is preferable for the distribution of the pressing force to arrange the peripheral portion of the holder member so as to be divided into 3n. In particular, as shown in FIG. 4, it is more preferable to arrange the periphery of the holder member 101 to be equally divided into three. With this arrangement, the holder members can be held with a uniform holding force within the holder surface.

In the present invention, a more preferable holding member is used. The structure will be described with reference to FIG. FIG. 5A is a plan view, and FIG. 5B shows a cross-section at BB ′ in FIG. The fixing member includes a first parallel spring 501 and a second parallel spring 502, one end of the first parallel spring 501 is fixed to the holder member 101, and the other end is connected to the relay member 503. On the other hand, one end of the second parallel spring 502 is fixed to the relay member 503, and the other end is connected to the connection member 103. In this illustration, both the first and second parallel leaf springs are formed from two parallel plates of the same size, but both the first and second leaf springs are each formed by a pair of parallel leaf springs. May be.

When a bonding force is applied to the holder member using the above-described fixing member around the holder member , the holder member may be deformed as shown in FIG. 6 depending on the thickness and size of the wafers to be stacked. FIG. 6 is an exaggerated cross-sectional view of a holder member deformation phenomenon that may occur when a binding force is applied to the superimposed holder member 101. When the connecting members attract each other and apply a force perpendicular to the holder surface , the parallel leaf spring is deformed in a direction perpendicular to the holder member . At this time, the force applied to the holder member due to the deformation is not completely perpendicular to the holder surface , and a slight component in the in-plane direction of the holder member may be generated. The force acting in the in-plane direction of the holder member is also generated from other connecting members attached to the peripheral portion, and they are all forces in the radial direction. Resultant force of the force becomes the result of pushing up the central portion of the holder member, the holder member is deformed.

This point will be further described with reference to FIG. The leaf spring 104 applies pressure to the holder member 101. At this time, the leaf spring 104 is deformed as shown in FIG. Since the leaf spring 102 returns to its natural length and pressure is applied, if the position of the connecting member is fixed, the force that pushes the holder member 101 in the holder in-plane direction depending on the degree of deformation of the leaf spring. And the force may cause the holder member 101 to be deformed. However, such a phenomenon does not occur if two sets of parallel plates of the present invention are used. The first leaf spring 501 applies pressure to the holder member 101. At this time, the first leaf spring 501 is deformed as shown in FIG. As in the previous case, the first leaf spring 501 applies pressure to the holder member so as to return to its natural length. In FIG. 7B, there is a relay member 503, which is generated from the second leaf spring 502. Together with the force, the position of the relay member 503 is changed. That is, when the two sets of parallel leaf springs 501 and 502 are deformed, the position of the relay member 503 (the horizontal position in the figure) changes, and no force for deforming the holder member is generated.

In other words , even if the holder members are close to each other and exert an attracting force on each other, the position of the coupling member does not change. As a result, a transfer step of temporarily connecting and transferring the wafer with a stable and uniform force is realized. Further, the preferred shape of the fixing member using the two parallel leaf springs and the relay member connecting them is the first and the second when the second parallel leaf spring is folded back with respect to the relay member. The two parallel leaf springs have a truss structure. (See FIG. 8A.) By making this folded composite shape into a truss structure (see FIG. 8B), the force acting on each part of the parallel leaf spring and the uniformity of deformation can be obtained, and the force of the coupling member can be obtained. It can be efficiently transmitted to the holder member .

  In the present invention, a shape in which one parallel plate spring is folded around the relay member is referred to as a “folded composite shape”. Conversely, the shape of the leaf spring of the present invention can be said to be a shape in which a truss structure is folded back by a relay member. At this time, a preferable shape of the truss structure is an equilateral triangle having one side in the tangential direction of the wafer at the mounting portion and having the coupling member as a vertex.

Next, a method for laminating a wafer and a method for manufacturing a laminated semiconductor device according to the present invention will be described.
The method for manufacturing a stacked semiconductor device according to the present invention comprises steps Q1, Q2 and Q3. These steps will be described with reference to FIG.
Q1: Wafer preparation process for forming a semiconductor device on a wafer Using an ordinary semiconductor exposure device, a circuit pattern on a mask is reduced and projected onto a wafer 701 coated with a resist, and after developing the resist, etching or heat of impurities A wafer 100 on which the circuit element 703 is formed is obtained by performing a diffusion process. On the side opposite to the circuit surface of the obtained wafer, electrode pads or bumps for connecting to chips of other wafers are formed. (For example, see JP-A-60-235446)
Q2: Wafer Lamination Bonding Process The wafer lamination bonding of the present invention comprises Q2-1, Q2-2, Q2-3, and Q2-4 processes.

Q2-1: Wafer Holding Step The preprocessed wafer 100 is held on a wafer holder by electrostatic chucking (electrostatic chucking electrodes and the like are not shown). At this time, the wafer to be adsorbed may be an already laminated wafer (wafer laminated body). That is, one of the wafers may be in the form of a wafer stack formed by superimposing a plurality of wafers, possibly thinned by grinding or the like.

Q2-2: Alignment process and wafer overlay process
Two wafers held by the wafer holder are aligned (aligned). The alignment is performed by detecting a mark on the wafer or the wafer holder using the microscope 704. For example, a technique disclosed in Japanese Patent Laid-Open No. 7-14982 is used. When the alignment of the wafers to be stacked is completed using the wafer holder, the aligned wafers are brought close to each other and brought into contact with each other. After the contact, in order to maintain the superimposed positional relationship, the connection member of the present wafer holder is operated to temporarily fix the holder members together. If this temporary process is performed by another method, for example, a temporary process using a resin, a curing time of the resin is required, which results in a decrease in productivity. In addition, the bonding force cannot be controlled and the alignment state may not be maintained. Furthermore, when the electrode bonding state between the two wafers is detected from the outside through the electrodes, and there is a problem in the alignment between the electrodes as a result, it is easy to temporarily fix using the wafer holder of the present invention. Although the temporarily fixed wafer can be released and alignment can be performed again, other methods cannot be easily corrected, resulting in a decrease in yield.

Q2-3: Wafer Transport Process The temporarily fixed wafer (laminated body) 706 is transported to the next process by the robot arm 707. A known robot transfer device is used for the robot in the transfer process.
Q2-4: The wafer stack held by the wafer holder and the wafer holder on the heating plate 719 incorporates a wafer bonding step heating element is adsorbed, with a pressure member 751 and 752, pressurized by the pressure cylinder. By applying a predetermined pressure for a predetermined time, the electrodes (metal bump and pad, metal bump and metal bump) on the wafer are bonded. At this time, in some cases, the resin may be sealed between the wafers and heated. Further, a method without heating may be used. (For example, Unexamined-Japanese-Patent No. 2002-64266).

Q3: Separation process for separating the chips on the wafer into individual chips This wafer lamination joining process is repeated for the required number of laminations, and the lamination joining is performed sequentially.

  Wafers laminated and bonded at the wafer level are cut along dicing lines and separated as chips. In general, a dicing saw method in which cutting is performed using a dicing blade, a method in which the wafer surface is melted and split by a laser beam, and a method in which a cutting line is drawn by a diamond cutter are used. However, a dicing saw method is preferable as a method for separating the wafer stack into chips.

  By manufacturing the stacked semiconductor device in this way, the manufacturing yield of the stacked semiconductor device is improved, and an increase in manufacturing cost can be suppressed.

  Increasing the density and driving speed of semiconductor devices is an inevitable demand in the industry, and the use of the present invention for that purpose is therefore inevitable in the industry.

The wafer holder of this invention is shown. (A) is a top view, (b) is sectional drawing. It is a figure which shows the state which pinched and hold | maintained the wafer aligned with the wafer holder of this invention. It is a figure which shows the example of the coupling member of the wafer holder of this invention. It is a figure which shows the suitable example of the attachment position of the coupling member of this invention. It is a figure which shows the suitable example of the fixing member of this invention. It is a figure which shows a deformation | transformation of a holder member . It is a figure which shows the effect | action of the two leaf | plate springs of this invention. It is a figure which shows the suitable shape of the two leaf | plate springs of this invention. It is a flowchart which shows the wafer lamination | stacking joining process and laminated semiconductor manufacturing method of this invention.

Explanation of symbols

101 ··· Holder member 102 ··· Fixing member 103 ··· Coupling member 301 · · · Coil 302 · · · Conduit 303 · · · Electrostatic electrode 304 · · · Permanent magnet 305 ·・ ・ ・ Electromagnet 501 ・ ・ ・ ・ Parallel spring 502 ・ ・ ・ ・ Parallel leaf spring 503 ・ ・ ・ ・ Relay member

Claims (9)

A pair of holder members sandwiching and holding two wafers aligned with each other ;
A plurality of coupling members for coupling the pair of holder members to each other;
A fixing member to which the coupling member is fixed to said coupling member so as to be displaceable only in the direction perpendicular to the holder surface of substantially the holder member to the outer peripheral portion of the holder member,
Have
The wafer holder , wherein the coupling member has a coupling force source that enables the pair of holder members to be controlled in a coupled state and a released state. The wafer holder according to claim 1,
The wafer holder , wherein the fixing member is a parallel leaf spring having two leaf springs in parallel. The wafer holder according to claim 1,
The fixing member includes a first parallel plate spring, a second parallel plate spring, and a relay member. The first parallel plate spring is fixed to the holder member and the relay member, and the second parallel plate spring is provided. A leaf spring is fixed to the relay member and the coupling member.
A wafer holder characterized by that. The wafer holder according to claim 3,
The shape of the two sets of parallel leaf springs constitutes a truss structure whose folded shape has the coupling member as the apex in terms of structural mechanics.
A wafer holder characterized by that. The wafer holder according to any one of claims 1 to 4, wherein the coupling force source is any one of an electromagnetic adsorption force, an electrostatic adsorption force, and a vacuum adsorption force. The wafer holder according to claim 5 , wherein
Said coupling member includes a permanent magnet for maintaining the coupling state of and how the pair of holder members, and characterized by having an electromagnet for the erase out the magnetic field of the permanent magnet and if the pair of the holder member and the released state by excitation Wafer holder. The wafer holder according to any one of claims 1 to 6 ,
Wafer holder, characterized in that three of the fixing member for fixing the coupling member to the outer peripheral portion of the holder member forms a isosceles triangle. A wafer lamination joining method,
Wafer holding step of holding to be bonded wafer wafer holder, respectively,
Alignment process for aligning wafers,
Wafer overlaying process for overlaying aligned wafers,
Conveying step of conveying the wafer holder for holding the superimposed wafers,
Having a bonding step of pressing and bonding the stacked wafers;
A wafer lamination joining method using the wafer holder according to claim 1 in each of the steps. A method for manufacturing a stacked semiconductor device, comprising:
A laminated semiconductor device manufacturing method comprising a wafer preparation step, a wafer lamination bonding step, and a chip separation step,
The wafer lamination joining process includes:
Wafer holding step of holding to be bonded wafer wafer holder, respectively,
Alignment process for aligning wafers,
Wafer overlaying process for overlaying aligned wafers,
Conveying step of conveying the wafer holder for holding the superimposed wafers,
Having a bonding step of pressing and bonding the stacked wafers;
A method for manufacturing a stacked semiconductor device, wherein the wafer holder according to claim 1 is used in each of the steps.

Images