JP4860143B2 - Display device - Google Patents

Description

The present invention relates to a display device including a light emitting element and a driving method thereof.

  In recent years, research and development of display devices using light-emitting elements (self-light-emitting elements) have been advanced. Such a display device is widely used as a display screen of a mobile phone or a monitor of a personal computer by taking advantage of high image quality, thinness, and light weight. In particular, such a display device has features such as a fast response speed suitable for moving image display, low voltage, low power consumption drive, etc., so that it can be used in a wide range including a new generation of mobile phones and personal digital assistants (PDAs). Applications are expected.

The luminance of the light emitting element is deteriorated due to a change with time. For example, when a certain voltage V ₀ is applied, a predetermined light emission luminance is obtained with the current I ₀ , but due to a change with time of the light emitting element, only the current I ₀ ′ is applied to the light emitting element even when the voltage V ₀ is applied. Since it does not flow, the predetermined brightness cannot be obtained. Further, for example, even when a certain current is passed, the same luminance cannot be obtained due to the deterioration of the light emitting element over time.

  This is presumably because the light emitting element generates heat when a voltage or current is applied, and the properties at the film interface or electrode interface of the light emitting element change. Further, since the deterioration state of the light emitting element is different for each light emitting element, the sticking occurs.

  In order to suppress the deterioration of the light emitting element and improve the reliability, there is a method of applying a voltage in the opposite direction to the voltage applied when the light emitting element emits light (see Patent Document 1).

JP 2001-117534 A

  A pixel circuit having a light emitting element can have various structures. Therefore, the present invention applies a reverse voltage (hereinafter referred to as a reverse voltage) to the light emitting element in order to control the deterioration of the light emitting element and improve the reliability of the display device having a new pixel circuit. It is an object of the present invention to provide a circuit configuration and a method thereof.

  In view of the above problems, the present invention provides a switching transistor connected to a signal line (referred to as a switching transistor), a driving transistor connected to a light emitting element (referred to as a driving transistor), and a driving transistor. In a new pixel circuit having at least a current control transistor (referred to as a current control transistor) connected in series, a reverse voltage is applied to the light emitting element. The reverse voltage refers to applying a voltage in the direction opposite to the direction in which the light emitting element emits light.

  Preferably, the gate potential of the driving transistor is set to a fixed potential, so that the gate-source voltage Vgs due to parasitic capacitance or wiring capacitance can be prevented from changing. As a result, display unevenness due to variations in the gate-source voltage Vgs of the driving transistor can be suppressed.

  The present invention also provides an erasing transistor (denoted as an erasing transistor) that turns off a current control transistor connected to a signal line, for example, discharges the charge of a capacitor connected to the current control transistor. In the added pixel circuit, a reverse voltage is applied to the light emitting element.

  The driving transistor can be operated in the saturation region and the linear region, and the switching transistor, the current control transistor, and the erasing transistor are operated in the linear region. When operating in the linear region, the driving voltage can be lowered, so that low power consumption of the display device can be achieved.

  In a method of applying a reverse voltage (also referred to as a reverse bias), a voltage is applied so that the magnitude relationship between the anode applied to the light emitting element and the voltage applied to the cathode is reversed. That is, a voltage is applied to invert the potential between the anode line connected to the anode and the cathode line connected to the cathode. Note that a power supply line may be connected to the anode line and the cathode line, and a potential inverted by the power supply line may be applied.

  A circuit for applying a reverse voltage (hereinafter referred to as a circuit for applying a reverse voltage) includes a semiconductor circuit such as an analog switch or a clocked inverter, and a transistor that is turned on when a reverse voltage is applied (both transistors for applying a reverse voltage). Notation).

  The analog switch includes at least a first transistor and a second transistor having different polarities. The clocked inverter includes at least a first transistor, a second transistor, and a third transistor having different polarities. Further, a fourth transistor having a polarity different from that of the third transistor may be included.

  A transistor includes a thin film transistor (TFT) using a non-single crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a MOS transistor formed using a semiconductor substrate or an SOI substrate, a junction transistor, an organic semiconductor, Transistors using carbon nanotubes and other transistors can be applied.

  According to the present invention, it is possible to provide a circuit configuration and a method for applying a reverse voltage in order to control deterioration of a light emitting element and improve reliability for a display device having a new pixel circuit. Further, the reverse voltage can be applied without short-circuiting the anode line and the signal line, that is, the anode line and the power supply line included in the signal line driver circuit. As a result, the life of the electronic device having the display device can be extended.

  As described above, a circuit configuration and a method for applying a reverse voltage to control deterioration of a light-emitting element and improve reliability can be provided for a display device having a new pixel circuit.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

  Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

  In the following embodiments, a transistor has three terminals of a gate, a source, and a drain. However, the source electrode and the drain electrode cannot be clearly distinguished because of the structure of the transistor. Therefore, when describing connection between elements, one of a source electrode and a drain electrode is referred to as a first electrode, and the other is referred to as a second electrode.

(Embodiment 1)
In this embodiment, a specific example in which a reverse voltage application circuit having an analog switch is used for at least a switching transistor, an erasing transistor, a driving transistor, and a pixel circuit having a current will be described.

  FIG. 1A illustrates a state where a forward voltage (a voltage in a direction in which the light emitting element emits light) is applied and the light emitting element emits light. A reverse voltage application circuit 116 illustrated in FIG. 1A includes an analog switch 28 including an n-channel transistor 20 and a p-channel transistor 21. The gate electrode of the n-channel transistor 20 is connected to the anode line 18, and in this embodiment, the anode line 18 is maintained at 5V. The gate electrode of the p-channel transistor 21 is connected to a power supply line or a cathode line held at a constant potential, and in this embodiment is connected to a first power supply line 19 fixed at −2V. The output wiring (output terminal) of the analog switch 28 is connected to the first electrode of the reverse voltage applying transistor 17 and the reset line 59 connected to the scanning line 58 or the gate electrode of the erasing transistor. In the present embodiment, the output wiring of the analog switch 28 is connected to the first electrode of the reverse voltage applying transistor 17 and the scanning line 58.

  The reverse voltage application transistor 17 has a gate electrode connected to a power supply line or a cathode line maintained at a constant potential, a first electrode connected to an anode line, and a second electrode connected to an output wiring of the analog switch 28. Is connected. In the present embodiment, the gate electrode of the reverse voltage application transistor 17 is held at a potential of −2V. Further, the first electrode of the reverse voltage applying transistor 17 is connected to the scanning line 58 connected to the gate electrode of the switching transistor. The first electrode of the reverse voltage applying transistor may be connected to a reset line 59 connected to the gate electrode of the erasing transistor.

  In such a circuit configuration, a pulse signal having a voltage of, for example, 5 V or −2 V is output from the buffer circuit included in the scanning line driving circuit and input to the analog switch 28. Then, either the n-channel transistor 20 or the p-channel transistor 21 is turned on, and the reverse voltage application transistor 17 is turned off. Specifically, when a Low signal is input, the p-channel transistor 21 is turned on, and when a High signal is input, the n-channel transistor 20 is turned on. A signal output from the buffer circuit is input to the scanning line 58.

  When such a signal is input to the analog switch 28, the switching transistor 51 is turned on in the pixel 101, and a video signal is input from the signal line 57. In this embodiment, the switching transistor 51 is an n-channel transistor, and a video signal is input as a voltage value. The switching transistor 51 may be a p-channel transistor.

  Then, the driving transistor 53 and the current control transistor 54 are turned on, and the light emitting element 55 emits light. The cathode of the light emitting element 55 is connected to the cathode line 69 held at −10V, and the anode is connected to the anode line 18 held at 5V.

  In this embodiment, the driving transistor 53 and the current control transistor 54 are p-channel transistors, but n-channel transistors may be used. It is preferable that the driving transistor 53 and the current control transistor 54 have the same polarity.

  At this time, if necessary, the erasing transistor 52 is operated to select the reset line 59 and provide an erasing period. In this embodiment, the erasing transistor 52 is an n-channel transistor. Needless to say, the erasing transistor 52 may be a p-channel transistor. The erasing transistor and its operation may be referred to Japanese Patent Laid-Open No. 2001-343933, and can be used in combination with them.

  A control circuit 118 is connected to the anode line 18 to which the first electrode of the erasing transistor 52 and the current control transistor 54 are connected and the second power supply line 60 to which the gate electrode of the driving transistor is connected. ing. Note that when the gate electrode of the driving transistor is set to a fixed potential, the gate-source voltage Vgs due to parasitic capacitance or wiring capacitance can be prevented from changing. Therefore, it is preferable that the potential of the second power supply line 60 be a fixed potential at least when a forward voltage is applied.

  The control circuit 118 includes two n-channel transistors, and the first electrode of the first n-channel transistor 61 and the gate electrode of the second n-channel transistor 62 are connected to the anode line 18. ing. The second electrode of the first n-channel transistor 61 and the first electrode of the second n-channel transistor 62 are connected to the second power supply line 60. The gate electrode of the first n-channel transistor 61 is fixed at −2V, and the second electrode of the second n-channel transistor 62 is fixed at 0V.

  In such a control circuit 118, when the forward voltage is applied, the first n-channel transistor 61 is off and the second n-channel transistor 62 is on. As a result, the potential of the gate electrode of the driving transistor 53 is 0V.

  In the above state, the driving transistor 53 is turned on, the cathode line 69 is −10 V, and the anode line 18 is 5 V. Therefore, a forward voltage is applied to the light emitting element to emit light.

  FIG. 1B shows a state where a reverse voltage is applied. In the present embodiment, the anode line 18 is set to −10V, and the first power supply line 19 is set to −2V. Then, the n-channel transistor 20 and the p-channel transistor 21 included in the analog switch 28 are both turned off, the reverse voltage applying transistor 17 is turned on, and the scanning line 58 is set to −10V. Accordingly, the switching transistor 51 is turned off in the pixel 101.

  At this time, the voltage of the cathode line 69 is set to 5 V, and a reverse voltage is applied. Then, the driving transistor 53 and the current control transistor 54 are turned on, and a reverse voltage is efficiently applied. In particular, since the driving transistor 53 is operated in a saturation region, when the L / W is designed to be large, there is a concern that the resistance value is high. Therefore, in the control circuit 118, the first n-channel transistor 61 is turned on, the second n-channel transistor 62 is turned off, and the second power supply line 60 connected to the gate electrode of the driving transistor 53 is connected. The voltage is -10V. As a result, the gate voltage applied to the gate electrode of the driving transistor 53 can be increased, and the reverse voltage can be applied more efficiently. As a result, it is possible to reduce the problem that the application of the reverse voltage due to the resistance of the driving transistor 53 becomes longer.

  Note that the driving transistor 53 may be operated in a linear region. When the driving transistor 53 is operated in the linear region, the driving voltage can be lowered. Therefore, low power consumption of the display device can be expected.

  In such a state, the driving transistor 53 and the current control transistor 54 are turned on, and the cathode line 69 is 5 V and the anode line 18 is −10 V. Therefore, a reverse voltage is applied to the light emitting element.

  In order to eliminate the resistance of the driving transistor 53 and the current control transistor 54, a diode may be provided between the first electrode (anode in this embodiment) of the light emitting element and the anode line 18. . Note that although the first electrode of the light-emitting element is an anode in this embodiment mode, a pixel structure in which the first electrode is a cathode may be used.

  According to this embodiment mode, a circuit configuration and a method for applying a reverse voltage to a display device including a new pixel circuit in order to reduce deterioration of a light emitting element and improve reliability can be provided.

  Further, according to this embodiment mode, a reverse voltage can be applied without causing a short circuit between the anode line and the signal line, that is, the anode line and the power supply line included in the signal line driver circuit.

  Note that the voltage values shown in this embodiment are merely examples, and the present invention is not limited to these values.

(Embodiment 2)
In this embodiment, a specific example used for a reverse voltage application circuit including a clocked inverter will be described.

FIG. 2A shows a state in which a forward voltage is applied. The reverse voltage application circuit 116 shown in FIG. 2A includes a clocked inverter 29 having a p-channel transistor 12 and n-channel transistors 13 and 14 connected in series. In addition, a clocked inverter having a p-channel transistor may be used. The gate electrode of the p-channel transistor 12 and the gate electrode of the n-channel transistor 13 have the same potential, that is, are connected. The first electrode of the p-channel transistor 12 is connected to a power supply line held at a constant potential, for example, VDD (high potential power supply line) held at 5V. The first electrode of the n-channel transistor 14 is connected to a power supply line held at a constant potential, for example, VSS (low potential power supply line) held at −2V. The gate electrode is connected to a power supply line or a cathode line held at a constant potential, and is connected to a first power supply line 19 held at 5 V in this embodiment. The output wiring of the clocked inverter 29 is connected to the first electrode of the reverse voltage applying transistor 17 and the scanning line 58 or the reset line 59 in FIG. In the present embodiment, the output wiring of the clocked inverter 29 is connected to the first electrode of the reverse voltage applying transistor 17 and the scanning line 58.

  The reverse voltage application transistor 17 has a gate electrode connected to a power supply line or a cathode line maintained at a constant potential, a first electrode connected to an anode line, and a second electrode connected to an output wiring of the clocked inverter 29. Electrodes are connected. In the present embodiment, the gate electrode of the reverse voltage application transistor 17 is maintained at a potential of −2V. The first electrode of the reverse voltage application transistor is connected to the output wiring of the clocked inverter, and the second electrode is connected to the first power supply line 19. Furthermore, in the present embodiment, the first electrode of the reverse voltage application transistor 17 is connected to the scanning line 58 connected to the gate electrode of the switching transistor. The first electrode of the reverse voltage applying transistor may be connected to a reset line 59 connected to the gate electrode of the erasing transistor.

  For example, 5 V and −2 V pulse signals are output from the buffer circuit included in the scanning line driving circuit and input to the clocked inverter 29. Then, the n-channel transistor 14 is turned on and the reverse voltage applying transistor 17 is turned off.

  As a result, the signal output from the buffer circuit is input to the scanning line 58. In this embodiment, the switching transistor 51 in FIG. 1A is an n-channel transistor, and a video signal is input as a voltage value. Then, as in the first embodiment, the driving transistor 53 and the current control transistor 54 are turned on, and the light emitting element 55 emits light.

  The other pixel configuration, operation, and control circuit 118 are the same as those in FIG. Note that when the gate electrode of the driving transistor is set to a fixed potential, the gate-source voltage Vgs due to parasitic capacitance or wiring capacitance can be prevented from changing. Therefore, as in the first embodiment, it is preferable that the potential of the second power supply line 60 be a fixed potential at least when a forward voltage is applied.

  At this time, if necessary, the erasing transistor 52 is operated, the reset line 59 is selected, an erasing period is provided, and high gradation display is performed. In this embodiment, the erasing transistor 52 is an n-channel transistor. For details of the erasing transistor and its operation, refer to Japanese Patent Laid-Open No. 2001-343933.

  In the above state, the driving transistor 53 is turned on, the cathode line 69 is −10 V, and the anode line 18 is 5 V. Therefore, a forward voltage is applied to the light emitting element to emit light.

  FIG. 2B shows a state where a reverse voltage is applied, and the first power supply line 19 is held at −10V. Then, the n-channel transistor 14 included in the clocked inverter 29 is in a high impedance state, that is, turned off, the reverse voltage applying transistor 17 is turned on, and the scanning line 58 becomes −10V. Accordingly, the switching transistor 51 is turned off in the pixel 101.

  In order to efficiently apply the reverse voltage, the driving transistor 53 and the current control transistor 54 are turned on. At this time, the same control circuit 118 as in the first embodiment is used, the first n-channel transistor 61 is turned on, the second n-channel transistor 62 is turned off, and the gate electrode of the driving transistor 53 is connected. The voltage of the second power supply line 60 is -10V.

  In the above state, the driving transistor 53 is turned on, the cathode line 69 is 5 V, and the anode line 18 is −10 V. Therefore, a reverse voltage is applied to the light emitting element.

  In order to solve the resistance problem of the driving transistor 53 and the current control transistor 54, a diode may be provided between the first electrode of the light emitting element and the anode line 18.

  According to this embodiment mode, a circuit configuration and a method for applying a reverse voltage to control deterioration of a light emitting element and improve reliability can be provided for a display device having a new pixel circuit.

  Further, according to this embodiment mode, a reverse voltage can be applied without causing a short circuit between the anode line and the signal line, that is, the anode line and the power supply line included in the signal line driver circuit.

  Note that the voltage values shown in this embodiment are merely examples, and the present invention is not limited to these values.

(Embodiment 3)
In this embodiment, a scan line driver circuit having a reverse voltage application circuit, a signal line driver circuit, and a display device having them are described.

  FIG. 5A illustrates a structure of a scan line driver circuit, which includes a reverse voltage application circuit portion 150 including a shift register 114, a buffer circuit 115, and a reverse voltage application circuit 116.

  The reverse voltage application circuit unit 150 includes a plurality of reverse voltage application circuits 116 and reverse voltage application transistors 17 connected to the scanning lines or reset lines as shown in FIGS. The reverse voltage application circuit 116 includes an analog switch 28 or a clocked inverter 29.

  When the reverse voltage application circuit unit 150 is provided in the scanning line driving circuit, the potential of the anode line and the power supply line or cathode line maintained at a constant potential is inverted, and the reverse voltage is applied to the light emitting element, and at the same time, the analog switch 28 or the clocked inverter 29 is turned off and the reverse voltage applying transistor 17 is turned on. Then, the switching transistor 51 or the erasing transistor 52 included in the pixel connected to the reverse voltage application circuit 116 is turned off. As a result, the reverse voltage can be applied without causing a short circuit between the anode line 18 and the signal line 57, that is, the anode line and the power supply line included in the signal line driver circuit.

  The reverse voltage application circuit 116 may be provided in the signal line driver circuit. FIG. 5B illustrates a structure of the signal line driver circuit, and includes a shift register 111, a first latch circuit 112, a second latch circuit 113, and a plurality of reverse voltage application circuits 116. 151.

  The reverse voltage application circuit provided in the signal line driver circuit includes the analog switch 28 or the clocked inverter 29, and the reverse voltage application transistor 17 is not necessary. The analog switch or the output wiring of the clocked inverter is connected to the plurality of signal lines (S1 to Sx) of the pixel portion, respectively.

  Further, a switch is provided to prevent a short circuit between the power supply line and the anode line included in the signal line driver circuit. The switch is turned on or off by utilizing the potential difference between the anode line and the power supply line or cathode line maintained at a constant potential.

  In a display device in which a reverse voltage application circuit unit 150 is provided in a signal line driver circuit, the potential of a power supply line or a cathode line maintained at a constant potential with respect to an anode line is inverted, and a reverse voltage is applied to a light emitting element at the same time. Turn off the switch or clocked inverter. Then, the transistor disposed between the anode line and the signal line can be turned off. As a result, the reverse voltage can be applied without causing a short circuit between the anode line and the signal line, that is, the anode line and the power supply line included in the signal line driver circuit.

  In addition, when a reverse voltage is applied, a voltage of a power supply line to which a gate electrode of a driving transistor is connected and an anode line will be described. When a reverse voltage is applied, the reverse voltage is applied to the light emitting element through the driving transistor and the current control transistor. Therefore, it is preferable that the resistances of the driving transistor and the current control transistor are lower. However, particularly in the case of a driving transistor, when operating in the saturation region, there is a concern that the L / W ratio of the channel formation region becomes large and the resistance becomes high.

  Therefore, a control circuit 118 for controlling the voltage of the power supply line to which the gate electrode of the driving transistor is connected is provided so that the driving transistor and the current control transistor are turned on reliably and a higher voltage is applied.

  The control circuit includes a sixth transistor in which the gate electrode is connected to the anode line, the first electrode is connected to the power supply line, the gate electrode is held at a fixed potential, and the first electrode is connected to the anode line. And a seventh transistor having a second electrode connected to the power supply line.

  Focusing on the driving transistor, when a forward voltage is applied, the sixth transistor is turned on, the seventh transistor is turned off, and when a reverse voltage is applied, the sixth transistor is turned off, and the seventh transistor is turned on. To do. When a reverse voltage is applied, the absolute value of the voltage of the power supply line can be increased and the voltage applied to the driving transistor can be increased.

  According to this embodiment mode, a circuit configuration and a method for applying a reverse voltage to control deterioration of a light emitting element and improve reliability can be provided for a display device having a new pixel circuit. Further, the reverse voltage can be applied without short-circuiting the anode line and the signal line, that is, the anode line and the power supply line included in the signal line driver circuit. As a result, the lifetime of the display device can be extended.

(Embodiment 4)
When the display device of the present invention is digitally driven, a time gray scale method is used to express a multi-tone image. In this embodiment, the timing of applying a reverse voltage will be described with reference to FIG. FIG. 3A shows a timing chart when the vertical axis indicates a scanning line and the horizontal axis indicates time, and FIG. 3B shows a timing chart of the j-th scanning line Gj.

  The display device normally has a frame frequency of about 60 Hz. In other words, the screen drawing is performed about 60 times per second, and the period in which the screen is drawn once is called one frame period (unit frame period). In the time gray scale method, one frame period is divided into a plurality of subframe periods (m (m is a natural number of 2 or more) subframe periods SF1, SF2,..., SFm). In many cases, the number of divisions at this time is equal to the number of gradation bits. Here, for the sake of simplicity, the case where the number of divisions is equal to the number of gradation bits is shown. That is, in the present embodiment, a 5-bit gradation is illustrated, and thus an example in which it is divided into five subframe periods SF1 to SF5 is shown.

Each sub-frame period has a writing period Ta1, Ta2,..., Tam for writing a video signal to the pixel, and a holding period Ts1, Ts2,. In the holding periods Ts1 to Ts5, the ratio of the lengths is Ts1:...: Ts5 = 16: 8: 4: 2: 1. That is, when expressing n-bit gradation, the length ratio of the n holding periods is 2 ^(n-1) : 2 ^(n-2) :...: 2 ¹ : 2 ⁰ .

  FIG. 3 shows an example in which the subframe period SF5 has an erasing period Te5. In the erasing period Te5, the video signal written in the pixel is reset. An erasing period may be provided as necessary.

  A reverse voltage application period Tr is provided in one frame period. In the reverse voltage application period Tr, the reverse voltage is applied simultaneously to all the pixels. In the present embodiment, the case where the reverse voltage application period Tr is provided after the end of the erasing period Te5 will be described. Note that it is preferable that the reverse voltage application period Tr is long and the time for applying the reverse voltage to the light emitting element is long.

  FIG. 3C shows voltage values of the scanning line Gj, the anode line, and the cathode line corresponding to FIG. Referring to FIG. 3C, high and low pulse signals are applied to the scanning line Gj. For example, as shown in the first or second embodiment, signals of voltages of 5 V and −2 V are applied. In the writing period Ta1 to Ta5, a high signal is applied to the scanning line Gj, and a low signal is applied in the reverse voltage application period Tr.

  A voltage of 5V is applied to the anode line and a voltage of −10V to the cathode line. In the reverse voltage application period Tr, a voltage of −10V to the anode line and a voltage of 5V to the cathode line, that is, a reverse voltage is applied.

  Note that in order to increase the number of display gradations, the number of divisions in the subframe period may be increased. Further, the order of the subframe periods does not necessarily have to be the order from the upper bit to the lower bit, and may be arranged at random during one frame period. Furthermore, the order may change for each frame period. Further, a certain subframe period may be further divided.

  Moreover, you may determine whether a reverse voltage is applied for every pixel. In this case, a switch is provided for each pixel, and control is performed so that the switch is turned off when no reverse voltage is applied.

  Moreover, the case where the deterioration state of a light emitting element differs for every pixel can be considered. The video signal is counted and recorded by the memory circuit and the counter circuit, and based on the information, the value of the reverse voltage to be applied can be obtained according to the deterioration state of the light emitting element. Then, the potentials of the anode line, the power supply line held at a constant potential, or the cathode line may be set in accordance with the value of the reverse voltage to be applied. For example, since the anode line is provided for each light emitting element, the potential of the anode line is set for each pixel.

  This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 5)
In this embodiment mode, operation of a pixel is described with reference to FIGS.

  A pixel 16100 illustrated in FIG. 4A includes a signal line 16001, a first power supply line 16002, a gate fixed potential line 16003, a scanning line 16004, a reset line 16005, a switching transistor 16006, an erasing transistor 16007, and a current control transistor. 16008, a driving transistor 16009, a capacitor 16010, a pixel electrode 16011, a light emitting element 16012, and a second power supply line 16013. The pixel electrode functions as an electrode of the light emitting element. Note that the gate fixed potential line 16003 is a line for fixing the gate potential of the driving transistor 16008.

  Next, the operation will be described. First, a selection pulse signal is input to the scanning line 16004, the switching transistor 16006 is turned on, and the video signal output to the signal line 16001 is input to the gate electrode of the current control transistor 16008. When the video signal is at a high level (hereinafter referred to as H level), the current control transistor 16008 is turned off. When the video signal is at a low level (hereinafter referred to as L level), the current control transistor 16008 is turned on. Depending on whether the current control transistor 16008 is on or off, current supply to the light emitting element 16012 is controlled, and light emission or non-light emission is determined. At this time, the erasing transistor 16007 is off.

  Subsequently, when the current supply to the light-emitting element 16012 is forcibly cut off, a selection pulse signal is input to the reset line 16005, the erasing transistor 16007 is turned on, and the potential of the first power supply line 16002 is controlled by current control. Is input to the gate electrode of the transistor 16008 for use. Since the gate electrode and the source electrode of the current control transistor 16008 have the same potential, they are turned off.

  In the reverse voltage application period, the potential of the first power supply line 16002 and the potential of the second power supply line 16013 are switched. At this time, in the case where the pixel electrode 16011 and the second power supply line 16013 are short-circuited due to a film formation failure of the light-emitting element or the like, the driving transistor 16009 is turned on. As a result, a current flows through the short-circuited portion, resulting in burnout insulation. When the pixel electrode 16011 and the second power supply line 16013 are short-circuited, the pixel is always in a non-light-emitting state or a desired luminance cannot be obtained. Such a defect can be eliminated by passing a current through and isolating it.

  Next, the case where the driving transistor 16009 is used as a current source will be described with reference to FIG.

  The pixel 16101 includes a signal line 16001, a first power supply line 16002, a gate fixed potential line 16003, a scanning line 16004, a reset line 16005, a switching transistor 16006, an erasing transistor 16007, a current control transistor 16008, a driving transistor 16009, a capacitor Means 16010, a pixel electrode 16011, a light emitting element 16012, a second power line 16013, a reverse bias (hereinafter referred to as RB) transistor 16014, and an RB transistor 16014 is added to the pixel 16100. It is only a point.

  The gate electrode of the RB transistor 16014 is connected to the first power supply line 16002, the first electrode is connected to the pixel electrode 16011, and the second electrode is connected to the gate fixed potential line 16003.

  In this embodiment mode, since the driving transistor 16009 is used as a constant current source, the value of the current flowing through the light-emitting element 16012 is determined by the characteristics of the driving transistor 16009. Therefore, it is desirable to use a transistor having a relatively high impedance in accordance with the current value.

  Next, driving will be described. The forward voltage application period is as described above.

  Next, in the reverse voltage application period, the potential of the first power supply line 16002 and the potential of the second power supply line 16013 are switched. At this time, when the pixel electrode 16011 and the second power supply line 16013 are short-circuited due to a film formation failure of the light-emitting element, the RB transistor 16014 is turned on. As a result, current flows through the short-circuited part and burns out. When the impedance of the driving transistor 16009 is high, a current sufficient to insulate a short-circuit portion cannot be supplied, but a sufficient current can be supplied by adding the RB transistor 16014. And the above defects can be eliminated.

  Although this embodiment mode describes only the case where the potentials of the first power supply line 16002 and the second power supply line 16013 are switched in the reverse voltage application period, the present invention is not limited to this, and the pixel electrode 16011 and the second power supply line 16013 The potential may be set so that the polarity of the power supply line 16013 is switched. In this embodiment mode, the switching transistor 16006 and the erasing transistor 16007 are N-type transistors, and the current control transistor 16008, the driving transistor 16009, and the RB transistor 16014 are P-type transistors. Not limited to this, it may be set arbitrarily.

  Further, although the case where the first electrode of the RB transistor 16014 is connected to the pixel electrode 16011 and the second electrode is connected to the gate fixed potential line 16003 has been described, the second electrode is connected to the signal line 16001. Alternatively, a diode may be connected between the pixel electrode 16011 and the first power supply line 16002 or between the pixel electrode 16011 and the gate fixed potential line 16003.

  In addition, although the capacitor means 16010 is provided in this embodiment mode, it is not necessary to provide the storage capacitor when the channel capacity of the current control transistor 16008 can cover the storage capacitor.

(Embodiment 6)
In this embodiment, an example of a top view of FIG. 4A is described with reference to FIGS.

  In FIG. 6, a signal line 17001, a first power supply line 17002, a gate fixed potential line 17003, a scanning line 17004, a reset line 17005, a switching transistor 17006, an erasing transistor 17007, a current control transistor 17008, a driving transistor 17009, The capacitor means 17010 and the pixel electrode 17011 are shown, and the signal line 16001, the first power supply line 16002, the gate fixed potential line 16003, the scanning line 16004, the reset line 16005, the switching transistor 16006, and the erase shown in FIG. Corresponds to the transistor for transistor 16007, the transistor for current control 16008, the transistor for drive 16009, the capacitor means 16010, and the pixel electrode 16011, respectively.

  In this embodiment mode, the case where the first power supply line 17002 is shared by adjacent pixels has been described. However, when the characteristics of the light-emitting elements are different depending on RGB, white balance is adjusted by changing the potential of each power supply line depending on RGB. When adjusting, it is not necessary to share adjacent power supply lines.

(Embodiment 7)
In this embodiment, an example of a top view of FIG. 4B is described with reference to FIG.

  In FIG. 7, a signal line 18001, a first power supply line 18002, a gate fixed potential line 18003, a scanning line 18004, a reset line 18005, a switching transistor 18006, an erasing transistor 18007, a current control transistor 18008, a driving transistor 18809, A capacitor unit 18010, a pixel electrode 18011, and an RB transistor 18012 are shown. The signal line 16001, the first power supply line 16002, the gate fixed potential line 16003, the scanning line 16004, the reset line 16005, and the switching shown in FIG. Transistor 16006, erasing transistor 16007, current control transistor 16008, driving transistor 16009, capacitor means 16010, pixel electrode 16011, RB transistor 1601 It corresponds to.

  In this embodiment mode, the case where the first power supply line 18002 is shared by adjacent pixels has been described. However, when the characteristics of the light-emitting elements are different depending on RGB, the white balance is changed by changing the potential of each power supply line depending on RGB. In the case of adjustment, it is not necessary to share adjacent power supply lines as described above.

(Embodiment 8)
A panel mounted with a display region and a driver, which is an embodiment of the display device of the present invention, will be described. In this embodiment, a transistor is described as a thin film transistor (TFT).

  In FIG. 8A, a display region 1404 provided with a plurality of pixels each including a light-emitting element provided over a substrate 1405, a source driver 1403, first and second gate drivers 1401, 1402, a connection terminal 1415, and a connection Film 1407 is shown. The connection terminal 1415 is connected to the connection film 1407 through anisotropic conductive particles or the like. The connection film 1407 is connected to the IC chip.

  FIG. 8B is a cross-sectional view taken along line A-A ′ of the panel, and shows a current control TFT 1409 and a driving TFT 1410 provided in the display region 1404 and a CMOS circuit 1414 provided in the source driver 1403. In addition, a conductive layer 1411, an electroluminescent layer 1412, and a conductive layer 1413 provided in the display region 1404 are shown. The conductive layer 1411 is connected to the source electrode or the drain electrode of the driving TFT 1410. In addition, the conductive layer 1411 functions as a pixel electrode, and the conductive layer 1413 functions as a counter electrode. A stacked body of the conductive layer 1411, the electroluminescent layer 1412, and the conductive layer 1413 corresponds to a light-emitting element. The light emitting element may be any of a laminated type in which the electroluminescent layer is composed of a plurality of layers, a single layer type in which the electroluminescent layer is composed of one layer, and a mixed type in which the electroluminescent layer is composed of a plurality of layers but the boundary is not clear Good. In addition, the laminated structure of the light emitting element includes a stacked structure in which a conductive layer corresponding to the anode from the bottom \ electroluminescent layer \ conductive layer corresponding to the cathode is stacked, and a conductive layer corresponding to the cathode from the bottom \ electroluminescent layer \ anode. There is a reverse stacking structure in which conductive layers corresponding to the above are stacked. An appropriate structure may be selected based on the light emitting direction of the light emitting element. For the electroluminescent layer, an organic material (low molecule, polymer, medium molecule) or a combination of an organic material and an inorganic material can be used.

Moreover, any of singlet material, triplet material, or a combination thereof may be used. As a result, light emitted from the light-emitting element is emitted when returning from the singlet excited state to the ground state (fluorescence) and emitted when returning from the triplet excited state to the ground state (phosphorescence). One or both can be used.

  Note that the state where light is emitted when a current flows through the light-emitting element is a state where a forward voltage is applied between both electrodes of the light-emitting element.

  A sealant 1408 is provided around the display region 1404 and the drivers 1401 to 1403, and the light-emitting element is sealed with the sealant 1408 and the counter substrate 1406. This sealing process is a process for protecting the light emitting element from moisture. Here, a method of sealing with a cover material (glass, ceramics, plastic, metal, etc.) is used, but thermosetting resin or ultraviolet light curing is used. A method of sealing with a functional resin or a method of sealing with a thin film having a high barrier ability such as a metal oxide or a nitride may be used.

  An element formed over the substrate 1405 is preferably formed using a crystalline semiconductor (polysilicon) having favorable characteristics such as mobility as compared with an amorphous semiconductor. When a crystalline semiconductor is used, monolithic formation on the same surface can be realized. A panel having a monolithic configuration can be reduced in size, weight, and thickness because the number of external ICs to be connected is reduced.

  In FIG. 8B, the conductive layer 1411 is formed using a transparent conductive film, and the conductive layer 1413 is formed using a reflective film. Therefore, light emitted from the electroluminescent layer 1412 passes through the conductive layer 1411 and is emitted to the substrate 1405 side as indicated by arrows. Such a configuration is called a bottom emission method.

  On the other hand, when the conductive layer 1411 is formed using a reflective film and the conductive layer 1413 is formed using a transparent conductive film, light emitted from the electroluminescent layer 1412 is emitted from the counter substrate 1406 side as shown in FIG. A configuration in which the light is emitted from the light source is also possible. Such a configuration is called a top emission method.

  In addition, the source electrode or the drain electrode of the driving TFT 1410 and the conductive layer 1411 are stacked in the same layer without an insulating layer, and are directly connected by overlapping of films. Therefore, since the formation region of the conductive layer 1411 is a region excluding the region where the driving TFT 1410 and the like are arranged, a reduction in aperture ratio is unavoidable with high definition of pixels and the like. Therefore, as shown in FIG. 9B, an interlayer film 1416 is added, a pixel electrode is provided in an independent layer, and a top emission method is employed, so that a region where a TFT or the like is formed can be effectively used as an issue region. Can be used. At this time, depending on the thickness of the electroluminescent layer 1412, a short circuit between the conductive layer 1411 and the conductive layer 1413 may occur in the contact region between the conductive layer 1411 and the source or drain electrode of the driving TFT 1410. A configuration in which a bank 1417 or the like is provided to prevent a short circuit is desirable.

  Further, as shown in FIG. 10, the conductive layer 1411 and the conductive layer 1413 are both formed of a transparent conductive film, whereby light emitted from the electroluminescent layer 1412 is extracted to both the substrate 1405 side and the counter substrate 1406 side. Configuration is also possible. Such a configuration is called a double-sided emission method.

  In the case of FIG. 10, the light emission areas on the top emission side and the bottom emission side are almost equal, but as described above, the aperture ratio on the top emission side can be increased by adding an interlayer film to increase the area of the pixel electrode. Needless to say.

  However, the present invention is not limited to the above embodiments. For example, the display region 1404 may be configured by a TFT using an amorphous semiconductor (amorphous silicon) formed on an insulating surface as a channel portion, and the drivers 1401 to 1403 may be configured by an IC chip. The IC chip may be bonded onto the substrate by a COG method, or may be bonded to a connection film connected to the substrate. An amorphous semiconductor can be formed over a large substrate by using a CVD method, and a crystallization step is unnecessary, so that an inexpensive panel can be provided. At this time, if a conductive layer is formed by a droplet discharge method typified by an ink jet method, a cheaper panel can be provided. This embodiment can be freely combined with the above embodiment modes and embodiments.

(Embodiment 9)
A light-emitting element has a structure in which a single layer or a plurality of layers (hereinafter referred to as electroluminescent layers) made of various materials are sandwiched between a pair of electrodes. The light emitting element may have an initial failure due to a short circuit between the anode and the cathode due to the following factors. As a first factor, a short circuit between the anode and the cathode due to adhesion of foreign matter (dust), and as a second factor, a pinhole is generated in the electroluminescent layer due to minute projections (irregularities) of the anode, and the anode resulting from this pinhole As a third factor, there is a short circuit between the anode and the cathode caused by the pinhole, because the electroluminescent layer is not uniformly formed and a pinhole is generated in the electroluminescent layer. The third factor is related to the fact that the electroluminescent layer is thin. In a pixel in which such an initial failure has occurred, lighting and non-lighting according to the signal are not performed, and almost all of the current flows through the short-circuited part, causing a phenomenon that the entire element is extinguished, or a specific pixel is turned on or off. There is a problem that an image is not displayed favorably due to a phenomenon that does not light up. In view of the above problems, as described above, the present invention provides a display device capable of applying a reverse voltage to a light emitting element and a driving method thereof. By applying the reverse voltage, a current flows locally only in the short-circuit portion between the anode and the cathode, and the short-circuit portion generates heat. If it does so, a short circuit part will oxidize or carbonize and will insulate. As a result, even if an initial failure occurs, it is possible to provide a display device that can eliminate the failure and display an image satisfactorily. It should be noted that such initial failure insulation is preferably performed before shipment.

  In addition to the initial failure described above, a progressive failure may occur in the light emitting element. The progressive failure is a short circuit between the anode and the cathode newly generated with the passage of time. Thus, a short circuit between the anode and the cathode newly generated with the passage of time occurs due to minute protrusions of the anode. That is, in the stacked body in which the electroluminescent layer is sandwiched between the pair of electrodes, a short circuit between the anode and the cathode occurs with time. In view of the above problems, as described above, the present invention provides a display device that applies a reverse voltage periodically as well as before shipping and a driving method thereof. By applying the reverse voltage, a current flows locally only in the short-circuit portion between the anode and the cathode, and the short-circuit portion is insulated. As a result, even when progressive failure occurs, it is possible to provide a display device that can eliminate the failure and display an image satisfactorily and a driving method thereof.

  Further, in a stacked body in which an electroluminescent layer is sandwiched between a pair of electrodes, there is a portion that does not emit light even when a forward voltage is applied. Such a non-luminous defect is called a dark spot, and since it progresses with time, it is also called a progressive defect. The dark spot is caused by poor contact between the electroluminescent layer and the cathode, and it is considered that there is a minute gap between the electroluminescent layer and the cathode, and the dark spot progresses. However, when a reverse voltage is applied, the spread of the gap can be suppressed. That is, the progress of dark spots can be suppressed. Therefore, as described above, the present invention in which a reverse voltage is applied can provide a display device that suppresses the progress of dark spots and a driving method thereof.

(Embodiment 10)
As an example of an electronic device manufactured by applying the present invention, a digital camera, a sound reproducing device such as a car audio, a notebook personal computer, a game device, a portable information terminal (mobile phone, portable game machine, etc.), home use An image reproducing device including a recording medium such as a game machine may be used. Specific examples of these electronic devices are shown in FIGS.

  FIG. 11A illustrates a display device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. FIG. 11B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. FIG. 11C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like.

  FIG. 11D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. FIG. 11E illustrates a portable image reproducing device provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, a recording medium reading portion 2405, operation keys 2406, a speaker portion 2407, and the like. Including. A display portion A2403 mainly displays image information, and a display portion B2404 mainly displays character information. FIG. 11F illustrates a goggle type display which includes a main body 2501, a display portion 2502, and an arm portion 2503.

  FIG. 11G illustrates a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control reception portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and an eyepiece. Part 2610 and the like. FIG. 11H illustrates a mobile phone among mobile terminals, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. Including.

  In the above electronic device, even when a panel including a light-emitting element having a property of deterioration with time is provided, reverse voltage can be applied without short-circuiting, so that deterioration with time can be suppressed. Therefore, the life of the display unit can be extended by applying the reverse voltage to the end user even when the user is not using the electronic device.

  This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 11)
In this embodiment, an example in which a reverse voltage application circuit is connected to the signal line side will be described.

  FIG. 13A illustrates a state in which a forward voltage is applied and the light-emitting element emits light. A reverse voltage application circuit 116 illustrated in FIG. 13A includes an analog switch 28 including an n-channel transistor 20 and a p-channel transistor 21. The gate electrode of the n-channel transistor 20 is connected to the anode line 18, and in this embodiment, the anode line 18 is maintained at 5V. The gate electrode of the p-channel transistor 21 is connected to a power supply line or a cathode line held at a constant potential, and in this embodiment is connected to a first power supply line 19 fixed at 0V. The output wiring (output terminal) of the analog switch 28 is connected to the signal line 57.

  Thus, when the reverse voltage application circuit 116 is connected to the signal line side, the reverse voltage application transistor 17 is not necessary.

  The other pixel structures and the transistors included in the pixels are similar to those in FIG. Note that when the gate electrode of the driving transistor is set to a fixed potential, the gate-source voltage Vgs due to parasitic capacitance or wiring capacitance can be prevented from changing. Therefore, as in the first embodiment, it is preferable that the potential of the second power supply line 60 be a fixed potential at least when a forward voltage is applied.

  In the circuit configuration as described above, for example, a video signal is output from the second latch circuit 113 included in the signal line driver circuit and input to the analog switch 28. In this embodiment, it is assumed that the video signal has a pulse signal of Low (for example, 0 V) and High (for example, 5 V). In the present embodiment, a video signal may be input to the analog switch 28, and the video signal may be input from the shift register or the first latch circuit, or may be further input via a buffer circuit or the like. There is also.

  At this time, either the n-channel transistor 20 or the p-channel transistor 21 included in the analog switch 28 is turned on. Specifically, when a low video signal is input, the p-channel transistor 21 is turned on, and when a high video signal is input, the n-channel transistor 20 is turned on. When the scanning line 58 is selected and the switching transistor 51 is turned on, a video signal is input to the pixel 101 via the signal line 57.

  Then, the driving transistor 53 and the current control transistor 54 are turned on, and the light emitting element 55 emits light based on the video signal.

  At this time, if necessary, the erasing transistor 52 is operated to select the reset line 59 and provide an erasing period. In this embodiment, the erasing transistor 52 is an n-channel transistor. Needless to say, the erasing transistor 52 may be a p-channel transistor. The erasing transistor and its operation may be referred to Japanese Patent Laid-Open No. 2001-343933, and can be used in combination with them.

  The anode line 18 and the second power supply line 60 may be connected to the control circuit 118 as in the first embodiment.

  In the above state, the cathode line 69 is −10 V and the anode line is 5 V, and a forward voltage is applied to the light emitting element.

  FIG. 13B shows a state where a reverse voltage is applied. When applying the reverse voltage, the video signal is set to Low (for example, 0 V). Then, both the transistors included in the analog switch 28 are turned off, and the video signal is not input to the pixel. Therefore, even if the scanning line 58 is selected, the video signal is not input to the switching transistor 51 and is turned off.

  If the video signal immediately before applying the reverse voltage is High (for example, 5 V), the analog switch 28 may be turned on. Therefore, immediately before the reverse voltage is applied, the potential of the signal line 57 is once set to Low (for example, 0 V). Specifically, a video signal of Low (for example, 0 V) is input to the signal line 57 immediately before the start of the reverse voltage application period. Thereafter, a reverse voltage is applied to the anode line and the cathode line. For example, the anode line 18 is set to −10V and the cathode line 69 is set to 5V.

  At this time, the driving transistor 53 and the current control transistor 54 are turned on, and a reverse voltage is efficiently applied. In particular, when the driving transistor 53 is operated in the saturation region, there is a concern that the resistance value is high when the L / W is designed to be large.

  Therefore, the same control circuit 118 as in Embodiment Mode 1 is used, the first n-channel transistor 61 is turned on, the second n-channel transistor 62 is turned off, and the gate electrode of the driving transistor 53 is connected. The voltage of the second power supply line 60 is preferably −10V.

  As a result, the gate voltage applied to the gate electrode of the driving transistor 53 can be increased, and problems at the time of applying a reverse voltage due to the resistance of the driving transistor 53 can be reduced. Note that the driving transistor 53 may be operated in a linear region.

  In order to eliminate the resistance of the driving transistor 53 and the current control transistor 54, a diode may be provided between the first electrode (anode in this embodiment) of the light emitting element and the anode line 18. .

  Thus, by turning off the analog switch 28 when the reverse voltage is applied, the reverse voltage can be applied without causing a short circuit between the anode line 18 and the signal line 57.

  Next, a state where a forward voltage is applied from a reverse voltage, that is, a case where each potential is returned will be described. When the forward voltage is applied from the reverse voltage, the gate electrode of the driving transistor 53 is held at −10 V. Therefore, when the forward voltage is applied in this state, the light emitting element 55 emits light regardless of the video signal. There is a risk.

  Therefore, for example, as shown in FIG. 14A, in a scanning line driver circuit 140 having a buffer circuit 141, a level shifter 143, a NOR / NAND circuit 144, and a shift register 145, the second is placed between the buffer circuit 141 and the level shifter 143. Two control circuits 142 are provided. Note that since the arrangement of the buffer circuit 141 can be designed as appropriate, the second control circuit 142 may be connected to at least each reset line. That is, the second control circuit 142 may be provided between the pixel portion and the level shifter 143.

  The second control circuit receives a signal for selecting the scanning line supplied from the scanning line driving circuit when the forward voltage is applied, and the driving transistor 53 when changing from the reverse voltage to the forward voltage, or It is only necessary to have a function of controlling the current control transistor 54 to be turned off.

  FIG. 14B illustrates a specific structure of the second control circuit 142. The second control circuit 142 includes one inverter circuit 148, a p-channel transistor 147 provided for each reset line, and a clocked inverter 149. The first electrode of the transistor 147 is connected to the reset line 59, the gate electrode is connected to the third power supply line 160, and the second electrode is held at 7V. The inverter circuit 148 is connected to the third power supply line 160 and the fourth power supply line 161. In the clocked inverter 149, the first terminal and the third power supply line 160 are connected, the second terminal and the fourth power supply line 161 are connected, the input wiring and the reset line 59 are connected, the output wiring and the level shifter 143 is connected.

  In such a second control circuit 142, a control signal (REV) is input to the third power supply line 160, and the potential of the reset line 59 can be controlled. Specifically, when a low control signal is input to the third power supply line 160, the transistor 147 is turned on and the reset line 59 becomes 7V. In order to apply a forward voltage, the anode line is set to 5V. Then, the erasing transistor 52 is turned on, and the gate potential of the current control transistor 54 is 5V. At this time, the current control transistor 54 is turned off. Thereafter, the potential of the cathode line is set to −10 V, and a forward voltage is applied.

  Thus, by turning off the current control transistor 54 by the second control circuit 142, the light emitting element 55 can emit light based on the video signal. In this embodiment, the case where the current control transistor 54 is turned off has been described. However, the drive transistor 53 may be controlled to be turned off.

  The second control circuit 142 is connected to all the reset lines 59 and can simultaneously input control signals to all the reset lines 59 to turn off the current control transistor 54.

  Such an operation may be performed for each reset line. In this case, it is only necessary to sequentially select the reset lines in the reverse voltage application period Tr and input the control signals in order.

  By returning to the forward voltage from the reverse voltage by the above operation, the light emitting element 55 can be prevented from emitting light regardless of the video signal. That is, the light emitting element emits light based on the video signal.

  FIG. 14C shows a specific timing chart of the voltage applied to the anode line 18 and the cathode line 69 and the control signal (REV) input to the third power supply line 160 in the reverse voltage application period Tr. Indicates.

First, a reverse voltage is applied to the anode line 18 and the cathode line 69. Specifically, the anode line 18 is set to −10V, and the cathode line 69 is set to 5V. At this time, REV is High. After a predetermined time has elapsed, when the potential of the anode line 18 is returned to 5 V and then the potential of REV is set to Low, the erasing transistor 52 is turned on. Then, the voltage of the reset line 59 becomes 7V, and the current control transistor 54 is turned off. At this time, since the current control transistor 54 is off, the light emitting element 55 does not emit light.

  Note that the timing for setting the anode line potential to 5 V and the timing for setting the REV potential to Low may be first. However, it is preferable to set the potential of REV to Low after setting the potential of the anode line to 5 V, because the voltage value applied to the erasing transistor 52 can be prevented from becoming unnecessarily large.

  Note that although FIG. 14 illustrates the case where the control signal has a low potential, the input and output of the inverter circuit 148 may be reversely connected, and the high control signal may be input to the fourth power supply line 161. .

  FIG. 12A shows a case where a second control circuit different from that in FIG. 14 is provided between the NOR circuit 146 and the level shifter 143.

  FIG. 12B illustrates a specific structure of the second control circuit 142. In the second control circuit, the first inverter circuit 170 to which a clock signal is input includes a p-channel transistor 70 and an n-channel transistor 71. The second inverter circuit 171 connected to the output wiring of the first inverter circuit 170 includes a p-channel transistor 72 and an n-channel transistor 73. The NOR 172 connected to the output wiring of the second inverter circuit 171 and the output wiring of the NOR 146 includes p-channel transistors 74 and 75 connected in series and n-channel transistors 76 and 77 connected in parallel. Have.

  In such a second control circuit, when a High control signal is input from the input wiring of the first inverter circuit 170, the p-channel transistor 74 is turned off, the n-channel transistor 77 is turned on, and Low The signal is output to the buffer circuit. Since the erasing transistor 52 can be turned on at this time, the current control transistor 54 can be turned off by applying a forward voltage after setting the cathode line 69 to −10V.

  Thus, by turning off the current control transistor 54 by the second control circuit 142, the light emitting element 55 can emit light based on the video signal. In this embodiment, the case where the current control transistor 54 is turned off has been described. However, the drive transistor 53 may be controlled to be turned off.

  FIG. 12C shows a specific timing chart of the voltage applied to the anode line 18 and the cathode line 69 and the control signal (REV) in the reverse voltage application period Tr.

  First, a reverse voltage is applied to the anode line 18 and the cathode line 69. Specifically, the anode line 18 is set to −10V, and the cathode line 69 is set to 5V. At this time, REV is Low. After a predetermined time has elapsed, when the potential of the anode line 18 is returned to 5 V, and then the potential of REV is set to High, the erasing transistor 52 is turned on. Then, the voltage of the reset line 59 is set to 7V. At this time, since the current control transistor 54 is off, the light emitting element 55 does not emit light.

  Note that the timing for setting the anode line potential to 5 V and the timing for setting the REV potential High may be first. However, when the potential of the anode line is set to 5 V and then the potential of REV is set to High, it is preferable to prevent the voltage value applied to the erasing transistor 52 from being unnecessarily large.

  When returning from the reverse voltage to the forward voltage by the above operation, the light emitting element 55 does not emit light regardless of the video signal. That is, the light emitting element emits light based on the video signal.

  Note that in this embodiment mode, the first electrode of the light-emitting element is an anode, but a pixel structure in which the first electrode is a cathode may be used.

  According to this embodiment mode, a circuit configuration and a method for applying a reverse voltage to control deterioration of a light emitting element and improve reliability can be provided for a display device having a new pixel circuit.

  Note that the voltage values shown in this embodiment are merely examples, and the present invention is not limited to these values.

4A and 4B illustrate a display device and a driving method thereof according to the present invention. 4A and 4B illustrate a display device and a driving method thereof according to the present invention. FIG. 6 illustrates a timing chart of the present invention. The figure which shows a pixel structure. 4A and 4B illustrate a display device and a driving method thereof according to the present invention. The figure which shows one Example of a pixel top view. The figure which shows one Example of a pixel top view. FIG. 14 is a cross-sectional view of a bottom emission display device. FIG. 6 is a cross-sectional view of a top emission display device. FIG. 11 is a cross-sectional view of a dual emission display device. 8A and 8B each illustrate an electronic device of the invention. 4A and 4B illustrate a display device and a driving method thereof according to the present invention. 4A and 4B illustrate a display device and a driving method thereof according to the present invention. 4A and 4B illustrate a display device and a driving method thereof according to the present invention.

Claims (7)

An anode line, a cathode line, a signal line, a scanning line, a pixel, an analog switch, and a reverse voltage application transistor;
The pixel is
A first transistor having a gate electrode connected to the scan line and a first electrode connected to the signal line;
A second transistor having a gate electrode connected to a second electrode of the first transistor and a first electrode connected to the anode line;
A third transistor having a gate electrode connected to a gate fixed potential line and a first electrode connected to a second electrode of the second transistor;
A light-emitting element having a first electrode connected to a second electrode of the third transistor and a second electrode connected to the cathode line;
A reverse bias transistor having a gate electrode connected to the anode line, a first electrode connected to the first electrode of the light emitting element, and a second electrode connected to the gate fixed potential line. ,
The analog switch is
A fourth transistor having a gate electrode connected to the anode line;
A fifth transistor having a gate electrode connected to the first power supply line,
The first electrode of the fourth transistor and the first electrode of the fifth transistor are connected to become an input of the analog switch,
The second electrode of the fourth transistor and the second electrode of the fifth transistor are connected to become an output of the analog switch,
A gate electrode of the reverse voltage application transistor is connected to a second power supply line;
The first electrode is connected to the anode line, the second electrode is connected to the output of the analog switch and the scanning line,
In the forward voltage application period,
The fourth transistor is turned on or off, the fifth transistor is turned off or on , the analog switch is turned on, the reverse voltage applying transistor is turned off,
Using the third transistor as a constant current source by driving the third transistor in a saturation region, applying a forward voltage to the light emitting element,
In the reverse voltage application period,
Turning off the fourth transistor and the fifth transistor , turning off the analog switch, turning on the reverse voltage applying transistor;
Applying a reverse voltage to the light emitting element by inverting the potential of the anode line and the potential of the cathode line,
The display device, wherein the reverse bias transistor is turned on when the first electrode and the second electrode of the light emitting element are short-circuited. An anode line, a cathode line, a signal line, a scanning line, a pixel, a clocked inverter, and a reverse voltage application transistor;
The pixel is
A first transistor having a gate electrode connected to the scan line and a first electrode connected to the signal line;
A second transistor having a gate electrode connected to a second electrode of the first transistor and a first electrode connected to the anode line;
A third transistor having a gate electrode connected to a gate fixed potential line and a first electrode connected to a second electrode of the second transistor;
A light-emitting element having a first electrode connected to a second electrode of the third transistor and a second electrode connected to the cathode line;
A reverse bias transistor having a gate electrode connected to the anode line, a first electrode connected to the first electrode of the light emitting element, and a second electrode connected to the gate fixed potential line. ,
The clocked inverter is
A fourth transistor in which the first electrode is connected to the high-potential power line;
A fifth transistor having a gate electrode connected to the anode line and a first electrode connected to a low-potential power line;
A sixth transistor connected to a second electrode of the fifth transistor;
The gate electrode of the fourth transistor and the gate electrode of the sixth transistor are connected to become an input of the clocked inverter,
The second electrode of the fourth transistor and the second electrode of the sixth transistor are connected to become the output of the clocked inverter,
The gate electrode of the reverse voltage application transistor is connected to a second power supply line, the first electrode is connected to the anode line, the second electrode is connected to the output of the clocked inverter and the scanning line,
In the forward voltage application period,
Turning on the fifth transistor , turning on the clocked inverter, turning off the reverse voltage application transistor;
Using the third transistor as a constant current source by driving the third transistor in a saturation region, applying a forward voltage to the light emitting element,
In the reverse voltage application period,
Turning off the fifth transistor, setting the clocked inverter in a high impedance state, turning on the reverse voltage application transistor;
Applying a reverse voltage to the light emitting element by inverting the potential of the anode line and the potential of the cathode line,
The display device, wherein the reverse bias transistor is turned on when the first electrode and the second electrode of the light emitting element are short-circuited.   2. The display device according to claim 1, wherein the fourth transistor and the fifth transistor have different polarities.   4. The display device according to claim 1, wherein the first transistor is operated in a linear region.   5. The display device according to claim 1, wherein the second transistor is operated in a linear region. In any one of Claims 1 thru | or 5,
The pixel is
A display device comprising: an erasing transistor having a first electrode connected to a gate electrode of the second transistor and a second electrode connected to the anode line.   7. The display device according to claim 6, wherein the erasing transistor is operated in a linear region.

Images