JP4878709B2 - Failure analysis method for semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a failure analysis method for a semiconductor device, and more particularly to a failure analysis technique for contact disconnection by a polarization method.
[0002]
[Prior art]
In general, many of the causes of LSI failures are short-circuits in electrical wiring. Even today, when thorough clean-up activities are being carried out, the true identity of the defect is a foreign substance, often caused by dust generated in the chamber of the apparatus.
[0003]
Conventionally, LSI failure analysis has been performed by an observation method in which a failure point is identified by an LSI tester, the thin film is removed one by one by an appropriate method, and the failure point is observed with an SEM or an optical microscope. It was.
[0004]
[Problems to be solved by the invention]
It is often hopeless to detect an opening defect in a contact portion of an LSI metal wiring from the chip surface.
[0005]
That is, the disconnection does not involve a physical phenomenon such as light emission, and therefore there is no means that can be clearly discriminated other than electrical measurement.
[0006]
A failure due to a defective contact shape of the metal wiring is simple in itself, but it is not easy to visualize the failure location and specify the location.
[0007]
If possible, for example, a single device such as one transistor or a TEG pattern may narrow down the disconnection point from electrical measurement, but in an integrated circuit, narrow down the disconnection point from electrical measurement by an LSI tester. Is practically impossible.
[0008]
If the defective portion can be identified, it may be possible to determine whether or not there is a disconnection by processing the cross section with FIB (focus ion beam) and examining the shape of the unopened portion of the contact portion. However, FIB is a one-dimensional analysis method. This is processing on a line within the chip, and the two-dimensional analysis that is generally performed, that is, specifying the location, cannot be performed.
[0009]
Moreover, since FIB takes several hours to process only one section, even if the number of contact parts that are suspected of being broken are limited to the level of several hundreds or thousands, one by one, the section is processed and the shape is confirmed. It is virtually impossible to do, and there is no point in effort.
[0010]
After all, if the disconnection portion cannot be specified, the analysis method by FIB cannot be applied, and the contact disconnection investigation has been an impossible analysis field.
[0011]
[Means for Solving the Problems]
Therefore, in view of the above problems, the failure analysis method for a semiconductor device according to the present invention irradiates the contact portion with light for a shape defect in the contact portion by a polarization method using a polarization microscope, and observes the direction component of the reflected light. Thus, the shape defect of the contact portion is detected.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment according to a failure analysis method for a semiconductor device of the present invention will be described with reference to the drawings.
[0013]
Here, the feature of the present invention is to provide a method for recognizing a broken contact portion and detecting a broken portion without applying a failure analysis method using FIB. Hereinafter, a two-layer wiring process having a contact portion that contacts the lower layer portion and the upper layer portion will be described as an example.
[0014]
FIG. 1 is a perspective view of a semiconductor device (chip) 12 molded with a mold resin 11.
[0015]
In the sample 12A shown in FIG. 2, reference numeral 1 denotes a semiconductor substrate, the element isolation film 2 is formed on the substrate 1, and the gate insulating film 3 is formed in other regions. A gate electrode 4 is formed through the gate insulating film 3, and source / drain regions 5 and 6 are formed adjacent to the gate electrode 4. Further, a lower layer wiring 8 is formed in contact with the source / drain regions 5 and 6 through an interlayer insulating film 7 formed so as to cover the gate electrode 4, and an interlayer insulating film 9 is formed so as to cover them. An upper layer wiring 10 that is formed and contacts the lower layer wiring 8 through the interlayer insulating film 9 is formed. Although not shown in the drawings, the semiconductor device is configured by covering the top with a passivation film.
[0016]
Further, in the sample 12B shown in FIG. 3, the gate wiring 4A is formed on the element isolation film 2 on the semiconductor substrate 1, and the gate wiring is interposed via the interlayer insulating film 7 formed so as to cover the gate wiring 4A. A wiring 8A that contacts 4A is formed. Although not shown in the drawings, the semiconductor device is configured by covering the top with a protective film such as a passivation film.
[0017]
The disconnection failure of the contact portion in the two-layer wiring process includes (I) a contact portion between the lower layer wiring 8 and the upper layer wiring 10, and (II) a contact portion between the lower layer wiring 8 and the source / drain diffusion regions 5 and 6 ( There are three types of contact portions (see FIG. 2) and (III) contact portions (see FIG. 3) between the wiring 8A and the gate wiring 4A.
[0018]
In order to identify the disconnection failure location of the contact portions (II) and (III), the following processing is performed on the sample.
[0019]
First, as shown in FIG. 1, the mold resin 11 is opened using an opener, and the chip 12 is exposed.
[0020]
Next, a protective film (not shown) such as a silicon nitride film on the chip 12 is removed.
[0021]
Subsequently, the upper layer wiring 10 is removed as shown in FIG. 4A shows a case where the contact shape is normal, and FIG. 4B shows a case where the contact shape is abnormal (has a broken portion 13).
[0022]
Further, as shown in FIG. 5, the sample 12B is set on the work table 21 of the polarizing microscope 20 and observed.
[0023]
Here, the configuration of the polarizing microscope 20 will be described. Two polarizers 23 and 24 are inserted on the front side of the eyepiece 22 (see from the observer side (see arrow A)). By rotating one of the polarizers 23 and 24 (in this embodiment, the polarizer 23 side), only a specific component can be extracted from the reflected light.
[0024]
The contact portion having a normal shape can be observed brightly and brightly, but the contact portion having a defective shape is observed darkly, so that the difference between the two can be identified.
[0025]
Such a polarizing microscope is described in detail in “Polarizing Microscope” written by Seitaro Tsuboi, Iwanami Shoten and others.
[0026]
At this time, the light ((1)) emitted from the light source passes through the transparent interlayer insulating film 9 and reaches the lower layer wiring 8B. When the contact portion has a normal shape (FIG. 4A), the light ((1)) is reflected in an appropriate direction ((2)) on the surface of the lower layer wiring 8B. When the contact portion has an abnormal shape, such as the shape of the contact portion is distorted or there is a minute missing portion (for example, a disconnection portion 13) in the lower layer wiring 8B (FIG. 4B). The light ((1)) enters the LSI and is reflected in a different direction ((3), (4)) from the case where the shape is normal.
[0027]
In normal observation, there is no change in the observed image. This is because only the intensity of light is observed. However, as described above, the direction components of the two reflected lights ((2), (3), (4)) are different. Therefore, it is possible to distinguish both from the difference in the direction of the reflected light.
[0028]
As described above, according to the present invention, it is possible to detect a defective shape portion of the contact portion without using a FIB that takes a long time. Then, the defective portion of the contact portion can be analyzed in a two-dimensionally very wide region, and the failure location can be easily identified.
[0029]
In the case of (I), the disconnection portion can be visualized only by opening the mold resin 11 described above using an opener and exposing the chip 12.
[0030]
As described above, according to the present invention, the defectively shaped contact portion is identified by the luminance based on the difference in the direction component of the reflected light by utilizing the property of the light wave, so that it is easy to identify the poorly shaped contact portion.
[0031]
【Effect of the invention】
According to the present invention, since the contact portion having a poor shape is identified by the luminance based on the difference in the direction component of the reflected light using the polarization method, it is not necessary to use the FIB which takes a long time, and the workability of failure analysis is improved. Will improve.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a failure analysis method for a semiconductor device according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a failure analysis method for a semiconductor device according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a failure analysis method for a semiconductor device according to an embodiment of the present invention.
FIG. 4 is a cross-sectional view showing a failure analysis method for a semiconductor device according to an embodiment of the present invention.
FIG. 5 is a diagram showing a polarization microscope used in the failure analysis method for a semiconductor device of the present invention.

Claims (3)

In a failure analysis method of a semiconductor device that analyzes a disconnection failure of a contact portion that contacts a lower layer portion and an upper layer portion,
Using a polarizing microscope, irradiate the contact part with light , extract a specific polarization component from the reflected light from the contact part, and based on the brightness of the observation image of the contact part by the extracted polarization component A failure analysis method for a semiconductor device , comprising detecting a disconnection failure in the contact portion. In a failure analysis method for a semiconductor device that is formed in a semiconductor chip molded with a mold resin and analyzes a disconnection failure of a contact portion that contacts a lower layer portion and an upper layer portion,
The contact portion includes a first contact portion including a lower layer wiring that contacts a gate wiring or a source / drain diffusion region, and a second contact portion including an upper layer wiring contacting the lower layer wiring,
By opening the molded semiconductor chip, the semiconductor chip is exposed,
Removing a protective film covering the upper layer wiring of the exposed semiconductor chip;
Removing the upper wiring after removing the protective film,
Using a polarization microscope, the first contact portion of the semiconductor chip from which the upper wiring is removed is irradiated with light, and a specific polarization component is extracted from the reflected light from the first contact portion and taken out. A failure analysis method for a semiconductor device, comprising: detecting a disconnection failure of the first contact portion based on a luminance of an observation image of the first contact portion due to the polarization component . In a failure analysis method for a semiconductor device that is formed in a semiconductor chip molded with a mold resin and analyzes a disconnection failure of a contact portion that contacts a lower layer portion and an upper layer portion,
The contact portion includes a first contact portion including a lower layer wiring that contacts a gate wiring or a source / drain diffusion region, and a second contact portion including an upper layer wiring contacting the lower layer wiring,
By opening the molded semiconductor chip, the semiconductor chip is exposed,
Using a polarizing microscope, the exposed second contact portion of the semiconductor chip is irradiated with light, a specific polarization component is extracted from the reflected light from the second contact portion, and the extracted polarized light is extracted. A failure analysis method for a semiconductor device, comprising: detecting a disconnection failure of the second contact portion based on luminance of an observation image of the second contact portion due to a component .

Images