JP4880353B2 - Tamper resistant system - Google Patents

Description

  The present invention relates to a tamper resistant system, and more particularly, to a tamper resistant system used when performing credit settlement using an IC card.

When providing services on an electronic network, as an authentication system that confirms the authority to receive services for an unspecified number of access requesters and permits access only to authorized requesters, for example, Patent Literature 1 is an authentication system including an attribute issuance management server, a user terminal, a tamper-resistant device (IC card, smart card, etc.), a service providing server, and a payment authority device, and includes a group signature method Describes an authentication system that prevents confidential information from leaking to a user terminal by generating confidential information by a tamper-proof device that is detachably held on the user terminal and performing an operation based on the confidential information. Has been.
JP 2004-320562 A (FIG. 8)

  However, in the above-described conventional anonymous authentication system or the like, first, when performing a large amount of data processing, the tamper-resistant device is equipped with an arithmetic processing function based on secret information and performs data processing. There was a problem that it took a long time to complete.

  Second, the tamper-proof device has a secret information calculation processing function, but for the program of the terminal device, for example, countermeasures such as concealment of the program code, obfuscation of code analysis that makes the algorithm unanalyzable from the code, etc. Is not applied, there is a problem that the program code of the main device may be decoded.

  Therefore, the present invention has been made in view of the problems in the above-described conventional anonymous authentication system and the like, and an object thereof is to provide a tamper resistant system and the like with enhanced security while shortening the calculation time.

In order to achieve the above object, the present invention provides a tamper resistant system including a terminal device and a tamper resistant device that communicates with the terminal device, wherein the terminal device performs processing on encrypted data existing in an input area. A command for generating a cryptographic command is transmitted to the tamper resistant device, the tamper resistant device transmits a cryptographic command for the encrypted data to the terminal device, and the terminal device receives the cryptographic command received from the tamper resistant device. And the dummy encryption command stored in advance are executed, the received encryption command is executed, and the encrypted data is transferred to the output area.

  According to the present invention, the tamper resistant device transmits the encryption command for the encrypted data existing in the input area of the terminal device to the terminal device, and the terminal device executes the encryption command. It is difficult to analyze instruction codes such as key generation logic and cryptographic composite processing, and security can be strengthened. Also, cryptographic commands are executed on the terminal side of a computer or the like, so that a large amount of processing can be performed at high speed. it can.

In the tamper resistant system, the terminal device transmits the type of processing device of the terminal device to the tamper resistant device together with the generation instruction of the encryption command, and the tamper resistant device receives the processing device of the received terminal device. only when the the type is adaptable, it can send the encrypted instruction to the terminal device, when the corresponding disabled can terminate the process.

The present invention also provides a program for controlling a tamper resistant system including a terminal device and a tamper resistant device that communicates with the terminal device , the encrypted data existing in an input area in the terminal device. the generation instruction cryptographic instruction to execute the step of transmitting to the tamper resistant device for, in resistant tamper device, the cryptographic instructions for the object to be encrypted data to execute the step of transmitting to the terminal device, the terminal device, the replacing the dummy cryptographic instructions stored in advance to the encryption instructions received from the tamper device, it executes the cryptographic instruction thus received, characterized in that to perform the step of transferring the encrypted data to the output area. As a result, as described above, it is difficult to analyze the instruction code executed by the terminal device, the security can be enhanced, and a large amount of processing can be performed at high speed.

In the program for controlling the tamper resistant system, the terminal device is caused to execute the step of transmitting the type of the processing device of the terminal device to the tamper resistant device together with the generation instruction of the encryption command, and the tamper resistant device. , only when the type of the processing device of the terminal device which has received is adaptable, can execute the step of transmitting the encrypted instruction to the terminal device.

Furthermore, the present invention is a terminal device that communicates with a tamper resistant device, and transmits a command to generate a cryptographic command for encrypted data existing in an input area to the tamper resistant device, and the tamper resistant device transmits the encrypted command. Receiving a cryptographic command for cryptographic data , replacing the cryptographic command received from the tamper resistant device with a dummy cryptographic command stored in advance , executing the received cryptographic command, and transferring the encrypted data to an output area It is characterized by. By using this terminal device, as described above, it becomes difficult to analyze an instruction code executed by the terminal device, security is enhanced, and a large amount of processing can be performed at high speed.

In the terminal device, the type of the processing device of the terminal device is transmitted to the tamper resistant device together with the generation instruction of the encryption command, and the tamper resistant device can cope with the received type of processing device of the terminal device. only when there may be the terminal device receives the encryption instruction.

  As described above, according to the present invention, it is possible to provide a tamper resistant system and the like with enhanced security while reducing the calculation time.

  Next, embodiments of the present invention will be described with reference to the drawings.

  As shown in FIG. 1, the tamper resistant system according to the present invention is roughly composed of a computer (terminal device) 100 that operates under program control and a tamper resistant device 200 that operates similarly under program control.

  The computer 100 includes an input unit 101, a communication unit 102, an instruction code saving unit 103, an important process generation unit 104, an instruction code update unit 105, an encrypted data generation unit 106, an instruction code return unit 107, and an output. And means 108.

  The input unit 101 is responsible for input of data for performing important processing, that is, encryption, and performs input from another program in the computer 100, and the input data is later sent to the encrypted data generation unit 106.

  The communication means 102 is connected to the tamper resistant apparatus 200, and in response to a request from the important process generating means 104, transmits a command code generation command to the tamper resistant apparatus 200, and a processing result from the tamper resistant apparatus 200, that is, The generated instruction code of the important process is received and returned to the important process generation means 104 as a response.

  The instruction code saving unit 103 moves the instruction code of the existing encrypted data generation unit 106 to the temporary saving area.

  The important process generation unit 104 requests the tamper resistant apparatus 200 to generate an instruction code for the important process via the communication unit 102, and receives the instruction code generated by the tamper resistant apparatus 200.

  The instruction code update unit 105 overwrites the instruction code generated by the tamper resistant apparatus 200 with the instruction code of the existing encrypted data generation unit 107.

  The encrypted data generation unit 106 encrypts the encrypted data input by the input unit 101 using the instruction code overwritten by the instruction code update unit 105.

  The instruction code restoring means 107 restores the instruction code moved to the temporary saving area by the instruction code saving means 103.

  The output unit 108 outputs the encrypted data generated by the encrypted data generation unit 106 to another program in the computer 100.

  The tamper resistant apparatus 200 includes a communication unit 201, a CPU determination unit 202, and an important processing instruction code generation unit 203.

  The communication unit 201 is connected to the communication unit 102 of the computer 100 and exchanges a generation command and a response from the important process generation unit 104.

  The CPU determination unit 202 determines the type of CPU used in the computer 100 from the command identifier requested from the important process generation unit 104 of the computer 100.

  The important process instruction code generation unit 203 generates an instruction code for an important action that matches the CPU type determined by the CPU determination unit 202.

  As shown in FIG. 2, the computer 100 includes a CPU 110, a memory 120, and a communication interface 130. The memory 120 includes a code area 121 that stores program instruction codes and a work area 122 that stores data and the like.

  On the code area 121, the input unit 101, the communication unit 102, the instruction code saving unit 103, the important process generation unit 104, the instruction code update unit 105, the encrypted data generation unit 106, and the like shown in FIG. A program for controlling the instruction code return means 107 and the output means 108 is stored.

  The tamper resistant apparatus 200 includes a CPU 210, a memory 220, and a communication interface 230. The memory 220 includes a code area 221 for storing program instruction codes and a work area 222 for storing data and the like.

  On the code area 221, a program for controlling the communication unit 201, the CPU discrimination unit 202, and the important process instruction code generation unit 203 shown in FIG. 1 is stored.

  As shown in FIG. 3, the code area 121 of the memory 120 functions as the input unit 101 and functions as the instruction code A (address 0000) for storing the encrypted data in the work area 122 and the instruction code saving unit 103. Communicating a request for generating an important process instruction code to the tamper resistant apparatus 200 functioning as the important process generating means 104, and an instruction code B (address 0001) for moving the dummy encryption instruction code of its own program to the work area 122 An instruction code C (address 0002) performed through the terminal 102, an instruction code D (address 0003) for receiving an instruction code from the tamper resistant apparatus 200, and an important code received from the tamper resistant apparatus 200 that functions as the instruction code updating means 105. Update the instruction code that executes the process to your program The instruction code E (address 0004), the instruction code F (address 0005) that functions as the encryption data generation means 106, and executes encryption processing, and the instruction code G (address 0006) that stores the encrypted data 201 in the work area 122 And an instruction code H (address 0007) that functions as the instruction code return means 107 and that restores the instruction code saved in the work area 122 to its own program, and an instruction code that functions as the output means 108 and outputs the encrypted data 201 A program composed of I (address 0008) is stored.

  In the work area 122, a work area a (address 1000) for storing encrypted data, a work area b (address 1200) for storing encrypted data, and a work area c (address) for saving an instruction code for existing encryption processing 1500).

  As shown in FIG. 4, in the code area 221 of the memory 220, the instruction code A 1 (address 2000) that functions as the communication unit 201 and stores the command received from the computer 100 in the work area 222, and the CPU determination unit 202 An instruction code B1 (address 2001) for analyzing the function stored in the work area 222 and determining the CPU type of the computer 100, and the CPU determination means 202 functioning as the important process instruction code generation means 203 The instruction code C1 (address 2002) that retrieves the instruction code that matches the selected CPU from the work area 222, and the instruction code D1 (address 2003) that transmits the retrieved instruction code to the computer 100 via the communication interface 230. Professional Lamb is stored.

  The work area 222 includes a work area a1 (address 3000) for storing commands and a work area b1 (addresses 3010 to 3030) in which important processing instruction codes for each CPU are stored. .

  FIG. 5 is a program configuration diagram of the memory 120 of the computer 100 during the execution of important processing in the present invention. Compared to the program configuration shown in FIG. 3, the instruction code for the cryptographic process (address 0005) is replaced with X.

  Next, the overall operation of the tamper resistant system having the above configuration will be described in detail with reference to the flowcharts of FIGS. 2 to 5 and FIG. 6. For the sake of specific explanation, the instruction code E stored at the address 0004 of the code area 121 is an instruction for rotating input data to the left by 1 bit. For example, when a hexadecimal value of 0x0A (000001010) is input, after execution of the instruction code E, it is encrypted to 0x14 (00010100). The instruction code I stored at the work area 222 address: 3001 is an instruction for rotating input data to the right by 1 bit. For example, when a value of 0x0A (00001010) is input in hexadecimal, after executing the instruction code I, it is encrypted to 0x05 (00000101).

  In the code area 121 of the computer 100 where normal encryption processing is not operating, instruction codes A, B, C, D, E, F, G, H, and I shown in FIG. 3 are stored. In this state, since the instruction code F that performs the important process is not the original encryption process instruction code, even if the content of the code area 121 is decrypted from the instruction code by an action such as reassembling, The input data can be decrypted only until it is rotated to the left by one bit, and it is impossible to decrypt the original encryption process.

  When the encryption processing program operates from this state, as shown in FIG. 6, first, the computer 100 executes the instruction code A and transfers data to be encrypted to the work area 121 (step S1). Next, the computer 100 executes the instruction code B and transfers the instruction code F at the address 0005 in the code area 121 to the address 1002 in the work area 122 (step S2). The computer 100 executes the instruction code C, transmits a command in which the type of the CPU 110 is set to the tamper resistant apparatus 200, and waits for a response from the tamper resistant apparatus 200 (step S3).

  Next, the tamper resistant apparatus 200 executes the instruction code A1, transfers the command received from the computer 100 to the work area 221 (step P1), executes the instruction code B1, and determines the CPU type in the command. (Step P2). If the CPU type is compatible with the tamper resistant device 200, the process proceeds to step P3. If not supported, the process proceeds to step P5, an error is transmitted, and the program of the tamper resistant device 200 ends. To do.

  Next, the tamper resistant apparatus 200 executes the instruction code C1, retrieves and retrieves the instruction code that matches the CPU type from the work area 221 (step P3), executes the instruction code D1, and retrieves the retrieved instruction code I. Is transmitted to the computer 100 (step P4).

  Next, the computer 100 executes the instruction code D and receives the instruction code I from the tamper resistant apparatus 200 (step S4). Further, the computer 100 executes the instruction code E and transfers the instruction code I to the address 0005 in the code area 121 (step S5).

  Next, the computer 100 executes the instruction code X, performs encryption processing on the encrypted data stored in the work area 122 (step S6), executes the instruction code G, and stores the encrypted data in the work area. It transfers to 122 (step S7).

  Next, the computer 100 executes the instruction code H, transfers the instruction code saved to the address 1002 of the work area 122 to the address 0005 of the code area 121 (step S8), executes the instruction code I, and executes the work area 122. The encrypted data is transferred to the output area (step S9).

  INDUSTRIAL APPLICABILITY The present invention can be used for applications such as terminals using IC cards, particularly credit settlement terminals, bank ATMs, and the like.

It is a block diagram which shows the structure of one Embodiment of the tamper resistant system concerning this invention. FIG. 2 is a system configuration diagram of the tamper resistant system of FIG. 1. It is a figure which shows the memory state of the normal time of the computer of the tamper resistant system of FIG. It is a figure which shows the memory state of the normal time of the tamper resistant apparatus of the tamper resistant system of FIG. It is a figure which shows the memory state at the time of the encryption process execution of the computer of the tamper resistant system of FIG. It is a flowchart which shows operation | movement of the system of the tamper resistant system of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Computer 101 Input means 102 Communication means 103 Instruction code saving means 104 Critical process generation means 105 Instruction code update means 106 Encryption data generation means 107 Instruction code restoration means 108 Output means 110 CPU
120 Memory 121 Code Area 122 Work Area 130 Communication Interface 200 Tamper Resistant Device 201 Communication Means 202 CPU Discriminating Means 203 Critical Processing Instruction Code Generating Means 210 CPU
220 Memory 221 Code area 222 Work area 230 Communication interface

Claims (6)

A tamper resistant system composed of a terminal device and a tamper resistant device communicating with the terminal device,
The terminal device transmits an instruction to generate a cryptographic command for the encrypted data present in the input area to the tamper resistant device,
The tamper resistant device transmits an encryption command for the encrypted data to the terminal device,
The terminal device replaces the encryption command received from the tamper resistant device with a dummy encryption command stored in advance, executes the received encryption command, and transfers encrypted data to an output area. Tamper resistant system. The terminal device transmits the type of processing device of the terminal device to the tamper resistant device together with the generation instruction of the encryption command,
Resistant tamper device only when the type of the processing device of the terminal device which has received is adaptable, tamper system according to claim 1, characterized in that transmitting the encrypted instruction to the terminal device . A program for controlling a tamper resistant system composed of a terminal device and a tamper resistant device communicating with the terminal device,
Causing the terminal device to execute a step of transmitting to the tamper resistant device a command to generate a cryptographic command for the encrypted data present in the input area;
The resistant tamper device, to execute the step of transmitting the encrypted instruction to the object to be encrypted data to the terminal device,
The terminal device, replacing the dummy cryptographic instructions stored in advance and the encryption instruction received from the tamper resistant device, executes the cryptographic instruction thus received, thereby performing the step of transferring the encrypted data to the output area A program characterized by Causing the terminal device to execute the step of transmitting the type of the processing device of the terminal device to the tamper resistant device together with the generation instruction of the encryption command;
The resistant tamper device, only if it is possible corresponding to the type of the processing apparatus of the terminal apparatus that has received, according to claim 3, characterized in that to perform the step of transmitting the encrypted instruction to the terminal device of the program. A terminal device that communicates with a tamper resistant device,
Sending a command to generate a cryptographic command for the data to be encrypted existing in the input area to the tamper resistant device,
Receiving an encryption command for the encrypted data from the tamper resistant device;
A terminal device, wherein the encryption command received from the tamper resistant device is replaced with a dummy encryption command stored in advance, the received encryption command is executed, and the encrypted data is transferred to an output area. The terminal device transmits the type of processing device of the terminal device to the tamper resistant device together with the generation instruction of the encryption command,
Resistant tamper device, only if it is possible corresponding to the type of the processing apparatus of the terminal apparatus that has received, the terminal apparatus according to claim 5, wherein the terminal device is characterized in that receiving the encryption instruction.

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