JP4884699B2 - Compound semiconductor laminated structure and light emitting device using the same - Google Patents

Description

The present invention relates to a light emitting element formed by using a laminated structure of a compound semiconductor multilayer structure及patron comprising a heterojunction structure of the III-V compound semiconductor crystal and boron phosphide crystal.

  Conventionally, a heterogeneous (hetero) junction structure comprising a cubic zinc blende crystal type III-V group compound semiconductor layer and boron phosphide (BP) has been widely used to form compound semiconductor devices. For example, a heterojunction made of a boron phosphide layer having a conductive gallium phosphide (GaP) single crystal as a substrate and intentionally added with an impurity such as magnesium (Mg) heterojunction to the surface of the substrate is blue. It is used to construct a band semiconductor laser.

However, although gallium phosphide and boron phosphide are the same cubic zinc blende crystal type, the lattice constants are greatly different. The lattice constant of BP is 4.5383Å, whereas the lattice constants of GaP and gallium arsenide (GaAs) are as large as 5.4495Å and 5.6543Å, respectively. That is, lattice mismatch is large between BP and III-V group compound semiconductor crystals such as GaP and GaAs. For this reason, for example, many misfit dislocations or the like occur in the BP crystal on the surface of the GaP crystal or GaAs crystal, and a high-quality BP crystal with few crystal defects cannot be stably obtained.
Therefore, in the prior art, a heterojunction excellent in crystallinity between the III-V compound semiconductor layer and the BP crystal layer cannot be formed sufficiently stably, and such a heterojunction structure having a large crystal defect density is formed. A semiconductor element with good performance cannot be obtained even if a laminated structure including the same is used. For example, there has been a problem that a compound semiconductor light emitting device excellent in reverse voltage resistance cannot be obtained stably.

As means for eliminating the lattice mismatch, a method using a composition gradient layer has been proposed (for example, see Patent Document 1).
In this method, a composition gradient layer having a composition changed from a GaAs crystal to a GaAsP crystal is formed on a GaAs substrate, and a lower cladding layer made of InGaAlP, an active layer made of InGaP, and an upper cladding layer made of InGaAlP are formed on the surface of the composition gradient layer. A light emitting element having a double heterojunction structure is obtained by epitaxial growth sequentially. According to this method, lattice matching between the GaAs substrate and the double heterojunction is achieved, so that the light emission efficiency is high and the electrical conductivity can be increased.
A method using an amorphous low-temperature buffer layer has also been proposed (see, for example, Non-Patent Document 1).
In this method, for example, a low-temperature buffer layer made of BP is formed on a GaAs substrate at a low temperature of 460 ° C. or lower, and a light emitting structure including a pn junction is formed on the surface of the low-temperature buffer layer.
According to this method, since the low-temperature buffer layer becomes amorphous, a lattice mismatch of crystals can be avoided, so that a light-emitting element with high luminous efficiency can be obtained.
Japanese Patent Laid-Open No. 08-018101 Y. Akasaki “Journal of Japanese Society for Crystal Growth” Vol. 23, No. 3, p. 44-p. 49, 1996

The present invention provides a heterojunction of a BP crystal layer on a III-V compound semiconductor crystal layer such as GaP or GaAs on the premise that a BP crystal having a large forbidden band width is used as a current diffusion layer or window layer of a light emitting device. It is an object of the present invention to provide a BP crystal layer having excellent crystallinity by relaxing the lattice mismatch between the two.
That is, the structure of the crystal structure in the region near the heterojunction interface between the III-V compound semiconductor crystal and the BP crystal is disclosed .
Et al. And contains a heterojunction between the III-V compound semiconductor crystal layer and the BP crystal layer, and to provide an excellent compound semiconductor device in electrical and optical properties.

The III-V compound semiconductor multilayer structure of the present invention is a compound semiconductor multilayer structure including a heterojunction composed of a GaAs crystal plane and a monomeric boron phosphide crystal plane, wherein the heterojunction is phosphideated with a GaAs crystal plane. A III-V compound semiconductor multilayer structure including a region having a ratio of the number of faces to the boron crystal face of 5 to 6 was obtained.
By increasing the number of BP crystal planes having a small lattice constant within a narrow span, lattice mismatch can be greatly reduced. With the compound semiconductor laminate having such a structure, the lattice mismatch between the GaAs crystal and the monomeric boron phosphide crystal is alleviated, and a BP crystal with less misfit dislocations and the like and excellent crystallinity can be obtained. it can.

In the III-V compound semiconductor multilayer structure of the present invention, the GaAs crystal plane forming the heterojunction is represented by {100}, {110} or {111} when the plane index (HKL) is expressed by the Miller index. It is possible to use a III-V compound semiconductor multilayer structure having a crystal plane.
Further, it is preferable that the GaAs crystal plane and the BP crystal plane forming the heterojunction have the same Miller index.
Since the GaAs crystal, which is a zinc blende crystal type III-V group compound semiconductor crystal , is a cubic crystal, an effective heterojunction can be formed using any of the above surfaces. Moreover, it is because misfit dislocations and the like are less likely to occur when the same crystal planes are joined.

Group III-V compound semiconductor stacked structure of these, since the forbidden band width has a higher addition BP crystal having excellent little crystallinity such as misfit dislocation, the current diffusion layer of a light-emitting element and a laser element Ya It becomes extremely useful as a window layer.

The light emitting device of the present invention is a light emitting device including the above-described III-V group compound semiconductor multilayer structure of the present invention.
The BP layer of the III-V compound semiconductor multilayer structure may be included as a current diffusion layer or may be included as a window layer.
The BP layer of the present invention has few misfit dislocations and is excellent in crystallinity, and the forbidden band width can be made larger than the forbidden band width of the light emitting layer. Can do.

According to the III-V group compound semiconductor laminated structure of the present invention, six boron phosphide crystals are formed on five (HKL) crystal lattice planes of GaAs which is a zinc blende type III-V compound semiconductor. Since the lattice planes are arranged, deterioration of crystallinity due to lattice mismatch is alleviated, and a stacked structure including a high-quality heterojunction can be provided.
When the stacked structure of the present invention is applied to a III-V group compound semiconductor such as GaP or GaAs, a heterojunction with a high-quality BP crystal in which deterioration of crystallinity due to lattice mismatch is avoided can be provided. If a compound semiconductor light-emitting device is configured using a junction, for example, a high-performance light-emitting device with excellent reverse voltage resistance and high light emission efficiency can be provided .

The zincblende crystal type III-V compound semiconductor used in the present invention includes group IIIb group aluminum (Al), gallium (Ga), indium (In), and group Vb group phosphorus (P). , Arsenic (As), and antimony (Sb) are combined at an atomic ratio of 1: 1, and have a cubic zinc blende crystal type. A semiconductor that is practically excellent and is purely doped with an impurity element in addition to a pure crystal. The composition can be expressed as a general formula: Al _α Ga _β In _1-α-β P _1-γ-δ As _γ Sb _δ (0 ≦ α, β ≦ 1, 0 ≦ α + β ≦ 1, 0 ≦ γ, δ ≦ 1, 0 ≦ γ + δ ≦ 1,)).
Can suitably used in the present invention, formed with a small number of constituent elements is easy, for example, aluminum phosphide, indium mixed crystal (compositional _formula: Al α In δ P) and aluminum gallium arsenide mixed crystal (compositional formula: Al _α Ga _β As). In particular, gallium phosphide (GaP) and gallium arsenide (GaAs), which are binary III-V compound semiconductors that do not require a mixed crystal ratio to be controlled.

On the other hand, monomeric boron phosphide (BP) is a binary III-V compound semiconductor in which boron (B) of group IIIb of the periodic table and phosphorus (P) of group Vb of the periodic table are bonded. Boron (B) combines with other elements in units such as B, B2, and B6 to form multimeric boron phosphides such as B6P. Among these, B and P atoms are useful as semiconductors. Is a monomeric boron phosphide bonded at an atomic ratio of 1: 1 and represented by the composition formula (BP).
Monomeric boron phosphide (BP) has a cubic zinc blende crystal type and the crystal lattice constant is 4.538 Å (Akira Teramoto, “Introduction to Semiconductor Devices”, Baifukan Co., Ltd.) , Published March 30, 1995, first edition, page 28). Moreover, it is an indirect transition type, and the forbidden band width at room temperature has been 2.0 eV from the past (see Japanese Patent Application Laid-Open No. 2-275682). In addition, it is one of the semiconductors having higher covalent bond and higher melting point than other III-V group compound semiconductors such as GaP and GaAs. Hereinafter, this monomeric boron phosphide may be simply referred to as boron phosphide (BP).

The boron phosphide semiconductor crystal can be formed by vapor phase growth means such as a halogen method, a hydride method, or a MOCVD (metal organic chemical vapor deposition) method. It can also be formed by molecular beam epitaxy (J. Solid
State Chem. 133 (1997), pages 269-272). For example, it is formed by atmospheric pressure (substantially atmospheric pressure) or reduced pressure MOCVD using triethylboron ((C ₂ H ₅ ) ₃ B) and phosphine (PH ₃ ) as raw materials.
By MOCVD method, growth is started on III-V compound semiconductor crystal by deliberately increasing the mixing ratio of group V source gas and group III source gas at a temperature of 750 ° C. to 950 ° C. Then, a BP crystal layer having a specific crystal lattice arrangement can be grown at the junction interface with the III-V group compound semiconductor crystal. It is suitable that the raw material gas supply ratio (V / III ratio) at the time of formation, for example, the concentration ratio of PH ₃ / (C ₂ H ₅ ) ₃ B is 200 or more.
When growing the n-type BP crystal layer, the growth is continued at a V / III ratio of 200 or more.
For example, the V / III ratio is kept constant at 200 from the initial stage of growth on the GaP layer, and the growth is continued by supplying the source gas until the desired layer thickness is reached. In another example, a region near the heterojunction interface is formed with a V / III ratio of 400, and then a V / III ratio of 600 is used to supply a source gas until a desired layer thickness is reached for growth. continue. In general, as the V / III ratio is set to a higher value, an n-type BP crystal layer having a higher carrier concentration can be obtained.

On the other hand, in order to obtain a p-type BP crystal layer, only in the initial stage of growth, the V / III ratio is temporarily set to 200 or more to form a region near the heterojunction interface, and then the V / III ratio is instantaneously reduced. Grow. When the p-type BP layer is grown, the p-type BP layer is grown at a high V / III ratio as described above until the layer thickness of the BP layer reaches 10 nm or more and 30 nm or less from the heterojunction interface.
This is because when the growth is continued with the V / III ratio kept high, a sufficiently low resistance p-type BP layer may not be stably formed. In order to stably form the BP of the low-resistance p-type BP layer heterojunction with the GaP layer or GaAs layer, it is suitable that the V / III ratio in the latter phase of vapor phase growth is 5 or more and 50 or less.

  Further, in a boron phosphide (BP) crystal heterojunction with a III-V group compound semiconductor crystal such as GaP or GaAs, a boron phosphide crystal containing a twin crystal, in particular, a (111) twin crystal is formed inside. When used, a good heterojunction can be formed with a GaP layer or a GaAs layer. The twins contribute to alleviating the lattice mismatch with GaP or GaAs, and there are few misfit dislocations that are convenient for forming a heterojunction with these III-V compound semiconductor layers, and excellent crystallinity. It works effectively to produce boron phosphide crystals.

If the growth rate of the BP layer on the GaP crystal or GaAs crystal is precisely controlled in addition to the III-V ratio, an n-type or p-type BP layer having a large forbidden band width can be formed. For example, when a BP layer is formed on a GaP layer by MOCVD, if a growth rate is set to a range of 2 nm / min to 30 nm / min, a BP semiconductor layer having a forbidden band width of 2.8 eV or more at room temperature is obtained. can get. The forbidden band width of a BP layer grown on a GaP or GaAs crystal is obtained from the photon energy (= h · ν) dependence of the absorption coefficient.
In particular, an n-type or p-type low-resistance BP semiconductor layer having a forbidden band width of 2.8 eV or more and 5.0 eV or less at room temperature is useful as, for example, a current diffusion layer for constituting a compound semiconductor light-emitting device. It is. In addition, such a BP semiconductor layer having a high forbidden bandwidth can be effectively used as a window layer for transmitting ultraviolet band light and short wavelength visible light emitted from the light emitting layer to the outside. However, in a BP semiconductor layer having a forbidden band width exceeding 5.0 eV, the difference in the forbidden band width from a GaP or GaAs crystal becomes significantly large, which is disadvantageous for obtaining a compound semiconductor light emitting device having a low forward voltage or low threshold voltage. Become.

  The group III-V compound semiconductor multilayer structure including a heterojunction of the present invention is provided by bonding to a crystal plane having a plane index (HKL) forming the surface of a cubic group III-V compound semiconductor crystal. And a body of boron phosphide (BP) crystal plane. The crystal plane whose plane index is (HKL) is a crystal plane represented by {100}, {110}, or {111} when the crystal plane is expressed using a Miller index. Since these are cubic crystals, they are all equivalent planes. H, K, and L are usually 0 (zero) or positive or negative integers. The surface of the group III-V compound semiconductor to which the BP crystal is bonded is preferably a crystal plane with a low-order Miller index plane as described above. The crystal plane may be slightly inclined in the range.

The structure of a crystal structure having a specific crystal lattice arrangement according to the present invention is schematically illustrated in FIG. There are n crystal lattice planes in an area S having a certain width inside the group III-V compound semiconductor layer 4. Here, n is a positive integer of 10 or less, and is usually 5 or 6. FIG. 1 shows the case of n = 5, and there are five (III) -V group compound semiconductor crystal planes (1) to (5).
On the other hand, six boron phosphide crystal lattice planes 1 to 6 exist in the BP layer 5 in the same area S. That is, there are (n + 1) boron phosphide crystal lattice planes. In this case, the number of boron phosphide crystal lattice planes is 5 + 1 = 6, which is one more than the number of the previous III-V compound semiconductor crystal planes. Therefore, the number of crystal lattice planes of the heterojunction plane 12 in the area S is characterized by an n-to- (n + 1) relationship.
In the present invention, when viewed within a narrow span with a heterojunction surface (within 10 crystal lattice planes), by increasing one BP crystal plane with a small lattice constant, the lattice mismatch is greatly relaxed. Yes.
In the present invention, at least one heterojunction having such a structure may be included. According to the method for forming a heterojunction of the present invention, usually such a structure is often obtained repeatedly and continuously.

In particular, the relationship of n: n + 1 is maintained as the quantitative ratio between the (HKL) crystal plane of the III-V compound semiconductor crystal that heterojunctions the BP crystal and the BP crystal lattice plane with the same plane index. In this case, the lattice mismatch between both layers is effectively mitigated.
For example, when the III-V compound semiconductor crystal is GaP, the numerical ratio between the (100) crystal lattice plane of GaP and the (100) crystal lattice plane of the BP layer is 6: 7 (n = 6, n + 1 = 7). ), The degree of lattice mismatch in the range of the six crystal lattice planes is (4.5383 × 7−5.449 × 6) /5.4495×6=0.02840, which is 2.84%. It is. The lattice mismatch degree is (4.5383 × 6-5.4495 × 6) / 5 at the junction of six normal (100) -GaP crystal faces and six (100) -BP crystal faces. .4495 × 6 = −0.1671, reaching 16.7%. Therefore, in the present invention, the degree of lattice mismatch is greatly reduced.
When the III-V compound semiconductor crystal is GaAs, the numerical ratio between the (100) crystal lattice plane of GaAs and the (100) crystal lattice plane of the BP layer is 5: 6 (n = 5, n + 1 = 6). ), The degree of lattice mismatch in the range of the five crystal lattice planes in the region S in FIG. 1 is (4.5383 × 6−5.6543 × 5) /5.6543×5=0.03684. And 3.68%. The lattice mismatch degree is (5.6543 × 5-4.5383 × 5) /5.6543×5=0 at the junction of five normal III-V compound semiconductor crystal planes and five BP crystal planes. 1973, reaching 19.73%. Therefore, in the present invention, the degree of lattice mismatch is greatly reduced.

  By using a high-resolution transmission electron microscope (TEM) and observing a lattice image in the vicinity of the junction interface between the group III-V compound semiconductor layer and the BP layer, the quantitative surface as described above is obtained. It is possible to know the presence or absence of a crystal structure having the composition ratio and the quantitative ratio of crystal lattice planes constituting the crystal structure. Presence or absence of twins in the boron phosphide-based semiconductor layer is known, for example, from the appearance of unique anomalous diffraction points due to twins in an electron diffraction (TED) image (P. Hirsch et al. "ELECTRON MICROSCOPY OF THIN CRYSTAL", Krieger Pub. Com. (1977, USA), pages 141-148). The density of twins can be obtained by counting the twin grain boundaries imaged in the cross-sectional TEM image of the BP layer.

  As described above, in the present invention, when forming a heterojunction between a III-V compound semiconductor crystal and a BP crystal having a high forbidden band width, the adverse effect of lattice mismatch can be alleviated. A resistive BP crystal is obtained. Since the BP crystal having excellent crystallinity and low resistance has a large forbidden band, if a light emitting element or a laser element used as a current diffusion layer or a window layer is formed, a light emitting element with high luminous efficiency can be obtained.

(Function)
In a heterojunction consisting of a zinc blende crystal group III-V compound semiconductor crystal surface and a BP semiconductor crystal surface bonded to the surface, n (HKL) III-V compound semiconductor crystals By arranging one (n + 1) more BP crystal planes than the crystal lattice plane, the lattice mismatch between GaP crystal, GaAs crystal, and BP crystal is alleviated, and a BP layer having excellent crystallinity is produced. Have Thus, even if a BP crystal having a smaller lattice constant than that of a III-V group compound semiconductor crystal is heterojunctioned, it is possible to substantially eliminate the adverse effects of lattice mismatch.

Example 1
The present invention is illustrated by taking as an example the case where a light-emitting element is formed using a compound semiconductor stacked structure having a heterojunction structure of a gallium phosphide (GaP) crystal layer and a boron phosphide (BP) crystal layer. I will explain it.

FIG. 2 schematically shows a cross-sectional structure of a pn junction light-emitting element 10 configured using a compound semiconductor multilayer structure including a heterojunction of GaP and BP.
The compound semiconductor multilayer structure 11 was formed using a p-type gallium arsenide (GaAs) single crystal doped with zinc (Zn) as a substrate 100. On the surface of the substrate 100, a buffer layer 101 made of p-type GaAs doped with zinc (Zn), aluminum gallium phosphide doped with zinc (Zn) ((Al _0.70 Ga _0.30 ) _{0 .50} In _0.50 P) mixed crystal lower cladding layer 102, undoped n-type (Al _0.14 Ga _0.86 ) _0.50 In _0.50 P light emitting layer 103, and selenium (Se ) Doped n-type (Al _0.70 Ga _0.30 ) _0.50 In _0.50 P and successively deposited.
The buffer layer 101 has a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ and a layer thickness of 500 nm, the lower cladding layer 102 has a carrier concentration of 1 × 10 ¹⁷ cm ⁻³ and a layer thickness of 1000 nm, and the light emitting layer 103 has a carrier concentration of The upper cladding layer 104 was formed to have a carrier concentration of 2 × 10 ¹⁸ cm ⁻³ and a layer thickness of 5000 nm, with 1 × 10 ¹⁶ cm ⁻³ and a layer thickness of 500 nm.
Each of these layers 101 to 104 was vapor-phase grown by a general low pressure MOCVD method.

An n-type gallium phosphide (GaP) layer 105 doped with silicon (Si) was deposited on the upper cladding layer 104. The GaP layer 105 was formed by a low pressure MOCVD method using trimethylgallium ((CH ₃ ) ₃ Ga) as a gallium source and phosphine (PH ₃ ) as a phosphorus source. The GaP layer 105 was formed at 730 ° C. The carrier concentration of the GaP layer 105 was 1 × 10 ¹⁸ cm ⁻³ and the layer thickness was 250 nm.

An undoped n-type boron phosphide (BP) layer 106 was formed on the GaP layer 105.
The BP layer 106 is formed using a normal pressure (substantially atmospheric pressure) MOCVD method using triethyl boron ((C ₂ H ₅ ) ₃ B) as a boron (B) source and phosphine (PH ₃ ) as a phosphorus source. . The BP layer 106 was formed at 775 ° C. with a PH ₃ / (C ₂ H ₅ ) ₃ B ratio constant of 450 from the beginning of growth. The thickness of the BP layer 106 was 650 nm, and the carrier concentration was 3 × 10 ¹⁹ cm ⁻³ .

  Using a high-resolution transmission electron microscope (HRTEM), the crystal structure at the heterojunction between the GaP layer 105 and the BP layer 106 was observed. From the cross-sectional TEM image, it was confirmed that the (100) crystal lattice plane of GaP and the (100) crystal lattice plane of BP were arranged parallel to the vertical direction. In addition, at the interface where the heterojunction is formed, there are six (100) crystal lattice planes of GaP, whereas seven (100) crystal lattice planes of BP are arranged in the same area. The existence of the crystal structure was confirmed.

  Further, since the BP layer 106 was formed by bonding to the GaP layer 105 at a growth rate of 25 nm per minute, the forbidden band width at room temperature was 3.1 eV. Therefore, the BP layer 106 is a low-resistance semiconductor layer having a sufficiently wide band gap for use as a window layer for transmitting light emitted from the light-emitting layer 103 to the outside.

  In the central portion of the surface of the BP layer 106, an n-type that also serves as a pad electrode for connection, in which a gold (Au) -germanium (Ge) alloy film, a nickel (Ni) film, and a gold (Au) film are sequentially stacked. An ohmic electrode 107 was provided. On the other hand, a gold (Au) -beryllium (Be) film was deposited on the entire back surface of the substrate 100 made of p-type GaAs single crystal by a general vacuum deposition method to form a p-type ohmic electrode 108. Thereafter, the substrate 100 was cut along a strip-shaped groove having a line width of 50 μm provided parallel to the <110> crystal orientation, and divided into square light-emitting element 10 chips each having a side of 350 μm.

  When a device drive current of 20 mA was passed between the n-type and p-type ohmic electrodes 107 and 108 in the forward direction, red light with an orange color having a center wavelength of 610 nm was emitted from the light-emitting device 10. In addition, since the heterojunction body of the BP layer 106 and the GaP layer 105 having a wide forbidden band width and a low resistance is provided, the planar region of the light emitting layer 103 existing outside the projected region of the n-type ohmic electrode 107 is substantially omitted. It was visually recognized that light emission was brought to the outside from the entire surface. Further, from the near-field image of the light emission pattern, the intensity of light emission from the region of the light emitting layer 103 other than the projection region is substantially constant, and is molded with a resin that is measured using a general integrating sphere. The luminance in the previous chip state has reached 40 millicandela (mcd).

In addition, since the n-type ohmic electrode 107 is provided on the BP layer 106 having excellent crystallinity and low resistance, the forward voltage (Vf) is as low as 2.4V. On the other hand, the reverse voltage when the reverse current was 10 μA was a high value exceeding 12V.
This is a result of using a BP crystal that effectively acts to alleviate the lattice mismatch with GaP. In particular, the semiconductor layer provided with the n-type ohmic electrode 107 is formed with the BP layer 106 having few defects due to lattice mismatch. Therefore, it is effective to provide a light emitting element with less local breakdown voltage failure (local breakdown).

(Example 2)
Example of a case where a light emitting device having a pn junction type double hetero (DH) junction structure is formed using a compound semiconductor stacked structure having a hetero junction of a gallium arsenide (GaAs) crystal layer and a boron phosphide (BP) layer The contents of the present invention will be specifically described below.

An upper cladding made of (Al _0.70 Ga _0.30 ) _0.50 In _0.50 P is formed on the p-type GaAs substrate 100 described in Example 1 according to the method described in Example 1. Up to layer 104 was deposited sequentially. Thereafter, an n-type gallium arsenide (GaAs) layer doped with silicon (Si) was deposited on the upper cladding layer 104. The n-type GaAs layer was formed by a low pressure MOCVD method using (CH ₃ ) ₃ Ga as a gallium source and arsine (AsH ₃ ) as an arsenic source. The n-type GaAs layer was formed at 700 ° C. The carrier concentration of the n-type GaAs layer was 1 × 10 ¹⁸ cm ⁻³ and the layer thickness was 3 nm.

An undoped n-type boron phosphide (BP) layer was formed on the n-type GaAs layer. The n-type BP layer was formed using the atmospheric pressure MOCVD method using (C ₂ H ₅ ) ₃ B as a boron source and PH ₃ as a phosphorus source, as described in Example 1 above. The n-type BP layer was grown at 750 ° C. and formed at a constant PH ₃ / (C ₂ H ₅ ) ₃ B ratio of 600 from the beginning of growth. The thickness of the n-type BP layer was 950 nm, and the carrier concentration was 2 × 10 ¹⁹ cm ⁻³ . The BP layer was grown at a growth rate of 30 nm per minute. The room temperature forbidden band width of the BP layer obtained by using the absorption coefficient calculated from the extinction coefficient measured with a general spectroscopic ellipsometer was 3.0 eV.

From the cross-sectional TEM image of the region in the vicinity of the heterojunction interface between the GaAs layer and the BP layer imaged using a high-resolution TEM (HRTEM), BP The existence of a crystal structure in which six (100) crystal lattice planes were aligned was confirmed. In addition, from the position of the extraordinary diffraction spot due to twins appearing in the limited-field electron diffraction image, it was shown that (111) twins exist inside the BP layer heterojunction to the GaAs layer.
Further, from the cross-sectional TEM image of the region in the vicinity of the heterojunction interface, the region where the (111) twins exist is a crystal lattice plane of GaAs and BP in the same region as described above at a quantity ratio of n: n + 1. This is a different region from the existence of the crystal structure. The surface density of the grain boundaries of (111) twins observed in the cross-sectional TEM image was about 1 × 10 ⁶ cm ⁻² .

  In the same manner as described in Example 1 above, n-type and p-type ohmic electrodes were formed. Thereafter, an element driving current of 20 mA was passed between the ohmic electrodes in the forward direction. The light emitting element emitted orange-red light having a central wavelength of 610 nm. Further, since the heterojunction is formed of the GaAs layer and the low-resistance BP layer having a wide band gap, the device driving current can be diffused widely in a plane from the n-type ohmic electrode on the BP layer, and the light emitting layer It was observed that light emission was brought from the entire area. Furthermore, from the near-field image of the light emission pattern, it was shown that the intensity of light emission emitted from a region other than the projection region of the n-type ohmic electrode is substantially constant. The luminance in a chip state before molding with a resin measured using a general integrating sphere was 36 millicandela (mcd).

Further, since the n-type ohmic electrode was provided on the low-resistance BP layer having excellent crystallinity, the forward voltage (Vf) was a low value of 2.3V. On the other hand, the reverse voltage when the reverse current was 10 μA was a high value exceeding 12V.
This is because a BP layer that effectively acts to alleviate the lattice mismatch with GaAs is used. In particular, since the ohmic electrode is provided on the BP layer having few defects due to the lattice misfit, the local withstand voltage is reduced. It has become effective to provide a light emitting device with less local breakdown.

It is a figure which shows the arrangement surface of a crystal | crystallization. It is a figure which shows the cross-section of a light emitting element.

Explanation of symbols

4... III-V group semiconductor layer, 5... BP layer, 10... Light emitting element, 11. Bonding surface, 100 ... substrate, 101 ... buffer layer, 102 ... lower clad layer, 103 ... light emitting layer, 104 ... upper clad layer, 105 ... GaP layer, 106 ... BP layer, 107 ... n-type ohmic electrode, 108 ... p-type ohmic electrode,

Claims (6)

  A compound semiconductor stacked structure including a heterojunction composed of a GaAs crystal plane and a monomeric boron phosphide crystal plane, wherein the heterojunction has a ratio of the number of planes between the GaAs crystal plane and the boron phosphide crystal plane of 5 pairs. A group III-V compound semiconductor multilayer structure comprising a region of 6.   The GaAs crystal plane forming the heterojunction is a crystal plane represented by {100}, {110} or {111} when a plane index (HKL) is expressed by a Miller index. The III-V compound semiconductor laminated structure as described in any one of.   3. The III-V compound semiconductor multilayer structure according to claim 1, wherein Miller indices of the GaAs crystal plane and the BP crystal plane forming the heterojunction are the same.   The light emitting element containing the III-V group compound semiconductor laminated structure of the said Claims 1-3. 5. The light emitting device according to claim 4 , comprising a BP layer of the III-V compound semiconductor multilayer structure as a current diffusion layer. 5. The light emitting device according to claim 4 , comprising a BP layer of the III-V compound semiconductor multilayer structure as a window layer.

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