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JP4887879B2 - Electronic component mounting structure and manufacturing method thereof - Google Patents
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JP4887879B2 - Electronic component mounting structure and manufacturing method thereof - Google Patents

Electronic component mounting structure and manufacturing method thereof Download PDF

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JP4887879B2
JP4887879B2 JP2006107100A JP2006107100A JP4887879B2 JP 4887879 B2 JP4887879 B2 JP 4887879B2 JP 2006107100 A JP2006107100 A JP 2006107100A JP 2006107100 A JP2006107100 A JP 2006107100A JP 4887879 B2 JP4887879 B2 JP 4887879B2
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electronic component
wiring board
resin
conductive particles
pad
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JP2007281269A (en
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明 大内
知宏 西山
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NEC Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

本発明は、電子部品の実装構造およびその製造方法に関し、特に導電性フィラーを含んだ樹脂組成物を使用して、電子部品の樹脂封止と電極間の接続とを一括して行なう電子部品の実装方法とこれにより製造された電子部品の実装構造に関するものである。   The present invention relates to a mounting structure of an electronic component and a method for manufacturing the same, and more particularly to an electronic component that collectively performs resin sealing of an electronic component and connection between electrodes using a resin composition containing a conductive filler. The present invention relates to a mounting method and a mounting structure of an electronic component manufactured thereby.

電子機器の急速な発達に伴い、半導体素子にはこれまで以上に高機能化が求められるようになってきている。半導体素子の多機能化に伴い半導体素子の入出力端子数は増加し、また半導体素子を高速動作させるための配線長は短縮化が求められている。こうした要求を実現するために開発された接続工法としてフリップチップ接続がある。フリップチップ接続は半導体素子の配線面にエリア状に接続パッドを設けることができるため多ピン化に適している。また、ワイヤボンディングやテープオートメイティッドボンディング(TAB)の様な他の半導体素子接続工法と比較し、引き出し線を必要としないため配線長の短縮化が可能である。   With the rapid development of electronic devices, semiconductor devices are required to have higher functionality than ever. As the number of multifunctional semiconductor elements increases, the number of input / output terminals of the semiconductor elements increases, and the wiring length for operating the semiconductor elements at high speed is required to be shortened. As a connection method developed to realize such a requirement, there is a flip chip connection. Flip chip connection is suitable for increasing the number of pins because connection pads can be provided in the form of areas on the wiring surface of a semiconductor element. In addition, compared with other semiconductor element connection methods such as wire bonding and tape automated bonding (TAB), the lead length is not required, so that the wiring length can be shortened.

以上のような理由から電子機器に用いられる半導体素子の実装には、フリップチップ接続を使用したものが増加している。
フリップチップに使用されるバンプ電極の材質としては、Auや半田等が用いられている。半田の材質の例としてはSn−Pb共晶はんだがあるが、Sn−Pb共晶はんだに限定されず、たとえばSn−Pb(共晶を除く)、Sn−Ag、Sn−Cu、Sn−Sb、Sn−Zn、Sn−Biおよびこれら前記した材料に特定の添加元素をさらに加えた材料を挙げることができ、これらが適宜用いられる(例えば、特許文献1参照)。
他のバンプ電極材質の例としては、導電性樹脂を使用したもの(例えば、特許文献2参照)や、金属ナノペーストを使用したもの(例えば、特許文献3参照)がある。
For the reasons described above, the number of semiconductor devices used in electronic devices using flip chip connection is increasing.
Au, solder, or the like is used as a material for the bump electrode used in the flip chip. Examples of the solder material include Sn-Pb eutectic solder, but are not limited to Sn-Pb eutectic solder. For example, Sn-Pb (excluding eutectic), Sn-Ag, Sn-Cu, Sn-Sb. , Sn—Zn, Sn—Bi, and materials obtained by further adding a specific additive element to the above-described materials can be used as appropriate (for example, see Patent Document 1).
Examples of other bump electrode materials include those using a conductive resin (for example, see Patent Document 2) and those using a metal nano paste (for example, see Patent Document 3).

一方、フリップチップ接続される半導体素子の多くは、半導体素子−配線基板間の熱膨張係数に差があり、これを緩和する必要があるため、接続部に封止樹脂とよばれる液状の封止剤を注入し硬化させることにより接続信頼性の確保が図られている。樹脂封止に用いられる材料にはエポキシ樹脂、シリコーン樹脂、フェノール樹脂、ジアリルフタレート樹脂、ポリイミド樹脂、アクリル樹脂、ウレタン樹脂等があるが、耐熱性、耐湿性、耐薬品性、接着性、コスト等の面で優れているエポキシ樹脂が広く使用されている。
半導体素子と配線基板の隙間をエポキシ樹脂で封止する方法として一般的なものは、毛細管現象を利用して半導体素子と配線基板の隙間に樹脂を充填するアンダーフィル充填があり、フリップチップの封止方法として、現在最も広く利用されている技術の一つである。
近年、アンダーフィル樹脂充填工程の削減による生産性向上を目的に、半導体素子を実装する前にあらかじめ、配線基板の半導体素子搭載エリアにエポキシ樹脂を塗布しておき、その後、半導体素子を実装することで電極間の接続と樹脂充填を同時に行なう先樹脂工法が利用されつつある。
先樹脂工法の課題は、あらかじめ塗布された樹脂を介して、半導体素子の電極と配線基板の電極を確実に接合することにあり、その手段も多様である。
先樹脂工法の中でも、導電性樹脂を使用する方法があり、この方法によれば前記した特許文献2や3のように、電極部分にのみ導電性樹脂を塗布する方法とは異なり、半導体素子搭載面全体に導電性樹脂を均一に塗布するにもかかわらず、目的とする電極部分のみ導通が得られるというものである。この工法の代表的な2つの例ついて、以下に概要を述べる。
On the other hand, many of the semiconductor elements to be flip-chip connected have a difference in the coefficient of thermal expansion between the semiconductor element and the wiring board, and it is necessary to mitigate this. The connection reliability is ensured by injecting and curing the agent. Materials used for resin sealing include epoxy resin, silicone resin, phenolic resin, diallyl phthalate resin, polyimide resin, acrylic resin, urethane resin, etc., but heat resistance, moisture resistance, chemical resistance, adhesion, cost, etc. Epoxy resin, which is superior in terms of the above, is widely used.
As a general method for sealing the gap between the semiconductor element and the wiring board with epoxy resin, there is underfill filling in which the gap between the semiconductor element and the wiring board is filled using a capillary phenomenon. It is one of the most widely used technologies as a stopping method.
In recent years, for the purpose of improving productivity by reducing the underfill resin filling process, before mounting a semiconductor element, an epoxy resin is applied to the semiconductor element mounting area of the wiring board, and then the semiconductor element is mounted. The tip resin construction method in which connection between electrodes and resin filling are simultaneously performed is being utilized.
The problem of the prior resin construction method is to reliably bond the electrodes of the semiconductor element and the electrodes of the wiring board through the resin applied in advance, and there are various means.
Among the prior resin methods, there is a method of using a conductive resin. According to this method, unlike the method of applying the conductive resin only to the electrode portion as described in Patent Documents 2 and 3, the semiconductor element mounting Despite uniformly applying the conductive resin to the entire surface, only the intended electrode portion can be conductive. An outline of two typical examples of this method is given below.

まず、1つめの例はエポキシ樹脂に導電性の粒子を充填し、この粒子を介して半導体素子のバンプ電極と配線基板の電極の目的とする箇所のみ電気的接続をさせる方法である。
まず、所定の電極パッドにバンプが形成された半導体素子を準備する。バンプの材質は金が一般的であり、バンプ形成方法はバンプボンダを用いて形成するスタッドバンプやメッキにより形成するメッキバンプ等がある。配線基板の電極パッドは銅配線の表面にニッケルメッキがされており、さらにその上に金メッキが形成されている。実装プロセスに関しては、まず、配線基板上に導電性粒子が添加されたエポキシ樹脂を塗布する。導電性粒子については、多種多様であるが、銅、銀、ニッケル等の金属粒子や樹脂粒子の周囲にニッケル、金等の金属メッキが施されているものが一般的である。次に、半導体素子を位置合わせし、所定の荷重と温度により、配線基板上に搭載する。この際、半導体素子のバンプと配線基板のパッドにはさまれた導電性粒子を介して導通が得られ、電極周囲に粒子が残るものの、隣接電極間でのショートには至らないため、目的としている半導体素子のバンプと配線基板のパッドのみの導通を得ることができる。さらに所定の荷重をかけながら、同時に加熱を行い、エポキシ樹脂を硬化させることにより、電極間の接続を保持することが可能となる。
First, a first example is a method in which epoxy resin is filled with conductive particles, and electrical connection is made only at intended portions of the bump electrode of the semiconductor element and the electrode of the wiring substrate through the particle.
First, a semiconductor element having a bump formed on a predetermined electrode pad is prepared. The material of the bump is generally gold, and the bump formation method includes a stud bump formed using a bump bonder, a plated bump formed by plating, or the like. The electrode pads of the wiring board have nickel plating on the surface of the copper wiring, and further gold plating is formed thereon. Regarding the mounting process, first, an epoxy resin to which conductive particles are added is applied onto the wiring board. Although there are a wide variety of conductive particles, metal particles such as copper, silver, nickel, etc. and metal particles such as nickel, gold, etc. are generally provided around resin particles. Next, the semiconductor element is aligned and mounted on the wiring board with a predetermined load and temperature. At this time, conduction is obtained through conductive particles sandwiched between the bumps of the semiconductor element and the pads of the wiring board, and particles remain around the electrodes, but the short circuit between the adjacent electrodes does not occur. It is possible to obtain conduction only between the bumps of the semiconductor element and the pads of the wiring board. Furthermore, it is possible to maintain the connection between the electrodes by simultaneously heating and applying the predetermined load to cure the epoxy resin.

2つめの例としては、導電粒子に半田等の低温溶融性の金属粒子を用いることで、金属粒子同士の濡れを利用し、電極部分に金属粒子の溶融集合体が形成されることで接続を行なう方法が挙げられる。この方法を用いれば、半導体素子や配線基板電極にバンプを形成しないため、バンプ電極形成工程とアンダーフィル樹脂充填工程の両方の工程を削減することができ、生産性やコストの面で非常に有利である。まず、半田材料には、Sn、Zn、In、Bi等の合金を用いている。この場合、接着剤となるエポキシ樹脂には、半田粒子表面の酸化膜を除去するフラックス作用を有する酸が添加される。実装プロセスに関しては、まず、配線基板上に導電性粒子およびフラックス剤等が添加されたエポキシ樹脂を塗布し、半導体素子を位置合わせして搭載する。この状態から導電性粒子が溶融する温度に加熱することにより、金属粒子同士の濡れを利用し、電極部分に導電性粒子の溶融集合体が形成されることで接続を行なう(例えば、特許文献4参照)。
特開2004−153141号公報 特開2000−244090号公報 特開2004−327908号公報 特許第2807940号公報
As a second example, by using low melting metal particles such as solder as conductive particles, wetting between metal particles is utilized, and a fusion aggregate of metal particles is formed on the electrode portion to establish a connection. The method of performing is mentioned. If this method is used, bumps are not formed on semiconductor elements or wiring board electrodes, so both the bump electrode formation process and the underfill resin filling process can be reduced, which is extremely advantageous in terms of productivity and cost. It is. First, an alloy such as Sn, Zn, In, or Bi is used as the solder material. In this case, an acid having a flux action for removing the oxide film on the surface of the solder particles is added to the epoxy resin as the adhesive. Regarding the mounting process, first, an epoxy resin to which conductive particles, a fluxing agent, and the like are added is applied onto a wiring board, and the semiconductor element is aligned and mounted. By heating to a temperature at which the conductive particles are melted from this state, connection is performed by utilizing the wetness of the metal particles and forming a molten aggregate of the conductive particles at the electrode portion (for example, Patent Document 4). reference).
JP 2004-153141 A JP 2000-244090 A JP 2004-327908 A Japanese Patent No. 2807940

前記した1つめの従来例の場合、導電性粒子が一様に分散しているので、全ての電極に確実に導電性粒子をはさみ込ませて、安定した導通を得ようとした場合、所定量の導電性粒子を添加する必要があるが、電極部分の面積と他の面積の比で考えると、他の面積の割合の方が高いため、導通に関与しない、つまり電極間に点在する導電性粒子の方が多くなる。これは導電性粒子を過剰添加することによるコストアップにつながるのみでなく、更なる微細ピッチ化が進んだ場合、電極間に点在する粒子の影響で絶縁不良に至る可能性が高くなる。
上述した2つめの従来例の場合、電極パッド近傍の導電粒子は狙い通り電極パッドに濡れ集まるが、電極パッドから離れている導電粒子はその近傍の粒子と一体化して大きくなることはあっても、電極部に接続される粒子と一体化せず、電極間に残ったままとなる。従って、全ての電極を確実に接続しようとした場合、接続に関与しない残留粒子の分も見越した形で余分な導電粒子を添加する必要があり、材料のコストアップになるばかりでなく、導電粒子の添加量が多いと電極間に残留する導電粒子の量が多くなり、電極間ショートに至る問題がある。また導電粒子の量が少ないと電極に濡れて形成される半田等の導電物質の量も少なくなるため、半導体素子と配線基板間を接続するに十分な導電物質の量を確保できなくなり、安定接続が出来ない。つまり、電極間の安定した接続を確保しつつ、電極間ショートのない接続を得ることが困難であるという問題がある。
In the case of the first conventional example described above, since the conductive particles are uniformly dispersed, a predetermined amount is obtained when the conductive particles are surely sandwiched between all the electrodes to obtain stable conduction. However, considering the ratio of the area of the electrode part to the other area, the ratio of the other area is higher, so it is not involved in conduction, that is, the conductivity scattered between the electrodes. There are more sex particles. This not only leads to an increase in cost due to excessive addition of conductive particles, but also increases the possibility of insulation failure due to the influence of particles scattered between the electrodes when the fine pitch is further advanced.
In the case of the second conventional example described above, the conductive particles in the vicinity of the electrode pad wet and collect on the electrode pad as intended, but the conductive particles away from the electrode pad may be integrated and enlarged with the particles in the vicinity. It does not integrate with the particles connected to the electrode part, and remains between the electrodes. Therefore, when all the electrodes are to be connected securely, it is necessary to add extra conductive particles in anticipation of the residual particles not involved in the connection, which not only increases the cost of the material, but also the conductive particles If the amount of the additive added is large, the amount of conductive particles remaining between the electrodes increases, resulting in a problem of short-circuiting between the electrodes. In addition, if the amount of conductive particles is small, the amount of conductive material such as solder that is formed by wetting the electrodes also decreases, so it is not possible to secure a sufficient amount of conductive material to connect between the semiconductor element and the wiring board. I can not. That is, there is a problem that it is difficult to obtain a connection without a short circuit between electrodes while securing a stable connection between the electrodes.

以上述べたように、導電粒子を添加した樹脂を用いた先樹脂工法に関しては、添加した導電粒子が溶融するまたはしないにかかわらず、一様に分散した導電粒子を電極部に選択的に集めることが重要な課題であり、従来技術にはこの点を考慮した構造、方法等に関する開示は見られない。
本発明の課題は上述した従来技術の問題点を解決することであって、その目的は、導電粒子を添加した樹脂を用いた先樹脂工法において、一様に分散した導電粒子を電極部に選択的に集めることが可能となる電子部品の実装構造およびその製造方法を提供することである。
As described above, regarding the pre-resin method using a resin to which conductive particles are added, regardless of whether the added conductive particles melt or not, the uniformly dispersed conductive particles are selectively collected in the electrode part. Is an important issue, and there is no disclosure in the prior art regarding structures, methods, etc. in consideration of this point.
The object of the present invention is to solve the above-mentioned problems of the prior art, and its purpose is to select uniformly dispersed conductive particles as an electrode part in a prior resin method using a resin to which conductive particles are added. It is to provide a mounting structure of electronic parts and a method for manufacturing the same, which can be collected in an integrated manner.

上記の目的を達成するため、本発明によれば、電子部品の電極と配線基板のパッドとを導電粒子と樹脂とを含む導電性ペーストを用いて接続した電子部品の実装構造において、前記配線基板のパッドの周囲全体がソルダーレジストに囲まれており、隣接するパッド間において前記ソルダーレジストの断面形状が概略台形をなしており、その台形の底辺の長さaが上辺の長さbの3倍以上(a≧3b)であり、かつ、前記電子部品は前記配線基板と前記電子部品との隙間に充填された前記樹脂により封止されていることを特徴とする電子部品の実装構造、が提供される。
なお、本発明において実装される電子部品は、ベアチップ、バンプを有するフリップチップ、BGA(ball grid array)、CSP(chip scale package)等を含むものである。
そして、好ましくは、前記電子部品と前記配線基板との間の隙間は樹脂により充填されている。また、好ましくは、前記配線基板のパッドを囲むソルダーレジストの側面は、すり鉢状の形状をなしている。
To achieve the above object, according to the present invention, in an electronic component mounting structure in which an electrode of an electronic component and a pad of the wiring substrate are connected using a conductive paste containing conductive particles and a resin, the wiring substrate The entire periphery of the pad is surrounded by a solder resist, and the cross-sectional shape of the solder resist is substantially trapezoidal between adjacent pads, and the length a of the base of the trapezoid is three times the length b of the upper side. Provided is a mounting structure for an electronic component, wherein (a ≧ 3b) and the electronic component is sealed with the resin filled in a gap between the wiring board and the electronic component Is done.
The electronic component mounted in the present invention includes a bare chip, a flip chip having a bump, a BGA (ball grid array), a CSP (chip scale package), and the like.
Preferably, a gap between the electronic component and the wiring board is filled with resin. Preferably, the side surface of the solder resist surrounding the pad of the wiring board has a mortar shape.

また、上記の目的を達成するため、本発明によれば、配線基板上の隣接するパッド間において、パッドの周囲全体を囲むソルダーレジストの断面形状が概略台形をなしており、その台形の底辺の長さaが上辺の長さbの3倍以上(a≧3b)となるように、形成する工程と、樹脂と導電粒子とを含む導電性ペーストを前記パッド上に供給する工程と、電子部品を、該電子部品の電極を前記配線基板のパッド上に位置合わせして、前記配線基板上に搭載する工程と、前記導電性ペーストの樹脂を硬化させて前記電子部品の電極と前記配線基板のパッドとを電気的に接続すると共に前記電子部品を前記樹脂にて封止する工程と、を含む電子部品の実装方法、が提供される。
そして、望ましくは、前記配線基板上に導電ペーストを供給した後、前記電子部品を前記配線基板上に搭載する工程に先立って、前記配線基板に基板平面方向に振動を加える。また、望ましくは、前記配線基板を加熱しながら振動を加える。一層、望ましくは、振動の振動数が1Hz以上である。

In order to achieve the above object, according to the present invention, the cross-sectional shape of the solder resist surrounding the entire periphery of the pad between the adjacent pads on the wiring board is substantially trapezoidal, and the bottom of the trapezoid is A step of forming the length a so that it is at least three times the length b of the upper side (a ≧ 3b) , a step of supplying a conductive paste containing a resin and conductive particles onto the pad, and an electronic component Aligning the electrode of the electronic component on the pad of the wiring board and mounting the electrode on the wiring board; and curing the resin of the conductive paste to form the electrode of the electronic component and the wiring board There is provided a method for mounting an electronic component, the method including electrically connecting a pad and sealing the electronic component with the resin.
Preferably, after supplying a conductive paste on the wiring board, a vibration is applied to the wiring board in a plane direction of the board prior to the step of mounting the electronic component on the wiring board. Desirably, vibration is applied while heating the wiring board. More preferably, the frequency of vibration is 1 Hz or more.

導電粒子を添加した樹脂を用いた先樹脂工法によるフリップチップ実装において、配線基板上のパッド周囲に形成されているソルダーレジストがすり鉢状になっており、パッド間に形成されたソルダーレジストの断面形状が概略三角形(頂角が丸められた場合を含む)であるか概略台形である。台形である場合、台形の底辺の長さaが上辺の長さbの3倍以上(a≧3b)である。ソルダーレジストがこのような形状に形成されていると、導電粒子と樹脂の比重の差から沈殿した導電粒子がソルダーレジストの斜面(すり鉢状側面部)に達しやすくなり、そしてソルダーレジストの斜面に沿って滑り落ちることにより、すり鉢形状の底面にある配線基板のパッド上ないしその近傍に集まるようになる。さらにその効果を高める実装方法として、配線基板上に導電粒子を添加した樹脂を塗布した後、基板平面方向に振動させることにより、台形の上辺に当たるソルダーレジストの平坦部に残ったわずかな導電粒子に関しても、強制的にすり鉢形状部に落としこみ、パッド部に集めることが可能となる。その結果、導電粒子を用いたフリップチップ実装の安定接続が可能になって、品質が向上すると共に必要最低限の導電粒子のみを添加すればよいため、材料費を削減することが可能となる。また、パッド部上以外に残存する導電粒子数が非常に少なくなるため封止樹脂の絶縁性を高く維持することが可能になる。   In flip chip mounting using a resin-added resin-added resin chip method, the solder resist formed around the pads on the wiring board has a mortar shape, and the cross-sectional shape of the solder resist formed between the pads Is an approximate triangle (including the case where the apex angle is rounded) or an approximate trapezoid. In the case of a trapezoid, the length a of the base of the trapezoid is at least three times the length b of the upper side (a ≧ 3b). When the solder resist is formed in such a shape, the conductive particles precipitated due to the difference in specific gravity between the conductive particles and the resin can easily reach the slope of the solder resist (the mortar-shaped side surface), and along the slope of the solder resist. As a result of sliding down, they gather on or near the pads of the wiring board on the bottom of the mortar shape. As a mounting method that further enhances the effect, after applying a resin added with conductive particles on the wiring board, it is vibrated in the plane direction of the board, so that only a few conductive particles remain on the flat part of the solder resist corresponding to the upper side of the trapezoid. Can be forcibly dropped into the mortar-shaped part and collected in the pad part. As a result, flip chip mounting using conductive particles can be stably connected, quality can be improved, and only the minimum necessary conductive particles need be added, so that material costs can be reduced. In addition, since the number of conductive particles remaining on the portion other than the pad portion is very small, the insulating property of the sealing resin can be maintained high.

次に、本発明の好ましい実施の形態ついて、図面を参照して詳細に説明する。
〔第1の実施の形態〕
図1は、本発明の第1の実施の形態を示す工程順の部分断面図である。本実施の形態は、半導体チップの電極上にバンプが形成されており、かつ樹脂に添加されている導電粒子が溶融しない場合に係る。
まず、配線並びに所定の位置にパッド2が形成された配線基板1上に、パッド2を露出させたソルダーレジスト3を形成する。配線基板1のパッド2の一例としては銅配線の表面にニッケルメッキが形成されており、さらにその上に金メッキが施されている。
ソルダーレジスト3については、熱硬化型、UV硬化型、現像型等の種類があり、材質や製造方法について特に限定する必要はないが、配線基板側のパッド2の周囲の形状がパッドを底面としたすり鉢状(倒立角錐台形状ないし倒立円錐台形状)になっている必要がある。すり鉢状の面形状としては、一定の角度のテーパ面でも一定の曲面でも自由曲面でもよく、これらを複合した面でもよい(本実施の形態では一定の角度のテーパ面)。
図2は、配線基板上にソルダーレジスト3を形成した状態を示す図であって、図2(a)は平面図、図2(b)は図2(a)のA−A線での断面図である。ソルダーレジスト3の上面部3aは格子状に形成されており、側面部3bは傾斜面をなしている。図2(b)に示されるように、パッド2間においてソルダーレジスト3の断面形状は台形になっている。ここでの断面形状が台形となっている場合、本発明においては、台形の底辺の長さaは、上辺の長さbの3倍以上(a≧3b)になされる。パッド間のソルダーレジストの断面形状は必ずしも台形である必要はなく、三角形ないし頂角が丸められた三角形であってもよい。このように配線基板側のパッド2の周囲の形状をすり鉢状とすることで、この部分に沈殿した導電粒子は、この部分の傾斜の効果と重力の影響により、必然的にパッド部分に集められる。従って、パッド2間のソルダーレジストの上端部は平坦面が存在しない方が、すなわち断面形状が三角形ないし頂角が丸められた三角形となっていた方が、パッド部に導電粒子に集める上で望ましい。このような形状の場合、導電粒子が残留する平坦部が存在しないため、ほとんど全ての粒子をパッド2に集めることが可能となる。平坦部がある場合、すなわちすなわち断面形状が台形の場合は、上記の関係(a≧3b)を満たした場合、パッド寸法がピッチの約半分程度であると仮定すると、この関係を満たすことで、パッド部分の面積およびすり鉢状部分の面積の合計は8割程度を占めることとなり、大部分の粒子を電極パッドに集めることが可能となる。よって、本発明によると。電極−パッド間の接続性(導電性)を向上させ、パッド間の絶縁性(ショート防止効果)を大幅に高めることができる。ソルダーレジストの形状をこのような形に形成する方法としては、各種のソルダーレジストにより異なるが、一例をあげると、熱硬化型ソルダーレジストを使用し、基板表面に塗布されたソルダーレジストが半硬化の状態で、目的とする形状の金型を押し付けて本硬化させることで形成することができる。また、感光性の材料を用い、傾斜部を形成する領域での光透過率が形成すべきソルダーレジストの膜厚に応じて変化するマスクを用いて露光をする方法であってもよいが、形成方法については、これらに限定されない。
Next, preferred embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]
FIG. 1 is a partial sectional view in the order of steps showing a first embodiment of the present invention. The present embodiment relates to the case where bumps are formed on the electrodes of the semiconductor chip and the conductive particles added to the resin do not melt.
First, a solder resist 3 exposing the pads 2 is formed on the wiring substrate 1 on which the pads 2 are formed at predetermined positions. As an example of the pad 2 of the wiring board 1, nickel plating is formed on the surface of the copper wiring, and further gold plating is applied thereon.
There are various types of solder resists 3 such as a thermosetting type, a UV curable type, and a developing type, and it is not necessary to particularly limit the material and the manufacturing method. It must be shaped like a mortar (inverted truncated pyramid shape or inverted truncated cone shape). The mortar-shaped surface shape may be a taper surface having a constant angle, a constant curved surface, a free-form surface, or a surface obtained by combining these (in this embodiment, a taper surface having a constant angle).
2A and 2B are views showing a state in which the solder resist 3 is formed on the wiring board, in which FIG. 2A is a plan view, and FIG. 2B is a cross-sectional view taken along the line AA in FIG. FIG. The upper surface portion 3a of the solder resist 3 is formed in a lattice shape, and the side surface portion 3b forms an inclined surface. As shown in FIG. 2B, the cross-sectional shape of the solder resist 3 between the pads 2 is a trapezoid. When the cross-sectional shape here is a trapezoid, in the present invention, the length a of the base of the trapezoid is at least three times the length b of the upper side (a ≧ 3b). The cross-sectional shape of the solder resist between the pads is not necessarily a trapezoid, and may be a triangle or a triangle with a rounded apex. Thus, by making the shape of the periphery of the pad 2 on the wiring board side into a mortar shape, the conductive particles precipitated in this portion are inevitably collected in the pad portion due to the effect of the inclination of this portion and the influence of gravity. . Therefore, it is desirable that the upper end portion of the solder resist between the pads 2 does not have a flat surface, that is, that the cross-sectional shape is a triangle or a triangle whose apex angle is rounded, in order to collect the conductive particles on the pad portion. . In the case of such a shape, since there is no flat portion where conductive particles remain, almost all particles can be collected in the pad 2. When there is a flat portion, that is, when the cross-sectional shape is a trapezoid, when the above relationship (a ≧ 3b) is satisfied, assuming that the pad size is about half of the pitch, by satisfying this relationship, The total of the area of the pad portion and the area of the mortar-like portion occupies about 80%, and most particles can be collected on the electrode pad. Thus, according to the present invention. The connectivity between the electrode and the pad (conductivity) can be improved, and the insulation between the pads (short-circuit prevention effect) can be greatly enhanced. The method for forming the solder resist shape into such a shape varies depending on various types of solder resists. For example, a thermosetting solder resist is used, and the solder resist applied to the substrate surface is semi-cured. In this state, it can be formed by pressing a mold having a desired shape and carrying out main curing. Alternatively, a method may be used in which exposure is performed using a photosensitive material and a mask in which the light transmittance in the region where the inclined portion is to be formed changes according to the thickness of the solder resist to be formed. The method is not limited to these.

配線基板上にソルダーレジスト3を形成した後、配線基板のパッド2上に、樹脂4に導電粒子5を添加してなる導電性ペースト6を供給する。導電性ペーストの母材となる樹脂4の材料は、特に限定されるものではなく、アクリル樹脂、メラミン樹脂、エポキシ樹脂、ポリオレフィン樹脂、ポリウレタン樹脂、ポリカーボネート樹脂、ポリスチレン樹脂、ポリエーテル樹脂、ポリアミド樹脂、ポリイミド樹脂、フッ素樹脂、ポリエステル樹脂、フェノール樹脂、フルオレン樹脂、ベンゾシクロブテン樹脂、シリコーン樹脂等様々な材料が利用可能であるが、これらを1種あるいは2種以上組み合わせて用いることもできる。しかし、粘度、コスト、耐熱性等の面に優れるエポキシ樹脂が有利に用いられる。樹脂は、25℃の室温において液状であることが望ましい。樹脂には接続信頼性確保に必要な樹脂物性を得る等の目的で無機フィラー、例えばシリカ等を添加してもよい。   After the solder resist 3 is formed on the wiring board, a conductive paste 6 obtained by adding conductive particles 5 to the resin 4 is supplied onto the pads 2 of the wiring board. The material of the resin 4 serving as a base material of the conductive paste is not particularly limited, and is an acrylic resin, melamine resin, epoxy resin, polyolefin resin, polyurethane resin, polycarbonate resin, polystyrene resin, polyether resin, polyamide resin, Various materials such as a polyimide resin, a fluorine resin, a polyester resin, a phenol resin, a fluorene resin, a benzocyclobutene resin, and a silicone resin can be used, but these may be used alone or in combination of two or more. However, an epoxy resin excellent in terms of viscosity, cost, heat resistance, etc. is advantageously used. The resin is desirably liquid at room temperature of 25 ° C. An inorganic filler such as silica may be added to the resin for the purpose of obtaining resin properties necessary for ensuring connection reliability.

樹脂4に添加されている導電粒子5は、多種多様なものが利用可能であり、銅、銀、ニッケル等の金属粒子や樹脂粒子の周囲にニッケル、金等の金属メッキが施されているものであってよい。本発明に使用する導電粒子として適したものは、樹脂4より比重が大きく、配線基板1の表面に導電性ペーストを塗布した際、導電粒子が沈殿することが望ましい。この点を考慮すると導電粒子は金属粒子であることが望ましい。粒子径は実装される半導体素子の電極ピッチ等によって異なるため一概にはいえないが、3〜5μm程度が一般的である。導電粒子には一部ナノ粒子が含まれていてもよい。   A wide variety of conductive particles 5 added to the resin 4 can be used, and metal particles such as copper, silver and nickel, and metal plating such as nickel and gold around the resin particles. It may be. What is suitable as the conductive particles used in the present invention has a specific gravity greater than that of the resin 4, and when the conductive paste is applied to the surface of the wiring substrate 1, it is desirable that the conductive particles precipitate. Considering this point, the conductive particles are desirably metal particles. The particle size varies depending on the electrode pitch of the semiconductor element to be mounted and cannot be generally specified, but is generally about 3 to 5 μm. The conductive particles may partially include nanoparticles.

導電性ペースト塗布の方法はディスペンサーを用いてもよいし、スクリーン印刷などの印刷法によって所定の箇所に導電性ペーストを供給してもよく、その方法は特に限定されない。導電性ペースト6の塗布当初、導電粒子5は樹脂4中に均等に分散しているが、導電粒子5は樹脂4より比重が大きいため、重力の影響で沈殿し、やがて図1(a)に示すように、導電粒子5はパッド2上とソルダーレジスト3の平坦部上に堆積する。この場合に、導電粒子5の沈降を促進するために、配線基板1に垂直方向の振動を印加してもよい。さらに、ソルダーレジスト3の平坦部に残った導電粒子をパッド2に落とし込むために、配線基板に基板平面方向に振動を加える〔図1(b)〕。このときの条件として、振幅はソルダーレジスト3の平坦部長さb以上であり、振動数は1Hz以上であることが望ましい。この際に導電粒子の沈降、滑落のしやすさは、樹脂4の粘度に依存するため、基板を加熱して樹脂4の粘度を低下させてから、振動させるとさらに効果的である。水平方向振動によりソルダーレジスト3の平坦部に残っていた導電粒子はソルダーレジスト3のすり鉢状部に落ち込み、大多数の導電粒子5はパッド2上ないしその近傍に集合する〔図1(c)〕。   As a method for applying the conductive paste, a dispenser may be used, or the conductive paste may be supplied to a predetermined location by a printing method such as screen printing, and the method is not particularly limited. At the beginning of application of the conductive paste 6, the conductive particles 5 are evenly dispersed in the resin 4. However, since the conductive particles 5 have a higher specific gravity than the resin 4, the conductive particles 5 settle out due to the influence of gravity, and eventually in FIG. As shown, the conductive particles 5 are deposited on the pad 2 and on the flat portion of the solder resist 3. In this case, a vertical vibration may be applied to the wiring board 1 in order to promote the sedimentation of the conductive particles 5. Further, in order to drop the conductive particles remaining on the flat portion of the solder resist 3 onto the pad 2, vibration is applied to the wiring substrate in the direction of the substrate plane (FIG. 1B). As a condition at this time, it is desirable that the amplitude is not less than the flat portion length b of the solder resist 3 and the frequency is not less than 1 Hz. At this time, since the ease of sedimentation and sliding of the conductive particles depends on the viscosity of the resin 4, it is more effective to vibrate after the substrate is heated to lower the viscosity of the resin 4. The conductive particles remaining on the flat portion of the solder resist 3 due to the horizontal vibration fall into the mortar-shaped portion of the solder resist 3, and the majority of the conductive particles 5 gather on or near the pad 2 [FIG. 1 (c)]. .

次に、電極8上に所定の高さのバンプ9が形成された半導体チップ7をフリップチップマウンタ等を使用して、配線基板1の所定位置に位置合わせし、搭載する。バンプ9の材質は金が一般的であり、バンプ形成方法はバンプボンダを用いて形成するスタッドバンプやメッキにより形成するメッキバンプ等があるが、バンプ材質及び形成方法については、これに限るものではない。半導体チップ7の搭載後、荷重を加えつつ所定の加熱を行って樹脂を硬化させる〔図1(d)〕。ここで加えられた荷重により、導電粒子5は半導体チップ側のバンプ9と配線基板側のパッド2に挟み込まれて両者に接触し、半導体チップと配線基板間の導通が得られる。加熱温度と加熱時間に関しては、樹脂4の硬化特性に合わせて設定し、樹脂が硬化するまで、加熱と荷重をかけ続ける。樹脂の硬化が終了すれば、電極部分に集まった導電粒子5の接触を樹脂4が保持することにより、接続信頼性が確保される。また、配線基板−半導体チップ間の硬化した樹脂4はアンダーフィルとしての機能を果たす。   Next, the semiconductor chip 7 on which the bumps 9 having a predetermined height are formed on the electrodes 8 is aligned and mounted at a predetermined position on the wiring board 1 using a flip chip mounter or the like. The material of the bump 9 is generally gold, and the bump forming method includes a stud bump formed using a bump bonder and a plated bump formed by plating, but the bump material and the forming method are not limited thereto. . After the semiconductor chip 7 is mounted, the resin is cured by applying predetermined heat while applying a load [FIG. 1 (d)]. Due to the load applied here, the conductive particles 5 are sandwiched between the bumps 9 on the semiconductor chip side and the pads 2 on the wiring board side and contact with each other, and conduction between the semiconductor chip and the wiring board is obtained. The heating temperature and the heating time are set according to the curing characteristics of the resin 4, and heating and a load are continuously applied until the resin is cured. When the curing of the resin is completed, the resin 4 holds the contact of the conductive particles 5 gathered at the electrode portion, thereby ensuring connection reliability. Further, the cured resin 4 between the wiring board and the semiconductor chip functions as an underfill.

〔第2の実施の形態〕
次に、本発明の第2の実施の形態として、半導体チップにバンプが形成されてなく、かつ樹脂に添加されている導電性粒子が溶融する場合の例を、工程順の部分断面図である図3を参照して詳細に説明する。
まず、配線並びに所定の位置にパッド2が形成された配線基板1上に、パッド2を露出させたソルダーレジスト3を形成する。配線基板1のパッド2の一例としては銅配線の表面にニッケルメッキが形成されており、さらにその上に金メッキが施されている。ソルダーレジスト3の形成方法およびパターンは第1の実施の形態と同様であって、ソルダーレジストの形成された状態は図2に示した通りである。
[Second Embodiment]
Next, as a second embodiment of the present invention, the semiconductor chip is not formed with bumps, and an example in which the conductive particles added to the resin are melted is a partial cross-sectional view in the order of steps. This will be described in detail with reference to FIG.
First, a solder resist 3 exposing the pads 2 is formed on the wiring substrate 1 on which the pads 2 are formed at predetermined positions. As an example of the pad 2 of the wiring board 1, nickel plating is formed on the surface of the copper wiring, and further gold plating is applied thereon. The formation method and pattern of the solder resist 3 are the same as those in the first embodiment, and the state in which the solder resist is formed is as shown in FIG.

配線基板上にソルダーレジスト3を形成した後、配線基板のパッド2上に、樹脂4に導電粒子5添加してなる導電性ペースト6を供給する。導電性ペーストの母材となる樹脂材料は、第1の実施の形態の場合と同様である。さらに樹脂4には、酸化膜除去作用を付与するフラックス剤(例えば、有機酸など)を添加することができる。樹脂の硬化反応時に酸化膜除去作用を発現する剤を使用することにより、はんだ酸化膜を除去して導電粒子同士を濡れ不良なく接続でき、また特に酸化が進行しやすいCu製電極や Cu製パッドを使用する場合であっても電極・パッドと導電粒子を濡れ不良なく接続できる。また、樹脂4の硬化特性は導電粒子5が溶ける温度においても所定の時間極端な粘度上昇が発生せず、導電粒子の濡れを妨げない粘度を維持しなくてはならない。   After the solder resist 3 is formed on the wiring board, a conductive paste 6 obtained by adding conductive particles 5 to the resin 4 is supplied onto the pads 2 of the wiring board. The resin material used as the base material of the conductive paste is the same as that in the first embodiment. Furthermore, a flux agent (for example, an organic acid) that imparts an oxide film removing action can be added to the resin 4. By using an agent that exhibits an oxide film removal action during the resin curing reaction, it is possible to remove the solder oxide film and connect the conductive particles to each other without poor wetting, and Cu electrodes and Cu pads that are particularly prone to oxidation Even when using the electrode, the electrode / pad and the conductive particles can be connected without poor wetting. In addition, the curing characteristics of the resin 4 must maintain a viscosity that does not prevent an excessive increase in viscosity for a predetermined time even at a temperature at which the conductive particles 5 melt, and does not prevent wetting of the conductive particles.

樹脂4に添加されている導電粒子5はSn、Zn、In、Bi、Ag等の合金を使用する。これら導電粒子の添加量に関しては、50〜85重量%が望ましい。粒子径に関しては、対象となる半導体素子の電極ピッチによって変わってくるが、30μm以下の粒子を用いることが望ましく、ナノ粒子を含めた微細な粒子等、さまざまな径の粒子を混合させてもよい。また、Cu、Ag、Ni等の単体金属からなる導電粒子を混入させてもよい。
導電性ペースト6の塗布当初、導電粒子5は樹脂4中に均等に分散しているが、導電粒子5は樹脂4より比重が大きいため、重力の影響で沈殿し、やがて導電粒子5はパッド2上とソルダーレジスト3の平坦部上に堆積する。この状態で、ソルダーレジスト3の平坦部に残った導電粒子をパッド2上に落とし込むために、配線基板に基板平面方向に振動を加える〔図3(a)〕。このときの条件は、上述の第1の実施の形態の場合と同様である。これにより、ソルダーレジスト3の平坦部に残っていた導電粒子はソルダーレジスト3のすり鉢状部に落ち込み、大多数の導電粒子5はパッド2上ないしその近傍に集合する〔図3(b)〕。
The conductive particles 5 added to the resin 4 use an alloy such as Sn, Zn, In, Bi, or Ag. The amount of the conductive particles added is preferably 50 to 85% by weight. Although the particle diameter varies depending on the electrode pitch of the target semiconductor element, it is desirable to use particles of 30 μm or less, and particles of various diameters such as fine particles including nanoparticles may be mixed. . Moreover, you may mix the electroconductive particle which consists of single metals, such as Cu, Ag, and Ni.
At the beginning of application of the conductive paste 6, the conductive particles 5 are evenly dispersed in the resin 4. However, since the conductive particles 5 have a higher specific gravity than the resin 4, the conductive particles 5 settle out due to the influence of gravity. Deposit on top and on the flat part of the solder resist 3. In this state, in order to drop the conductive particles remaining on the flat portion of the solder resist 3 onto the pad 2, vibration is applied to the wiring board in the direction of the substrate plane (FIG. 3A). The conditions at this time are the same as those in the first embodiment described above. As a result, the conductive particles remaining on the flat portion of the solder resist 3 fall into the mortar-shaped portion of the solder resist 3, and the majority of the conductive particles 5 gather on or near the pad 2 [FIG. 3 (b)].

次に、電極8を有する半導体チップ7をフリップチップマウンタ等を使用して配線基板1上に位置合わせして搭載する〔図3(c)〕。電極8の材質については、銅やニッケルの表面に金がコーティングされたものが一般的であるが、これに限るものではない。但し、はんだ濡れ性に優れた材料である必要がある。その後、導電粒子5が溶融する温度まで加熱することで、導電粒子5はパッド2や導電粒子同士で濡れて大きな粒子となり、最終的には配線基板側のパッド2と半導体チップ側の電極8を接続する一つの導電体となることで、半導体チップ7と配線基板1の電気的接続を行なうバンプ10が形成される〔図3(d)〕。このときの加熱方法は、半導体チップ7を搭載する際に使用したマウンタのヒータを使用してもよいし、所定の温度プロファイルに設定されたリフロー炉にて加熱してもよい。樹脂4の硬化については、半導体チップ7と配線基板1の電気的接続を行なった後、所定の温度に調整されたオーブン等にて硬化し、完成する。   Next, the semiconductor chip 7 having the electrodes 8 is positioned and mounted on the wiring board 1 using a flip chip mounter or the like [FIG. 3 (c)]. The material of the electrode 8 is generally a copper or nickel surface coated with gold, but is not limited thereto. However, the material must be excellent in solder wettability. Thereafter, by heating to a temperature at which the conductive particles 5 melt, the conductive particles 5 are wetted by the pads 2 and the conductive particles to become large particles, and finally the pads 2 on the wiring board side and the electrodes 8 on the semiconductor chip side are formed. By forming a single conductor to be connected, bumps 10 for electrically connecting the semiconductor chip 7 and the wiring substrate 1 are formed [FIG. 3D]. As a heating method at this time, a heater of a mounter used when mounting the semiconductor chip 7 may be used, or heating may be performed in a reflow furnace set to a predetermined temperature profile. The resin 4 is cured by electrically connecting the semiconductor chip 7 and the wiring board 1 and then curing in an oven or the like adjusted to a predetermined temperature.

〔第3の実施の形態〕
図4は、本発明の第3の実施の形態を示す工程順の部分断面図である。本実施の形態は、はんだボールを外部接続端子として有するBGA、CSP等の半導体装置を配線基板上に搭載する例に係る。
まず、配線並びに所定の位置にパッド2が形成された配線基板1上に、パッド2を露出させたソルダーレジスト3を形成する。ソルダーレジスト3の形成された状態を図5に示す。図4は、図5のB−B線断面での工程を示す図である。図2に示した例ではソルダーレジストのパッドを囲む空間は倒立角錐台形状となっていたが、本実施の形態の場合にはより円錐台に近い形状となっている。但し、ソルダーレジスト3のB−B線断面での台形では、台形の底辺の長さaは、上辺の長さbの3倍以上(a≧3b)になされている。
[Third Embodiment]
FIG. 4 is a partial cross-sectional view in the order of steps showing a third embodiment of the present invention. This embodiment relates to an example in which a semiconductor device such as a BGA or a CSP having solder balls as external connection terminals is mounted on a wiring board.
First, a solder resist 3 exposing the pads 2 is formed on the wiring substrate 1 on which the pads 2 are formed at predetermined positions. The state in which the solder resist 3 is formed is shown in FIG. FIG. 4 is a diagram showing a process in a cross section taken along line BB in FIG. In the example shown in FIG. 2, the space surrounding the solder resist pad has an inverted truncated pyramid shape, but in the case of the present embodiment, it has a shape closer to a truncated cone. However, in the trapezoidal shape of the solder resist 3 taken along the line B-B, the length a of the base of the trapezoid is not less than three times the length b of the upper side (a ≧ 3b).

配線基板上にソルダーレジスト3を形成した後、配線基板のパッド2上に、樹脂4に導電粒子5添加してなる導電性ペースト6を供給する。導電性ペーストに含まれる導電粒子5は、第1の実施の形態の場合と同様であるが、樹脂4としては、半導体装置のはんだボールの溶融温度より低い温度で硬化する材料が用いられている。導電性ペースト6の供給後、加熱しつつ配線基板1に縦および横方向振動を加えることによって、導電粒子5の大部分は、パッド2上ないしその近傍に集まる〔図4(a)〕。   After the solder resist 3 is formed on the wiring board, a conductive paste 6 obtained by adding conductive particles 5 to the resin 4 is supplied onto the pads 2 of the wiring board. The conductive particles 5 contained in the conductive paste are the same as in the first embodiment, but the resin 4 is made of a material that cures at a temperature lower than the melting temperature of the solder balls of the semiconductor device. . After supplying the conductive paste 6, by applying vertical and horizontal vibrations to the wiring substrate 1 while heating, most of the conductive particles 5 gather on or near the pad 2 [FIG. 4 (a)].

次に、電極12上にはんだボール13が取着された半導体装置11を、配線基板1の所定位置に位置合わせして搭載する〔図4(b)〕。そして、荷重を加えつつはんだボール13の溶融温度以下の温度で加熱を行って樹脂を硬化させる〔図4(c)〕。ここで加えられた荷重により、導電粒子5は半導体チップ側のバンプ9と配線基板側のパッド2に挟み込まれて両者に接触し、一部はんだボール内にめり込み半導体装置と配線基板間の良好な導通が得られる。   Next, the semiconductor device 11 having the solder balls 13 attached on the electrodes 12 is mounted in alignment with a predetermined position of the wiring board 1 (FIG. 4B). Then, the resin is cured by heating at a temperature not higher than the melting temperature of the solder balls 13 while applying a load [FIG. 4 (c)]. Due to the load applied here, the conductive particles 5 are sandwiched between the bumps 9 on the semiconductor chip side and the pads 2 on the wiring board side to come into contact with each other, and are partially sunk into the solder balls. Conductivity is obtained.

本発明の第1の実施の形態を示す工程順の断面図。Sectional drawing of the order of the process which shows the 1st Embodiment of this invention. 第1の実施の形態の製造工程において配線基板上にソルダーレジストが形成された状態を示す平面図と断面図。The top view and sectional drawing which show the state by which the soldering resist was formed on the wiring board in the manufacturing process of 1st Embodiment. 本発明の第2の実施の形態を示す工程順の断面図。Sectional drawing of the order of the process which shows the 2nd Embodiment of this invention. 本発明の第3の実施の形態を示す工程順の断面図。Sectional drawing of the order of the process which shows the 3rd Embodiment of this invention. 第3の実施の形態の製造工程において配線基板上にソルダーレジストが形成された状態を示す平面図。The top view which shows the state by which the soldering resist was formed on the wiring board in the manufacturing process of 3rd Embodiment.

符号の説明Explanation of symbols

1 配線基板
2 パッド
3 ソルダーレジスト
3a 上面部
3b 側面部
4 樹脂
5 導電粒子
6 導電性ペースト
7 半導体チップ
8、12 電極
9、10 バンプ
11 半導体装置
13 はんだボール
DESCRIPTION OF SYMBOLS 1 Wiring board 2 Pad 3 Solder resist 3a Upper surface part 3b Side surface part 4 Resin 5 Conductive particle 6 Conductive paste 7 Semiconductor chip 8, 12 Electrode 9, 10 Bump 11 Semiconductor device 13 Solder ball

Claims (11)

電子部品の電極と配線基板のパッドとを導電粒子と樹脂とを含む導電性ペーストを用いて接続した電子部品の実装構造において、前記配線基板のパッドの周囲全体がソルダーレジストに囲まれており、隣接するパッド間において前記ソルダーレジストの断面形状が概略台形をなしており、その台形の底辺の長さaが上辺の長さbの3倍以上(a≧3b)であり、かつ、前記電子部品は前記配線基板と前記電子部品との隙間に充填された前記樹脂により封止されていることを特徴とする電子部品の実装構造。 In the mounting structure of the electronic component in which the electrode of the electronic component and the pad of the wiring board are connected using a conductive paste containing conductive particles and resin, the entire periphery of the pad of the wiring board is surrounded by a solder resist, The cross-sectional shape of the solder resist between adjacent pads is substantially trapezoidal, the length a of the base of the trapezoid is not less than three times the length b of the upper side (a ≧ 3b), and the electronic component Is sealed with the resin filled in a gap between the wiring board and the electronic component. 前記パッドを囲む前記ソルダーレジストの側面がすり鉢状形状をなしていることを特徴とする請求項1に記載の電子部品の実装構造。 2. The electronic component mounting structure according to claim 1, wherein a side surface of the solder resist surrounding the pad has a mortar shape. 前記電子部品の電極上にバンプないし金属ボールが形成されており、そのバンプないし金属ボールが前記配線基板上のパッドと導電粒子を介して接続されていることを特徴とする請求項1または2に記載の電子部品の実装構造。 Wherein and bump or metal balls on the electronic component of the electrodes are formed, to claim 1 or 2, the bumps or metal balls, characterized in that it is connected via a pad and conductive particles on the circuit board Mounting structure of the electronic component described. 配線基板上の隣接するパッド間において、パッドの周囲全体を囲むソルダーレジストの断面形状が概略台形をなしており、その台形の底辺の長さaが上辺の長さbの3倍以上(a≧3b)となるように、形成する工程と、樹脂と導電粒子とを含む導電性ペーストを前記パッド上に供給する工程と、電子部品を、該電子部品の電極を前記配線基板のパッド上に位置合わせして、前記配線基板上に搭載する工程と、前記導電性ペーストの樹脂を硬化させて前記電子部品の電極と前記配線基板のパッドとを電気的に接続すると共に前記電子部品を前記樹脂にて封止する工程と、を含む電子部品の実装方法。 Between adjacent pads on the wiring board, the cross-sectional shape of the solder resist that surrounds the entire periphery of the pad is roughly trapezoidal, and the length a of the base of the trapezoid is at least three times the length b of the upper side (a ≧ 3b), a step of forming, a step of supplying a conductive paste containing resin and conductive particles onto the pad, an electronic component, and an electrode of the electronic component positioned on the pad of the wiring board In addition, the step of mounting on the wiring board, the resin of the conductive paste is cured to electrically connect the electrode of the electronic component and the pad of the wiring board, and the electronic component to the resin And mounting the electronic component. 前記配線基板上に導電ペーストを供給した後、前記電子部品を前記配線基板上に搭載する工程に先立って、前記配線基板に振動を加えることを特徴とする請求項に記載の電子部品の実装方法。 The electronic component mounting according to claim 4 , wherein after the conductive paste is supplied onto the wiring substrate, vibration is applied to the wiring substrate prior to the step of mounting the electronic component on the wiring substrate. Method. 前記配線基板上に導電ペーストを供給した後、前記電子部品を前記配線基板上に搭載する工程に先立って、前記配線基板に基板平面方向に振動を加えることを特徴とする請求項に記載の電子部品の実装方法。 5. The method according to claim 4 , wherein after supplying the conductive paste on the wiring board, the wiring board is vibrated in a substrate plane direction prior to the step of mounting the electronic component on the wiring board. Electronic component mounting method. 前記配線基板を加熱しながら振動を加えることを特徴とする請求項またはに記載の電子部品の実装方法。 Electronic part mounting method according to claim 5 or 6, characterized in that applying vibration while heating the wiring board. 前記配線基板上の隣接するパッド間において、前記ソルダーレジストの断面形状である台形の上辺の長さbよりも、配線基板を振動させる際の振幅が大きいことを特徴とする請求項またはに記載の電子部品の実装方法。 Between pads adjacent on the wiring board, the than the length b of the trapezoidal upper side is a cross-sectional shape of the solder resist, it to claim 6 or 7, wherein the amplitude when vibrating the wiring board is large The electronic component mounting method described. 振動の振動数が1Hz以上であることを特徴とする請求項からのいずれかに記載の電子部品の実装方法。 Electronic part mounting method according to any of claims 6 8, frequency of the vibration is equal to or not less than 1 Hz. 前記電子部品の電極上には予めバンプないし金属ボールが形成されており、該バンプないし金属ボールが前記導電性ペーストの導電粒子を介して前記配線基板のパッドと接続されることを特徴とする請求項からのいずれかに記載の電子部品の実装方法。 Bumps or metal balls are formed in advance on the electrodes of the electronic component, and the bumps or metal balls are connected to pads of the wiring board through conductive particles of the conductive paste. Item 10. The electronic component mounting method according to any one of Items 4 to 9 . 前記導電粒子が低温溶融金属材料によって形成されており、前記導電性ペーストを硬化させる工程において、前記導電粒子が溶融して前記配線基板のパッドと前記電子部品の電極との間にバンプが形成されることを特徴とする請求項からのいずれかに記載の電子部品の実装方法。 The conductive particles are formed of a low-temperature molten metal material, and in the step of curing the conductive paste, the conductive particles are melted to form bumps between the pads of the wiring board and the electrodes of the electronic component. electronic part mounting method according to any one of claims 4 9, characterized in Rukoto.
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