JP4891036B2 - Semiconductor device manufacturing method and semiconductor inspection apparatus - Google Patents

Description

  The present invention relates to a semiconductor device manufacturing technique and a semiconductor inspection apparatus, and is particularly effective when applied to a technique for detecting a defective portion on a semiconductor wafer using potential contrast.

  As a method for evaluating semiconductor wafers with circuit patterns using electron beams (hereinafter referred to as “wafers”), a technology for performing high-throughput and high-precision inspection in response to wafer diameter increases and circuit pattern miniaturization has been put into practical use. Has been. For example, as disclosed in Japanese Patent Application Laid-Open No. 06-139985 (Patent Document 1), a method of performing defect inspection using the contrast of a secondary electron beam caused by a surface potential difference is known.

Further, Japanese Patent Laid-Open No. 2003-1000082 (Patent Document 2) discloses a method of charging a wafer to a desired charging voltage and calculating an electric resistance value from the acquired potential contrast. In this method, the charging voltage when the electron beam is irradiated onto the wafer surface is evaluated, and the electron beam irradiation conditions are adjusted so as to obtain a desired charging voltage. After making the pattern surface have a desired charging voltage, a potential contrast is obtained, and an electric resistance value is calculated from the signal. Thereby, the resistance-voltage characteristic of the element can be calculated, and the distribution of the electrical characteristics on the entire surface of the wafer and the distribution by defect type can be obtained.
Japanese Patent Laid-Open No. 06-139985 Japanese Patent Laid-Open No. 2003-1000082

  However, when the electrical characteristics are obtained by these methods, it can be applied only to a sample having a simple structure such as a plug formed in the first layer on the silicon substrate, and a well or the like is formed on the silicon substrate. In some cases, it is difficult to calculate an accurate resistance value. In addition, it is difficult to accurately obtain electrical characteristics when the structure that affects the potential contrast, such as a diffusion layer or well formed on a silicon substrate, varies depending on the device. In addition, since the influence of the pattern layout on the potential contrast cannot be taken into account, there is a problem that accurate electrical characteristics cannot be obtained.

  As described above, when the distribution of electrical characteristics is obtained by the conventional method, it can be applied only to a sample having a simple structure such as a plug formed in the first layer on the silicon substrate.

  For example, in the case of a plug formed on a silicon substrate, it is difficult to calculate an accurate resistance value when a well, a diffusion layer, or the like is formed on the silicon substrate. In the case of a plug connected on the gate electrode, the charging voltage of the plug depends on the capacitance of the gate electrode and the resistance value and capacitance of the gate insulating film. In the conventional method, an equivalent circuit obtained by simplifying one isolated pattern is assumed, and the resistance value of the defect is calculated from the acquired potential contrast. For this reason, when a circuit pattern is complicated, there exists a problem that resistance value cannot be calculated. In particular, it is difficult to accurately calculate the potential contrast in consideration of the influence of the capacitance of the diffusion layer and well formed on the silicon substrate. In addition, since the equivalent circuit obtained in the conventional method does not consider layout information, the result of calculating the resistance value from the potential contrast is often different from the resistance value of the actual defect, and the same type of pattern as the wafer to be inspected In the circuit, it is necessary to calibrate the resistance value of the defect after analyzing it offline. Also, once the resistance value of the detected defect is measured with a probe or the like, even if the correspondence between the potential contrast and the resistance value is evaluated, the characteristics of the diffusion layer and well formed on the silicon substrate, Since the type and number of contact holes connected to one diffusion layer and well vary depending on the device, it is difficult to accurately obtain the electrical characteristics from the potential contrast. In addition, the diffusion layer and well formed in the silicon substrate, the active region under the gate insulating film, the extension region, and the like also affect the potential contrast. In the conventional method, it is difficult to accurately and quickly calculate the resistance value of the defect, reflecting the electrical structure built in such a silicon substrate. In such a case, even if the resistance value of the defect and the potential contrast are calibrated once, if the electrical structure built in the silicon substrate in different devices is different, the resistance value of the defect is accurately calculated. It is difficult.

  Further, when a wiring pattern is inspected, the potential contrast caused by electron beam irradiation greatly depends on the pattern connected to the wiring pattern to be inspected. In particular, since the wiring pattern of the system LSI is greatly different in capacitance and resistance in each wiring, it is difficult to accurately predict the potential contrast.

  Due to the above-described problems, conventionally, it is difficult to accurately calculate the characteristics of defects such as resistance values from potential contrast within a practical time. For this reason, it is difficult to accurately obtain the distribution of defect characteristics in the wafer surface.

  The object of the present invention is to solve the above-mentioned problems, and as a technique for inspecting a wafer in the middle of a semiconductor manufacturing process using a charged particle beam such as an electron beam, the characteristics of defects such as a resistance value are accurately inspected from potential contrast. It is to provide a method. In addition, the defect characteristics are also improved in the case of wafers with various circuit patterns such as wiring patterns and wafers with different electrical structures that affect the potential contrast such as diffusion layers and wells formed on the silicon substrate. It is an object of the present invention to provide a technique capable of performing optimization and process management of a semiconductor manufacturing process by providing an inspection method that can be calculated accurately and quickly. It is another object of the present invention to provide a method for manufacturing a semiconductor device that contributes to improving the reliability of the semiconductor device and the like and reducing the defect rate.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  According to a method of manufacturing a semiconductor device according to the present invention, (a) a charged particle emitted from the semiconductor wafer is detected by irradiating the semiconductor wafer during the manufacturing process with the charged particle, and the detected charged particle is formed on the semiconductor wafer. Obtaining a potential contrast of the formed structure, and detecting a defective portion of the structure formed on the semiconductor wafer. The step (a) includes (a1) a step of inputting layout data of a structure formed on the semiconductor wafer during a manufacturing step, and (a2) a step of inputting the layout data to the semiconductor wafer based on the input layout data. And calculating an equivalent circuit corresponding to the formed structure. Further, (a3) a step of detecting a defective portion in the structure formed on the semiconductor wafer by the potential contrast actually measured by the inspection apparatus, and (a4) reflecting the detected structure of the defective portion in the equivalent circuit. Process. (A5) Based on an equivalent circuit reflecting the structure of the defective part, a potential contrast when the electric characteristic of the defective part is changed is calculated, and the correspondence between the electric characteristic of the defective part and the potential contrast is calculated. And calculating a relationship. And (a6) estimating the electrical characteristics of the defective portion from the potential contrast measured by an inspection apparatus using the correspondence between the electrical characteristics of the defective portion and the potential contrast. To do.

  The semiconductor inspection apparatus according to the present invention detects charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with charged particles, and the potential of the structure formed on the semiconductor wafer from the detected charged particles. The present invention relates to a semiconductor inspection apparatus that detects a defective portion of a structure formed on the semiconductor wafer by acquiring contrast. The semiconductor inspection apparatus includes: (a) a layout data input unit that inputs layout data of a structure formed on the semiconductor wafer during a manufacturing process; and (b) the layout data input from the layout data input unit. And an equivalent circuit calculation unit for calculating an equivalent circuit corresponding to the structure formed on the semiconductor wafer. And (c) a defect site detector that detects a defect site in the structure formed on the semiconductor wafer based on a potential contrast measured by the semiconductor inspection apparatus; and (d) the defect site detected by the defect site detector. An equivalent circuit reflecting unit that reflects the structure of the defective portion in the equivalent circuit. (E) Based on an equivalent circuit reflecting the structure of the defective part, a potential contrast when the electric characteristic of the defective part is changed is calculated, and the correspondence between the electric characteristic of the defective part and the potential contrast is calculated. And (f) estimating the electrical characteristics of the defective part from the potential contrast actually measured by the inspection apparatus using the correspondence relation between the electrical characteristic of the defective part and the potential contrast. And an electrical characteristic estimation unit.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  As a technology for inspecting semiconductor wafers in the middle of the process, the defect characteristics such as accurate resistance values of defective parts are calculated in consideration of the effects of pattern layout such as wells and diffusion layers built into the silicon substrate and surrounding patterns. can do. Further, even in a complicated circuit pattern such as a wiring pattern, a defect characteristic such as a resistance value of a defective portion can be calculated from a potential contrast.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  The present embodiment relates to a defect detection method using potential contrast. The principle of potential contrast formation used in the inspection in this embodiment will be described. The principle of potential contrast formation is disclosed in, for example, JP-A-2005-333161. First, for example, when electrons (primary electrons) are incident on a semiconductor wafer on which a pattern is formed, electrons (secondary electrons and reflected electrons) are emitted from the semiconductor wafer. The electron emission efficiency, which is the ratio of the number of emitted electrons to the number of incident electrons, is determined by the irradiation energy of the electron beam and the material of the pattern surface. When the electron emission efficiency is greater than 1, the electron beam irradiation region is positively charged. When the electron emission efficiency is less than 1, the electron beam irradiation region is negatively charged. When the electron beam irradiation region is positively charged, the positive charge serves to pull back the low energy secondary electrons once emitted. Therefore, secondary electrons are pulled back according to the electric field formed on the upper surface of the wafer, and the effective secondary electron emission efficiency is determined by the charging of the wafer surface and the electrode voltage on the upper surface of the wafer. That is, since the electron beam emission efficiency differs depending on the pattern formed on the wafer, the charge changes depending on the pattern, and the potential contrast changes. In particular, if there is a defect site, the charged state changes and the potential contrast changes. A defect site can be detected by detecting this change in potential contrast.

  Specifically, the principle of pattern inspection using positively charged potential contrast will be described with reference to the plug pattern shown in FIG. 1, for example. FIG. 1 is a cross-sectional view showing a plug formed on a wafer. As shown in FIG. 1, an element isolation region 2 is formed on a semiconductor substrate 1, and a well 3 that is a semiconductor region is formed in an active region divided by the element isolation region 2. A diffusion layer 4, which is a semiconductor region, is formed in the well 3, and an insulating film 5 is formed on the well 3. In the insulating film 5, plugs 6a to 6c penetrating the insulating film 5 are formed. The plugs 6a and 6c are electrically connected to the diffusion layer 4, but the plug 6b is not connected to the diffusion layer 4, and the insulating film 7 remains between the diffusion layer 4 and the plug 6b. In other words, the plugs 6a and 6c are formed normally, but the plug 6b is a defective portion with poor conduction.

  When the pattern shown in FIG. 1 is irradiated with an electron beam under a condition where the secondary electron emission efficiency is greater than 1, positive charges are accumulated in the plugs 6a to 6c. Since the normal plugs 6a and 6c are connected to the semiconductor substrate 1 through the diffusion layer 4 and the well 3, the positive charge is neutralized. When current is supplied from the semiconductor substrate 1, when the diffusion layer 4, the well 3, and the like are formed in the semiconductor substrate 1, the current is affected by the resistance value and the capacitance of the diffusion layer 4 and the well 3. On the other hand, in the case of the plug 6 b that is non-conductive, the insulating film 7 exists between the plug 6 b and the semiconductor substrate 1. Accordingly, the current supplied to the plug 6b changes depending on the resistance value of the insulating film 7, and the charging of the plug 6b changes accordingly, and the potential contrast changes.

  For example, when the plugs 6a to 6c shown in FIG. 1 are normally electrically connected to the semiconductor substrate 1 via the diffusion layer 4 and the well 3, the potential contrast is as shown in FIG. That is, the dark portion 10 is formed in the region where the insulating film is formed, and the bright portions 11a to 11c are formed in the region where the plug is formed. On the other hand, as shown in FIG. 1, when the plug 6b becomes a defective part and is not electrically connected to the semiconductor substrate 1, the potential contrast shown in FIG. 3 is obtained. That is, as shown in FIG. 3, the bright regions 11a and 11c are formed in the regions where the normal plugs 6a and 6c are formed, and the regions where the plugs 6b in the defective portions having poor conduction are the dark portions 11d. Since the potential contrast of the defective portion changes in this way, the defective portion can be specified by detecting the potential contrast.

  Here, the mechanism by which the potential contrast of the plug 6b, which is a defective part, changes will be described. FIG. 4 shows a case where the plug 6 b is formed normally and the plug 6 b is electrically connected to the semiconductor substrate 1 through the diffusion layer 4 and the well 3. At this time, when the electrons 12a enter the plug 6b, the electrons 12b are emitted from the plug 6b. When the electron emission efficiency of the plug 6b is larger than 1, the plug 6b is positively charged. However, since the plug 6b is electrically connected to the semiconductor substrate 1 through the diffusion layer 4 and the well 3, the positively charged plug 6b is Neutralized. That is, since the charging of the plug 6b is neutralized, the electrons 12b emitted from the plug 6b are incident on the device that detects the potential contrast without being affected by the plug 6b. Therefore, since electrons enter the detection device, the surface of the plug 6b is detected as a bright portion.

  On the other hand, FIG. 5 shows a case where the plug 6b is formed as a defective portion. In this case, an insulating film 7 is formed between the plug 6 b and the diffusion layer 4. When the electrons 12a enter the plug 6b, the electrons 12b are emitted. When the electron emission efficiency is greater than 1, the plug 6b is positively charged. When the plug 6b is electrically connected to the semiconductor substrate 1 through the diffusion layer 4 and the well 3, the charging of the plug 6b is neutralized. However, when the plug 6b becomes a defective part and is electrically isolated, the plug 6b is positively charged. Then, the electrons 12b emitted from the plug 6b are pulled back by charging of the plug 6b. That is, the electrons emitted from the plug 6b do not enter the inspection apparatus. For this reason, the surface of the plug 6b is detected as a dark part.

  By such a mechanism, a defect site can be detected from the potential contrast of the pattern. At this time, not only the position of the defective part but also the type can be specified. For example, a normal plug is hard to be positively charged and is detected as a bright part, but when it is positively charged and detected as a dark part, it is determined that the plug is not electrically connected and is a non-conductive defective part. On the other hand, when the region that is positively charged in the normal state is neutralized, it is understood that there is a short-circuit failure that causes conduction. That is, it can be seen that the position and type of the defective part can be specified by detecting the potential contrast.

  Although the position and type of the defective part can be specified, for example, when a non-conductive defective part occurs in the plug, it is extremely electrically insulated. However, the defective portion may have various resistance values depending on the thickness of the insulating film interposed between the plug and the semiconductor substrate. That is, even if it is a non-conductive defect part, the defect characteristic has various states. For this reason, it is important to know the electrical characteristics such as the resistance value of the defective part in the analysis of the defective part.

  Here, as a conventional method for calculating the resistance value of the defective portion, an equivalent circuit obtained by simplifying one isolated pattern is assumed, and the resistance value of the defect is calculated from the acquired potential contrast. Yes. For this reason, when a circuit pattern is complicated, there exists a problem that resistance value cannot be calculated correctly. In other words, in the case of a plug formed on a semiconductor substrate, when a well, a diffusion layer, or the like is formed on the semiconductor substrate, the resistance value of the plug can be accurately calculated without considering the resistance value or capacitance of the well or diffusion layer. I can't. That is, the resistance value of the plug cannot be accurately calculated with a simplified equivalent circuit without considering the resistance and capacitance of the well and diffusion layer connected to the plug.

  Therefore, in this embodiment, circuit patterns such as semiconductor elements and wirings are extracted from the layout data of the mask used in the manufacturing process of the semiconductor device, and an equivalent circuit corresponding to the layout data is formed. By using this equivalent circuit, information on the underlying pattern and wiring connected to the pattern irradiated with the electron beam is acquired, and the potential contrast formed when the electron beam is irradiated onto the wafer is calculated. . As a result, the present inventors have found that the electrical characteristics of the defective part can be accurately calculated in consideration of the influence of the base pattern and other wirings.

  That is, one feature of the present embodiment is that an equivalent circuit corresponding to the structure formed on the wafer is formed based on the layout data. Thereby, a precise equivalent circuit corresponding to the structure formed on the wafer can be used instead of a simplified equivalent circuit. Then, when a defective part in the structure formed on the wafer is detected by the potential contrast actually measured by the inspection apparatus, the structure of the detected defective part is reflected in the above-described equivalent circuit. Subsequently, based on an equivalent circuit reflecting the structure of the defective part, a potential contrast when the electrical characteristic of the defective part is changed is calculated, and a correspondence relationship between the electrical characteristic of the defective part and the potential contrast is calculated. The point of calculating this correspondence is also one of the features in the present embodiment. Then, using the correspondence relationship between the electrical characteristics of the defective portion and the potential contrast, the electrical characteristics of the defective portion are estimated from the potential contrast actually measured by the inspection apparatus. Thereby, the electrical characteristics of the defective part can be calculated accurately.

  An example of forming an equivalent circuit corresponding to the structure formed on the wafer based on the layout data will be described below with a specific example. The structure shown in FIG. 1 is taken as an example of the structure formed on the wafer, and the resistance value is taken as an example of the electrical characteristics of the defective part. First, an equivalent circuit is formed from the layout data of the mask for forming the structure shown in FIG. This equivalent circuit is shown in FIG. The normal plugs 6a and 6c are represented by a resistance Rp and a capacitance Cp. Further, a junction is formed by the diffusion layer 4 below the plugs 6a to 6c, and the diffusion layer 4 is represented by a resistor Rj and a capacitor Cj. The well 3 formed in the semiconductor substrate 1 is represented by a resistor Rw and a capacitor Cw, and the semiconductor substrate is represented by a resistor Rsub and a capacitor Csub. In this equivalent circuit, parasitic resistances R12 and R23 and parasitic capacitances C12 and C23 formed between the plugs 6a to 6c are also taken into consideration. And the plug 6b which is a defective part is represented by resistance Rd and capacity | capacitance Cp. Thus, in the equivalent circuit formed in this embodiment, the diffusion layer 4 connected to the plugs 6a to 6c, the well 3, the parasitic resistance and the parasitic capacitance are taken into consideration. Therefore, it can be seen that this is an equivalent circuit that faithfully reflects the structure actually formed on the wafer.

  Here, at the time when the equivalent circuit is formed based on the layout data, the plug 6b is also represented by a resistor Rp and a capacitor Cp as a normal plug. Then, the potential contrast is actually measured by the inspection apparatus, and if it is found that the plug 6b is a non-conductive defective part, this is reflected in the equivalent circuit. That is, when it is determined that the plug 6b is a defective part, the plug 6b is represented by the resistor Rd and the capacitor Cd on the equivalent circuit. In FIG. 6, an equivalent circuit reflecting that the plug 6b is a defective part is shown. By creating such an equivalent circuit and inputting and calculating the current supplied to the plugs 6a to 6c, the charging voltages of the plugs 6a to 6c can be accurately calculated. That is, the potential contrast can be calculated. At this time, the resistance Rd, which is a defective portion, is changed, the potential contrast when the resistance Rd is changed is calculated, and the correspondence between the resistance Rd of the defective portion and the potential contrast is calculated. Subsequently, the resistance corresponding to the actually measured potential contrast can be obtained based on the correspondence relationship between the calculated resistance Rd of the defective portion and the potential contrast. Even in such a complicated circuit pattern, an equivalent circuit can be created in consideration of the layout information of the circuit pattern. For this reason, if the potential contrast can be predicted using this equivalent circuit, the irradiation condition of the incident electron beam, the electrode voltage on the upper surface of the wafer, the material of the uppermost layer of the circuit pattern of the wafer to be inspected, and the equivalent circuit of the circuit pattern It is possible to accurately calculate the electrical characteristics such as the resistance of the defective part.

  Next, a method for manufacturing a semiconductor device including an inspection process in the present embodiment will be described. First, a semiconductor substrate (wafer) is prepared. Then, a semiconductor device such as a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is formed on the semiconductor substrate by using a well-known manufacturing technique. Then, an insulating film is formed on the semiconductor substrate on which the semiconductor element is formed, and connection holes are formed in the insulating film by using a photolithography technique and an etching technique. Next, a plug is formed by embedding a conductive material in the connection hole. Thereafter, wiring is formed on the plug. The wiring is formed over multiple layers. In this way, a semiconductor device can be manufactured.

  During the manufacturing process of this semiconductor device, there is a defect detection process using potential contrast. For example, after a plug is formed on a semiconductor substrate, a defect detection process using a potential contrast is performed in order to inspect whether the plug is normally formed. In this embodiment, as an example, the defect detection process using the potential contrast is performed to detect the defective part of the plug. However, the defect detection process using the potential contrast is used to detect the defective part of the wiring. You may implement. The defect detection process using the potential contrast can be implemented by inserting it into various manufacturing processes for manufacturing a semiconductor device.

  The configuration of the inspection apparatus used in this defect detection process will be described. An example of the inspection apparatus in this embodiment is shown in FIG. The semiconductor device inspection apparatus 21 includes an electron optical system 22, a stage mechanism system 23, a wafer transfer system 24, a vacuum exhaust system 25, an optical microscope 26, a control system 27, and an operation unit 28. The electron optical system 22 includes an electron gun 29, a condenser lens 30, an objective lens 31, a detector 32, an electrode 33, a deflector 34, and a wafer height detector 35. The stage mechanism system 23 includes an XY stage 36 and a holder 37 for holding the wafer 38, a holder 37 and a retarding power source 39 for applying a negative voltage to the wafer 38. A position detector by laser length measurement is attached to the XY stage 36. The wafer transfer system 24 is configured such that the wafer 38 moves back and forth between the cassette mounting unit 40, the wafer loader 41, and the XY stage 36. The control system 27 includes a signal detection system control unit 42, a blanking control unit 43, a beam deflection correction control unit 44, an electron optical system control unit 45, a wafer height sensor detection system 26, and a stage control unit 47. The operation unit 28 includes an operation screen and operation unit 48, an image processing unit 49, an image / inspection data storage unit 50, and a calculation unit 51. The operation unit 48 is connected to an external server 52.

  Next, functions for realizing the inspection process in the present embodiment will be described. FIG. 8 is a block diagram showing the configuration of the inspection apparatus 21. As shown in FIG. 8, the inspection apparatus 21 includes a calculation unit 51 and a defective part detection unit 57. The calculation unit 51 includes a layout data input unit 55, an equivalent circuit calculation unit 56, a normal part contrast calculation unit 58, an equivalent circuit reflection unit 59, a correspondence calculation unit 60, an electrical characteristic estimation unit 61, and an electrical characteristic output unit 62. Have.

  The layout data input unit 55 is configured to input layout data of a mask used for forming a structure on the wafer.

  The equivalent circuit calculation unit 56 is configured to extract circuit patterns such as semiconductor elements and wirings from the mask layout data, and to create a net list from the extracted circuit patterns of the wafer to be inspected. The net list means information including information necessary for configuring an equivalent circuit. That is, the net list describes information including electrical characteristics and connection relationships of circuit elements constituting the equivalent circuit. Therefore, creating a net list from layout data is the same as calculating an equivalent circuit from layout data. The created netlist includes information on the capacitance and resistance of diffusion layers and wells formed on the wafer, parasitic resistance and parasitic capacitance of wiring, capacitance between wirings, etc., from the back or side of the wafer to the layer irradiated with electron beams. It is generated from a circuit pattern. The generated netlist describes circuit connection information including parasitic elements of the circuit corresponding to the layout data. It can also include information on the current flowing through the wafer surface and the interlayer insulating film when irradiated with an electron beam. However, since the generated netlist includes information on the parasitic resistance, parasitic capacitance, and inter-wiring capacitance of all wirings, calculating the potential contrast at the time of inspection using this information may require a lot of calculation time. In such a case, a function for reducing parasitic elements to be subjected to circuit simulation is provided by, for example, deleting parasitic resistance elements and parasitic capacitance elements having a predetermined value or less. Here, when generating the netlist, the electrical characteristics (resistance value, capacitance) of the well, the diffusion layer, and the like are calculated using, for example, a device simulator. It is often difficult to calculate the capacity. Thus, the limited electrical characteristics of the well, the diffusion layer, and the like are configured such that the net list can be corrected by inputting actually measured data.

  The defective part detection unit 57 is configured to detect a defective part from the potential contrast actually measured by the inspection apparatus 21, and can specify the position and type of the defective part.

  The equivalent circuit reflecting unit 59 has a function of reflecting the electrical characteristics of the defective part in the equivalent circuit based on the position and type of the defective part detected by the defective part detecting unit 57. That is, the net list calculated by the equivalent circuit calculation unit 56 corresponds to an equivalent circuit that does not include a defective part, and the equivalent circuit reflection unit 59 corrects the net list and incorporates the defective part. Functions to create a netlist. Therefore, the net list corrected by the equivalent circuit reflecting unit 59 reflects the electrical characteristics of the defective part.

  The normal part contrast calculation unit 58 and the correspondence calculation unit 60 have a function capable of calculating a potential contrast generated when an electron beam is irradiated using the generated net list. For example, a circuit simulator is used to calculate the potential contrast from the netlist. At this time, the normal part contrast calculation unit 58 and the correspondence calculation unit 60 are configured to input a net list and inspection conditions such as an electron beam irradiation condition to the circuit simulator to calculate a potential contrast. As an input value of the circuit simulator, a function of converting from inspection conditions such as electron beam irradiation conditions to parameters that can be input to the circuit simulator is provided. Examples of the electron beam irradiation conditions include an electron beam irradiation region, an electron beam scanning speed, a current value, irradiation energy, an electric field on the wafer upper surface, and a charging voltage on the wafer surface. First, a net list used for calculation is extracted from the electron beam irradiation region. The current value is determined by the effective secondary electron emission efficiency considering the current value of the electron beam, the irradiation region, the scanning speed, and the return secondary electrons. The charging voltage of the circuit pattern is calculated from the irradiation condition of the incident electron beam, the electrode voltage on the upper surface of the wafer, the material of the uppermost layer of the circuit pattern of the wafer to be inspected, and the net list of the circuit pattern. The charging voltage calculated as described above can be used as the charging voltage, or the charging voltage evaluated by actually irradiating the electron beam in the inspection apparatus 21 can be input. The potential contrast is calculated using the netlist, current value, charging voltage, and the like.

  The normal part contrast calculation unit 58 and the correspondence calculation unit 60 use the generated netlist to calculate the potential contrast that occurs when the electron beam is irradiated. The normal part contrast calculation unit 58 uses the equivalent circuit calculation unit 56. The potential contrast is calculated using a netlist that does not take into account the defective part calculated in step (1). That is, the potential contrast in a structure without a defect site is calculated. On the other hand, the correspondence calculation unit 60 calculates the potential contrast using the net list reflecting the structure of the defective part in the equivalent circuit reflection unit 59.

  The normal part contrast calculation unit 58 calculates a potential contrast that does not take into account the defective part, and its purpose is to correct the difference between the calculated potential contrast and the actually measured potential contrast. Therefore, when there is not much need to correct the difference between the calculated potential contrast and the actually measured potential contrast, it is not necessary to provide the normal part contrast calculation unit 58. However, from the viewpoint of improving the accuracy of the calculated potential contrast, it is desirable to provide the normal part contrast calculation unit 58.

  The correspondence calculation unit 60 calculates the potential contrast using the net list reflecting the structure of the defective part in the equivalent circuit reflection unit 59. At this time, the potential contrast when the electrical characteristics of the defective part are changed is also calculated. calculate. For example, when resistance and capacitance are handled as the electrical characteristics of the defective portion, the potential contrast is calculated by changing the resistance and capacitance of the defective portion. That is, the correspondence between the electrical characteristics of the defective part and the potential contrast is calculated. As a specific example, it has a function of calculating the relationship between the resistance of the defective part and the potential contrast as a contrast table.

  The electrical characteristic estimation unit 61, based on the correspondence between the electrical characteristics of the defective part calculated by the correspondence calculating unit 60 and the potential contrast, the electrical characteristics of the defective part corresponding to the measured potential contrast from the measured potential contrast. It is comprised so that can be calculated | required. As a result, the electrical characteristics of the defective portion can be calculated from the actually measured potential contrast.

  The electrical characteristic output unit 62 has a function for outputting electrical characteristics such as the resistance value of the defect calculated by the electrical characteristic estimation unit 61 together with information on the defect position. For example, it has a function for displaying the resistance value of a defect as a wafer in-plane distribution.

  The inspection apparatus 21 according to the present embodiment is configured as described above. Further, the electrical characteristics of the defective part calculated by the electrical characteristic estimation unit 61 and the position and type of the defective part are provided inside or outside the inspection apparatus 21. A function (feedback function) for adjusting a manufacturing process so as to eliminate a defective portion in a semiconductor device from defect information including the above is provided. In addition, a function is provided for extracting and outputting the feature of the pattern in which the detected defect information is reflected in the layout data, and a defect site is likely to be generated.

  Next, the operation of the inspection apparatus in the present embodiment will be described with reference to the drawings. In the present embodiment, a method for calculating the resistance value of the plug having the cross-sectional structure shown in FIG. 1 will be described as an example of a method for calculating the electrical characteristics of the defective portion. FIG. 9 is a flowchart showing the flow of the inspection process.

  In FIG. 9, first, a wafer is set in an inspection apparatus (S101), and preparation of an inspection recipe is started (S102). The inspection recipe creation screen is opened, and information on the wafer to be inspected is input (S103). Information on the wafer to be inspected includes designating a region to be irradiated with an electron beam. Further, as the information on the wafer to be inspected, all layout data in each process for creating the wafer to be inspected may be input as CAD data. The layout data can be stored in advance in the image / inspection data storage unit 50, and the layout data can be read out when the inspection recipe is created.

  Next, inspection conditions are input from the operation unit 48 (S104). FIG. 10 shows an example of the inspection condition input screen. As inspection conditions, electron beam irradiation energy, beam current, wafer upper surface electrode voltage, electron beam scanning speed, detection clock which is a sampling clock for signal detection, image size, visual field size per screen, per screen The contents such as the number of times of image acquisition (number of additions), the acquired image used for image processing, and the inspection area are input.

  When the inspection condition input is completed, the inspection is started (S105). First, the set wafer is transferred into the inspection apparatus 21 (S106). When the wafer is loaded, an electron beam irradiation condition is set to each part by the electron optical system controller 45 based on the inputted inspection condition. At this time, the irradiation position of the electron beam is moved to the calibration pattern position (S107), and beam calibration, alignment, and calibration are performed (S108).

  Thereafter, when inspection is started and irradiation of an electron beam (electron beam) is started (S109), first, the charging voltage on the wafer surface is measured (S110). Next, a secondary electron image (potential contrast) is acquired while irradiating and scanning an electron beam onto a designated area under designated examination conditions (S111). At this time, image processing is performed in real time, and defect determination is performed (S113). In image processing, there are a method of comparing and inspecting equivalent patterns, a method of acquiring a non-defective reference image in advance and performing a comparison inspection thereof, and a method of determining pass / fail based on the absolute value of the brightness of the pattern. In any of these methods, information such as the defect occurrence position in the designated region, the type of the defect site, and the electrical characteristics (resistance value) of the defect site can be obtained. Once the defect determination is performed, an image is automatically stored for the defect occurrence position. When a comparative inspection is performed at this time, an image of a normal part is simultaneously saved as a reference for the defect occurrence position. Then, the inspection status is displayed on the operation unit 48, and the inspection result is output from the calculation unit 51 to the outside (114).

  As an inspection method, it is also possible to perform inspection by step-and-repeat. In this case, the designated area is scanned with an electron beam to obtain a secondary electron image. Thereafter, the stage can be moved to the next designated area, and further, the inspection can be performed by repeating the electron beam irradiation to acquire the image. The acquired secondary electron image may be stored in the image / inspection data storage unit 50 and then transferred to the external storage unit and the calculation unit, image processing may be performed offline, and defect determination and resistance value calculation may be performed. When the inspection is completed in this way, the wafer is unloaded and the inspection is terminated (S115).

  Next, a method for calculating the resistance value of a defect site, which is one of the features in the present embodiment, will be described with reference to FIG. FIG. 11 is a flowchart showing a method for calculating a resistance value of a defective portion in the present embodiment. This flowchart is a process performed in the resistance value calculation (S113) in the inspection process shown in FIG. In FIG. 11, processing 65 shows the flow of processing performed by the calculation unit 51, and the netlist correction unit 66 shows an auxiliary function by a device simulator provided inside or outside the calculation unit 51. Data 67 represents data used for calculating the resistance value of the defective part.

  First, the layout data of the structure formed on the wafer to be inspected is input to the layout data input unit 55 in the circuit simulator (S201). The input layout data is reflected on the inspection recipe creation screen of the inspection apparatus 21 and can be used as an auxiliary tool at the time of inspection recipe creation. Next, circuit patterns such as semiconductor elements and wirings are extracted from the layout data input by the equivalent circuit calculation unit 56, and a net list (equivalent circuit) of a structure formed on the wafer during the semiconductor manufacturing process is generated ( S202). The net list calculated by the equivalent circuit calculation unit 56 corresponds to a normal structure. That is, the generated net list is a net list generated by extracting a normal circuit pattern in which the inspection pattern is electrically connected in the process of irradiating the inspection target wafer with the electron beam.

  This netlist includes, as a circuit pattern from the back or side surface of the wafer to the layer irradiated with the electron beam, the resistance Rsub and capacitance Csub of the wafer, the resistance value and capacitance of the well and diffusion layer formed on the wafer, transistor elements , Information on the wiring resistance and capacitance, wiring parasitic resistance and parasitic capacitance, and the like. Furthermore, information such as the resistance value and capacitance of the wafer surface when the wafer is irradiated with electrons and the resistance value and capacitance of the interlayer insulating film can also be included.

  In the present embodiment, a case where the plug as shown in FIG. 1 is inspected will be described. In this case, as the equivalent circuit extracted from the layout data, for example, the equivalent circuit shown in FIG. 6 can be extracted, and the extracted equivalent circuit is converted into a net list having a format that can be input to the circuit simulator.

  However, in a complex equivalent circuit, if the potential contrast at the time of inspection is calculated using the parasitic resistance and parasitic capacitance of all the wirings, it may take a great amount of calculation time depending on the scale of the circuit pattern. In such a case, a parasitic element to be subjected to circuit simulation is deleted by deleting a parasitic resistance element or a parasitic capacitance element having a predetermined value or less.

  Here, when generating the netlist, the netlist correction unit 66 calculates element characteristics (electrical characteristics) (resistance value, capacitance) of the device well and diffusion layer from the LSI structure using a device simulator. Can do. However, it may be difficult to accurately calculate the resistance value and the capacitance of the well and the diffusion layer by the calculation using the device simulator. Therefore, as a function for correcting the net list, it is possible to correct the net list by inputting measured data for limited element characteristics such as wells and diffusion layers.

Once the netlist is generated, next, inspection conditions such as incident electron beam irradiation conditions input from the operation unit 48 before the start of inspection are input to the circuit simulator. The inspection condition is converted into an input value to the circuit simulator by the conversion unit. The net list used for the calculation is extracted from the electron beam irradiation region in the inspection conditions. When calculating a charging voltage by calculation using a circuit simulator, for example, an input charge Q can be converted as an input value to the circuit simulator as follows. Q = I ₀ sσ is obtained from the current value I _{0 of the} inspection, the irradiation time s to the circuit pattern, and the secondary electron emission efficiency σ considering the return secondary electrons. The irradiation time s to the circuit pattern can be determined by the scanning speed of the electron beam and the layout of the circuit pattern. The input location of the current value I ₀ is determined by the layout for irradiating the electron beam. For example, when irradiating the plug shown in FIG. 1, the charges are input as charges Q1, Q2, and Q3 of the equivalent circuit shown in FIG. As a result, the charging voltage can be estimated.

  Next, defect information such as the charging voltage and defect position of the pattern to be inspected and the actually measured defect potential contrast is input to the circuit simulator. The defect position and the actually measured defect potential contrast are those detected by the defect site detector 57.

  As described above, the charging voltage can be calculated by inputting a current value into the circuit simulator. However, by actually measuring the charging voltage at the time of electron beam irradiation in the inspection apparatus 21, the actual value is input. It is also possible to do. Here, when actually measuring the charging voltage, it can be measured, for example, by filtering secondary electrons and backscattered electrons with a certain energy by a detector using an energy filter. This is because the energy of secondary electrons and backscattered electrons changes by the charged voltage on the wafer surface.

  When the value of the charging voltage is input, the defect information such as the defect position of the detected defect part and the actually measured defect part potential contrast from the defect part detection unit 57 of the inspection apparatus 21 or the storage device storing the inspection result is input to the circuit simulator. Forward. Here, as the actually measured normal part potential contrast, the information of the normal part potential contrast in the same pattern in the shot including the defect portion and the shot adjacent on the wafer can also be transferred. The charging voltage of these patterns to be inspected and the defect information of the defective part detected by the defective part detection unit 57 of the inspection apparatus 21 are transferred to the arithmetic unit 51 in real time when the inspection apparatus 21 inspects the wafer to be inspected. The resistance value may be converted by a circuit simulator. However, the secondary electron image information of the defective part and the normal part is once stored in the image / inspection data storage unit 50 for offline image processing and resistance value. May be performed.

  Here, a method for calculating the resistance value of the defective part from the information of the actually measured defect potential contrast will be described. First, the normal part contrast calculation unit 58 calculates the normal part contrast when the normal pattern is formed at the defect position of the wafer by the circuit simulator (S203). Then, the calculated normal part contrast is compared with the normal part potential contrast in the actually measured normal pattern, and the difference between the calculated value and the actually measured value is corrected.

  Further, based on the defect information from the defect part detection unit 57, an equivalent circuit of a defect assumed at a place where a defect is assumed to be formed is assumed, and a net list including the defect is created by the equivalent circuit reflection unit 59 To do. For example, when the detected defective part is a plug conduction failure shown in FIG. 1, the resistance value of the plug 6b that is the defective part is set to Rd, and the defect potential contrast of the defective part is calculated by the correspondence calculation unit 60. (S204). Then, a correspondence relation of the potential contrast change of the plug 6b when the resistance value Rd of the plug 6b which is a defective part is changed is created. That is, a contrast table showing the correspondence between the resistance value Rd and the potential contrast is created (S205). FIG. 12 shows an example of a change in potential contrast when the resistance value Rd of the plug serving as a defective portion is changed from 1E4 (Ω) to 1E16 (Ω). By using this relationship, the resistance value of the defective part can be calculated from the actually measured defect part potential contrast sent from the defective part detection unit 57 of the inspection apparatus 21 (S206). The resistance value of the defect portion thus obtained is output together with information such as the actually measured defect portion potential contrast, defect coordinates, and charging voltage (S207) and stored in the image / inspection data storage unit 50. In this way, for all the defects, it is possible to estimate the resistance value from the actually measured defect potential contrast. The estimated resistance value of the defective part is stored in the image / inspection data storage unit 50 together with other defect information. As a result, considering the influence of the layout of wells and diffusion layers built into the wafer and surrounding patterns, the characteristics of the defect, including the accurate resistance value of the defective part, are calculated from the potential contrast of the defective part. It becomes possible. Further, even in a complicated circuit pattern such as a wiring pattern, it is possible to accurately calculate a defect characteristic such as a resistance value of a defective portion from a potential contrast.

  The resistance value of the defect part calculated through the inspection process as described above can be displayed as, for example, a distribution within the wafer surface of the operation unit 28 of the inspection apparatus 21. FIG. 13 shows an example in which the distribution of the obtained resistance value in the wafer surface is displayed. The distribution of defective portions in the wafer surface is classified and displayed according to the degree of resistance value. Alternatively, the wafer in-plane distribution of only defects having a set resistance value in a certain range can be displayed, and information on only the defect site having desired characteristics can be obtained.

  The resistance value thus obtained is collated with, for example, dry etching process data and fed back to the dry etching process. For example, when non-conduction due to dry etching occurs in the plug, it is fed back to the adjustment of the etching time, the adjustment of the etching gas flow rate, the cleaning of the etcher, and the like.

  In addition, by this inspection, it is possible to extract features of a pattern that easily generates a defective part from layout data of a pattern that generates a defective part. For example, in the case of plugs, features such as plug aspect ratio, hole diameter, pattern density, mat edge, and mask material can be extracted, and it is possible to grasp what layout and material pattern are likely to cause defects. It becomes like this. As a result, feedback to the mask layout and manufacturing process is possible.

  As described above, according to the present embodiment, as a technique for inspecting a semiconductor wafer in the middle of a process, the influence of a pattern layout such as a well, a diffusion layer, and a surrounding pattern formed in the wafer is taken into consideration. Defect characteristics such as an accurate resistance value can be calculated. Further, even in a complicated circuit pattern such as a wiring pattern, a defect characteristic such as a resistance value of a defective portion can be calculated from a potential contrast.

  Further, because of the above-described effects, the presence / absence of defects generated on the wafer, the distribution of resistance values, and the cause of the occurrence of defects can be grasped efficiently and with high accuracy, so that it is possible to take an abnormality countermeasure process quickly in the manufacturing process. As a result, the defect rate of the semiconductor device can be reduced and the productivity can be increased. Furthermore, by applying the above inspection, it has become possible to quickly detect abnormalities and take countermeasures earlier than before, preventing a large number of defects before they occur and improving the reliability of semiconductor devices, etc. Can be increased. In addition, since it is possible to grasp the characteristics of patterns that are likely to cause defects, it is possible to perform device design and process design that are less likely to cause defects by changing the layout pattern during device design. As a result, the development efficiency of new products and the like can be improved, and the manufacturing cost can be reduced.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  In the above-described embodiment, the method of calculating the resistance value of the plug conduction failure is described as an example. However, as another example, the resistance value of the conduction failure of the wiring pattern, the resistance of the opening hole such as the contact hole, and the like. A value can also be calculated. In addition, the electrical characteristics of defects such as junction leakage leakage current, gate electrode leakage current, memory leakage current such as flash memory and DRAM, transistor source-drain leakage current, element leakage current, etc. It can be calculated in the same way as the form.

  In the above-described embodiment, an example is shown in which electrons are used to detect potential contrast. However, the present invention is not limited to this, and charged particles other than electrons can also be used.

  The present invention can be widely used in the manufacturing industry for manufacturing semiconductor devices.

It is sectional drawing of the plug which shows an example of the to-be-inspected pattern in embodiment of this invention. It is a figure which shows an example of the potential contrast of a to-be-inspected pattern. It is a figure which shows an example of the potential contrast of a to-be-inspected pattern. It is a figure which shows a mode that a normal plug is irradiated with an electron and a secondary electron is inject | emitted from a plug. It is a figure which shows a mode that a plug which has a non-conductive defect site | part is irradiated with an electron, and a secondary electron is inject | emitted from a plug. It is a figure which shows the equivalent circuit of the structure shown in FIG. It is a figure which shows the structure of the semiconductor inspection apparatus in this Embodiment. It is a functional block diagram which shows the structure of the principal part of a semiconductor inspection apparatus. It is a flowchart which shows the process of the test | inspection process in this Embodiment. It is a figure which shows an example of the inspection condition input of a semiconductor inspection apparatus. It is a figure which shows an example of the resistance value calculation process of the plug in this Embodiment. It is a graph which shows an example of the correspondence of potential contrast and the resistance value of a defective part. It is a figure which shows an example of a test result.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Element isolation region 3 Well 4 Diffusion layer 5 Insulating film 6a Plug 6b Plug 6c Plug 7 Insulating film 10 Dark part 11a Bright part 11b Bright part 11c Bright part 11d Dark part 12a Electron 12b Electron 21 Inspection apparatus 22 Electro-optical system 23 Stage Mechanical system 24 Wafer transfer system 25 Vacuum exhaust system 26 Optical microscope 27 Control system 28 Operation unit 29 Electron gun 30 Condenser lens 31 Objective lens 32 Detector 33 Electrode 34 Deflector 35 Wafer height detector 36 XY stage 37 Holder 38 Wafer 39 Retarding power supply 40 Cassette mounting unit 41 Wafer loader 42 Signal detection system control unit 43 Blanking control unit 44 Beam deflection correction control unit 45 Electro-optical system control unit 46 Wafer height sensor detection system 47 Stage control unit 48 Operation unit 49 Image processing Part 50 Image / inspection data storage unit 51 operation unit 52 external server 55 layout data input unit 56 equivalent circuit calculation unit 57 defective part detection unit 58 normal part contrast calculation unit 59 equivalent circuit reflection unit 60 correspondence calculation unit 61 electrical characteristic estimation unit 62 Electrical characteristic output unit 65 Processing 66 Netlist correction unit 67 Data Q1 charge Q2 charge Q3 charge Rp resistance Rj resistance Rw resistance Rsub resistance Rd resistance R12 parasitic resistance R23 parasitic resistance Cp capacity Cj capacity Cw capacity Csub capacity C12 parasitic capacity C23 parasitic capacity

Claims (5)

(A) Detecting charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with charged particles, and acquiring a potential contrast of a structure formed on the semiconductor wafer from the detected charged particles. And a step of detecting a defect site of the structure formed in the semiconductor wafer,
The step (a)
(A1) inputting layout data of a structure formed on the semiconductor wafer during the manufacturing process;
(A2) calculating an equivalent circuit corresponding to a structure formed on the semiconductor wafer based on the input layout data;
(A3) detecting a defect site in a structure formed on the semiconductor wafer based on a potential contrast actually measured by an inspection apparatus;
(A4) reflecting the detected structure of the defect site in the equivalent circuit;
(A5) Based on an equivalent circuit reflecting the structure of the defective portion, a potential contrast when the electrical characteristics of the defective portion are changed is calculated, and a correspondence relationship between the electrical characteristics of the defective portion and the potential contrast is calculated. A calculating step;
(A6) a step of estimating the electrical characteristics of the defective portion from the potential contrast measured by an inspection apparatus using the correspondence relationship between the electrical characteristics of the defective portion and the potential contrast. Device manufacturing method. (A) Detecting charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with charged particles, and acquiring a potential contrast of a structure formed on the semiconductor wafer from the detected charged particles. And a step of detecting a defect site of the structure formed in the semiconductor wafer,
The step (a)
(A1) inputting layout data of a structure formed on the semiconductor wafer during the manufacturing process;
(A2) calculating an equivalent circuit corresponding to a structure formed on the semiconductor wafer based on the input layout data;
(A3) detecting a defect site in a structure formed on the semiconductor wafer based on a potential contrast actually measured by an inspection apparatus;
(A4) reflecting the detected structure of the defect site in the equivalent circuit;
(A5) Based on an equivalent circuit reflecting the structure of the defective portion, a potential contrast when the electrical characteristics of the defective portion are changed is calculated, and a correspondence relationship between the electrical characteristics of the defective portion and the potential contrast is calculated. A calculating step;
(A6) using the correspondence between the electrical characteristics of the defective part and the potential contrast, estimating the electrical characteristics of the defective part from the potential contrast actually measured by the inspection apparatus,
In the step (a2), a net list describing information including electrical characteristics and connection relationships of circuit elements constituting the equivalent circuit is created as the equivalent circuit. (A) Detecting charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with charged particles, and acquiring a potential contrast of a structure formed on the semiconductor wafer from the detected charged particles. And a step of detecting a defect site of the structure formed in the semiconductor wafer,
The step (a)
(A1) inputting layout data of a structure formed on the semiconductor wafer during the manufacturing process;
(A2) calculating an equivalent circuit corresponding to a structure formed on the semiconductor wafer based on the input layout data;
(A3) detecting a defect site in a structure formed on the semiconductor wafer based on a potential contrast actually measured by an inspection apparatus;
(A4) reflecting the detected structure of the defect site in the equivalent circuit;
(A5) Based on an equivalent circuit reflecting the structure of the defective portion, a potential contrast when the electrical characteristics of the defective portion are changed is calculated, and a correspondence relationship between the electrical characteristics of the defective portion and the potential contrast is calculated. A calculating step;
(A6) using the correspondence between the electrical characteristics of the defective part and the potential contrast, estimating the electrical characteristics of the defective part from the potential contrast actually measured by the inspection apparatus,
A method of manufacturing a semiconductor device, wherein a feedback process is performed on the layout data so that the defective portion does not occur based on the electrical characteristics of the defective portion estimated in the step (a6). (A) Detecting charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with charged particles, and acquiring a potential contrast of a structure formed on the semiconductor wafer from the detected charged particles. And a step of detecting a defect site of the structure formed in the semiconductor wafer,
The step (a)
(A1) inputting layout data of a structure formed on the semiconductor wafer during the manufacturing process;
(A2) calculating an equivalent circuit corresponding to a structure formed on the semiconductor wafer based on the input layout data;
(A3) detecting a defect site in a structure formed on the semiconductor wafer based on a potential contrast actually measured by an inspection apparatus;
(A4) reflecting the detected structure of the defect site in the equivalent circuit;
(A5) Based on an equivalent circuit reflecting the structure of the defective portion, a potential contrast when the electrical characteristics of the defective portion are changed is calculated, and a correspondence relationship between the electrical characteristics of the defective portion and the potential contrast is calculated. A calculating step;
(A6) using the correspondence between the electrical characteristics of the defective part and the potential contrast, estimating the electrical characteristics of the defective part from the potential contrast actually measured by the inspection apparatus,
A manufacturing method of a semiconductor device, wherein processing conditions in the manufacturing process of the semiconductor wafer are adjusted based on the electrical characteristics of the defective part estimated in the step (a6). By detecting charged particles emitted from the semiconductor wafer by irradiating the semiconductor wafer during the manufacturing process with the charged particles, and obtaining the potential contrast of the structure formed on the semiconductor wafer from the detected charged particles, A semiconductor inspection apparatus for detecting a defective portion of a structure formed on a semiconductor wafer,
The semiconductor inspection apparatus includes:
(A) a layout data input unit for inputting layout data of a structure formed on the semiconductor wafer during the manufacturing process;
(B) an equivalent circuit calculation unit for calculating an equivalent circuit corresponding to a structure formed on the semiconductor wafer based on the layout data input from the layout data input unit;
(C) a defect site detector for detecting a defect site in a structure formed on the semiconductor wafer by a potential contrast measured by the semiconductor inspection apparatus;
(D) an equivalent circuit reflecting unit that reflects the structure of the defective part detected by the defective part detecting unit in the equivalent circuit;
(E) Based on an equivalent circuit reflecting the structure of the defective part, a potential contrast when the electric characteristic of the defective part is changed is calculated, and a correspondence relationship between the electric characteristic of the defective part and the potential contrast is calculated. A correspondence calculation unit to calculate,
(F) having an electrical characteristic estimation unit that estimates the electrical characteristics of the defective portion from the potential contrast measured by an inspection apparatus using the correspondence between the electrical characteristics of the defective portion and the potential contrast. A featured semiconductor inspection device.

Images