JP4926422B2 - Image processing apparatus and electronic apparatus using the same - Google Patents

Description

  The present invention relates to an image processing apparatus and an electronic apparatus using the same, and more particularly to an apparatus that displays an image based on an image signal output from an image sensor.

  In recent years, with the widespread use of digital cameras, camera-equipped mobile phones, and the like, many devices that perform processing on an image signal of a subject taken in by an image sensor and display the image of the subject are used. As a result, the user can monitor the subject through the display, and the convenience of the device is greatly improved.

  Here, in the process of image processing, when the image sensor acquires pixel information for one frame of the subject (hereinafter referred to as “frame acquisition”), a frame is extracted from image data formed through a series of processing. When reconstructing (hereinafter referred to as “frame construction”), a horizontal synchronization signal (hereinafter referred to as “HS”) indicating the timing of horizontal scanning and a vertical synchronization signal (hereinafter referred to as “VS”) indicating the timing of vertical scanning. Is required).

  That is, as schematically shown in FIG. 4, the pixel signal (collection of each pixel information) of the subject for one frame is acquired according to scanning based on HS and VS. The image signals obtained in order are subjected to various types of processing one-dimensionally to form image data. At this stage, the image data has luminance information and the like of each pixel, but it is undecided which part of the image data corresponds to which position (pixel) in the frame related to the output image. Therefore, in order to construct an output image based on the image data, it is necessary to give position information on the frame to the image data (frame construction) again based on HS and VS. Specifically, for example, when image data is written in a frame memory to which an address corresponding to a position on a frame is assigned, every time an HS pulse signal is received, the address moves to the address corresponding to the next row, and the VS pulse signal is changed. Every time it is received, it moves to the address corresponding to the next frame.

  However, when the device is actually used, noise may occur in various signals inside the device due to external factors or internal factors. In particular, when noise is superimposed on HS or VS, this noise is recognized as an HS or VS pulse signal that is scheduled to arrive next, and image row change or frame change is executed in response to the noise. It will be. In this case, it is difficult to control image output when images are continuously captured, which may cause a serious problem such as continuous image disturbance over several frames.

  In addition, this problem is caused by a portion where noise is likely to occur (for example, a connecting portion having a hinge mechanism) between the timing generator that generates HS and VS and the frame acquisition device or the frame construction device. This is particularly noticeable.

In order to cope with such a problem, a method for preventing noise from being mixed in advance by providing a filter for removing noise in the apparatus can be considered. Further, in Patent Document 1, a synchronization signal is sequentially captured in a pulse train storage shift composed of a series circuit of flip-flop circuits with a capture signal composed of a pulse train having a cycle sufficiently shorter than the cycle of the synchronization signal, and this output is obtained from an AND circuit or the like. A technique for eliminating noise by passing through a selection means is disclosed.
Japanese Patent Laid-open No. 5-150393

  However, according to the technique in which a filter for removing noise is provided inside the device, although mixing of noise can be suppressed to some extent, it is difficult to completely eliminate the noise. In particular, since a synchronization signal for image formation may cause image distortion even when a slight amount of noise is mixed in, it is not yet sufficient to provide such a filter. In addition, depending on the type of filter, there is a possibility of hindering downsizing and cost reduction of the device.

  In addition, as described in Patent Document 1, even in a method in which a predetermined pulse train storage shift is passed through the selection unit, when noise having a relatively long duration is mixed, the noise is not removed, so that the output image is still adversely affected. There is a risk that.

  In view of the above problems, the present invention provides an image processing apparatus and an electronic apparatus using the image processing apparatus that can avoid problems such as disturbance in an output image even when noise is superimposed on HS or VS. With the goal.

  To achieve the above object, an image processing apparatus according to the present invention generates and outputs image data for each frame based on an input image signal, and a horizontal synchronization signal and a vertical synchronization signal that define a frame size. In the processing apparatus, signal generation means for generating the horizontal synchronization signal and vertical synchronization signal, detection means for detecting an actual pulse period of the horizontal synchronization signal and / or vertical synchronization signal, and the horizontal synchronization signal and / or vertical synchronization The setting means for setting the target pulse period of the signal is compared with the actual pulse period and the target pulse period, and the horizontal synchronization signal and / or the vertical synchronization signal when both periods coincide with each other are determined to be appropriate. And a determination unit (first configuration).

  According to this configuration, it is possible to determine whether the horizontal synchronization signal and / or the vertical synchronization signal is appropriate (for the actual pulse period) by comparing the actual pulse period with the target pulse period. For this reason, if only the image data that has been constructed with a proper synchronization signal is selected and used for image display, problems such as image distortion can be avoided.

  Further, in the first configuration, a frame construction means for constructing a frame of image data based on the horizontal synchronization signal and the vertical synchronization signal, and the horizontal synchronization signal and / or vertical synchronization determined as appropriate by the determination means. The image data frame-constructed based on the signal is allowed to be output, while the image data frame-constructed based on the horizontal synchronization signal and / or the vertical synchronization signal that has not been determined to be appropriate is output. It is good also as a structure (2nd structure) which has a control means to prohibit.

  According to this configuration, since output is permitted only for the image data that is constructed based on the synchronization signal determined to be appropriate by the determination means, the output image data can be used for image display as it is. It is possible to avoid problems such as disturbance.

  In the second configuration, the image processing apparatus further includes a storage unit that stores the image data for at least one frame, and the control unit uses the horizontal synchronization signal and / or the vertical synchronization signal determined to be appropriate by the determination unit. For the image data constructed based on the frame, the output from the storage unit is permitted, while the image data constructed based on the horizontal synchronization signal and / or the vertical synchronization signal that has not been determined to be appropriate, A configuration (third configuration) for prohibiting output from the storage means may be adopted.

  According to this configuration, at least one frame of image data can be stored in the storage unit. Therefore, if image data is output when at least one frame of image data that has been appropriately constructed is stored, the appropriate image data is output in units of frames, so that the image is further disrupted. Etc. can be avoided.

  An image pickup unit that converts an optical image of the subject into an electrical image signal and outputs the image; and an image for each frame based on the image signal input from the image pickup unit, and the horizontal synchronization signal and the vertical synchronization signal. An image processing means for generating / outputting data; and an image display means for displaying an image based on image data generated by the image processing means, wherein the image processing means The electronic apparatus (fourth configuration) including the image processing apparatus according to the second or third configuration may be used.

  According to this configuration, in an electronic apparatus that displays an image by taking an optical image of a subject, it is possible to suppress problems such as image distortion as much as possible by the action obtained by the second or third configuration.

  The signal generation means and the frame construction means are the electronic apparatus according to the fourth configuration in which the connection means is provided by a hinge mechanism, and the detection means is downstream of the connection part. The electronic device (fifth configuration) for detecting the actual pulse period of the horizontal synchronizing signal and / or the vertical synchronizing signal in FIG.

  In an electronic device having a connecting portion by a hinge mechanism (for example, a two-fold mobile phone), when the signal generating means and the frame constructing means are provided via the connecting portion, relatively noise is generated in the connecting portion. Since it tends to occur, problems such as image distortion are particularly problematic. However, according to this configuration, even if noise is mixed in the horizontal synchronization signal and / or the vertical synchronization signal in the connecting unit, output of image data constructed based on such a synchronization signal is prohibited. Therefore, problems such as image distortion can be avoided.

  In the fourth or fifth configuration, the imaging unit outputs the image signal in synchronization with a pulse of a sampling signal, and the detection unit is configured to output the horizontal synchronization signal and / or the vertical synchronization signal. A configuration for detecting the actual pulse period of the horizontal synchronizing signal and / or the vertical synchronizing signal by counting the number of pulses of the sampling signal that arrives until the next pulse is detected each time a pulse is detected. (Sixth configuration) may be adopted.

  The horizontal synchronization signal and the vertical synchronization signal indicate scanning timing (scanning line feed or frame update timing) of the imaging pixels. For this reason, the number of pulses of the sampling signal generated between the arrival of the pulse of the horizontal synchronization signal and / or the vertical synchronization signal and the arrival of the next pulse is closely related to the number of imaging pixels. Therefore, with the above-described configuration, the target pulse period of the horizontal synchronization signal and / or the vertical synchronization signal can be easily set using information on the number of imaging pixels.

  As described above, in the image processing apparatus according to the present invention, whether the horizontal synchronization signal and / or the vertical synchronization signal is appropriate (for the actual pulse period) by comparing the actual pulse period with the target pulse period. It can be determined whether or not. For this reason, if only the image data that has been constructed with a proper synchronization signal is selected and used for image display, problems such as image distortion can be avoided.

  As an embodiment of the present invention, an outline of an electronic apparatus (a two-fold type mobile phone having an image sensor) that can monitor a subject in real time will be described with reference to a block diagram shown in FIG.

  In the present embodiment, the imaging lens 11, the imaging device 12, the image data forming units 13a and 13b, the frame memory 14, the VRAM 15, the image display unit 16, the control unit 21, the timing generator 22a on the sensor unit side, and the image processing LSI unit side A timing generator 22b, an HS cycle counter 23a, a VS cycle counter 23b, a determination unit 24, a pixel number setting unit 25, a monitor switch 26, and the like are provided. As an overall configuration, the sensor unit 1 including the image pickup device 12 and the like and the image processing LSI unit 2 including the control unit 21 and the frame memory 14 are connected via a connecting unit 3 using a hinge mechanism. .

  The control unit 21 controls the entire apparatus related to image processing, including writing image data to the frame memory 14 and transferring image data from the frame memory 14. In writing image data to the frame memory, HS and VS emitted from the timing generator 22a are continuously received and the signal information is used. That is, as will be described later, it is determined when image data is changed or when a frame is updated based on these HS and VS, and the image data is stored at an appropriate address in the frame memory.

  The timing generator 22 a provided in the sensor unit 1 is a pulse signal, and a horizontal synchronization signal HS indicating the timing of horizontal scanning and a vertical synchronization signal VS indicating the timing of vertical scanning are sent to the image sensor 12 and the control means 21. give. The image data forming unit 13a in the sensor unit 1 is supplied with a signal PCLK (sampling signal) serving as a reference for driving timing and sampling of the image signal. Accordingly, the image sensor 12 outputs an image signal having an image size corresponding to HS and VS in synchronization with PCLK. In response to the image signal, the image data forming unit 13a operates to form image data continuously (for example, 30 frames per second).

  The timing generator 22b provided in the image processing LSI unit 2 supplies a signal SCLK serving as a reference for driving timing to the image data forming unit 13b in the image processing LSI unit 2. The timing generator 22b transmits a signal CCLK synchronized with SCLK to the timing generator 22a. Thus, the operations of the timing generator 22a on the sensor unit 1 side and the timing generator 22b on the image processing LSI 2 side are coordinated so that a series of image data formation is performed smoothly.

  In addition, the imaging element 12 combines an optical image of a subject that has passed through the imaging lens 11 provided on the back side of the device main body with the imaging surface, and outputs an analog signal (image signal) that represents the amount of light received for each frame of pixels. , Output in synchronization with PCLK.

  As the imaging device 12, a CCD [Charge Coupled Device], a CMOS [Complementary Metal Oxide Semiconductor], or the like is used. The pixels of the image sensor 12 are arranged in a matrix, and the output of the image signal is performed in the right direction sequentially from the pixel at the leftmost stage of one frame, and when the output for one row is completed (HS If a pulse is received, the process proceeds in the order of successive steps. When the pixel reaches the rightmost pixel at the lowermost stage (when a VS pulse is received), the output of the image signal for one frame is completed, and the process proceeds to the next frame.

  The image data forming units 13a and 13b include an analog signal processing unit that performs correlated double sampling and automatic gain control on the image signal output from the image sensor 12, an AD converter that converts the obtained image signal into a digital signal, The digital signal processing unit is configured to perform various processes on the received digital signal. By operating in cooperation with each other, image data (digital information) is sequentially formed from input image signals (analog information). Note that the image data at the time of output from the image data forming units 13a and 13b is in a format in which information representing the luminance and the like of each pixel is one-dimensionally aligned in the order scanned by the image sensor.

  The formed image data is sequentially written into the frame memory 14 that can store image data for at least one frame, according to an instruction from the control unit 21. A predetermined address is given in the frame memory 14, and image data written at a specific address is output so as to represent a pixel at a position corresponding to the address.

  When the image data is written to the frame memory 14, the control unit 21 starts writing the image data to the frame memory in accordance with the VS pulse in a state where the image data can be written to the frame memory 14. . After that, every time an HS pulse is received, the image data is written to a predetermined address in the frame memory 14 so that the line feeds. The image data written until the next VS pulse is received is one frame.

  Thus, by writing the image data at a predetermined address in the frame memory 14, it is possible to convert the image data in a one-dimensional format into image data representing an image as a frame (frame construction). .

  Further, as described later, only the image data written in the frame memory 14 by the HS and VS determined as appropriate by the determination unit 24 is transferred to the VRAM 15. The image display unit 16 constituted by an LCD or the like displays an image based on the latest image data sequentially written in the VRAM 15. The user can monitor the subject in real time through the image display unit 16.

  The HS cycle counter 23a counts the number of PCLK pulses that arrive until the next HS pulse is detected each time an HS pulse is detected based on the transmitted HS and PCLK. The actual pulse period is detected. Similarly, the VS cycle counter 23b takes in VS and PCLK, and each time a VS pulse is detected, the number of PCLK pulses until the next VS pulse is detected is counted. Is detected. In the following description, the actual pulse period of HS or VS represents the number of PCLK pulses generated during one period of these signals.

  Then, the determination unit 24 compares the actual pulse period of HS and VS detected by each of the period counters 23a and 23b with the pulse period to be indicated by HS and VS (hereinafter referred to as “target pulse period”). When the two periods coincide with each other, it is determined that the actual pulse period is appropriate. When the both periods do not coincide with each other, it is determined that the actual pulse period is inappropriate. When the actual pulse period does not coincide with the target pulse period, it is assumed that noise is mixed in HS or VS, which becomes an illegal pulse and disturbs the original period. The target pulse period is calculated and set by the determination unit 24 based on setting information by the pixel number setting means 25, and the calculation method will be described later.

  The HS, VS, and PCLK signals detected by the period counters 23a and 23b are obtained by branching from signals transmitted from the timing generator 22a to the control unit 21 through signal lines for frame construction. Therefore, the determination unit 24 described above can detect whether noise has been mixed in the HS and VS before the timing generator 22a transmits and before branching.

  The position where the signal is branched can be arbitrarily selected. However, in order to detect noise in a wider range, it is desirable that the signal is branched as much as possible on the downstream side. In particular, as in the present embodiment, there is relatively no noise between the timing generator 22a that generates HS and VS and the location (control unit 21 in the present embodiment) that receives HS and VS and executes frame construction. If there is a location that is likely to occur (in this embodiment, the connecting portion 3), noise generated at that location is also detected, so that a signal is transmitted downstream (in this embodiment, on the image processing LSI portion 2 side). Is preferably branched.

  In general, it is assumed that a half-fold type mobile phone monitors a subject while holding one side (the image processing LSI unit 2 side) through a connecting unit. Therefore, an imaging lens, an imaging device, an image display unit, and a timing generator for providing a synchronization signal to the imaging device are provided in the sensor unit 1, while main images such as frame construction are provided from the viewpoint of securing space. An apparatus for executing processing is provided in the image processing LSI unit 2. As described above, particularly in the case of a two-fold type cellular phone, it is highly necessary to separately provide a timing generator that generates a synchronization signal and a portion that receives the synchronization signal and executes frame construction via a hinge mechanism.

  The pixel number setting unit 25 sets the number of imaging pixels and transmits the setting information to the control unit 21 and the determination unit 24. Here, the imaging pixel is actually related to generation of an image signal among a plurality of pixels arranged on the imaging surface of the imaging element 12. In general, if the number of pixels is large, highly accurate image data can be obtained. However, as much memory is required to store the data, it is desirable to be able to change the number of pixels according to the purpose of photographing. As a method of setting the number of pixels, in addition to a method in which the user directly specifies the number of pixels, for example, the number of pixels may be automatically selected according to the memory capacity.

  The monitor switch 26 is for switching the monitor ON and OFF, and continues the monitoring process while it is ON. Further, the switching of the monitor switch 26 may be operated by the user, or for example, a time measuring unit may be provided in the apparatus, and the monitor switch 26 may be turned OFF when a predetermined time has passed after the user turned ON.

  With the configuration as described above, the electronic apparatus of the present embodiment can monitor the subject in real time by the image display unit 16. In particular, by including the determination unit 24 and the like, it is possible to select only the image data that has been framed by HS and VS with an appropriate period and display the image. Next, the operation of the electronic device in the present embodiment will be described with reference to FIG.

  When the monitor switch 26 is turned on, the timing generators 22a and 22b receive instructions from the control unit 21, and HS and VS are received for the image sensor 12, and PCLK which is a drive signal for the image data forming units 13a and 13b. Alternatively, SCLK is supplied, and formation of image data of the subject is started.

  Further, HS, VS and PCLK supplied from the timing generator 22a are also transmitted to the control unit 21 and each of the period counters 23a and 23b via a predetermined signal line. Based on these signals, the HS cycle counter 23a counts the number of PCLK pulses to detect the actual pulse cycle of HS, and the VS cycle counter 23b counts the number of PCLK pulses to detect the actual pulse cycle of VS. Is counted (step S1).

  When the HS cycle counter 23a detects the actual HS pulse cycle (Y in step S2), the HS cycle counter 23a notifies the determination unit 24 of the detection result. The determination unit 24 receives this notification and compares the HS actual pulse period with the HS target pulse period (step S3).

  When the VS cycle counter 23b detects the actual pulse cycle of VS (Y in step S4), the VS cycle counter 23b notifies the determination unit 24 of the detection result. The determination unit 24 receives this notification and compares the actual pulse period of VS with the target pulse period of VS (step S5).

  Here, a method of calculating the target pulses of HS and VS will be described based on the timing chart of FIG. First, as shown in FIG. 3, the HS pulse period is composed of a period indicating a high level (period in which scanning line feed is performed) and a period indicating a low level (period in which scanning for one row is performed). Since HS gives the timing of horizontal scanning, the number of PCLK pulses within the period indicating the low level of HS should match the number of pixels in the horizontal direction. Accordingly, if the target pulse period of HS is T (HS), T (HS) can be calculated based on the following equation (1).

      T (HS) = Pixel (H) + α (1)

  Here, Pixel (H) represents the number of imaging pixels in the horizontal direction, and α represents the number of PCLK pulses generated within a period in which HS is at a high level.

  Next, as shown in FIG. 3, the VS pulse cycle is composed of a period indicating a high level (period in which a frame is updated) and a period indicating a low level (a period in which scanning for one frame is performed). Since VS gives the timing of vertical scanning, the number of pulses of PCLK within the period indicating the low level of VS should match the above-mentioned product of T (HS) and the number of imaging pixels in the vertical direction. Therefore, if the target pulse period of VS is T (VS), T (VS) can be calculated based on the following equation (2).

      T (VS) = T (HS) × Pixel (V) + β (2)

  Here, Pixel (V) represents the number of pixels in the vertical direction, and β represents the number of PCLK pulses generated within a period in which VS is at a high level. Note that α and β described above are obtained by reading out data stored in a ROM (not shown). The above-described calculation method is an example, and can be changed within a range that does not depart from the gist according to the situation.

  As a result of the comparison in step S3, when it is determined that they match (Y in step S3), it is recognized that the HS actual pulse cycle is normal. In this case, the writing process of the image data to the frame memory 14 is continued as it is. However, if it is determined that they do not match (N in step S3), it is recognized that the actual pulse period of HS is abnormal.

  Noise may be mixed as a cause of an abnormal pulse period. In such a case, the noise part is recognized as an HS pulse that is scheduled to arrive next, and an erroneous line feed is made in frame construction. As a result, when an image is displayed based on such image data, problems such as image distortion are caused.

  Therefore, if they do not match in step S3, the determination unit 24 instructs the control unit 21 to discard the image data for one frame that is currently constructed (step S6). The control unit 21 receives this instruction, discards the image data already written in the frame memory 14 for this one frame, and prohibits output from the frame memory 14 to the VRAM 15.

  Next, as a result of the comparison in step S5, if it is determined that they match (Y in step S5), it is recognized that the actual pulse period of VS is normal. In this case, the writing process of the image data to the frame memory is continued as it is. However, if it is determined that they do not match (N in step S5), it is recognized that the actual pulse period of VS is abnormal.

  In this case, as in the case where the actual pulse period of HS is abnormal, the determination unit 24 instructs the control unit 21 to discard the image data for one frame that is currently constructed (step S6). ). The control unit 21 receives this instruction, discards the image data already written in the frame memory 14 for this one frame, and prohibits output from the frame memory 14 to the VRAM 15.

  Note that the above-described determination process in step 3 or step 5 is performed for the purpose of selecting image data that has been erroneously broken or updated, and image data that has been appropriately constructed. Therefore, in the determination process, it is not always necessary to strictly match the actual pulse period and the target pulse period, and an allowable error may be provided within a range in which such an object can be achieved.

  When the image forming process for one frame is completed through the process described above, the process proceeds to the next frame and the same process is repeated. According to this embodiment, even when the actual pulse period of HS or VS for constructing a frame becomes abnormal, the image data constructed by the frame based on such HS or VS is output from the frame memory 14. Is forbidden. Since only the image data formed based on the HS and VS of the appropriate real pulse period is output to the VRAM 15, the image display unit 16 using the image data in the VRAM 15 does not have any problems such as image distortion. A stable image can be output.

  If the output of image data for one frame is prohibited as described above, the image display means continues to display the image of the previous frame at the moment when the frame is missing. However, when this is viewed as a continuous image, the display is not unnatural enough to cause a sense of incongruity due to missing normal frames, and this is not a problem in practice.

  Further, while the recording button (not shown) is pressed while the subject is being monitored, the image data transferred from the frame memory to the VRAM 15 may be transferred to a memory card (not shown). In this way, the image data displayed on the monitor can be stored in the memory card at any timing and used in other devices.

  In this embodiment, whether or not to accept image data is determined based on the actual pulse periods of both HS and VS. However, the determination is made based on only one of the actual pulse periods of HS and VS. May be.

  The configuration of the present invention can be variously modified in addition to the above embodiment without departing from the spirit of the invention. Furthermore, the present invention can be widely applied to various electronic devices such as a digital still camera, a digital video camera, and various monitor devices.

It is a block diagram which shows the structure of this embodiment. It is a flowchart which shows the flow of the image processing of this embodiment. It is a timing chart of each pulse signal in this embodiment. It is explanatory drawing which shows the outline of the monitoring of the to-be-photographed object using an image sensor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sensor part 2 Image processing LSI part 3 Connection part 11 Imaging lens 12 Image pick-up element 13a Image data formation part 13b Image data formation part 14 Frame memory (memory | storage means)
15 VRAM
16 Image display unit (image display means)
21 Control unit (control means, frame construction means)
22a Timing generator (signal generating means)
22b Timing generator 23a HS period counter (detection means)
23b VS cycle counter (detection means)
24 Judgment part (judgment means, setting means)
25 Pixel number setting means 26 Monitor switch

Claims (5)

In an image processing apparatus that generates and outputs image data for each frame based on an input image signal, and a horizontal synchronization signal and a vertical synchronization signal that define a frame size,
Signal generating means for generating the horizontal synchronizing signal and the vertical synchronizing signal;
Detecting means for detecting an actual pulse period of the horizontal synchronizing signal and / or the vertical synchronizing signal;
Setting means for setting a target pulse period of the horizontal synchronization signal and / or the vertical synchronization signal;
A determination means for comparing the actual pulse period and the target pulse period, and determining that the horizontal synchronization signal and / or the vertical synchronization signal is appropriate when both periods match;
Frame construction means for constructing a frame of image data based on the horizontal synchronization signal and the vertical synchronization signal;
The image data constructed based on the horizontal synchronization signal and / or the vertical synchronization signal determined to be appropriate by the determination means is allowed to be output, while the horizontal synchronization signal and / Or, for image data framed based on the vertical synchronization signal, a control means for prohibiting output,
An image processing apparatus comprising: Storage means for storing the image data for at least one frame;
The control means permits the output from the storage means for the image data constructed based on the horizontal synchronization signal and / or the vertical synchronization signal determined to be appropriate by the determination means, while determining that the image data is appropriate. 2. The image processing apparatus according to claim 1 , wherein an output from the storage unit is prohibited for image data constructed based on the horizontal synchronization signal and / or the vertical synchronization signal that has not been performed .   Imaging means for converting an optical image of an object into an electrical image signal and outputting the image data; and image data for each frame based on the image signal input from the imaging means, and the horizontal synchronization signal and the vertical synchronization signal. An electronic apparatus comprising: an image processing unit that generates and outputs; and an image display unit that displays an image based on image data generated by the image processing unit. An electronic apparatus comprising the image processing apparatus according to claim 1. The electronic device according to claim 3, wherein the signal generation unit and the frame construction unit are provided via a connecting part by a hinge mechanism, and the detection means is the horizontal at the downstream side of the connecting part. An electronic device that detects an actual pulse period of a synchronization signal and / or a vertical synchronization signal . The image pickup means outputs the image signal in synchronization with a pulse of the sampling signal, and the detection means detects the pulse of the horizontal synchronization signal and / or the vertical synchronization signal every time it detects the pulse. 4. The actual pulse period of the horizontal synchronizing signal and / or the vertical synchronizing signal is detected by counting the number of pulses of the sampling signal that arrives before detecting The electronic device according to claim 4 .

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