JP4927664B2 - Preamplifier circuit - Google Patents

Description

The present invention relates to a preamplifier circuit. In an optical receiver circuit that performs digital signal transmission in an optical communication system, an optical signal is converted into an electric signal (current signal) by a photodetector (PD), and then a current signal is converted into a voltage signal. It is useful when applied to a receiver circuit that shapes and amplifies, and is particularly useful when applied to a receiver circuit with a high sensitivity and wide dynamic range that can respond to burst data at high speed and receive signals from minute signals to large signals. is there.
Specifically, the preamplifier circuit of the present invention is applied as an optical receiver circuit which is a constituent circuit of a station optical terminal device (OLT), an optical packet router or the like in an optical subscriber transmission system.

Current preamplifier circuit for an optical receiver, as shown in the basic configuration of FIG. 17 (a), the receive current signal I _in which the optical signal receiving element (PD) 101 receives the photoelectric conversion, this received The signal I _in is converted into a voltage signal V _out by the amplifier circuit 102 by the impedance conversion gain Z _t (˜R _f ) and output. However, as shown in input-output characteristic of the preamplifier circuit of FIG. 17 (b), the current signal I _in is output amplitude is saturated waveform distortion occurs greatly. In the conventional optical receiver preamplifier circuit, when the current input to the circuit increases to achieve both high sensitivity and wide dynamic range characteristics, the feedback resistance is reduced and the impedance conversion gain is reduced. A voltage signal with less distortion is output even when a current is input.

FIG. 18 shows a basic configuration of a conventional optical receiving preamplifier circuit (conventional circuit example 1). The conventional circuit shown in FIG. 18 includes a light receiving element 101, a feedback resistance switching unit 103, and an amplifier circuit 102. The feedback resistor switching unit 103 is configured to connect the diode 104 in parallel with the feedback resistor _Rf . Alternatively, as shown in FIG. 19, the feedback resistance switching unit 103 has a configuration (conventional circuit example 2) in which resistances R _fL and R _fH are connected in parallel and switched by a switch SW to make the resistance value variable.

Conventional circuit example 1 configuration of the former, if the received current signal I _in is increased, the voltage difference between the input terminal and the output terminal of the amplifier circuit 102 is increased, it is inserted diode 104 in parallel with the feedback resistor R _f by turns oN, the by lowering equivalently feedback resistance value, a configuration in which the voltage signal V _out when a large current by lowering the transimpedance gain Z _t was prevented from being saturated. The latter conventional circuit example 2 configuration, if the received current signal I _in is increased, detects that the output voltage signal V _out is increased, by turning ON the switch SW, the equivalent feedback resistance value By reducing the impedance, the impedance conversion gain _Zt is lowered so that the voltage signal _Vout is not saturated at the time of a large current.

In the configuration in which the diode 104 is connected in parallel to the feedback resistor R _f of the conventional circuit example 1, when the input current I _in is increased due to the nonlinearity of the diode 104, a large distortion occurs in the output characteristics, and the output waveform is deteriorated. There was a problem to do. When the feedback resistor of the conventional circuit example 2 is composed of a plurality of resistors R _fL and R _fH connected in parallel and the switch SW, the problem of waveform distortion can be solved, but it is necessary to judge the switching of the feedback resistor. A switching judgment circuit having a large time constant is used in order to prevent malfunction and perform highly accurate level detection. For this reason, there was a problem that the time responsiveness of switching of the feedback resistance was inferior.

  In particular, in an optical subscriber transmission system such as a PON (Passive Optical Network) system that performs time multiplexing of data packets, the transmission distance varies from subscriber to subscriber, so that optical signals with different reception levels are received at the terminal unit for the station. There is a need to. For this reason, in the optical receiver circuit, it is necessary to stabilize the circuit operation state at a high speed with respect to signals having greatly different reception levels. That is, in the preamplifier circuit described above, it is necessary to perform gain switching at high speed.

In order to perform the gain switching at a high speed, it is necessary to detect the reception level at a high speed. In the conventional preamplifier circuit corresponding to burst transmission, the resistors R _fL and R _fH of the feedback resistor switching unit 103 are connected in parallel and the equivalent gain is switched by the switch SW. There is a configuration in which a reception level detection circuit for determination is performed by a hysteresis comparator. FIG. 20A shows a configuration example of a conventional preamplifier circuit (conventional circuit example 3) corresponding to burst transmission, and FIG. 20B shows an outline of level detection operation by a hysteresis comparator. By using a comparator having hysteresis characteristics for the level detection circuit (gain switching determination circuit) 105 that performs gain switching determination, the detection level of the output amplitude of the amplifier circuit 102 is set by the hysteresis width of the comparator and exceeds this width. As a result, the comparator can instantaneously make a gain switching determination.

In the conventional preamplifier circuit for burst transmission, the feedback resistance value is switched to make the gain variable in order to expand the dynamic range. It is necessary to make it. However, in order to perform gain switching, there is a problem in that a parasitic capacitance is excessive when viewed from the input terminal of the preamplifier circuit because resistors are connected in parallel, causing deterioration of the frequency band. Further, there is a problem that the switching control becomes complicated because the gain switching is performed in multiple stages. In particular, since a small amount of parasitic capacitance has a great influence on the frequency characteristics in high-speed operation, there is a problem that the influence of the parasitic capacitance caused by connecting feedback resistors in parallel becomes relatively large. FIG. 21 shows specific problems of the conventional gain switching configuration. FIG. 21A shows a configuration of a feedback resistor unit having a switching circuit. In order to perform gain switching, resistors R _f1 , R _f2 ,..., R _fn are connected in parallel and are switched by a switch (for example, FET SW). Switches the resistance value. However, the resistor on the semiconductor integrated circuit (IC) has parasitic capacitance as shown in FIG. Further, when a transistor (FET) is used as a switch, similarly, as shown in FIG.

  That is, conventionally, it is necessary to switch the gain of the preamplifier circuit in order to increase the sensitivity and wide dynamic range, but with the increase in the operation speed, the frequency band is deteriorated due to the influence of the parasitic capacitance of the gain switching unit. Therefore, there has been a problem that waveform deterioration occurs and transmission characteristics deteriorate.

Burst mode optical receiver circuit with AGC, Japanese Patent No. 3259707: FIG. Transimpedance amplifier, Japanese Patent Laying-Open No. 2006-050145: FIG. 156Mps burst signal compatible optical receiver, Saruwatari, Sugawara, Ibe, IEICE General Conference, Proceedings, 1997, B-10-128 “1.25 Gb / s Burst-Mode Receiver ICs with Quick Response for PON Systems”, M. Nakamura, Y. Imai, Y. Umeda, J. Endo, and Y. Akatsu, ISSCC2005, Tech. Dig., 12.4, pp. 226-227, Feb.2005. Fig..12.4.1

  As described above, in the conventional optical reception preamplifier circuit (compatible with burst transmission), when the dynamic range of the input signal is to be increased, the feedback resistor is switched in multiple stages to switch the gain of the preamplifier. However, there is a problem that the reception characteristics are deteriorated due to the band degradation due to the parasitic capacitance of the feedback resistor switching unit during high-speed operation.

  Accordingly, it is an object of the present invention to provide a preamplifier circuit for optical reception capable of high-speed operation corresponding to burst transmission capable of operating with high sensitivity and a wide dynamic range.

A preamplifier circuit of the first invention that solves the above-described problem includes a first amplifier circuit having a gain switching function, and a gain switching determination circuit connected to an output terminal of the first amplifier circuit. In the preamplifier circuit that performs gain switching of the first amplifier circuit by the output signal of the gain switching determination circuit,
Using a hysteresis comparator in the gain switching determination circuit and including an offset current control circuit connected to an input terminal of the first amplifier circuit, and controlling the offset current control circuit with an output signal of the gain switching determination circuit; ,
And the second amplification circuit including an offset voltage compensation circuit for compensating an input offset voltage to an output terminal of said first amplifier circuit is connected,
And a reset circuit that receives a switching determination signal of the gain switching determination circuit and an external reset signal and generates a reset signal for initializing the offset voltage compensation circuit of the second amplifier circuit.

The preamplifier circuit of the second invention is the preamplifier circuit of the first invention.
The reset circuit includes a pulse generation circuit that receives the switching determination signal and an OR circuit that receives an output signal of the pulse generation circuit and an external reset signal. The output is the output of the reset circuit.

According to the preamplifier circuit of the present invention, the hysteresis switching is used in the gain switching determination circuit, and the offset current control circuit connected to the input terminal of the first amplifier circuit is provided. By controlling with the output signal, it is possible to realize a preamplifier circuit that can operate with high sensitivity and a wide dynamic range. When applied to a receiver circuit of a digital transmission system, a normal signal for a large input signal Can be output, and high-speed offset compensation is possible.
As a result, a receiver that performs digital transmission can achieve high sensitivity, a wide dynamic range, and a high-speed response corresponding to burst data, which contributes to system efficiency and cost reduction. In particular, since it can cope with burst data, it is effective in an optical access system.

Hereinafter, reference examples and examples of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a configuration diagram of a preamplifier circuit for optical reception according to Reference Example 1 of the present invention. As shown in FIG. 1, the optical reception preamplifier circuit of the first reference example includes a first amplifier circuit 2 having a gain switching function and a gain connected to the output terminal of the first amplifier circuit 2. A switching determination circuit 4, and in the optical reception preamplifier circuit that performs gain switching of the first preamplifier circuit 2 by an output signal of the gain switching determination circuit 4, a hysteresis comparator is provided in the gain switching determination circuit 4. The offset current control circuit (AOC) 3 connected to the input terminal of the first amplifier circuit 2 is used, and the offset current control circuit 3 is controlled by the output signal of the gain switching determination circuit 4.

  According to the optical reception preamplifier circuit of this configuration, the dynamic range of the input signal can be improved by using both gain switching and input offset current control. Furthermore, by controlling the gain switching and the input offset current control by the high speed gain switching determination circuit 4 using a hysteresis comparator, a high speed response corresponding to burst transmission is possible.

FIG. 2 shows an outline of the operation of the optical receiver preamplifier circuit of the first reference example. In the PON system, the received signal has different reception strength for each packet. A switching decision is made by detecting whether the signal strength of the received signal is larger or smaller than a set level, and a feedback resistance control signal (R _f switching control signal) and an input offset current control signal (AOC control signal) are determined by this switching decision signal. The feedback resistance switching control and AOC control are performed by these control signals.

  Here, the gain switching determination circuit 4 for determining the signal strength of the received signal has hysteresis characteristics as shown in FIG. 20B, and responds instantaneously when the received signal exceeds the set signal strength. is there. Further, since the gain switching determination circuit 4 has hysteresis characteristics, it is necessary to initialize each received packet. However, this initialization gives an initialization signal (reset signal) to the gain switching determination circuit 4 between the packets from the outside. By doing.

The control of the input offset current is performed by setting an offset current I _sink in advance and switching the offset current I _sink on / off by an AOC control signal that is an output signal of the gain switching determination circuit 4. FIG. 3 shows an outline of the AOC operation by drawing the input current. By drawing out the offset current I _sink , the operating point is moved and the output voltage V _out from the input current signal I _in which the optical signal is photoelectrically converted by the photodiode 1 within the linear operation range of the first amplifier circuit 2. Therefore, the waveform distortion of the output voltage _Vout can be suppressed. When the offset current I _sink is set to a half value of the peak value I _peak of the input current signal I _in assumed as shown in the following equation (1), distortion can be suppressed most effectively as shown in FIG. .
I _sink = I _peak / 2 (1)

  Further, since the current source from which the offset current is drawn is connected to the input of the preamplifier circuit having high sensitivity of band degradation due to the parasitic capacitance, it is effective to use a bipolar transistor having a small parasitic capacitance.

The switching of the feedback resistor R _f and the ON / OFF of the AOC are controlled by a high speed level detection signal using a hysteresis comparator. Therefore, high-speed gain and AOC control corresponding to burst data can be performed.

Therefore, according to the preamplifier circuit for optical reception of this reference example 1, in the preamplifier circuit having a high-speed level detection circuit and a gain switching function, gain switching and input offset current control can be realized without a complicated control circuit, Since there is no band degradation due to parasitic capacitance, it is possible to provide a preamplifier circuit with high sensitivity and wide dynamic range that supports burst transmission.

Next, Reference Examples 2 to 5 and Examples 1 to 3 of the present invention will be described.

[ Reference Example 2 ]
FIG. 4 is a block diagram of an optical receiving preamplifier circuit according to Reference Example 2 of the present invention . In FIG. 4, 1 is a photodiode (PD), 2 is a first amplifier circuit, 3 is an offset current control circuit (AOC), 4 is a gain switching determination circuit, and 5 is a TIA core circuit. The preamplifier circuit for optical reception according to the first embodiment has a TIA core circuit 5 composed of a feedback resistor R _f and a first amplifier circuit 2 whose resistance values can be switched, and an R that performs switching control of the feedback resistor R _{f. f} switching control circuit 6, gain switching determination circuit 4 for determining whether to switch from the output amplitude of the TIA core circuit 5 (that is, the first amplifier circuit 2), and an input offset current control circuit (AOC) 3 This offset current control circuit 3 includes a current source 7 connected to the input terminal of the TIA core circuit 5 (ie, the first amplifier circuit 2) via the switch SW, and a gain switching determination circuit 4 The control circuit 8 is configured to turn on / off the switch SW by an output signal (switching determination signal).

  The gain switching determination circuit 4 is configured by a hysteresis comparator, and sets the amplitude of switching determination by the hysteresis width. When the output voltage signal of the TIA core circuit 5 (first amplifier circuit 2) exceeds the set amplitude, the gain switching determination circuit 4 functions as a comparator. Work and perform level judgment instantly. This function is applied to the gain switching determination circuit 4. Further, the gain switching determination circuit 4 has a function to be initialized by an external reset signal because once the amplitude is determined and the comparator is turned on, normal reception data does not return to the initial state due to hysteresis characteristics.

FIG. 5 shows an operation example of input offset current compensation. When a current signal larger than a preset signal current is input, the switching signal becomes High, and the input offset current control circuit (AOC) 3 is turned ON. An offset compensation current I _sink set according to this flows. At this time, the switching signal of the gain switching determination circuit 4 is switched at high speed, and the current value of the offset compensation current I _{sink of} the input offset current control circuit 3 is also switched at high speed accordingly. Since an offset compensation current value is set in advance and controlled by ON / OFF, high-speed input current offset compensation is possible.

Like the optical receiver preamplifier circuit, the feedback resistor _Rf is switched at high speed by the high-speed gain switching determination circuit 4, and at the same time, the input offset current compensation is performed, so that high-speed gain can be achieved without increasing the switching time. The effect of performing switching and offset compensation can be obtained. On the other hand, when using separate conventional control circuits, particularly in the case of a control circuit using a feedback circuit, it takes a response time and sequentially feeds back changes in the circuit output. Time is doubled because stabilization is performed in the loop. If the response time of these two feedback loops is to be shortened, there is a problem that the worst operation stability is not achieved.

Further, according to the configuration of the optical receiving preamplifier circuit of the second reference example , the feedback resistance switching frequency as shown in FIG. 21 (problem of the conventional circuit) is not increased (that is, feedback in which resistance value switching is possible). The configuration of the resistor R _f is not made multi-stage as shown in FIG. 21, for example, a configuration in which two resistors R _fL and R _fH are connected in parallel as shown in FIG. However, because the dynamic range (signal reception range) can be expanded by the input offset compensation, the parasitic capacitance of the transistor (FET) used for the gain switching resistor and the switch can be reduced, so that band degradation can be prevented, and bandwidth and high-speed operation can be achieved. effective.

For the optical amplifier preamplifier circuit of Reference Example 2, a circuit simulation was performed for a 10 Gbit / s burst signal input by a circuit simulator (HSPICE, manufactured by Synopsys). Switching characteristics were obtained.

[Reference Example 3]
FIG. 6 is a configuration diagram of a preamplifier circuit for optical reception according to Reference Example 3 of the present invention. In FIG. 6, 1 is a photodiode, 2 is a first amplifier circuit, 3 is an offset current control circuit (AOC), 4 is a gain switching determination circuit, 5 is a TIA core circuit, 11 is a third amplifier circuit, and 12 is A second TIA core circuit 13 is a single / differential conversion circuit.

The optical reception preamplifier circuit of Reference Example 3 has a differential configuration with respect to the optical reception preamplifier circuit shown in Reference Example 2, and includes a first TIA core circuit 5 (that is, a gain switching function). And a second TIA core circuit 12 (that is, a third amplifier circuit 11 having a gain switching function) having the same configuration as that of the first amplifier circuit 2). The input terminal of the second TIA core circuit 12 ( third amplifier circuit 11) is provided with the same offset current control circuit 3 as the first TIA core circuit 5 (first amplifier circuit 2). One ON / OFF control circuit 8 controls ON / OFF of offset current compensation.

The resistance value switching of the feedback resistor R _f of the second TIA core circuit 12 is controlled by the same R _f switching control signal (the output signal of the gain switching determination circuit 4) as that of the first TIA core circuit 5. In the optical reception preamplifier circuit according to the second embodiment, the differential configuration has the effect of being less susceptible to the influence of power supply noise by improving the common-mode noise resistance and the input of the gain switching determination circuit 4. Is operated with a differential signal, similarly, variations due to in-phase components due to manufacturing yield and the like can be removed, and there is an effect that highly accurate amplitude detection of only the signal amplitude can be performed.

From the above, by using a differential configuration for the preamplifier circuit, such as the optical receiver preamplifier circuit shown in Reference Example 3 , stable signal transmission can be achieved without being affected by noise and manufacturing variations even at high speeds. It is.

As a result of performing a circuit simulation similar to that of Reference Example 2 on the optical receiver preamplifier circuit shown in Reference Example 3 , a high-speed switching characteristic with good feedback resistance and input offset compensation was obtained.

[Reference Example 4]
FIG. 7 is a configuration diagram of a preamplifier circuit for optical reception according to Reference Example 4 of the present invention. In FIG. 7, 1 is a photodiode, 2 is a first amplifier circuit, 3 is an offset current control circuit (AOC1), 4 is a gain switching determination circuit, 5 is a TIA core circuit, 21 is a second amplifier circuit, and 22 is This is an offset voltage compensation circuit (ACO2).

In the optical reception preamplifier circuit of the reference example 4, the offset voltage compensation circuit (AOC2) 22 for compensating the offset voltage at the output terminal of the optical reception preamplifier circuit shown in the first embodiment or the reference example 3 is provided. The second amplifying circuit 21 is connected. The offset voltage compensation circuit (AOC2) 22 monitors the output signal of the second amplifier circuit 21, compensates for the input offset voltage of the second amplifier circuit 21, and applies the second bias condition with an optimum bias condition for the input signal . The amplifying circuit 21 is functioned to output a good waveform with little waveform distortion. Here, the second amplifier circuit 21 may have an amplitude limiting function or a linear amplifier circuit.

An operation example of the optical reception preamplifier circuit of the reference example 4 is shown in FIG. FIG. 8 shows an example of differential signal operation in the case of a differential configuration (see FIG. 6). FIG. 8A shows output signals OUTP and OUTN of single / differential converted outputs, and rough offset compensation is instantaneously performed by the input offset current control (AOC1) of the TIA core circuit 5 (FIG. 8). (B)). Subsequently, high-precision offset compensation is performed by voltage offset compensation (AOC2) of the second amplifier circuit 21 connected to the output of the single / differential conversion circuit 13 (see FIG. 6) (FIG. 8C). . With the two-stage AOC configuration of AOC1 and AOC2, offset compensation can be performed at high speed and with high accuracy, so that waveform amplification can be performed without distortion over a wide range of input amplitudes.

With respect to the optical reception preamplifier circuit shown in Reference Example 4 , a circuit simulation similar to that of Reference Example 2 was performed. As a result, a high-speed switching characteristic with good feedback resistance and input offset compensation was obtained.

[Reference Example 5]
FIG. 9 is a configuration diagram of a preamplifier circuit for optical reception according to Reference Example 5 of the present invention. In FIG. 9, 1 is a photodiode, 2 is a first amplifier circuit, 3 is an offset current control circuit (AOC1), 4 is a gain switching determination circuit, 5 is a TIA core circuit, 21 is a second amplifier circuit, and 22 is This is an offset voltage compensation circuit (ACO2).

The preamplifier circuit for optical reception of the reference example 5 is characterized in that, in the configuration shown in the reference example 4, the voltage offset compensation circuit (AOC2) 22 of the second amplifier circuit 21 has a feedforward configuration. . In this AOC2, detects the offset voltage from the input signal of the second amplifying circuit 21 is intended to compensate for the offset voltage of the second amplifying circuit 21, since the feedback path is not shown in the Reference Example 4, Response time can be greatly reduced. Therefore, the combination of the input offset current control (AOC1) of the TIA core circuit 5 capable of high-speed response and the voltage offset compensation (AOC2) of the feed-forward configuration capable of high-speed response particularly for data packets input in bursts. Fast response is possible.

As a result of performing a circuit simulation similar to that of the above-described Reference Example 2 for the optical reception preamplifier circuit shown in Reference Example 5 , good high-speed switching characteristics of feedback resistance and input offset compensation were obtained.

[Example 1]
FIG. 10 is a configuration diagram of the optical reception preamplifier circuit according to the first embodiment of the present invention. In FIG. 10, 1 is a photodiode, 2 is a first amplifier circuit, 3 is an offset current control circuit (AOC1), 4 is a gain switching determination circuit, 5 is a TIA core circuit, 21 is a second amplifier circuit, and 22 is The offset voltage compensation circuit (ACO2) 31 is a reset circuit.

In the feedforward type AOC circuit as shown in Reference Example 5 above, a circuit having a high discharge time constant such as a peak value hold is normally used. However, in order to respond to data packets having different signal strengths, the initial value is set for each packet. Needs to be made. In this configuration, a reset signal of the feedforward type AOC (AOC2) 22 that controls the voltage offset of the second amplifier circuit 21 is generated in the reset circuit 31 from the external reset signal and the switching determination signal.

FIG. 11 shows a specific operation outline of the optical receiving preamplifier circuit shown in the first embodiment. FIG. 12 shows an outline of the operation when the reset circuit 31 is not provided. A second data packet (Packet # 2) having a signal strength different from that of the first data packet (Packet # 1) is input, and an external reset signal is used to initialize the operation setting of the preamplifier circuit for each packet. (Ext. Reset) is given. In the AOC2 circuit, the peak voltage of the input signal is detected to detect the optimum offset voltage value. Since this detection level is initialized by the reset signal for each data packet, it is possible to operate on signals having different input intensities. However, when the AOC2 circuit is directly initialized by an external reset signal as shown in FIG. 12, when the gain is switched by the switching determination signal, the signal amplitude is reduced, so that initialization is necessary again. If there is no re-reset after the gain is switched, the optimum offset voltage cannot be detected as shown in FIG. 12, which causes problems such as deterioration of waveform distortion in the output or the inability to output the output signal. If the internal reset signal is generated by the switching determination signal and re-reset is performed after the gain switching as in the optical reception preamplifier circuit of the fifth embodiment, a normal output signal is obtained as shown in FIG. Obtainable.

As a result of performing a circuit simulator similar to that of Reference Example 2 on the optical reception preamplifier circuit shown in the first embodiment, a re-reset operation was performed on AOC2, and good high-speed switching characteristics were obtained.

[Example 2 ]
13 and 14 Ru diagram der of the reset circuit of the optical receiver preamplifier circuit according to a second embodiment of the present invention. FIG. 13 shows a configuration when a logical sum is used for the reset circuit, and FIG. 14 shows a configuration when a logical product is used for the reset circuit. Although not shown, the overall configuration of the optical receiving preamplifier circuit of the second embodiment is the same as that of the first embodiment (see FIG. 10).

  The reset circuit 31 in FIG. 13A generates a pulse from the switching determination signal of the gain switching determination circuit 4 by the pulse generation circuit 41, and the logical sum (OR) of this pulse and the external reset signal by the OR circuit 42. By taking the above, an internal reset signal (Int.Reset) is generated. FIG. 13B shows an operation example of the reset circuit 31.

  The reset circuit 31 in FIG. 14A generates a pulse from the switching determination signal of the gain switching determination circuit 4 by the pulse generation circuit 51, and inverts the inverted signal of the pulse by the inversion circuit 52 and the external reset signal. The internal reset signal (Int.Reset) is generated by taking the NAND in the NAND circuit 54 from the inverted signal inverted at 53. FIG. 14B shows an operation example of the reset circuit 31.

  FIG. 15 shows an embodiment of the pulse generation circuits 41 and 51 used in the reset circuit 31. As shown in FIG. 15A, the pulse generation circuits 41 and 51 take a logical product (AND) of the gain switching signal and a signal obtained by delaying and inverting the gain switching signal by the delay circuit 61 and the inverting circuit 62. Thus, a pulse can be generated at the time of gain switching. FIG. 15B shows an operation example of the pulse generation circuits 41 and 51.

With respect to the optical reception preamplifier circuit shown in the second embodiment, a circuit simulation similar to that in the second reference example was performed. As a result, a high-speed switching characteristic with good feedback resistance and input offset compensation was obtained.

[Example 3 ]
Figure 16 is Ru diagram der offset current control circuit of Embodiment 3 or the optical receiver preamplifier circuit according to the reference example 6 of the present invention. Na us, although not shown, the reference examples 2-5 the overall arrangement of a preamplifier circuit for the light receiving of the embodiment 3 or Reference Example 6, any of Examples 1 and 2 ( 4, 6, 7, 9, 10, 13, and 14).

As shown in FIG. 16, a transistor 71 and a resistor 72 are connected in series to the input terminal of the first amplifier circuit 2 or the input terminals of the first amplifier circuit 2 and the third amplifier circuit 11 (see FIG. 6). The current value of the offset compensation current I _sink of the current source is determined by the base potential of the transistor 71. In order to control the current value, an FET switch SW2 controlled by a switching determination signal of a gain switching determination circuit 4 (see FIG. 1 etc.) and an FET switch controlled by an inverted signal obtained by inverting the switching determination signal by an inverting circuit 74 The current value at the time of ON and the current value at the time of OFF are switched by SW2. Note that reference numeral 73 in FIG. 16 denotes a capacitor having one end connected between the reference voltage source _Vref and the FET switch SW2 and the other end grounded.

When the offset current control circuit 3 is OFF (when no switching determination signal is input from the gain switching determination circuit 4), the base terminal of the transistor 71 is sufficiently low so that no current flows through the transistor 71 as in, for example, ground. Connect to the set potential via the FET switch SW1. On the other hand, when ON (when a switching determination signal is input from the gain switching determination circuit 4), the reference voltage source V _ref set to the base potential through which the set current value flows is connected via the FET switch SW2.

  Further, a negative feedback resistor may be connected between the emitter of the transistor 71 and the ground in order to stabilize the operation of the current value. In addition, a filter capacitor may be connected to each connection point in order to eliminate the influence of noise due to the transient response of the switch. The transistor used for the current source is a bipolar transistor as an embodiment, but can be configured using a MOS transistor.

As a result of performing the same circuit simulator as in Reference Example 2 on the optical reception preamplifier circuit shown in the third embodiment, the offset current control circuit is turned ON / OFF by the switching determination signal, and good high-speed offset compensation characteristics are obtained. Obtained.

  As described above, according to the preamplifier circuit of the present invention, it is possible to easily realize a preamplifier circuit capable of high-speed operation with high sensitivity and wide input dynamic range corresponding to burst data.

It is a block diagram of the preamplifier circuit for optical reception which concerns on the reference example 1 of this invention. It is a figure which shows the operation | movement outline | summary of the preamplifier circuit for optical reception which concerns on the reference example 1 of this invention. It is a figure which shows the operation | movement outline | summary of AOC by input current extraction. It is a block diagram of the preamplifier circuit for optical reception which concerns on the reference example 2 of this invention. FIG. 10 is a diagram showing an operation example of input offset current compensation of the optical reception preamplifier circuit shown in Reference Example 2 ; It is a block diagram of the preamplifier circuit for optical reception which concerns on the reference example 3 of this invention. It is a block diagram of the preamplifier circuit for optical reception which concerns on the reference example 4 of this invention. FIG. 10 is a diagram showing an operation example of the optical reception preamplifier circuit shown in Reference Example 4 ; It is a block diagram of the preamplifier circuit for optical reception which concerns on the reference example 5 of this invention. 1 is a configuration diagram of a preamplifier circuit for optical reception according to Embodiment 1 of the present invention. FIG. FIG. 3 is a diagram showing a specific outline of operation of the optical reception preamplifier circuit shown in the first embodiment. It is a figure which shows the operation | movement outline | summary when there is no reset circuit. (A) is a block diagram of the reset circuit of the optical reception preamplifier circuit according to the second embodiment of the present invention, and (b) is a diagram showing an operation example of the reset circuit. (A) is the other block diagram of the reset circuit of the preamplifier circuit for optical reception which concerns on Example 2 of this invention, (b) is a figure which shows the operation example of the said reset circuit. (A) is a figure which shows the Example of the pulse generation circuit used with the said reset circuit, (b) is a figure which shows the operation example of the said pulse generation circuit. It is a block diagram of the offset current control circuit of the preamplifier circuit for optical reception which concerns on Example 3 of this invention. (A) is a figure which shows the basic composition of the conventional optical reception preamplifier circuit, (b) is a figure which shows the input-output characteristic of the said optical reception preamplifier circuit. (A) is a figure which shows the basic composition (conventional circuit example 1) of the conventional optical reception preamplifier circuit, (b) is a figure which shows the input-output characteristic of the said optical reception preamplifier circuit. (A) is a figure which shows the basic composition (conventional circuit example 2) of the conventional optical reception preamplifier circuit, (b) is a figure which shows the input-output characteristic of the said optical reception preamplifier circuit. (A) is a figure which shows the structural example of the preamplifier circuit (conventional circuit example 3) corresponding to the conventional burst transmission, (b) is a figure which shows the operation | movement outline | summary of the level detection by a hysteresis comparator. (A) is a figure which shows the structure of the feedback resistance part provided with the switching circuit, (b) is a figure which shows the parasitic capacitance of a resistor, (c) is a figure which shows the parasitic capacitance of FET.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Photodiode 2 1st amplifier circuit 3 Offset current control circuit (AOC1)
4 gain switching judgment circuit 5 first TIA core circuit 6 R _f switching control circuit 7 current source 8 ON / OFF control circuit 11 third amplifier circuit 12 second TIA core circuit 13 single / differential conversion circuit 21 second Amplifier circuit 22 Offset voltage compensation circuit (AOC2)
31 reset circuit 41 pulse generation circuit 42 OR circuit 51 pulse generation circuit 52, 53 inverting circuit 54 NAND circuit 61 delay circuit 62 inverting circuit 63 AND circuit 71 transistor 72 resistor 73 capacitor 74 inverting circuit SW switch SW1, SW2 FET switch R _f Feedback resistor (resistance value can be switched)
V _ref reference voltage source

Claims (2)

A first amplifying circuit having a gain switching function; and a gain switching determining circuit connected to an output terminal of the first amplifying circuit, and the first amplifying circuit according to an output signal of the gain switching determining circuit In the preamplifier circuit that performs gain switching of
Using a hysteresis comparator in the gain switching determination circuit and including an offset current control circuit connected to an input terminal of the first amplifier circuit, and controlling the offset current control circuit with an output signal of the gain switching determination circuit; ,
And the second amplification circuit including an offset voltage compensation circuit for compensating an input offset voltage to an output terminal of said first amplifier circuit is connected,
And a reset circuit that receives a switching determination signal of the gain switching determination circuit and an external reset signal and generates a reset signal for initializing the offset voltage compensation circuit of the second amplifier circuit. Amplification circuit. 2. The preamplifier circuit according to claim 1, wherein the reset circuit includes a pulse generation circuit that receives the switching determination signal, and a logical sum (OR) that receives an output signal of the pulse generation circuit and an external reset signal. A preamplifier circuit comprising: a circuit; and an output of the OR circuit as an output of the reset circuit.

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