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JP4972503B2 - Semiconductor power module - Google Patents
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JP4972503B2 - Semiconductor power module - Google Patents

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JP4972503B2
JP4972503B2 JP2007234862A JP2007234862A JP4972503B2 JP 4972503 B2 JP4972503 B2 JP 4972503B2 JP 2007234862 A JP2007234862 A JP 2007234862A JP 2007234862 A JP2007234862 A JP 2007234862A JP 4972503 B2 JP4972503 B2 JP 4972503B2
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solder
temperature
power module
chip
semiconductor power
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JP2009070863A (en
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太佐男 曽我
大助 川瀬
和弘 鈴木
英一 森崎
英恵 下川
克明 斎藤
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Hitachi Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/321Structures or relative sizes of die-attach connectors
    • H10W72/325Die-attach connectors having a filler embedded in a matrix
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/353Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

本発明は半導体パワーモジュールに係り、特に、IGBT,パワーMOSFETなどの接続に適用する技術に好適な半導体パワーモジュール関する。   The present invention relates to a semiconductor power module, and more particularly to a semiconductor power module suitable for a technique applied to connection of an IGBT, a power MOSFET or the like.

半導体パワーモジュールは、SiチップとAlN,Al23,Si34等の絶縁基板及び熱伝導性に優れたCu,Alベース基板等とがはんだ付けされ、シリコーンゲルで充填される構成が主流である。今までは、SiチップとAlN,Al23,Si34等の絶縁基板の電極とがPb系高温はんだで接続された後、チップを搭載した絶縁基板は、大型のCuベース基板等に低温系のPb−Sn共晶系はんだではんだ付けされる構成である。 The semiconductor power module has a configuration in which an Si chip, an insulating substrate such as AlN, Al 2 O 3 , and Si 3 N 4 and a Cu, Al base substrate having excellent thermal conductivity are soldered and filled with silicone gel. Mainstream. Up to now, after the Si chip and the electrodes of the insulating substrate such as AlN, Al 2 O 3 , Si 3 N 4 are connected with Pb-based high temperature solder, the insulating substrate on which the chip is mounted is a large Cu base substrate or the like And soldering with a low-temperature Pb—Sn eutectic solder.

近年、環境の問題でPbフリーはんだの使用が必須になり、国内では、低温側のSn−37Pb共晶はんだ代替用としてSn−3Ag−0.5Cuはんだが民生,コンピュータ,通信用に広範囲に使用されている。   In recent years, the use of Pb-free solder is indispensable due to environmental problems. In Japan, Sn-3Ag-0.5Cu solder is widely used for consumer, computer, and communication as a substitute for low-temperature Sn-37Pb eutectic solder. Has been.

しかし、Sn−3Ag−0.5Cuはんだは、ベース基板のような大型基板接続用として高信頼性を確保されるまでには至っていない状況にある。仮に、Sn−3Ag−0.5Cuはんだ(融点;217〜221℃)が低温用として用いられた場合、温度階層接続可能な高温系Pbフリーはんだとして、Sn系で最も融点の高いSn−(5〜10)Sb(融点:235〜243℃)が知られている。ところが、この組合せではSn−3Ag−0.5Cuのはんだ付け温度を225〜230℃以下で行う必要があるので、温度ばらつきが少なく、特殊な条件でないと接続できない状況にある。即ち、この温度ではぬれ性を確保できない状態である。   However, Sn-3Ag-0.5Cu solder is not in a situation where high reliability is secured for connecting a large substrate such as a base substrate. If Sn-3Ag-0.5Cu solder (melting point: 217-221 ° C.) is used for low temperature, Sn— (5 -10) Sb (melting point: 235-243 ° C) is known. However, in this combination, it is necessary to perform the soldering temperature of Sn-3Ag-0.5Cu at 225 to 230 ° C. or less, so that there is little temperature variation and the connection is not possible under special conditions. That is, the wettability cannot be secured at this temperature.

尚、Sn−Ag−Cu−In系はんだ組成特許としては、米国特許第5520752号公報が知られている。   Incidentally, as a Sn—Ag—Cu—In solder composition patent, US Pat. No. 5,520,752 is known.

米国特許第5520752号公報US Pat. No. 5,520,752

Pbフリーの2階層はんだを用いた高信頼パワーモジュールを目的として、特に産業用,車両用高出力チップ搭載を対象にした構造がある。   For the purpose of a high-reliability power module using Pb-free two-layer solder, there is a structure especially intended for mounting on industrial and vehicle high-power chips.

これまでの低温用PbフリーはんだのSn−3Ag−0.5Cuは耐クリープ性は大であっても、自身のクリープ変形ができ難いため、パワーモジュール等の大型基板端部での大変形に対応できず、結局、応力が高いため、寿命が短くなることが分かった。   Conventional low temperature Pb-free solder, Sn-3Ag-0.5Cu, has high creep resistance, but it is difficult for its own creep deformation, so it supports large deformation at the end of large substrates such as power modules After all, it was found that the life was shortened due to high stress.

また、これまでの高温用Sn−(5〜10)Sb(融点;235〜243℃)では、低温側Pbフリーはんだ〔Sn−3Ag−0.5Cu(融点;217〜221℃)〕付け時に、両者の融点が近いため、先に接合した高温側はんだを溶かす恐れがあり、十分な温度マージンがとれない状況にある。   In addition, for conventional high-temperature Sn- (5-10) Sb (melting point: 235-243 ° C.), when attaching low-temperature side Pb-free solder [Sn-3Ag-0.5Cu (melting point: 217-221 ° C.)] Since the melting points of the two are close to each other, there is a risk of melting the high-temperature solder that has been joined first, and a sufficient temperature margin cannot be obtained.

本発明は上述の点に鑑みなされたもので、その目的は、低温系Pbフリーはんだで大型基板に対し信頼性を確保した接合ができて、かつ温度階層接続を可能とする高温系Pbフリーはんだとの組合せ構造を可能とした半導体パワーモジュールを提供することにある。   The present invention has been made in view of the above-described points, and an object of the present invention is to provide a high-temperature Pb-free solder that can be reliably bonded to a large-sized substrate with a low-temperature Pb-free solder and can be connected to a temperature hierarchy. It is an object to provide a semiconductor power module that can be combined with the semiconductor power module.

Pbフリーの階層はんだで高信頼性とはんだ付けプロセスを両立させる方法として、高温側はんだとして、Sn−(11〜20)Sb(一例としてSn−15Sbの融点;246〜290℃)を用いる構成を考えた。   As a method of achieving both high reliability and a soldering process with Pb-free layered solder, a configuration using Sn- (11-20) Sb (for example, the melting point of Sn-15Sb; 246-290 ° C.) is used as the high-temperature side solder. Thought.

パワーモジュール構造の場合、幸い耐熱性の部品で構成されているため、高温用はんだを用いる時は、はんだ付け温度を十分に上げて、ぬれ性を確保することが可能である。Sn−(11〜20)SbはSn−(5〜10)Sbと比べ、多少ぬれ性は劣るがはんだ付け温度を上げることで、ぬれ性を向上させることができる。また、Sn−(5〜10)Sbと比べ、短所とされるはんだの硬さ,変形性に劣るとしても、SiチップとAlN基板間の熱膨張係数の差が少ない構成であることからはんだの歪が小さく、温度サイクルにも耐えられる。   In the case of the power module structure, fortunately, it is composed of heat-resistant parts. Therefore, when using high-temperature solder, it is possible to sufficiently raise the soldering temperature and ensure wettability. Sn- (11-20) Sb is slightly inferior to Sn- (5-10) Sb, but the wettability can be improved by raising the soldering temperature. In addition, compared to Sn- (5-10) Sb, even though the hardness and deformability of the solder, which is regarded as a disadvantage, are inferior, the difference in thermal expansion coefficient between the Si chip and the AlN substrate is small, so that the solder Strain is small and can withstand temperature cycling.

Sn−15Sbの特徴を更に生かすためには、はんだとチップ周囲を物性を特定化したエポキシ樹脂で被覆すると、樹脂により、はんだの変形を拘束することで寿命向上が図れる。更に、メタライズとの反応については、Sn−Ag−Cu系も同様であるが、化合物成長は活発である。このため、後述するようにSn−Sbはんだ中にCu,Ni等を添加することで、メタライズ膜との組合せ、熱処理条件等を考慮し、厳しい条件にも対応できる。   In order to further utilize the characteristics of Sn-15Sb, if the solder and the periphery of the chip are coated with an epoxy resin whose physical properties are specified, the life can be improved by restraining the deformation of the solder by the resin. Further, regarding the reaction with metallization, the Sn-Ag-Cu system is the same, but the compound growth is active. For this reason, as described later, by adding Cu, Ni or the like to the Sn—Sb solder, it is possible to cope with severe conditions in consideration of the combination with the metallized film, heat treatment conditions, and the like.

他方、Pbフリーの低温側はんだとして、大型Cuベース基板に対して、端部での大変形に比較的耐えられるはんだ組成として、Sn−3Ag−0.5Cu−5In(203〜212℃)を見出した。このはんだは、Sn−3Ag−0.5Cu(217〜221℃)よりはんだ付け温度を約10℃下げられるので、階層接続用としての作業温度マージンを広げることができる。Sn−3Ag−0.5Cu−5Inのはんだ付け温度は230〜240℃で十分可能である。   On the other hand, Sn-3Ag-0.5Cu-5In (203-212 ° C.) is found as a solder composition that can withstand relatively large deformation at the end of a large Cu base substrate as a Pb-free low-temperature side solder. It was. Since this solder can lower the soldering temperature by about 10 ° C. from Sn-3Ag-0.5Cu (217-221 ° C.), the working temperature margin for hierarchical connection can be widened. The soldering temperature of Sn-3Ag-0.5Cu-5In is sufficiently possible at 230 to 240 ° C.

これより、高温用としてSn−15Sb(246〜290)℃、低温用としてSn−3Ag−0.5Cu−5In(203〜212℃)の組合せを用いることで、Pbフリーはんだでの温度階層接続と、接続部の信頼性を確保できるパワーモジュールが可能になる。   From this, by using a combination of Sn-15Sb (246-290) ° C. for high temperature and Sn-3Ag-0.5Cu-5In (203-212 ° C.) for low temperature, temperature hierarchical connection with Pb-free solder Thus, a power module that can ensure the reliability of the connecting portion is possible.

本発明の半導体パワーモジュールとすることにより、低温系Pbフリーはんだで大型基板に対し信頼性を確保した接合ができて、かつ温度階層接続を可能とする高温系Pbフリーはんだとの組合せ構造が可能となる。   By using the semiconductor power module of the present invention, a low temperature Pb-free solder can be bonded with a high-temperature Pb-free solder that can be reliably connected to a large substrate and can be connected to a temperature hierarchy. It becomes.

低温系Pbフリーはんだで大型基板に対し信頼性を確保した接合ができて、かつ温度階層接続を可能とする高温系Pbフリーはんだとの組合せ構造を可能とした半導体パワーモジュールを提供するという目的を、簡単なはんだ構成で実現できた。   An object of the present invention is to provide a semiconductor power module that can be combined with a high-temperature Pb-free solder that can be reliably connected to a large substrate with a low-temperature Pb-free solder and that can be connected to a temperature hierarchy. This was achieved with a simple solder configuration.

(実施例1)
パワーモジュールのチップを接続する高温系はんだの場合、はんだ付け温度は400℃近くまで可能である利点を生かして、意図的にはんだ付け温度を高めて、ぬれ性を確保することを考えた。更に、パワーモジュールのPbフリーはんだにおいては、部品の耐熱性の問題はないので、チップ下はんだ接続時に、はんだ付け温度を少しでも上げられることが、ボイド対策,ぬれ性確保等の接続の歩留まり向上に繋がる。使える可能性のあるはんだの中で融点が最も高いものは、Sn−Sb系であり、これまではSb;5〜10%の組成の範囲で検討されてきたので、階層接続用としては固相線温度の235℃で制約される。
Example 1
In the case of a high-temperature solder for connecting the chips of the power module, taking advantage of the fact that the soldering temperature can be close to 400 ° C., we considered intentionally increasing the soldering temperature to ensure wettability. Furthermore, with Pb-free soldering for power modules, there is no problem with the heat resistance of the parts, so the soldering temperature can be raised even a little when connecting the solder under the chip, improving the yield of the connection, such as measures against voids and ensuring wettability. It leads to. Among the solders that may be used, the solder with the highest melting point is the Sn-Sb system, which has been studied in the range of Sb; 5 to 10% so far. Constrained at the line temperature of 235 ° C.

これに対し、Sb;10%を超える組成選定を視野に入れれば、固相線温度は246℃であり、低温側をSn−3Ag−0.5Cu−5In(203〜212℃)を用いることで、240℃以下での低温側はんだの接続は十分可能である。また、Sn−3Ag−0.5Cu−5Inはセラミック基板と大型Cuベース基板との温度サイクル試験における信頼性は、Sn−3Ag−0.5Cuに比べて高く、高信頼性を確保できる。はんだ付けは、高温系も低温系も水素炉もしくは真空と水素雰囲気を組合せた真空はんだ付け炉を用いた。   On the other hand, if the composition selection exceeding 10% is taken into consideration, the solidus temperature is 246 ° C., and Sn-3Ag-0.5Cu-5In (203 to 212 ° C.) is used on the low temperature side. It is possible to connect the low-temperature side solder at 240 ° C. or lower. In addition, Sn-3Ag-0.5Cu-5In has higher reliability in the temperature cycle test between the ceramic substrate and the large Cu base substrate than Sn-3Ag-0.5Cu, and can ensure high reliability. For the soldering, a high-temperature system and a low-temperature system were either a hydrogen furnace or a vacuum soldering furnace in which a vacuum and a hydrogen atmosphere were combined.

(1)半導体チップ側接続用高温系Pbフリーはんだ
1−1)Sn−Sb組成の選定
Sn−(5〜10)SbはCuパイプの接続等に使われてきた組成であり、伸び、強度はSn−3.5Ag並みである。Sb;10%を過ぎると、徐々に伸びは低下してくるが、急激に低下するものではない。150℃での引張試験では、Sbが10%過ぎると、引張強さは上昇するが飽和気味になる。また、伸びは10%過ぎて低下するが、Sb;15%における伸びはSn並みであることから、特性として問題はないと思われる。これらの事実から、機械特性として、Sb;10%過ぎると徐々に硬くなる傾向になるが、20%までは使える範囲と考えた。従って、Sbの適正範囲は、11%以上,20%以下とした。
(1) High-temperature Pb-free solder for semiconductor chip side connection 1-1) Selection of Sn-Sb composition Sn- (5-10) Sb is a composition that has been used for connecting Cu pipes, etc. It is the same level as Sn-3.5Ag. When Sb exceeds 10%, the elongation gradually decreases, but does not rapidly decrease. In the tensile test at 150 ° C., when Sb is too 10%, the tensile strength increases, but it becomes saturated. Further, the elongation decreases by 10% too much, but the elongation at Sb: 15% is comparable to Sn, so it seems that there is no problem as a characteristic. From these facts, as mechanical characteristics, when Sb: 10% is exceeded, it tends to be gradually hardened, but up to 20% is considered to be a usable range. Therefore, the appropriate range of Sb is set to 11% or more and 20% or less.

チップ下接続用はんだとして、多少、硬くなっても使える理由、及びSbの適正組成範囲については以下のように考える。高出力チップに対し、熱伝導性に優れるAlN基板が一般に使用されている。AlN(4.3×10-6/℃)とSiチップ(2×10-6/℃)の熱膨張係数の差は小さいので、多少はんだは硬くても温度変化で発生する歪は小さいので、チップ寸法,パワーの程度等のレベルの問題は多少考えられるが、チップ寸法を小さくする、出力を下げる対策が可能であれば対応でき、信頼性で大きな問題にはならないと思われる。Sn−15Sbの低サイクル疲労寿命は、変位が小さいとSn−3.5Sb以上の寿命を呈している。 The reason why the solder for connecting under the chip can be used even if it is somewhat hard and the appropriate composition range of Sb is considered as follows. For high-power chips, an AlN substrate having excellent thermal conductivity is generally used. Since the difference in thermal expansion coefficient between AlN (4.3 × 10 −6 / ° C.) and Si chip (2 × 10 −6 / ° C.) is small, the strain generated by temperature change is small even if the solder is somewhat hard, There are some problems with the chip size, power level, etc., but it can be dealt with if the chip size can be reduced or the output can be reduced. The low cycle fatigue life of Sn-15Sb exhibits a life of Sn-3.5Sb or more when the displacement is small.

しかし、変位が大きいと硬くなるためか寿命が低下する。即ち、あまり硬くなることは、チップに大きな応力が作用するので、好ましくない。そこで、理想的な領域ではないが、Sb:10%以上で、良好な範囲として、12〜15%(液相線温度;約290℃)を選定した。即ち、330〜350℃位のはんだ付け温度(はんだ付けは水素を含む還元雰囲気で行う場合、意図的に高くすることで、還元され易くなり、ボイド低減化につながる)で接続できる。Sb;20%の場合、はんだの液相線温度は325℃であり、水素中でぬれ性を確保するため、水素による還元力を高める手段として、液相温度から十分離れた高温の380℃で接続しても、部品への熱影響の問題は生じない。そこで、Sbの範囲として11〜20%を選定した。   However, if the displacement is large, the life is shortened because it becomes hard. That is, it is not preferable to be too hard because a large stress acts on the chip. Therefore, although not an ideal region, Sb: 10% or more, and 12 to 15% (liquidus temperature; about 290 ° C.) was selected as a good range. That is, the connection can be made at a soldering temperature of about 330 to 350 ° C. (when soldering is performed in a reducing atmosphere containing hydrogen, it is easily reduced by reducing the void intentionally, leading to a reduction in voids). In the case of Sb; 20%, the liquidus temperature of the solder is 325 ° C., and in order to ensure the wettability in hydrogen, as a means of increasing the reducing power by hydrogen, the temperature is 380 ° C., which is sufficiently away from the liquid phase temperature. Even if connected, there is no problem of thermal effects on the parts. Therefore, 11 to 20% was selected as the range of Sb.

1−2)Sn−Sbはんだへの微量元素添加量(Cu,Ni,Ge他)
Sn系はんだの高温でのはんだ付け、及び高温での長時間の使用になるので、電極,基板へのアタック作用は強い。Cuベース基板,Cu電極を用いる場合、Cuをはんだ中に1〜5%入れることにより基板,電極に対するSnによるくわれ防止及び高温長時間放置に対しても化合物層を安定化させる役割を果たす。表面にNiめっき,Ni/Auフラッシュ等の場合、同様にはんだ中にCu,Niを添加することはCu電極の場合と同様な効果がある。Ni添加の場合は、はんだ中に固溶され難いので0.1〜0.5%程度で良い。また、Sn−Sb結晶粒の粗大化防止のため、Ge:0.01〜0.1%添加は微細化による改質及び酸化防止によるボイド低減化に効果が期待できる。この他、0.1%以上,1%以下のZn,Al,Ag,P,Bi添加もはんだ及び反応層改質の可能性がある。
1-2) Addition amount of trace elements to Sn-Sb solder (Cu, Ni, Ge, etc.)
Since the Sn-based solder is soldered at a high temperature and used for a long time at a high temperature, the attack action on the electrode and the substrate is strong. When a Cu base substrate or Cu electrode is used, 1 to 5% of Cu is added to the solder to prevent the substrate and the electrode from being bitten by Sn and to stabilize the compound layer even when left at high temperature for a long time. In the case of Ni plating, Ni / Au flash or the like on the surface, adding Cu and Ni into the solder similarly has the same effect as in the case of the Cu electrode. In the case of adding Ni, since it is difficult to be dissolved in the solder, it may be about 0.1 to 0.5%. In addition, in order to prevent coarsening of Sn—Sb crystal grains, the addition of Ge: 0.01 to 0.1% can be expected to be effective for reforming by miniaturization and void reduction by preventing oxidation. In addition, addition of 0.1% or more and 1% or less of Zn, Al, Ag, P, and Bi may also modify the solder and the reaction layer.

(2)ベース基板とセラミック絶縁基板接続用Pbフリー低温系はんだ
2−1)Sn−Ag−Cu−In系におけるIn量の選定
セラミック絶縁基板と大型Cuベース基板との接続用Pbフリー低温系はんだ組成選定のため、可能性のある有望な組成についてのモデル試験片を用いた温度サイクル試験(−55〜125℃)によるはんだ寿命評価を行った。ある程度、予備実験ではんだ組成は絞った。ボイドの多いZn添加のはんだ(Sn−Zn系、及びSn−Ag−Cu系にZnの微量添加)は、現状プロセスではボイド率の目標をクリアできず、評価しても悪い結果になり、除外せざるを得なかった。Sn系はんだへの添加元素についての基本的な見方は、Sn中に固溶すると内部歪が増し更に硬くなるので、基板接続用はんだとして期待される変形性がなくなるので、Snより柔らかいIn以外の元素では難しいと考えている。
(2) Pb-free low-temperature solder for connection between base substrate and ceramic insulation substrate 2-1) Selection of In amount in Sn-Ag-Cu-In system Pb-free low-temperature solder for connection between ceramic insulation substrate and large Cu base substrate For composition selection, solder life evaluation was performed by a temperature cycle test (−55 to 125 ° C.) using a model specimen for a promising composition. To some extent, the solder composition was narrowed down in preliminary experiments. Solder containing Zn with a lot of voids (a small amount of Zn added to Sn-Zn and Sn-Ag-Cu) cannot satisfy the void rate target in the current process, and results in bad results even if evaluated. I had to do it. The basic view of the additive element to Sn-based solder is that, when dissolved in Sn, the internal strain increases and it becomes harder. Therefore, the deformability expected as a solder for board connection is lost. I think it is difficult for elements.

0.3mmCu貼りアルミナ基板(t0.3)と大型のCuベース基板(t4)間に150μmの各種圧延はんだ箔を置いて、還元雰囲気中でmax245℃のはんだ付け温度でリフローを行った。はんだ箔は、絞り込んだ組成として、表1に示した性質が異なり、有望な7種類の組成に絞り込んで、モジュール構造での温度サイクル試験を行った。   Various rolled solder foils of 150 μm were placed between a 0.3 mm Cu-laminated alumina substrate (t0.3) and a large Cu base substrate (t4), and reflow was performed at a soldering temperature of max 245 ° C. in a reducing atmosphere. The solder foils were different in properties shown in Table 1 as the narrowed composition, and were narrowed down to seven promising compositions and subjected to a temperature cycle test in a module structure.

組成はSn−Ag−Cu系にInを5%入れることで、低温系の後付けはんだ用としてベースとなるSn−3Ag−0.5Cuに比べ、約10℃下げられ、かつ接合界面での十分な強度確保を考慮したものである。In添加はBi添加と異なり、微量添加による各種メタライズに対する接合強度,バルク材の機械的性質に及ぼす悪影響は少ないことが知られている。また、Sn晶への固溶なので、Sn−Inの共晶を生成させない範囲では、高温に対する信頼性はSn−Ag−Cu並みである。   The composition is reduced by about 10 ° C. compared to Sn-3Ag-0.5Cu, which is a base for low-temperature post-installation solder, by adding 5% In to the Sn—Ag—Cu system, and sufficient at the bonding interface. This is to ensure strength. Unlike the addition of Bi, the addition of In is known to have little adverse effect on the bonding strength against various metallizations and the mechanical properties of the bulk material due to the addition of a small amount. Further, since it is a solid solution in Sn crystal, the reliability for high temperature is comparable to Sn—Ag—Cu as long as Sn—In eutectic is not generated.

しかし、In量を多く入れることはSnマトリクス中に更にInを固溶させることになるので、内部歪が増し、伸び難くなる。Inの場合は素地のSnより柔らかい元素のためか、強度上昇は少なく、伸びの低下も少なく、In添加により機械的強度への影響は少ないことが知られている。Inを5%以上入れると、接合界面での強度低下が始まる。   However, adding a large amount of In causes further dissolution of In in the Sn matrix, increasing internal strain and making it difficult to extend. In the case of In, because it is an element softer than the base Sn, it is known that the increase in strength is small, the decrease in elongation is small, and the addition of In has little influence on the mechanical strength. When 5% or more of In is added, strength reduction at the bonding interface starts.

また、In添加が多くなると、融点が下がるので、温度階層接続ではより有利になるが、長期高温放置試験での界面での合金層(Cu6Sn5,Cu3Sn)が成長し易くなり、強度低下が起こる。7%までは、強度低下が少ないことを確認したので、Inの上限を7%とした。他方、Inが少ないと、Sn−3Ag−0.5Cuに近づくことになり、温度サイクル試験の寿命が問題になる。Inは1%でも固溶体の性質を多少変える効果は期待できるので、Inの下限としては1%とした。 Moreover, since the melting point decreases as the In content increases, the temperature layer connection is more advantageous, but the alloy layer (Cu 6 Sn 5 , Cu 3 Sn) at the interface in the long-term high-temperature standing test is likely to grow, A decrease in strength occurs. Up to 7%, it was confirmed that there was little decrease in strength, so the upper limit of In was set to 7%. On the other hand, if the amount of In is small, it approaches Sn-3Ag-0.5Cu, and the life of the temperature cycle test becomes a problem. Even if In is 1%, the effect of slightly changing the properties of the solid solution can be expected, so the lower limit of In was set to 1%.

表1は−55〜125℃,2500サイクル経過後に、断面観察により、継手全長に対するクラック長を測定し、クラック進展率を整理したものである。   Table 1 shows the crack growth rate by measuring the crack length with respect to the total length of the joint by cross-sectional observation after lapse of 2500 cycles at -55 to 125 ° C.

Figure 0004972503
Figure 0004972503

これらの結果、及び断面におけるクラック進展状況の観察、更にはメカニズム解明実験により、以下の新たな知見が得られた。
1.In;5%入れることで、Sn系はんだのクラック進展率が低下する。
2.Sn系はんだでも3%Ag入り((i))が、0%((ii)),1.5%入り((iii))より優れる。
3.Sn系のはんだは、従来のSn−37Pb共晶はんだに比べ、クラック進展率が大幅に増加する。
The following new findings were obtained from these results, the observation of the progress of cracks in the section, and the mechanism elucidation experiment.
1. By adding 5% In, the crack progress rate of the Sn-based solder is lowered.
2. Even Sn-based solder containing 3% Ag ((i)) is superior to 0% ((ii)) and 1.5% containing ((iii)).
3. Sn-based solder has a significantly increased crack growth rate compared to conventional Sn-37Pb eutectic solder.

結論として、Sn系はんだは針状Ag3Snのネットワークが堅固に発達した系にInが入った組成が優れていることが分かった。この内容はこれまでの一般的知識では予測できない事実である。特に高温保持,低温保持の長い温度サイクル試験特有なクリープが強く支配する劣化現象と思われる。 In conclusion, it has been found that Sn-based solder has an excellent composition in which In is contained in a system in which a network of acicular Ag 3 Sn is firmly developed. This is a fact that cannot be predicted by conventional general knowledge. In particular, it seems to be a deterioration phenomenon that is strongly dominated by creep, which is peculiar to temperature cycle tests with long holding temperature and holding temperature.

2−2)Sn系のはんだにInが添加されることで寿命が向上する理由
Inが添加されることで寿命が向上する理由は、クラック進展の断面観察によると、感覚的ではあるが、InなしのSn系においてはクラックが一平面上を直線的に進む傾向が強い(直感的にシャープな進展に見える)。引張試験において、一箇所に集中するネッキング現象が起き易いこと、また、ねじり試験においてはねじった方向(試験片に直角方向に)に直線的な破壊が起きる傾向があることからも、クラックが一箇所に集中する間接的証明である。一平面上をクラックが直線的に進む傾向、即ち、クラックパス部以外のはんだは応力緩和が少ないことを意味する。Inを入れることで、Snマトリクス全域はInがくまなく固溶しているので、周辺の応力状態はこのマトリクスを介して隣接のマトリクスに伝えられる。また、応力集中部でもミクロ的な応力分散効果が期待される。その結果、本来のSn系はんだの強さ,粘っこさが欠け,クラック進行方向以外にも応力を分散・開放することで、クラックの直線的進展を緩和することで、遅延効果が生まれるものと思われる(鋭さが欠けた進展に見える)。
2-2) The reason why the life is improved by adding In to the Sn-based solder The reason why the life is improved by adding In is insensitive to the cross-sectional observation of the crack progress, In the Sn system with no crack, the crack tends to advance linearly on one plane (intuitively looks sharp progress). In the tensile test, the necking phenomenon concentrated in one place is likely to occur, and in the torsion test, there is a tendency for linear fracture to occur in the twisted direction (perpendicular to the test piece). It is an indirect proof concentrated in a place. This means that cracks tend to travel linearly on one plane, that is, the solder other than the crack path portion has less stress relaxation. By introducing In, the entire Sn matrix is in a solid solution throughout the entire area of the Sn matrix, so the surrounding stress state is transmitted to the adjacent matrix through this matrix. In addition, a microscopic stress dispersion effect is expected even in the stress concentration part. As a result, the strength and stickiness of the original Sn-based solder are lacking, and by spreading and releasing the stress in addition to the crack propagation direction, it is thought that a delay effect will be created by relaxing the linear progress of the crack. (Looks like a progress lacking sharpness).

材料の内部減衰性が確認できる衝撃試験(シャルピー)においても、Sn系はんだにInを添加することで、衝撃吸収エネルギーが低下することを確認している。約5%Inを添加することで、Sn−37Pb共晶並みになることを確認した。衝撃試験結果が必ずしも、クラック進展に直接に関係しているかは不明であるが、材料の衝撃エネルギーを吸収できる減衰能が、間接的ではあるが、Sn晶にInが固溶することで現れると考える。   Also in the impact test (Charpy) in which the internal damping property of the material can be confirmed, it has been confirmed that the impact absorption energy is reduced by adding In to the Sn-based solder. It was confirmed that by adding about 5% In, the Sn-37Pb eutectic was obtained. It is unclear whether the impact test results are directly related to the crack growth, but the damping ability that can absorb the impact energy of the material is indirect, but appears when In dissolves in Sn crystals. Think.

2−3)In添加した系で、Agが十分入った系が優れる理由及びAgの適正範囲
Agが多い系はAg3Snの針状のネットワークを形成するので、高温でも強く、安定している針状のAg3Snが複合材の補強効果として存在している。この影響がクラック進展を阻止しているものと考える。この結果、(v)Sn−0.5Cu−5In,(vi)Sn−1.5Ag−0.5Cu−5Inは、Ag添加量の多い(iv)Sn−3Ag−0.5Cu−5Inより、クラック進展が速くなったと推定する。クラック進展防止にはAg量の効果より、In量の効果が顕著に優れるので、Ag添加の下限は0.1%とした。Ag添加の上限はコスト等を考慮し、実用的な範囲の4.5%とした。
2-3) Reason why Ag is sufficient in a system with In added and the appropriate range of Ag A system with a lot of Ag forms a needle-like network of Ag 3 Sn, so it is strong and stable even at high temperatures. Acicular Ag 3 Sn exists as a reinforcing effect of the composite material. This effect is thought to prevent crack growth. As a result, (v) Sn-0.5Cu-5In and (vi) Sn-1.5Ag-0.5Cu-5In are more cracked than (iv) Sn-3Ag-0.5Cu-5In, which has a larger amount of Ag added. Estimate that progress has been faster. Since the effect of the In amount is remarkably superior to the effect of the Ag amount in preventing crack progress, the lower limit of Ag addition is set to 0.1%. The upper limit of Ag addition is set to 4.5% of the practical range in consideration of cost and the like.

2−4)Sn−Ag−In系で、Cuの適正範囲
Sn−Ag系にCuの適正値選定と同様である。即ち、Cuは1%以上入ると伸びが大きく低下することが知られている。ベース基板とセラミック絶縁基板接続用はんだの場合、チップ下はんだと異なり、通常、150℃以上での使用は少ないことが予想される。このため、Cuとの反応を抑える手段として、Cuの上限として2%とし、下限値として0.1%とした。下限が少なくて良い理由は、Cu板の溶け込みは必然的に起こるためである。合金層反応阻止より、大変形に対応できるためにはんだの機械特性を劣化させないことで選定した。
2-4) Appropriate range of Cu in Sn—Ag—In system It is the same as selection of appropriate value of Cu in Sn—Ag system. That is, it is known that when Cu enters 1% or more, the elongation greatly decreases. In the case of the solder for connecting the base substrate and the ceramic insulating substrate, unlike the solder under the chip, it is generally expected that the use at 150 ° C. or higher is small. For this reason, as means for suppressing the reaction with Cu, the upper limit of Cu is set to 2%, and the lower limit is set to 0.1%. The reason why the lower limit may be small is that the Cu plate inevitably melts. In order to cope with large deformations, the alloy layer reaction was prevented so that the mechanical properties of the solder were not deteriorated.

2−5)Sn−Ag−Cu−In系で、Bi添加の適正範囲
高信頼性が要求されるパワーモジュールとしては、添加すると急激に脆くなることが知られているBiは入れないことが基本である。しかし、約5%Inの中にBiを僅かに入れることで、作業性が改善(流動性が良くなり、ボイド低減化に繋がり、信頼性向上にも繋がる)される場合がある。その場合のBiの適正添加量は0.5〜1%程度である。Bi:1%以上では信頼性に影響を及ぼす脆さが現れるので、大変形に対応できなくなる。特にマイナス側の低温での衝撃吸収エネルギーの低下が顕著になる。
2-5) Sn-Ag-Cu-In system, appropriate range of Bi addition For power modules that require high reliability, it is fundamental that Bi, which is known to become brittle rapidly when added, should not be added. It is. However, when Bi is slightly contained in about 5% In, workability may be improved (fluidity is improved, leading to a reduction in voids and an improvement in reliability). In this case, the proper amount of Bi added is about 0.5 to 1%. When Bi is 1% or more, brittleness that affects reliability appears, and it becomes impossible to cope with large deformation. In particular, the reduction in impact absorption energy at a low temperature on the minus side becomes remarkable.

(3)Sn−Ag−Cu系はんだがSn−37Pb共晶はんだに比べ、対温度サイクル性が低下する理由
民生品,家電品を対象にした場合、低サイクル疲労試験ではSn−3Ag−0.5CuがSn−37Pb共晶より優れることは公知〔例えば、苅谷;はんだ材料の非線形特性と熱疲労信頼性,エレクトロニクス実装学会,Vol.8 No.2(2005)〕とされている。そこで、パワーモジュールの絶縁基板とベース基板とのはんだの温度サイクル試験で、Sn系はんだの寿命が大幅に低下する理由を考察した。パワーモジュールのはんだを挟むセラミック絶縁基板及びCuベース基板表面に歪ゲージを貼り付け、温度サイクル中における歪速度の測定を行った。
(3) Reason why Sn-Ag-Cu-based solder has lower temperature cycle performance compared to Sn-37Pb eutectic solder When consumer products and household electrical appliances are targeted, Sn-3Ag-0. It is known that 5Cu is superior to Sn-37Pb eutectic [for example, Shibuya; Non-linear characteristics and thermal fatigue reliability of solder materials, Japan Institute of Electronics Packaging, Vol. 8 No. 2 (2005)]. Therefore, the reason why the life of the Sn-based solder is greatly reduced in the temperature cycle test of the solder between the insulating substrate and the base substrate of the power module was considered. Strain gauges were affixed to the ceramic insulating substrate and Cu base substrate surface sandwiching the power module solder, and the strain rate was measured during the temperature cycle.

その結果、高温から低温への変化時に最大歪速度で、1.5〜2×10-6/sを示し、非常に遅いことが分かった。 As a result, it was found that the maximum strain rate at the change from high temperature to low temperature was 1.5 to 2 × 10 −6 / s, which was very slow.

これまでは、民生用品の部品継手では、歪速度が遅いとされる分野でも、遅くても10-4/sレベルと見なされていた。パワーモジュールの絶縁基板及びベース基板の歪速度が遅い理由は、パワーモジュール固有のCuベース基板等の大きな熱容量のためである。急激な温度変化に対して、チップ部分は表面からの冷却に影響されるが、Cuベース基板近傍のはんだの歪速度は1.5〜2×10-6/s以上にはなり難く、大部分はそれより更に遅い歪速度で変化していることになる。 Up to now, consumer parts joints have been regarded as 10 -4 / s level at the latest, even in fields where the strain rate is slow. The reason why the strain rate of the insulating substrate and the base substrate of the power module is low is because of the large heat capacity of the Cu base substrate inherent to the power module. Although the chip portion is affected by cooling from the surface in response to a rapid temperature change, the strain rate of the solder in the vicinity of the Cu base substrate is unlikely to exceed 1.5 to 2 × 10 −6 / s. Changes at a slower strain rate.

従って、この歪速度及びこの歪速度以下におけるはんだの機械的特性,金属組織的特性を比較するとSn−3Ag−0.5CuとSn−37Pb共晶との明らかな違いが現れることが分かった。即ち、Sn−37Pb共晶の場合は、歪速度;10-4/sレベル以下で伸びは急激に増し、それに伴って応力は急激に低下する超塑性現象を呈する。 Therefore, it was found that a clear difference between Sn-3Ag-0.5Cu and Sn-37Pb eutectic appears when comparing the mechanical properties and metallographic properties of the solder at this strain rate and below this strain rate. That is, the Sn-37Pb eutectic exhibits a superplastic phenomenon in which the elongation rapidly increases and the stress rapidly decreases with the strain rate of 10 −4 / s or less.

このため、はんだクラック起点であり、最大歪が発生するはんだ端部においては、モジュールの大変形に追従できて、はんだは破壊し難く、金属組織的にはα−Pb晶とβ−Sn晶の相互拡散が活発で、粒子間はミクロクラックが発生し難く、クリープしても劣化が少ないので、損傷を受けない性質があると思われる。これと対照的にSn−3Ag−0.5Cuは比較的硬めで強いβ−Sn晶の集合体であり、クリープ変形が起きると、β−Sn晶は成長し、粒内が変形し、粒界がすべることでミクロクラックを発生する。   For this reason, at the solder end where the maximum strain occurs, which is the starting point of the solder crack, the module can follow the large deformation of the module, and the solder is difficult to break down. In terms of metal structure, α-Pb crystal and β-Sn crystal Interdiffusion is active, microcracks are unlikely to occur between the particles, and since there is little deterioration even after creeping, it seems that there is a property of not being damaged. In contrast, Sn-3Ag-0.5Cu is a relatively hard and strong aggregate of β-Sn crystals. When creep deformation occurs, the β-Sn crystals grow, the grains are deformed, and the grain boundaries Microcracks are generated by sliding.

結果として、劣化が顕著であることからクリープ損傷を回復できないことが予想される。Sn−3Ag−0.5Cuがクラック進展を早める他の要因として、はんだ端部で応力が一箇所に集中し易い性質を持つことも上げられる。即ち、応力が一箇所に集中し易い性質の傍証として、引張試験において、ネッキングを起こし易いこと、またねじり試験において、破壊がねじり方向と平行に直線的に生じていることである。他方、Sn−37Pb共晶ははんだ層全体で変形する様相を呈し、引張試験でも、一箇所に集中することなく、評点間距離全体で変形する挙動が観察される。   As a result, it is expected that the creep damage cannot be recovered due to the remarkable deterioration. Another factor that causes Sn-3Ag-0.5Cu to accelerate crack growth is that stress tends to concentrate at one location at the solder end. That is, as proof of the nature that stress tends to concentrate in one place, it is easy to cause necking in the tensile test, and in the torsion test, the fracture occurs linearly in parallel with the torsion direction. On the other hand, Sn-37Pb eutectic exhibits an aspect of deformation throughout the solder layer, and even in a tensile test, a behavior of deformation over the entire distance between the scores is observed without being concentrated in one place.

この結果、パワーモジュールの低温用Pbフリーはんだとして、温度サイクル試験において、Sn−3Ag−0.5Cuよりもかなりの寿命向上が期待できる代表組成として、Sn−3Ag−0.5Cu−5Inを選定した。   As a result, Sn-3Ag-0.5Cu-5In was selected as a representative composition that can be expected to have a significantly longer life than Sn-3Ag-0.5Cu in a temperature cycle test as a low-temperature Pb-free solder for power modules. .

(実施例2)
Sn−15Sbは硬めのはんだであることから、接続後の信頼性に課題がある。解決策として、はんだの熱膨張係数を下げることができれば、実装後、はんだに作用する応力,歪を下げることができる。そこで、低熱膨張係数で、熱伝導性に優れたカーボン繊維との複合構造にすることで高信頼化を図った。
(Example 2)
Since Sn-15Sb is a hard solder, there is a problem in reliability after connection. As a solution, if the thermal expansion coefficient of the solder can be reduced, the stress and strain acting on the solder after mounting can be reduced. Therefore, high reliability was achieved by using a composite structure with a carbon fiber having a low thermal expansion coefficient and excellent thermal conductivity.

Sn−15Sb中に、カーボンにCuもしくはNiめっきを施して熱処理した低熱膨張の繊維(例えば、径;約8μm,長さ;直径の2〜10倍程度)をガス放出の邪魔にならない程度(5〜20vol%)にはんだ中に散りばめることで、カーボン繊維は強度が大でアスペクト比が大なので、はんだを拘束することができ、はんだ全体の低熱膨張化を可能にする。   A low thermal expansion fiber (for example, diameter: about 8 μm, length: about 2 to 10 times the diameter), which is heat-treated by applying Cu or Ni plating to carbon in Sn-15Sb, does not interfere with gas release (5 (About 20 vol%), the carbon fiber has high strength and a high aspect ratio, so that the solder can be restrained and low thermal expansion of the entire solder is possible.

これによりSiチップに作用する応力が低減できるので、信頼性を向上させることができる。低熱膨張化できる他の金属,非金属繊維として、インバー,石英,W,Mo,SiC,SiN,AlN等があるが、熱伝導性,軽量化,加工性等を考慮するとカーボン繊維が優れる。メタライズがはんだにぬれて周囲にボイドを残さず、かつ、はんだ付けに耐えられる強固なメタライズである必要がある。メタライズされた適度な長さの繊維(例えば50〜100μm)をはんだボールの中に混ぜて、ペースト化して使用する方法は最も簡単に作れる複合はんだである。はんだボールとメタライズされた繊維を混ぜて溶かして、不活性雰囲気で圧延して箔にする方法もある。   Thereby, stress acting on the Si chip can be reduced, so that reliability can be improved. Other metals and non-metallic fibers that can be reduced in thermal expansion include invar, quartz, W, Mo, SiC, SiN, AlN, etc., but carbon fibers are excellent in view of thermal conductivity, weight reduction, workability, and the like. The metallization needs to be a strong metallization that can withstand soldering without leaving voids around the soldered metallization. The method of mixing and using metalized moderate length fibers (for example, 50 to 100 μm) in a solder ball and forming a paste is the simplest composite solder. There is also a method in which solder balls and metallized fibers are mixed and melted, and rolled into an foil in an inert atmosphere.

はんだ箔の場合、メタライズされた長いカーボン繊維をクロス状に配置して、はんだ中に埋め込んだ構造、あるいはメッシュ状に編んだ網構造も可能である。はんだ厚さを100μm程度とすれば、25μm程度のクロスの網が1枚はんだ層に埋め込まれていれば、低熱膨張による信頼性向上の効果は十分期待できる。クロスに編んだ網は短い繊維より剛性の効果が大きいので、より低熱膨張になり信頼性への影響は大きい。   In the case of a solder foil, a structure in which long metallized carbon fibers are arranged in a cross shape and embedded in solder or a net structure knitted in a mesh shape is also possible. If the solder thickness is about 100 μm, the reliability improvement effect due to low thermal expansion can be sufficiently expected if a cloth net of about 25 μm is embedded in one solder layer. Since the net woven into cloth has a greater effect on rigidity than short fibers, it has lower thermal expansion and has a greater impact on reliability.

(実施例3)
1)間隙制御用金属ボール分散はんだ箔(基板側はんだ)
低温系Pbフリーはんだ箔を用いて、セラミック絶縁基板をCuベース大型基板にはんだ付けする場合、被接合体の重さも影響し、高温時につぶれ気味に傾いて接続される恐れがある。傾いて接続されないように、最小はんだ厚の確保のため、できる限り均一に分散されるように熱伝導性に優れた硬めのCuボール(微量元素添加)、はんだに食われにくく、かつ、ぬれ易くしたNi/Auフラッシュめっきを施した硬めのCuボール(例えば、径;50〜80μm)を、10mm□当たり約20個程度分散させる。
(Example 3)
1) Metal ball dispersed solder foil for gap control (substrate side solder)
When a ceramic insulating substrate is soldered to a large Cu-based substrate using a low-temperature Pb-free solder foil, the weight of the joined body is also affected, and there is a possibility that the connection is inclined and collapsed at high temperatures. Hard copper balls with excellent thermal conductivity (added with trace elements) that are dispersed as uniformly as possible to ensure minimum solder thickness so that they are not tilted and connected. About 20 hard Cu balls (for example, diameter: 50 to 80 μm) subjected to Ni / Au flash plating are dispersed about 10 mm □.

これにより、はんだ付け時だけでなく、温度サイクル時の基板の変形,長期高温試験に対しても、はんだのクリープ変形を阻止させ、はんだ厚を長時間確保し、寿命低減を抑える効果がある。ボール表面はぬれ性に優れる表面処理を施してあるので、ボール近傍でボイドを形成することはない。また、散発的な分散なので、はんだ内部で形成されたボイドの放出に邪魔になることはない。更に、Cu系ボールの熱伝導率ははんだより高いので、熱的な問題は起き難い。Cuボールが変形する場合は、微量元素を添加して硬くしたCuボール,Niボールでも良い。   As a result, not only during soldering but also during deformation of the substrate during temperature cycling and long-term high-temperature tests, the creep deformation of the solder is prevented, the solder thickness is ensured for a long time, and the life is reduced. Since the ball surface is subjected to a surface treatment excellent in wettability, no void is formed in the vicinity of the ball. Moreover, since it is sporadic dispersion, it does not interfere with the discharge of voids formed inside the solder. Furthermore, since the thermal conductivity of Cu-based balls is higher than that of solder, thermal problems are unlikely to occur. When the Cu ball is deformed, a Cu ball or Ni ball hardened by adding a trace element may be used.

(実施例4)
次に、セラミック絶縁基板とCuベース基板の接続部の温度サイクル寿命を、更に向上させる手段として、適正物性を有するエポキシ系樹脂で接合外周部を部分補強する方法を提案するものである。これにより、破壊メカニズムを変えさせ、はんだクラックの発生を阻止,遅延させることで、温度サイクルの寿命を大幅に向上させることができる。
Example 4
Next, as a means for further improving the temperature cycle life of the connection portion between the ceramic insulating substrate and the Cu base substrate, a method of partially reinforcing the joint outer peripheral portion with an epoxy resin having appropriate physical properties is proposed. Thereby, the life of the temperature cycle can be greatly improved by changing the destruction mechanism and preventing or delaying the occurrence of solder cracks.

図1(a)は、AlN絶縁基板8端部を樹脂で部分補強しない通常の構造で、Pbフリーはんだを用いたモジュールの断面構造である。図1(b)はAlN絶縁基板8端部を樹脂3で部分補強した例で、Pbフリーはんだを用いたモジュールの断面構造である。図1(a),図1(b)共にシリコーンゲル20封止構造である。   FIG. 1A shows a cross-sectional structure of a module using Pb-free solder in a normal structure in which the end of the AlN insulating substrate 8 is not partially reinforced with resin. FIG. 1B is an example in which the end portion of the AlN insulating substrate 8 is partially reinforced with the resin 3, and shows a cross-sectional structure of a module using Pb-free solder. 1 (a) and 1 (b) both have a silicone gel 20 sealing structure.

AlN絶縁基板8−Cuベース基板11構成において、Siチップ1とリード電極5間の接続は従来通りのAl線6のワイヤボンド方式の例で、チップのはんだ付けはSn−15Sbの第1のはんだ4である高温系はんだを用いた。AlN基板のCu電極7はCuもしくはAl(Alの場合、はんだとのぬれ性のため表面にNiもしくはNi/Auめっきが施される)である。端部補強樹脂3は、第3のはんだ10である基板側はんだ付け部の4周辺をできるだけ均一に塗布することが望ましいので、エポキシ系で、低熱膨張係数の塗布し易いポッテイング用樹脂が用いられる。端部補強樹脂3は、基板側はんだ付け部周辺で適度なフィレットが形成されるように塗布されるのが望ましい。図1(b)はAlN絶縁基板8端部及びはんだ端部を包むように樹脂を塗布したものである。樹脂の塗布形状として、フィレット部が図1(b)の塗布構造に限定されるものではなく、AlN基板下側だけでも効果がある。樹脂とCuベース基板間の密着力を増すためにCuベース基板11に設けた末広状のデインプル穴14は全周囲に巡らせても良い。また、デインプル穴14は応力的に厳しいAlN絶縁基板の4隅の部分のみ設ける場合、AlN絶縁基板の4隅の部分と辺の中央部に設ける場合もある。樹脂に要求される条件として、AlN絶縁基板周辺端部での応力的負担を担うので、(i)樹脂の密着力は必須であり、(ii)強いヤング率と変形できる柔軟性を備えていること、(iii)線膨張係数としてはCuに近いか、熱応力的バランスではCu(α=17.5×10-6/℃)とAlN(α=4.3×10-6/℃)の間であること、更に、(iv)高温での安定性(Tgが高い)に優れること等である。 In the configuration of the AlN insulating substrate 8 -Cu base substrate 11, the connection between the Si chip 1 and the lead electrode 5 is an example of the conventional wire bonding method of the Al wire 6, and the soldering of the chip is the first solder of Sn-15Sb. 4 was used. The Cu electrode 7 of the AlN substrate is Cu or Al (in the case of Al, Ni or Ni / Au plating is applied to the surface for wettability with solder). Since it is desirable that the edge reinforcing resin 3 is applied as uniformly as possible to the periphery of the board-side soldered portion 4 as the third solder 10, an epoxy-based potting resin that is easy to apply is used. . The end portion reinforcing resin 3 is preferably applied so that an appropriate fillet is formed around the board-side soldered portion. FIG. 1B shows a case where resin is applied so as to wrap the end portion of the AlN insulating substrate 8 and the end portion of the solder. As the resin application shape, the fillet portion is not limited to the application structure shown in FIG. 1B, and it is effective only on the lower side of the AlN substrate. In order to increase the adhesion between the resin and the Cu base substrate, the diverged dimple hole 14 provided in the Cu base substrate 11 may be provided around the entire periphery. In addition, the dimple holes 14 may be provided only at the four corners of the AlN insulating substrate where stress is severe, or may be provided at the four corners and the center of the side of the AlN insulating substrate. As a condition required for the resin, since it bears a stress burden at the peripheral edge of the AlN insulating substrate, (i) the adhesion of the resin is essential, and (ii) it has a strong Young's modulus and flexibility to deform. (Iii) The linear expansion coefficient is close to that of Cu, or in terms of thermal stress balance, Cu (α = 17.5 × 10 −6 / ° C.) and AlN (α = 4.3 × 10 −6 / ° C.) And (iv) excellent stability at high temperatures (high Tg).

なお、樹脂物性としては、少なくともヤング率;300〜3000kgf/mm2,線膨張係数;6〜25×10-6/℃の範囲で、望ましくはヤング率;1000〜1500kgf/mm2,線膨張係数;8〜17×10-6/℃の範囲である。ヤング率下限値;300kgf/mm2は樹脂による拘束力不足を意味し、ヤング率上限値;3000kgf/mm2はAlN端部界面の応力集中による破壊を意味する。ここでは、AlN破壊が起きない設計が重要であり、樹脂製造上からは矛盾する見方であるが、熱膨張係数をAlNに近づけ、かつ、極力、ヤング率を下げる対応が必要となる。特に、AlNコーナー部においては、応力集中の影響が避けられない場合(チップ周辺部の対応同様)、ポリイミドを塗布してキュア後、樹脂で部分補強することで、AlN破壊防止効果がある。ポリイミドのヤング率は低いので、AlN隅部の変形をポリイミド層で吸収してくれる。 The resin physical properties are at least Young's modulus: 300 to 3000 kgf / mm 2 , linear expansion coefficient: 6 to 25 × 10 −6 / ° C., preferably Young's modulus; 1000 to 1500 kgf / mm 2 , linear expansion coefficient ; It is the range of 8-17x10 < -6 > / degreeC. Young's modulus lower limit; 300 kgf / mm 2 means shortages bound by the resin, the Young's modulus limit; 3000 kgf / mm 2 means breaking due to stress concentration of the AlN end interface. Here, a design that does not cause AlN destruction is important, and this is a contradictory view from the viewpoint of resin production, but it is necessary to make the thermal expansion coefficient close to AlN and to reduce the Young's modulus as much as possible. In particular, in the AlN corner portion, when the influence of stress concentration is unavoidable (similar to the correspondence in the periphery of the chip), it is possible to prevent AlN destruction by applying polyimide and curing and partially reinforcing with resin. Since the Young's modulus of polyimide is low, deformation of the AlN corner is absorbed by the polyimide layer.

(実施例5)
図2はAlN絶縁基板8−Cuベース基板11構成において、Siチップ1とリード電極5間の接続は従来通り、Al線6のワイヤボンド方式で、チップのはんだ付けはSn−15Sbの第1のはんだ4である高温系はんだを、AlN基板のCu電極とCuベース基板との接続にはSn−3Ag−0.5Cu−5Inはんだを用いた構造である。ここでは実施例4で示したAlN基板周囲だけでなく、チップ下高温系Sn−15Sbはんだの変形を物性を特定化したエポキシ系樹脂19で抑え、はんだに作用する歪を小さくすることで、寿命向上が期待できる高信頼化構造とした。樹脂物性としては、AlN保護がSiチップ保護に換わっただけで、樹脂の機能は実施例4に示したものと同じである。Siチップの場合はSiチップ表面の素子部部の保護が重要なので、Siチップ周囲を塗布することになる。また、チップごとの個別実装とすることで、モジュール全体封止に比べ、樹脂,モジュールへの応力的負担を軽減する構造でもある。モジュールが小型であれば、ポッテイング,モールド方式でモジュール全体を樹脂封止することが、コストの面でも望ましい。しかし、チップが離れている場合、または大型構造の場合、個別チップ樹脂補強実装もしくはチップ周辺の部品を含む樹脂補強実装で高信頼性を確保することも必要になる。
(Example 5)
FIG. 2 shows an AlN insulating substrate 8 -Cu base substrate 11, in which the connection between the Si chip 1 and the lead electrode 5 is a conventional wire bonding method of the Al wire 6, and the soldering of the chip is the first Sn-15Sb soldering. The high-temperature solder, which is the solder 4, is Sn-3Ag-0.5Cu-5In solder for connection between the Cu electrode of the AlN substrate and the Cu base substrate. Here, not only the periphery of the AlN substrate shown in Example 4 but also the deformation of the high-temperature Sn-15Sb solder under the chip is suppressed by the epoxy resin 19 whose physical properties are specified, and the strain acting on the solder is reduced, thereby reducing the lifetime. A highly reliable structure that can be expected to improve. As for the resin physical properties, only the AlN protection is replaced with the Si chip protection, and the function of the resin is the same as that shown in the fourth embodiment. In the case of a Si chip, since it is important to protect the element portion on the surface of the Si chip, the periphery of the Si chip is applied. Further, by adopting individual mounting for each chip, it is also a structure that reduces the stress burden on the resin and the module as compared with the whole module sealing. If the module is small, it is desirable in terms of cost to encapsulate the entire module by potting or molding. However, when the chips are separated or have a large structure, it is necessary to ensure high reliability by individual chip resin reinforced mounting or resin reinforced mounting including components around the chip.

(実施例6)
図3(a)(b)は更に高出力パワー半導体素子が使用される場合の例である。Alのワイヤボンドの代わりに、Siチップ1の裏面(上側)とCu冷却板17とをはんだ15で接続する。図3(a)は該Cu冷却板がベローズ状の応力緩和機能を有したリード構造で、図3(b)はリードを2段にして曲げ変形による応力緩和機能を有するリード構造である。リード構造は端子の関係で、分割される場合がある。リード他端はAlN基板上の他のCu電極上に第2のはんだ16ではんだ付けされる。チップ上の熱は一部、このバイパス回路を経てチップ下から離れたAlN基板の他のCu電極7上に伝わるので、全体として熱効率は優れる。はんだ組成はチップ下をSn−15Sbはんだ、基板側をSn−3Ag−0.5Cu−5Inはんだとし、Cuリード部とCu電極との接続はSn−3Ag−0.5Cuはんだのペーストを用いた後付けも可能である。Cuリード部が後付けの場合は、基板側のSn−3Ag−0.5Cu−5Inはんだは再溶融するが、はんだ中の金属ボールで再溶融後のはんだ厚さは確保される。Cuリード部は低温の基板側はんだと同時に接続することも可能である。チップ上はんだ15は、Sn−15Sbはんだで同時に接続することも可能である。また、低温の基板側はんだと同時に、Sn−3Ag−0.5CuもしくはSn−3Ag−0.5Cu−5In、もしくはSn−Cu系(融点;228℃)等での接続も可能である。素子の温度上昇が高く厳しい場合は、Sn−15Sbはんだを用い、チップ下はんだと同時に接続するのが望ましい。
(Example 6)
FIGS. 3A and 3B are examples in the case where a higher output power semiconductor element is used. Instead of Al wire bonds, the back surface (upper side) of the Si chip 1 and the Cu cooling plate 17 are connected by solder 15. FIG. 3A shows a lead structure in which the Cu cooling plate has a bellows-like stress relaxation function, and FIG. 3B shows a lead structure having a stress relaxation function by bending deformation with two leads. The lead structure may be divided due to the terminal relationship. The other end of the lead is soldered with a second solder 16 on another Cu electrode on the AlN substrate. Part of the heat on the chip is transferred to the other Cu electrode 7 of the AlN substrate away from the bottom of the chip via this bypass circuit, so that the overall thermal efficiency is excellent. The solder composition is Sn-15Sb solder under the chip, the substrate side is Sn-3Ag-0.5Cu-5In solder, and the connection between the Cu lead portion and the Cu electrode is made by using a paste of Sn-3Ag-0.5Cu solder. Is also possible. When the Cu lead portion is retrofitted, the Sn-3Ag-0.5Cu-5In solder on the substrate side is remelted, but the solder thickness after remelting is secured by the metal balls in the solder. The Cu lead portion can be connected simultaneously with the low-temperature substrate-side solder. The on-chip solder 15 can be simultaneously connected with Sn-15Sb solder. Further, simultaneously with the low-temperature substrate-side solder, connection with Sn-3Ag-0.5Cu, Sn-3Ag-0.5Cu-5In, Sn-Cu system (melting point: 228 ° C.) or the like is also possible. When the temperature rise of the element is high and severe, it is desirable to use Sn-15Sb solder and connect it simultaneously with the solder under the chip.

しかし、はんだで接続しただけではチップ上部及びチップ周辺部の信頼性を確保することはできない。そこで、チップ下は当然のこと、チップ上も同時にはんだ付け部の信頼性を向上させるため、Cu冷却板17とはんだ付けしたチップ周囲を同様のエポキシ系樹脂19で被覆した構造とした。この樹脂によりはんだ,チップが拘束され、はんだの寿命は向上する。エポキシ系樹脂19だけでは、チップの拘束力が強い場合、素子,チップ端部への応力的悪影響も考えられる。そこで、応力を開放したい箇所を予めポリイミドで薄く塗布,キュア後にエポキシ系樹脂をその上から被覆することもできる。応力,寿命等の信頼性を優先する場合、ポリイミド塗布は効果がある。ポリイミド塗布は応力集中部等の特に保護したい場所だけ塗ってもその効果はある。大きな変位,応力が発生する場所にポリイミドを塗ることで、その上を樹脂で被覆した場合、ポリイミドはヤング率が適度に低いので、ポリイミド層内で応力,変形を逃がすことができる(解析でも確認している)。このため、応力集中に起因した不良から開放されることで信頼性は高まる。   However, the reliability of the upper part of the chip and the peripheral part of the chip cannot be ensured only by connecting with solder. Therefore, in order to improve the reliability of the soldered portion under the chip as well as the chip, the periphery of the chip soldered to the Cu cooling plate 17 is covered with the same epoxy resin 19. The solder and chip are restrained by this resin, and the life of the solder is improved. If the epoxy resin 19 alone has a strong chip restraining force, a stress adverse effect on the element and chip end may be considered. Therefore, a portion where the stress is to be released can be thinly coated with polyimide in advance, and the epoxy resin can be coated thereon after curing. When priority is given to reliability such as stress and life, polyimide coating is effective. Polyimide coating is effective even if it is applied only to places that are particularly protected, such as stress concentration areas. When polyimide is applied to a place where large displacement and stress are generated, and it is coated with resin, the Young's modulus of polyimide is moderately low, so stress and deformation can be released in the polyimide layer (confirmed by analysis) is doing). For this reason, reliability is improved by releasing from defects due to stress concentration.

なお、低熱膨張係数で、かつ熱伝導性に優れるCu−C,Al−C複合材(アルミナ並みの熱膨張係数)を冷却板として用いると、応力負担は少なくなり、信頼性は高まる。   In addition, when a Cu-C, Al-C composite material (coefficient of thermal expansion similar to that of alumina) having a low thermal expansion coefficient and excellent thermal conductivity is used as a cooling plate, the stress burden is reduced and the reliability is increased.

(実施例7)
図4は高出力パワー半導体素子を両面から水冷却する構造の断面構造を示す。パワー半導体素子の高い発熱密度に対応したパワーモジュールをPbフリー階層はんだを用い、高信頼で実装するための具体例を示す。第1のSiチップ1a及び第2のSiチップ2aの両面にSn−15Sbはんだ箔を搭載もしくは敷いて、AlN絶縁基板8のCu電極7に位置決めし、治具で固定し、水素炉を用いてリフローさせる。その際、Cuのリード電極5とCu電極7のはんだ付けも同時に接続しても良い。Sn−15Sbはんだで同時に接続できれば、Cuベース基板11とAlN絶縁基板8間を低温系はんだでの温度階層接続が可能になる。後付けするなら、低温系はんだで、Cuベース基板11とAlN絶縁基板8のCu電極7とのリフロー時に、同時に同一低温系はんだで接続しても良い。なお、低温系はんだのピーク温度を235〜240℃にすることは可能なので、Cuのリード電極5とCu電極7のはんだ付け用の組成は汎用的に用いられているSn−3Ag−0.5Cuでも可能である。この場合、Cuベース基板11とAlN絶縁基板8のCu電極7間はSn−3Ag−0.5Cu−5Inで、Cuのリード電極5とCu電極7とはSn−3Ag−0.5Cuを用いて、同時に後付けすることになる。なお、図4では2本のCuのリード電極7間が狭く見えるが、実際は奥行き方向にずらせるので、間隙の問題はない。Cuのリード電極5とCu電極7とはペースト(洗浄レスのペースト接続法も可能な状況にある)での接続が可能である。
(Example 7)
FIG. 4 shows a cross-sectional structure of a structure in which the high-power power semiconductor element is water-cooled from both sides. A specific example for mounting a power module corresponding to a high heat generation density of a power semiconductor element with high reliability using Pb-free hierarchical solder will be described. A Sn-15Sb solder foil is mounted or spread on both surfaces of the first Si chip 1a and the second Si chip 2a, positioned on the Cu electrode 7 of the AlN insulating substrate 8, fixed with a jig, and using a hydrogen furnace. Reflow. At this time, the soldering of the Cu lead electrode 5 and the Cu electrode 7 may be simultaneously connected. If the connection can be made simultaneously with Sn-15Sb solder, it is possible to connect the Cu base substrate 11 and the AlN insulating substrate 8 in a temperature hierarchy with low-temperature solder. If retrofitted, the same low temperature solder may be connected at the same time when the Cu base substrate 11 and the Cu electrode 7 of the AlN insulating substrate 8 are reflowed with a low temperature solder. Since the peak temperature of the low-temperature solder can be 235 to 240 ° C., the composition for soldering the Cu lead electrode 5 and the Cu electrode 7 is Sn-3Ag-0.5Cu, which is used for general purposes. But it is possible. In this case, between the Cu base substrate 11 and the Cu electrode 7 of the AlN insulating substrate 8 is Sn-3Ag-0.5Cu-5In, and the Cu lead electrode 5 and the Cu electrode 7 are Sn-3Ag-0.5Cu. , Will be retrofitted at the same time. In FIG. 4, the space between the two Cu lead electrodes 7 appears to be narrow, but the gap is not a problem because it is actually shifted in the depth direction. The Cu lead electrode 5 and the Cu electrode 7 can be connected with a paste (in a situation where a cleaning-less paste connection method is also possible).

はんだ付け後、溶剤で薄めたポリイミドをチップ周囲に塗布させ、応力が集中するチップ端部・周辺に20〜100μm厚程度付着させ、キュア後、ガラス転移温度(Tg)が高く、密着力がある低熱膨張係数のエポキシ樹脂(熱膨張係数;約10×10-6/℃)で、約15000MPaのヤング率(Siチップへの応力的負担を少なくする意味で、可能な限り低熱膨張係数でヤング率が低い樹脂が望ましいが、材料系固有の限界がある。塗布されたポリイミド膜が一部、この機能を受け持つことになる)が望ましい。 After soldering, polyimide thinned with a solvent is applied to the periphery of the chip, and is applied to the tip end / periphery where stress is concentrated to a thickness of about 20 to 100 μm. After curing, the glass transition temperature (Tg) is high, and there is adhesion. An epoxy resin with a low thermal expansion coefficient (thermal expansion coefficient; about 10 × 10 −6 / ° C.) and a Young's modulus of about 15000 MPa (in order to reduce the stress load on the Si chip, the Young's modulus with the lowest possible thermal expansion coefficient) However, there is a limit inherent in the material system, and a part of the applied polyimide film is responsible for this function).

これより、特定な物性を有するエポキシ系樹脂(予めポリイミド塗布を行う場合もある)によりチップ周囲を強く拘束することで、はんだの変形を少なく抑えることができる。このため、Sn−15Sbはんだでも高信頼性を確保できる。   As a result, the deformation of the solder can be suppressed by strongly restraining the periphery of the chip with an epoxy resin having specific physical properties (which may be preliminarily coated with polyimide). For this reason, high reliability can be ensured even with Sn-15Sb solder.

なお、チップ,絶縁基板が低熱膨張係数であることから、樹脂で拘束する構造でより高信頼性を確保するには、ベース基板として熱膨張係数が比較的低くて、熱伝導性に優れるCu−C,Al−C部材は構造上優れた構成になる。   Since the chip and the insulating substrate have a low coefficient of thermal expansion, in order to ensure higher reliability with a resin-constrained structure, the base substrate has a relatively low coefficient of thermal expansion and excellent thermal conductivity. The C, Al-C member has a structurally excellent structure.

そして、図4の構造においても、チップ周辺のみ部分樹脂補強した構造及びAlN基板とベース基板を接続したはんだ周囲を覆うように部分樹脂補強した構造(AlN基板のはんだ付け側とは反対方向は覆わず、応力を開放できるようにした構造)との樹脂を分離させた構造が信頼性上からは望ましい。ベース基板を低熱膨張係数のCu−C材が使えれば、低熱膨張部材で一体化できる(Cu電極は軟化しているので応力による影響は小さい)ので、トランスファーモールド方式で一体化することがコスト面でも有利になる。なお、両面冷却高出力パワー半導体素子構造は上下がほぼ対称的なので、相対的な変位,歪は小さく、従って、作用する応力はかなり低下することを解析で確認している。従って、信頼性とコストと作業性が絡んだ構造の選択が必要になる。   In the structure of FIG. 4 as well, a structure in which only the periphery of the chip is partially resin-reinforced and a structure in which the resin is reinforced so as to cover the periphery of the solder connecting the AlN substrate and the base substrate (the direction opposite to the soldering side of the AlN substrate is covered) From the viewpoint of reliability, a structure in which the resin is separated from the structure in which stress can be released. If Cu-C material with a low thermal expansion coefficient can be used for the base substrate, it can be integrated with a low thermal expansion member (the Cu electrode is soft, so the effect of stress is small), so it is costly to integrate with the transfer mold method But it will be advantageous. It should be noted that the double-sided cooling high output power semiconductor element structure is almost symmetrical in the vertical direction, so that the relative displacement and strain are small, and therefore the acting stress is considerably reduced by analysis. Therefore, it is necessary to select a structure in which reliability, cost, and workability are involved.

Pbフリーはんだでパワーモジュールの温度階層接続を可能にしたのは、(i)部品の耐熱性に問題がないこと、(ii)高温系はんだのはんだ付け温度を上げられること、(iii)Inを入れることで低温系はんだの融点を約10℃下げて、(iv)信頼性を向上させることができたこと等が組合わされて、はんだ付けの温度マージンを確保できたことによる。この構成は、パワーモジュールに限らず、温度階層接続が要求されるモジュール,耐熱性に厳しい製品、例えばオルターネートダイオード等にも応用できる。特に素子を熱伝導性に優れる絶縁基板に接続する構成の場合、共に熱膨張係数差が小さいことから、はんだに多少硬さがあるSn−15Sb系でも十分使える可能性がある。更に樹脂による部分補強効果を併用することで、より信頼性を向上させることが可能である。   Pb-free solder enables the power module to be connected to the temperature hierarchy because (i) there is no problem with the heat resistance of the components, (ii) the soldering temperature of the high-temperature solder can be increased, and (iii) In This is because the melting point of the low-temperature solder is lowered by about 10 ° C., and (iv) the reliability can be improved, and the temperature margin of soldering can be secured. This configuration can be applied not only to power modules, but also to modules that require temperature hierarchy connection and products that have strict heat resistance, such as alternate diodes. In particular, in the case of a configuration in which the element is connected to an insulating substrate having excellent thermal conductivity, since the difference in thermal expansion coefficient is small, there is a possibility that the Sn-15Sb system in which the solder is somewhat hard can be used sufficiently. Furthermore, it is possible to improve reliability more by using the partial reinforcement effect by resin together.

なお、本実施例ではAlN基板の例を示したが、Si34基板等でも同様の効果が期待できる。特にSi34基板の場合は、AlN基板と比べ熱特性には多少劣るものの、曲げ,衝撃等に対する耐機械的特性に優れ、反りも少なく、継手の信頼性も上がるので、厳しい使用環境下においては有望である。 In this embodiment, an example of an AlN substrate is shown, but a similar effect can be expected with a Si 3 N 4 substrate or the like. In particular, the Si 3 N 4 substrate is slightly inferior in thermal properties to the AlN substrate, but has excellent mechanical properties against bending, impact, etc., less warpage, and increases the reliability of the joint. Is promising.

(a)AlN絶縁基板とCuベース基板構造(2種類)のパワーモジュールの断面図、(b)は図1(a)に絶縁基板周辺を樹脂補強したパワーモジュールの断面図。(A) Cross-sectional view of a power module having an AlN insulating substrate and a Cu base substrate structure (two types), (b) is a cross-sectional view of the power module in which the periphery of the insulating substrate is reinforced with resin in FIG. AlN絶縁基板とCuベース基板構造(2種類)モジュールの断面図。Sectional drawing of an AlN insulating substrate and Cu base substrate structure (2 types) module. チップ上にCu冷却板を搭載したパワーモジュール構造の断面図。Sectional drawing of the power module structure which mounts Cu cooling plate on a chip | tip. 両面冷却パワーモジュール構造の断面図。Sectional drawing of a double-sided cooling power module structure.

符号の説明Explanation of symbols

1 Siチップ
1a 第1のSiチップ
2a 第2のSiチップ
3 端部補強樹脂
4 第1のはんだ
5 リード電極
6 Al線
7 Cu電極
8 AlN絶縁基板
9 樹脂
10 第3のはんだ
11 Cuベース基板
12 冷媒(水)
13 ヒートシンク
14 デインプル穴
15 チップ上はんだ
16 第2のはんだ
17,18 Cu冷却板
19 エポキシ系樹脂
20 シリコーンゲル
21 樹脂接着
22 樹脂ケース
23 アルミナ基板
DESCRIPTION OF SYMBOLS 1 Si chip 1a 1st Si chip 2a 2nd Si chip 3 End part reinforcement resin 4 1st solder 5 Lead electrode 6 Al wire 7 Cu electrode 8 AlN insulating substrate 9 Resin 10 3rd solder 11 Cu base substrate 12 Refrigerant (water)
13 Heat sink 14 Dimple hole 15 Solder on chip 16 Second solder 17, 18 Cu cooling plate 19 Epoxy resin 20 Silicone gel 21 Resin bond 22 Resin case 23 Alumina substrate

Claims (11)

ベース基板とAlN絶縁基板及び半導体チップがはんだで接続されてなる半導体パワーモジュールにおいて、
前記半導体チップとAlN絶縁基板とのはんだ付けに、Sb:11〜20mass%、残りSnからなる高温系鉛フリーはんだを用い、前記AlN絶縁基板とベース基板とのはんだ付けに、Ag:0.1〜4.5mass%,Cu:0.1〜5.0mass%,In:3〜7mass%、残りSnからなる低温系鉛フリーはんだを用いたことを特徴とする半導体パワーモジュール。
In a semiconductor power module in which a base substrate, an AlN insulating substrate, and a semiconductor chip are connected by solder,
A high temperature lead-free solder composed of Sb: 11 to 20 mass% and the remaining Sn is used for soldering the semiconductor chip and the AlN insulating substrate, and Ag: 0.1 is used for soldering the AlN insulating substrate and the base substrate. A semiconductor power module characterized by using a low-temperature lead-free solder composed of ~ 4.5 mass%, Cu: 0.1 to 5.0 mass%, In: 3 to 7 mass%, and remaining Sn.
前記高温系Sn−Sb系はんだにCuが0.1〜5mass%含まれていることを特徴とする請求項1に記載の半導体パワーモジュール。   2. The semiconductor power module according to claim 1, wherein 0.1 to 5 mass% of Cu is included in the high-temperature Sn—Sb solder. 前記高温系Sn−Sb系はんだにBi,Zn,Ge,Ni,Al,Ag,P,Inが少なくとも1種類以上、0.01〜1mass%含まれていることを特徴とする請求項1又は2に記載の半導体パワーモジュール。   3. The high-temperature Sn—Sb solder contains at least one type of Bi, Zn, Ge, Ni, Al, Ag, P, and In, and 0.01 to 1 mass%. The semiconductor power module described in 1. 前記低温系はんだにBi,Zn,Ge,Ni,Al,Sb,Pが少なくとも1種類以上、0.01〜1mass%含まれていることを特徴とする請求項1乃至3の何れかに記載の半導体パワーモジュール。   The low-temperature solder contains at least one kind of Bi, Zn, Ge, Ni, Al, Sb, and P in an amount of 0.01 to 1 mass%, according to any one of claims 1 to 3. Semiconductor power module. 請求項1乃至4の何れかに記載の鉛フリーはんだで、シリコーンゲルで充填されてなる半導体パワーモジュールにおいて、
前記AlN絶縁基板とベース基板とのはんだ付け端部周囲、及びその周囲の前記AlN絶縁基板の周囲とその周囲の前記ベース基板表面の一部を包むようにエポキシ系樹脂を部分被覆したことを特徴とする半導体パワーモジュール。
The lead-free solder according to any one of claims 1 to 4, wherein the semiconductor power module is filled with silicone gel .
It is characterized in that an epoxy resin is partially coated so as to wrap around the soldered end portion of the AlN insulating substrate and the base substrate, and the periphery of the AlN insulating substrate and a part of the surface of the base substrate around the periphery. Semiconductor power module.
請求項1乃至4の何れかに記載の鉛フリーはんだで、シリコーンゲルで充填されてなる半導体パワーモジュールにおいて、
前記AlN絶縁基板とベース基板とのはんだ付け端部周囲、及びその周囲の該AlN絶縁基板の周囲とその周囲のデインプル溝加工が施された前記ベース基板表面の一部を包むようにエポキシ系樹脂を部分被覆したことを特徴とする半導体パワーモジュール。
The lead-free solder according to any one of claims 1 to 4, wherein the semiconductor power module is filled with silicone gel .
Soldered end periphery of the AlN insulating substrate and the base substrate, and an epoxy resin so as to enclose the part of the periphery and the base substrate surface to which the dimples grooving around is performed of the AlN insulating substrate around the A semiconductor power module characterized by being partially covered.
前記半導体チップ及びチップ周辺は、エポキシ系樹脂で被覆されていることを特徴とする請求項1乃至6の何れかに記載の半導体パワーモジュール。   7. The semiconductor power module according to claim 1, wherein the semiconductor chip and the periphery of the chip are covered with an epoxy resin. 請求項7において、
前記半導体チップ及びチップ周辺は、エポキシ系樹脂で塗布前にポリイミドを予め薄く塗布されていることを特徴とする半導体パワーモジュール。
In claim 7,
A semiconductor power module, wherein the semiconductor chip and the periphery of the chip are preliminarily coated with an epoxy resin and polyimide is thinly coated.
請求項1乃至8の何れかにおいて、
前記半導体チップ上面に冷却板リードをはんだ付けし、前記半導体チップと一体化して樹脂補強、もしくはチップ周辺部を予めポリイミドを塗布後に樹脂補強することを特徴とする半導体パワーモジュール。
In any of claims 1 to 8,
A semiconductor power module characterized in that a cooling plate lead is soldered on the upper surface of the semiconductor chip and is integrated with the semiconductor chip to reinforce the resin, or the periphery of the chip is pre-coated with polyimide and then resin reinforced.
前記請求項1乃至9の何れかにおいて、
前記高温系Sn−Sb系はんだの中に、低熱膨張繊維を5〜20vol%含ませたことを特徴とする半導体パワーモジュール。
In any one of claims 1 to 9,
A semiconductor power module comprising 5 to 20 vol% of low thermal expansion fiber in the high-temperature Sn-Sb solder.
前記請求項1乃至10の何れかにおいて、
前記低温系はんだ中に50〜100μmのCu粒子、もしくは表面にNi,Ni/Auフラッシュめっきを施したCu粒子、もしくはNi粒子を分散させたことを特徴とする半導体パワーモジュール。
In any one of claims 1 to 10,
Semiconductor power module which is characterized in that Cu particles of 50 to 100 [mu] m, or on the surface Ni, to disperse the Ni / Au Cu particles were subjected to flash plating or Ni particles child, in the low temperature type solder.
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