JP5010247B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5010247B2 JP5010247B2 JP2006313379A JP2006313379A JP5010247B2 JP 5010247 B2 JP5010247 B2 JP 5010247B2 JP 2006313379 A JP2006313379 A JP 2006313379A JP 2006313379 A JP2006313379 A JP 2006313379A JP 5010247 B2 JP5010247 B2 JP 5010247B2
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- semiconductor substrate
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- pad electrode
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/50—Encapsulations or containers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F71/00—Manufacture or treatment of devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F77/00—Constructional details of devices covered by this subclass
- H10F77/20—Electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/015—Manufacture or treatment of bond wires
- H10W72/01515—Forming coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
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- Electroluminescent Light Sources (AREA)
- Solid State Image Pick-Up Elements (AREA)
Description
5 接着層 6 光透過性基板 7 支持体 8 開口部
9 第2の絶縁膜 10 配線層 11 切り欠き部 12 保護層
13 導電端子 20 半導体装置 30 半導体装置 31 保護層
32 電極接続層 33 導電端子 100 半導体基板
101 デバイス素子 102 パッド電極 103 支持基板
104 スルーホール 105 リード電極 106 ボンディングワイヤ
107 エポキシ樹脂 DL ダイシングライン
Claims (8)
- その表面上に青紫色レーザーを電気信号に変換することができるデバイス素子が形成された半導体基板と、
裏面が前記半導体基板と対向し、前記半導体基板の表面側と接着層を介して貼り合わされた光透過性基板と、
前記光透過性基板の裏面に形成された切り欠き部と、
前記デバイス素子と電気的に接続されたパッド電極と、
前記パッド電極の裏面に接触して電気的に接続され、前記半導体基板の側面及び裏面に沿って形成された配線層と、
前記切り欠き部において露出された前記接着層の側面、及び前記配線層を被覆する保護層と、を備え、
前記接着層は透明シリコーンを含み、前記デバイス素子が前記光透過性基板で被覆されたことを特徴とする半導体装置。 - 前記保護層は、前記半導体基板の裏面の一部に開口を有し、
前記保護層の開口を介して、前記配線層と電気的に接続された導電端子を備えることを特徴とする請求項1に記載の半導体装置。 - その表面上に青紫色レーザーを電気信号に変換することができるデバイス素子が形成された半導体基板と、
裏面が前記半導体基板と対向し、前記半導体基板の表面側と接着層を介して貼り合わされた光透過性基板と、
前記光透過性基板の裏面に形成された切り欠き部と、
前記デバイス素子と電気的に接続されたパッド電極と、
前記切り欠き部において露出された前記接着層の側面及び前記半導体基板の裏面を被覆するとともに、前記パッド電極と重畳する領域に開口を有する保護層と、
前記保護層の開口を介して前記パッド電極の裏面に接触して電気的に接続された導電端子を備え、
前記接着層は透明シリコーンを含み、前記デバイス素子が前記光透過性基板で被覆されたことを特徴とする半導体装置。 - 前記パッド電極の裏面は、前記半導体基板から露出されていることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記半導体基板は、平面図で見て、前記半導体基板の外周が凹凸になるように構成されていることを特徴とする請求項4に記載の半導体装置。
- 前記接着層は、エポキシ基含有シリコーン及びオルガノシランを含むことを特徴とする請求項1乃至4のいずれかに記載の半導体装置。
- その表面上に青紫色レーザーを電気信号に変換することができるデバイス素子と、該デバイス素子と電気的に接続されたパッド電極が形成された半導体基板を準備し、
前記半導体基板の表面上に、透明シリコーンを含む接着層を介して光透過性基板を貼り合わせ、前記デバイス素子を前記光透過性基板で封止する工程と、
前記半導体基板と前記光透過性基板とを貼り合わせた後に、前記半導体基板の前記パッド電極に対応する領域を選択的にエッチングして前記パッド電極の裏面を露出する工程と、
前記半導体基板を選択的にエッチングした後に、前記半導体基板の側面及び裏面に沿って前記パッド電極の裏面に接触して電気的に接続された配線層を形成する工程と、
前記配線層を形成した後に、前記半導体基板の裏面側から前記光透過性基板を選択的に除去することで前記光透過性基板の裏面に切り欠き部を形成し、前記接着層の側面を露出する工程と、
前記切り欠き部において露出された前記接着層の側面、及び前記配線層を被覆する保護層を形成する工程と、を備えることを特徴とする半導体装置の製造方法。 - その表面上に青紫色レーザーを電気信号に変換することができるデバイス素子と、該デバイス素子と電気的に接続されたパッド電極が形成された半導体基板を準備し、
前記半導体基板の表面上に、透明シリコーンを含む接着層を介して光透過性基板を貼り合わせ、前記デバイス素子を前記光透過性基板で封止する工程と、
前記半導体基板と前記光透過性基板とを貼り合わせた後に、前記半導体基板の前記パッド電極に対応する領域を選択的にエッチングして前記パッド電極の裏面を露出する工程と、
前記半導体基板を選択的にエッチングした後に、前記半導体基板の裏面側から前記光透過性基板を選択的に除去することで前記光透過性基板の裏面に切り欠き部を形成し、前記接着層の側面を露出する工程と、
前記切り欠き部において露出された前記接着層の側面及び前記半導体基板の裏面を被覆するとともに、前記パッド電極と重畳する領域に開口を有する保護層を形成する工程と、
前記保護層の開口を介して前記パッド電極の裏面に接触して電気的に接続された導電端子を形成する工程と、を備えることを特徴とする半導体装置の製造方法。
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006313379A JP5010247B2 (ja) | 2006-11-20 | 2006-11-20 | 半導体装置及びその製造方法 |
| US11/942,506 US8686526B2 (en) | 2006-11-20 | 2007-11-19 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006313379A JP5010247B2 (ja) | 2006-11-20 | 2006-11-20 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008130768A JP2008130768A (ja) | 2008-06-05 |
| JP5010247B2 true JP5010247B2 (ja) | 2012-08-29 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006313379A Expired - Fee Related JP5010247B2 (ja) | 2006-11-20 | 2006-11-20 | 半導体装置及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8686526B2 (ja) |
| JP (1) | JP5010247B2 (ja) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200737506A (en) * | 2006-03-07 | 2007-10-01 | Sanyo Electric Co | Semiconductor device and manufacturing method of the same |
| TWI367557B (en) * | 2006-08-11 | 2012-07-01 | Sanyo Electric Co | Semiconductor device and manufaturing method thereof |
| JP2010027741A (ja) | 2008-07-16 | 2010-02-04 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| JP2010103300A (ja) * | 2008-10-23 | 2010-05-06 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| US8183677B2 (en) * | 2008-11-26 | 2012-05-22 | Infineon Technologies Ag | Device including a semiconductor chip |
| JP5656357B2 (ja) * | 2008-12-26 | 2015-01-21 | ラピスセミコンダクタ株式会社 | 半導体光センサ素子およびその製造方法 |
| JP5684491B2 (ja) * | 2010-04-27 | 2015-03-11 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置及びその製造方法 |
| US9165970B2 (en) | 2011-02-16 | 2015-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Back side illuminated image sensor having isolated bonding pads |
| CN103531597B (zh) * | 2012-07-03 | 2016-06-08 | 台湾积体电路制造股份有限公司 | 降低了侧壁引发的泄漏的背面照明图像传感器 |
| US9634053B2 (en) * | 2014-12-09 | 2017-04-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Image sensor chip sidewall interconnection |
| US11322538B2 (en) | 2017-02-22 | 2022-05-03 | Sony Semiconductor Solutions Corporation | Imaging device, electronic apparatus, and method of manufacturing imaging device |
Family Cites Families (100)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3648131A (en) | 1969-11-07 | 1972-03-07 | Ibm | Hourglass-shaped conductive connection through semiconductor structures |
| US4807021A (en) | 1986-03-10 | 1989-02-21 | Kabushiki Kaisha Toshiba | Semiconductor device having stacking structure |
| US4954875A (en) | 1986-07-17 | 1990-09-04 | Laser Dynamics, Inc. | Semiconductor wafer array with electrically conductive compliant material |
| DE3738634C2 (de) * | 1986-11-13 | 1996-11-14 | Sunstar Engineering Inc | Epoxyharzmasse mit darin dispergierten Siliconharzteilchen |
| US5463246A (en) | 1988-12-29 | 1995-10-31 | Sharp Kabushiki Kaisha | Large scale high density semiconductor apparatus |
| US4984358A (en) | 1989-03-10 | 1991-01-15 | Microelectronics And Computer Technology Corporation | Method of assembling stacks of integrated circuit dies |
| US5229647A (en) | 1991-03-27 | 1993-07-20 | Micron Technology, Inc. | High density data storage using stacked wafers |
| US5432999A (en) | 1992-08-20 | 1995-07-18 | Capps; David F. | Integrated circuit lamination process |
| US5420460A (en) | 1993-08-05 | 1995-05-30 | Vlsi Technology, Inc. | Thin cavity down ball grid array package based on wirebond technology |
| US5424245A (en) | 1994-01-04 | 1995-06-13 | Motorola, Inc. | Method of forming vias through two-sided substrate |
| US6124179A (en) | 1996-09-05 | 2000-09-26 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
| US5841197A (en) | 1994-11-18 | 1998-11-24 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
| US5814889A (en) | 1995-06-05 | 1998-09-29 | Harris Corporation | Intergrated circuit with coaxial isolation and method |
| US5618752A (en) | 1995-06-05 | 1997-04-08 | Harris Corporation | Method of fabrication of surface mountable integrated circuits |
| US5608264A (en) | 1995-06-05 | 1997-03-04 | Harris Corporation | Surface mountable integrated circuit with conductive vias |
| US5646067A (en) | 1995-06-05 | 1997-07-08 | Harris Corporation | Method of bonding wafers having vias including conductive material |
| US5691248A (en) | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
| US6882030B2 (en) | 1996-10-29 | 2005-04-19 | Tru-Si Technologies, Inc. | Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate |
| JP3537447B2 (ja) | 1996-10-29 | 2004-06-14 | トル‐シ・テクノロジーズ・インコーポレイテッド | 集積回路及びその製造方法 |
| US6809421B1 (en) | 1996-12-02 | 2004-10-26 | Kabushiki Kaisha Toshiba | Multichip semiconductor device, chip therefor and method of formation thereof |
| JP3920399B2 (ja) | 1997-04-25 | 2007-05-30 | 株式会社東芝 | マルチチップ半導体装置用チップの位置合わせ方法、およびマルチチップ半導体装置の製造方法・製造装置 |
| JP3210881B2 (ja) | 1997-06-05 | 2001-09-25 | ソニーケミカル株式会社 | Bgaパッケージ基板 |
| IL123207A0 (en) * | 1998-02-06 | 1998-09-24 | Shellcase Ltd | Integrated circuit device |
| US6352923B1 (en) | 1999-03-01 | 2002-03-05 | United Microelectronics Corp. | Method of fabricating direct contact through hole type |
| US6437424B1 (en) | 1999-03-09 | 2002-08-20 | Sanyo Electric Co., Ltd. | Non-volatile semiconductor memory device with barrier and insulating films |
| JP3798597B2 (ja) | 1999-11-30 | 2006-07-19 | 富士通株式会社 | 半導体装置 |
| US6322903B1 (en) | 1999-12-06 | 2001-11-27 | Tru-Si Technologies, Inc. | Package of integrated circuits and vertical integration |
| JP3701542B2 (ja) | 2000-05-10 | 2005-09-28 | シャープ株式会社 | 半導体装置およびその製造方法 |
| US6350632B1 (en) | 2000-09-20 | 2002-02-26 | Charles W. C. Lin | Semiconductor chip assembly with ball bond connection joint |
| US6350386B1 (en) | 2000-09-20 | 2002-02-26 | Charles W. C. Lin | Method of making a support circuit with a tapered through-hole for a semiconductor chip assembly |
| US6544813B1 (en) | 2000-10-02 | 2003-04-08 | Charles W. C. Lin | Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment |
| US6448108B1 (en) | 2000-10-02 | 2002-09-10 | Charles W. C. Lin | Method of making a semiconductor chip assembly with a conductive trace subtractively formed before and after chip attachment |
| US6740576B1 (en) | 2000-10-13 | 2004-05-25 | Bridge Semiconductor Corporation | Method of making a contact terminal with a plated metal peripheral sidewall portion for a semiconductor chip assembly |
| US6548393B1 (en) | 2000-10-13 | 2003-04-15 | Charles W. C. Lin | Semiconductor chip assembly with hardened connection joint |
| US7190080B1 (en) | 2000-10-13 | 2007-03-13 | Bridge Semiconductor Corporation | Semiconductor chip assembly with embedded metal pillar |
| US7094676B1 (en) | 2000-10-13 | 2006-08-22 | Bridge Semiconductor Corporation | Semiconductor chip assembly with embedded metal pillar |
| US7075186B1 (en) | 2000-10-13 | 2006-07-11 | Bridge Semiconductor Corporation | Semiconductor chip assembly with interlocked contact terminal |
| US7414319B2 (en) | 2000-10-13 | 2008-08-19 | Bridge Semiconductor Corporation | Semiconductor chip assembly with metal containment wall and solder terminal |
| US7009297B1 (en) | 2000-10-13 | 2006-03-07 | Bridge Semiconductor Corporation | Semiconductor chip assembly with embedded metal particle |
| US6492252B1 (en) | 2000-10-13 | 2002-12-10 | Bridge Semiconductor Corporation | Method of connecting a bumped conductive trace to a semiconductor chip |
| US6576539B1 (en) | 2000-10-13 | 2003-06-10 | Charles W.C. Lin | Semiconductor chip assembly with interlocked conductive trace |
| US6908788B1 (en) | 2000-10-13 | 2005-06-21 | Bridge Semiconductor Corporation | Method of connecting a conductive trace to a semiconductor chip using a metal base |
| US7129575B1 (en) | 2000-10-13 | 2006-10-31 | Bridge Semiconductor Corporation | Semiconductor chip assembly with bumped metal pillar |
| US6576493B1 (en) | 2000-10-13 | 2003-06-10 | Bridge Semiconductor Corporation | Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps |
| US7071089B1 (en) | 2000-10-13 | 2006-07-04 | Bridge Semiconductor Corporation | Method of making a semiconductor chip assembly with a carved bumped terminal |
| US6673710B1 (en) | 2000-10-13 | 2004-01-06 | Bridge Semiconductor Corporation | Method of connecting a conductive trace and an insulative base to a semiconductor chip |
| US7132741B1 (en) | 2000-10-13 | 2006-11-07 | Bridge Semiconductor Corporation | Semiconductor chip assembly with carved bumped terminal |
| US6667229B1 (en) | 2000-10-13 | 2003-12-23 | Bridge Semiconductor Corporation | Method of connecting a bumped compliant conductive trace and an insulative base to a semiconductor chip |
| US6440835B1 (en) | 2000-10-13 | 2002-08-27 | Charles W. C. Lin | Method of connecting a conductive trace to a semiconductor chip |
| US6537851B1 (en) | 2000-10-13 | 2003-03-25 | Bridge Semiconductor Corporation | Method of connecting a bumped compliant conductive trace to a semiconductor chip |
| US6699780B1 (en) | 2000-10-13 | 2004-03-02 | Bridge Semiconductor Corporation | Method of connecting a conductive trace to a semiconductor chip using plasma undercut etching |
| US7129113B1 (en) | 2000-10-13 | 2006-10-31 | Bridge Semiconductor Corporation | Method of making a three-dimensional stacked semiconductor package with a metal pillar in an encapsulant aperture |
| US7319265B1 (en) | 2000-10-13 | 2008-01-15 | Bridge Semiconductor Corporation | Semiconductor chip assembly with precision-formed metal pillar |
| US6444489B1 (en) | 2000-12-15 | 2002-09-03 | Charles W. C. Lin | Semiconductor chip assembly with bumped molded substrate |
| JP2002184937A (ja) | 2000-12-18 | 2002-06-28 | Shinko Electric Ind Co Ltd | 半導体装置の実装構造 |
| US6653170B1 (en) | 2001-02-06 | 2003-11-25 | Charles W. C. Lin | Semiconductor chip assembly with elongated wire ball bonded to chip and electrolessly plated to support circuit |
| US6498381B2 (en) | 2001-02-22 | 2002-12-24 | Tru-Si Technologies, Inc. | Semiconductor structures having multiple conductive layers in an opening, and methods for fabricating same |
| US6717254B2 (en) | 2001-02-22 | 2004-04-06 | Tru-Si Technologies, Inc. | Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture |
| US7163739B2 (en) * | 2001-03-15 | 2007-01-16 | Mitsui Chemicals, Inc. | Laminate and display apparatus using the same |
| JP2002329850A (ja) * | 2001-05-01 | 2002-11-15 | Canon Inc | チップサイズパッケージおよびその製造方法 |
| US6451626B1 (en) | 2001-07-27 | 2002-09-17 | Charles W.C. Lin | Three-dimensional stacked semiconductor package |
| US6765287B1 (en) | 2001-07-27 | 2004-07-20 | Charles W. C. Lin | Three-dimensional stacked semiconductor package |
| IL160189A0 (en) | 2001-08-24 | 2004-07-25 | Zeiss Stiftung | Method for producing contacts and printed circuit packages |
| TW523887B (en) | 2001-11-15 | 2003-03-11 | Siliconware Precision Industries Co Ltd | Semiconductor packaged device and its manufacturing method |
| SG115456A1 (en) | 2002-03-04 | 2005-10-28 | Micron Technology Inc | Semiconductor die packages with recessed interconnecting structures and methods for assembling the same |
| TWI232560B (en) | 2002-04-23 | 2005-05-11 | Sanyo Electric Co | Semiconductor device and its manufacture |
| US7399683B2 (en) | 2002-06-18 | 2008-07-15 | Sanyo Electric Co., Ltd. | Manufacturing method of semiconductor device |
| TWI229435B (en) | 2002-06-18 | 2005-03-11 | Sanyo Electric Co | Manufacture of semiconductor device |
| US6903442B2 (en) | 2002-08-29 | 2005-06-07 | Micron Technology, Inc. | Semiconductor component having backside pin contacts |
| JP3908146B2 (ja) | 2002-10-28 | 2007-04-25 | シャープ株式会社 | 半導体装置及び積層型半導体装置 |
| TWI227550B (en) | 2002-10-30 | 2005-02-01 | Sanyo Electric Co | Semiconductor device manufacturing method |
| TWI239607B (en) | 2002-12-13 | 2005-09-11 | Sanyo Electric Co | Method for making a semiconductor device |
| JP4544876B2 (ja) | 2003-02-25 | 2010-09-15 | 三洋電機株式会社 | 半導体装置の製造方法 |
| JP2004273561A (ja) | 2003-03-05 | 2004-09-30 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| JP4371679B2 (ja) * | 2003-03-19 | 2009-11-25 | 三洋電機株式会社 | 半導体集積装置及びその製造方法 |
| KR100497111B1 (ko) | 2003-03-25 | 2005-06-28 | 삼성전자주식회사 | 웨이퍼 레벨 칩 스케일 패키지, 그를 적층한 적층 패키지및 그 제조 방법 |
| US6897148B2 (en) | 2003-04-09 | 2005-05-24 | Tru-Si Technologies, Inc. | Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby |
| TWI229890B (en) | 2003-04-24 | 2005-03-21 | Sanyo Electric Co | Semiconductor device and method of manufacturing same |
| JP4248928B2 (ja) | 2003-05-13 | 2009-04-02 | ローム株式会社 | 半導体チップの製造方法、半導体装置の製造方法、半導体チップ、および半導体装置 |
| JP4130158B2 (ja) | 2003-06-09 | 2008-08-06 | 三洋電機株式会社 | 半導体装置の製造方法、半導体装置 |
| JP2004363380A (ja) | 2003-06-05 | 2004-12-24 | Sanyo Electric Co Ltd | 光半導体装置およびその製造方法 |
| EP1487019A1 (en) | 2003-06-12 | 2004-12-15 | Koninklijke Philips Electronics N.V. | Electronic device and method of manufacturing thereof |
| JP4401181B2 (ja) | 2003-08-06 | 2010-01-20 | 三洋電機株式会社 | 半導体装置及びその製造方法 |
| JP2005079457A (ja) * | 2003-09-02 | 2005-03-24 | Sony Chem Corp | 光機能素子の実装構造、光機能素子実装モジュール |
| JP4248355B2 (ja) | 2003-09-24 | 2009-04-02 | 三洋電機株式会社 | 半導体装置および半導体装置の製造方法 |
| KR100548613B1 (ko) | 2003-10-14 | 2006-01-31 | 삼성전기주식회사 | 블루레이용 수광소자 및 그 제조방법 |
| CN100472823C (zh) | 2003-10-15 | 2009-03-25 | 日亚化学工业株式会社 | 发光装置 |
| JP2005236146A (ja) * | 2004-02-20 | 2005-09-02 | Hamamatsu Photonics Kk | 光半導体装置および光半導体装置の製造方法 |
| JP4753170B2 (ja) | 2004-03-05 | 2011-08-24 | 三洋電機株式会社 | 半導体装置及びその製造方法 |
| JP4606063B2 (ja) | 2004-05-14 | 2011-01-05 | パナソニック株式会社 | 光学デバイスおよびその製造方法 |
| JP4660259B2 (ja) | 2004-06-10 | 2011-03-30 | 三洋電機株式会社 | 半導体装置の製造方法 |
| JP2006134366A (ja) * | 2004-09-15 | 2006-05-25 | Konica Minolta Opto Inc | 光ピックアップ装置及び対物光学素子 |
| JP2006093367A (ja) | 2004-09-24 | 2006-04-06 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| JP2006179718A (ja) * | 2004-12-22 | 2006-07-06 | Sony Corp | 青色光学素子パッケージ及び光学素子パッケージの製造方法 |
| JP4503452B2 (ja) * | 2005-02-02 | 2010-07-14 | 富士フイルム株式会社 | 固体撮像装置の製造方法 |
| JP4614075B2 (ja) * | 2005-03-22 | 2011-01-19 | 信越化学工業株式会社 | エポキシ・シリコーン混成樹脂組成物及びその製造方法、並びに発光半導体装置 |
| JP2007201260A (ja) | 2006-01-27 | 2007-08-09 | Shinko Electric Ind Co Ltd | 封止構造体及び封止構造体の製造方法及び半導体装置及び半導体装置の製造方法 |
| TW200737506A (en) | 2006-03-07 | 2007-10-01 | Sanyo Electric Co | Semiconductor device and manufacturing method of the same |
| US20100326429A1 (en) * | 2006-05-19 | 2010-12-30 | Cumpston Brian H | Hermetically sealed cylindrical solar cells |
| TWI367557B (en) | 2006-08-11 | 2012-07-01 | Sanyo Electric Co | Semiconductor device and manufaturing method thereof |
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