JP5016604B2 - Information processing apparatus and information processing method - Google Patents

Description

The present invention relates to an information processing apparatus and an information processing how that can execute and update a program to be executed. However, use of this invention is not limited to the above-mentioned information processing apparatus and an information processing how.

  Conventionally, when updating a control program in one microcomputer (microcomputer), data is updated using an external device such as a data setting device. In recent years, there has been a proposal to prohibit interrupt processing from other microcomputers while updating the control program in order to prevent an update error from being interrupted by other microcomputers when updating the control program. (For example, see Patent Document 1 below.)

  Here, an outline of program update in a program execution microcomputer (microcomputer) in which a program to be executed is stored so as to be executable will be described with reference to FIG. FIG. 1 is an explanatory diagram showing an outline of program update in the program execution microcomputer.

  In FIG. 1, a program update system 100 includes a program execution microcomputer 101, an update program transmission side microcomputer 102, and a flash memory 103.

  The program execution microcomputer 101 includes a buffer area 110, a program area 111, an IPL (Initial Program Loader) area 112, and a Vector area 113.

  The buffer area 110 temporarily stores an update program transmitted from an update program transmission side microcomputer 102 described later. The update program is, for example, a program for updating a program that is transmitted from the update program transmission-side microcomputer 102 to the buffer area 110 by communication between microcomputers and is to be executed by the program execution microcomputer 101.

  The update program temporarily stored in the buffer area 110 is copied (copied) to the program area 111 by a CPU (Central Processing Unit) (not shown) referring to an IPL area 112 described later. In other words, the programs a, b, and c stored in the program area 111, which will be described later, are updated by being copied to the program area 111 of the update program.

  The program area 111 stores programs a, b, and c to be executed by the program execution microcomputer 101. Specifically, for example, the program area 111 is composed of an A area 121 that stores the program a, a B area 122 that stores the program b, and a C area 123 that stores the program c.

  Each program a, b, c may be configured to be read and executed by a CPU (not shown), for example. Specifically, for example, the programs a, b, and c are executed by a CPU (not shown) referring to the addresses of the programs a, b, and c stored in a vector area 113 described later. In the description of FIG. 1, the three areas (A area 121, B area 122, and C area 123) have been described, but the number of areas and the number of programs to be executed are not limited to this.

  The IPL area 112 is an area for storing a program that is first executed by a CPU (not shown) at the start of reset. Specifically, for example, does the IPL area 112 copy the update program temporarily stored in the buffer area 110 to the program area 111 or execute each program a, b, c stored in the program area 111? Save the program to determine.

  The Vector area 113 stores the address of a program to be executed by the program execution microcomputer 101 when an event occurs. Specifically, for example, a CPU (not shown) reads the address of a program stored in the IPL area 112 with reference to the Vector area 113 when reset is started. Further, a CPU (not shown), for example, reads the addresses of the programs a, b, and c stored in the program area 111 with reference to the Vector area 113 during normal startup.

  The update program transmission side microcomputer 102 transmits to the program execution microcomputer 101 update programs for the programs a, b, and c to be executed by the program execution microcomputer 101. Specifically, for example, the update program transmission side microcomputer 102 reads the update program stored in the flash memory 103 and transmits the read update program to the program execution microcomputer 101.

  The flash memory 103 is a recording medium that can store various data. In FIG. 1, the flash memory 103 stores update programs for the programs a, b, and c to be executed by the program execution microcomputer 101. Specifically, for example, the flash memory 103 outputs the stored update program to the update program transmission side microcomputer 102.

JP 2004-118369 A

  However, in the above-described prior art, when updating a control program in a microcomputer, an external device dedicated for updating is required, so there is an example of a problem that a user of the microcomputer generates a burden of preparing an external device dedicated for updating. As mentioned.

  In addition, when a control program is updated by a manufacturer of a microcomputer having an external device dedicated for updating, the user of the microcomputer not only takes time to send and receive the microcomputer to the manufacturer, but also wastes time required for updating. An example of this is the problem.

  On the other hand, when a program to be executed is updated by an update program received by communication between microcomputers without using an external device dedicated to update, the update operation is interrupted due to a power failure during rewriting (duplication). As an example, a problem that the microcomputer cannot be activated is given.

  In particular, when rewriting the address of the program to be executed stored in the Vector area, if the update operation is interrupted in the middle of the rewriting, the Vector area cannot be referred to at the time of startup after recovery from interruption, and the microcomputer cannot be started. An example of this is the problem.

  In addition, when only the program to be executed is updated without rewriting the address of the program to be executed stored in the Vector area, the address of the program to be executed stored in the Vector area is fixed. For this reason, the problem is that, for example, the arrangement of the program by the initial setting cannot be changed, the versatility is lacking, and the capacity of the program area cannot be used efficiently.

  In order to solve the above-described problems and achieve the object, an information processing apparatus according to claim 1 is an information processing apparatus including a memory for storing a program and a control unit for executing the program, A Vector area for storing the address of a program to be executed, an IPL area for storing an initial startup program executed at reset start, an execution target program area for storing an execution target program, and executing the execution target program at reset start A virtual vector area for storing a virtual initial startup program for updating, and an effective program area comprising: an update program storage area for temporarily storing an update program for updating a program in the valid program area; The control means is reset If a start is received, the initial activation program of the IPL area is executed with reference to the Vector area, and the update program is stored in the update program storage area without any shortage, so that the update preparation is completed. If the update preparation is completed, the update program is copied to the valid program area. If the update preparation is not completed, the virtual initial activation program in the virtual vector area is And executing an execution target program in the execution target program area.

  According to a second aspect of the present invention, there is provided an information processing method executed by an information processing apparatus including a memory for storing a program, wherein the memory stores a vector area for storing an address of a program to be executed. An IPL area for storing an initial startup program executed at reset start, an execution target program area for storing an execution target program, and a virtual Vector area for storing a virtual initial startup program for executing the execution target program at reset start And an update program storage area for temporarily storing an update program for updating a program in the effective program area, and when the reset start is accepted, the Vector area Refer to the IP When the initial startup program of the area is executed, it is determined whether or not the update program is stored in the update program storage area and the update preparation is completed, and if the update preparation is completed, Control for copying the update program to the valid program area, and executing the virtual initial activation program in the virtual vector area to execute the execution target program in the execution target program area when the update preparation is not completed Including a process.

It is explanatory drawing shown about the outline | summary of the update of the program in a program execution microcomputer. It is a block diagram which shows an example of a functional structure of the information processing apparatus concerning this Embodiment. It is a flowchart which shows the content of the process of the information processing apparatus concerning this Embodiment. It is a block diagram which shows an example of the hardware constitutions of the one-chip microcomputer concerning a present Example. It is explanatory drawing which shows the outline | summary of the update of the execution object program in the one-chip microcomputer concerning a present Example. It is explanatory drawing shown about the program preserve | saved in the effective program area | region concerning a present Example. It is a flowchart which shows the reception processing procedure of the update program in the one-chip microcomputer concerning a present Example. It is a flowchart which shows the starting process sequence of the one-chip microcomputer concerning a present Example. It is a flowchart which shows the interruption process (step S812 of FIG. 8) procedure in the one-chip microcomputer concerning a present Example.

With reference to the accompanying drawings, illustrating a preferred embodiment of an information processing apparatus and information processing how according to the present invention in detail.

(Embodiment)
(Functional configuration of information processing device)
The functional configuration of the information processing apparatus according to this embodiment will be described with reference to FIG. FIG. 2 is a block diagram illustrating an example of a functional configuration of the information processing apparatus according to the present embodiment.

  In FIG. 2, an information processing apparatus 200 that executes an execution target program stored in a program execution area includes an update program input unit 201, a temporary storage unit 202, a determination unit 203, a generation unit 204, and an update information storage. A unit 205, a restart information input unit 206, a determination unit 207, an update unit 208, and an execution unit 209.

  The update program input unit 201 receives an input of an update program for the execution target program. Specifically, for example, the input of the update program may be received from an external device capable of transmitting an update program (not shown).

  The update program is copied (copied) to a program execution area assigned to a memory area (not shown) in the information processing apparatus 200 and becomes an execution target program. Further, the update program may include a virtual initial startup program executed by the initial startup program when executed as the execution target program. Specifically, for example, the virtual initial activation program is stored in a virtual program area included in the program execution area and executed by the initial activation program. Here, the initial activation program is, for example, a program that is activated when the information processing apparatus 100 is restarted.

  Further, if the update program input unit 201 determines that the update program is excessive or insufficient as a result of determination by the determination unit 203 described later, the update program input unit 201 makes an acquisition request to the output source of the update program. It is good also as receiving an input.

  The temporary storage unit 202 temporarily stores the update program input by the update program input unit 201 in the temporary storage area. Specifically, for example, the temporary storage unit 202 temporarily stores the update program in an area where data can be temporarily stored, such as a buffer area allocated to a memory area (not shown) in the information processing apparatus 200. Also good.

  The determination unit 203 determines whether or not the update program temporarily stored by the temporary storage unit 202 is excessive or insufficient. Specifically, for example, the determination unit 203 may determine whether or not all the update programs that are divided and input multiple times are temporarily stored in the temporary storage area.

  As a result of the determination by the determination unit 203, the generation unit 204 generates update information indicating that preparation for updating the execution target program stored in the program execution area has been completed when the update program has no excess or deficiency. For example, the update information may be information indicating that the update preparation is not completed, instead of indicating that the update preparation of the execution target program is completed.

  The update information storage unit 205 stores the update information generated by the generation unit 204 in the update information storage area. Specifically, for example, the update information storage unit 205 stores the update information in an update information storage area allocated to a memory area (not shown) in the information processing apparatus 200. Note that the update information storage unit 205 may store information indicating that the update preparation is not completed, instead of the update information indicating that the generation unit 204 has completed the update preparation.

  The restart information input unit 206 receives input of restart information related to restart of the own device. The restart information may be input, for example, a reset start processing request.

  When the restart information is input by the restart information input unit 206, the determination unit 207 starts the initial startup program stored in the initial startup program storage area and refers to the update information, thereby completing the update preparation. Judge whether or not. Specifically, for example, the determination unit 207 is configured to activate an initial activation program stored in an initial activation program storage area allocated to a memory area (not illustrated) in the information processing apparatus 200.

  If the update unit 208 determines that the update preparation has been completed as a result of the determination by the determination unit 207, the update unit 208 updates the execution target program by copying the update program to the program execution area. Specifically, for example, the update of the execution target program may be configured to overwrite the execution target program with the update program stored by the temporary storage unit 202 when the update preparation is completed.

  Further, for example, when the update unit 208 overwrites the execution program with the update target program, the update unit 208 also uses a virtual initial start program included in the update program to generate a virtual initial start program in the virtual program storage area included in the program execution area. It will be overwritten at the same time.

  The update unit 208 may update the execution target program into an executable format by verifying the update program copied to the program execution area. Specifically, for example, the verification of the update program may be configured to confirm whether or not the update program has been copied as an execution target program without excess or deficiency.

  The execution unit 209 executes the execution target program stored in the program execution area when the update preparation is not completed as a result of the determination by the determination unit 207. Specifically, for example, the execution unit 209 executes the execution target program stored in the program execution area in accordance with the execution of the virtual initial activation program. That is, when the update preparation is not completed, the execution unit 209 can execute the execution target program by the virtual initial startup program executed by the startup of the initial startup program stored in the initial startup program storage area.

  In other words, the initial activation program is activated when reactivation information is input, and determines whether or not update preparation is completed. Then, if the initial startup program is ready for update as a result of the determination, the program to be executed is updated using the update program. On the other hand, if it is determined that the preparation for updating has not been completed, the initial activation program causes the execution target program to be executed by executing the virtual initial activation program stored in the virtual program storage area.

  As described above, when updating the execution target program, the information processing apparatus 200 is configured to update the virtual initial activation program stored in the virtual program storage area together with the execution target program. The information processing apparatus 200 can execute the execution target program by causing the virtual initial startup program to be executed by the initial startup program.

  Therefore, the information processing apparatus 200 stores the virtual initial startup program in the virtual program storage area, thereby reliably updating or executing the execution target program without updating the initial startup program when updating the execution target program. Can be done. In other words, even if a failure occurs in the update process due to a power failure or the like during the update of the execution target program, the execution target program is updated or executed again by executing the initial startup program when the power is restored. be able to.

(Contents of processing of information processing apparatus 200)
Next, the contents of the processing of the information processing apparatus 200 according to the present embodiment will be described with reference to FIG. FIG. 3 is a flowchart showing the contents of processing of the information processing apparatus according to this embodiment. In the flowchart of FIG. 3, first, the update program input unit 201 determines whether or not an input of an update program has been received (step S301).

  When the input of the update program is accepted in step S301 (step S301: Yes), the temporary storage unit 202 temporarily stores the update program input in step S301 in the temporary storage area (step S302).

  In step S301, when the input of the update program is not received (step S301: No), the process proceeds to step S306, and the restart information input unit 206 determines whether the input of restart information is received. (Step S306).

  Next, the determination unit 203 determines whether or not the update program temporarily stored in step S302 is excessive or insufficient (step S303).

  Then, the generation unit 204 generates update information based on the result determined in step S303 (step S304). For example, the update information is information indicating that the update preparation of the execution target program stored in the program execution area is completed when there is no excess or deficiency in the update program as a result of the determination in step S303. Further, the update information may be information indicating that the update preparation is not completed when the update program is determined to be excessive or insufficient as a result of the determination in step S303, for example.

  Subsequently, the update information storage unit 205 stores the update information generated in step S304 in the update information storage area (step S305).

  Next, the restart information input unit 206 determines whether or not input of restart information has been accepted (step S306). The restart information may be, for example, a reset start processing request.

  In step S306, when the input of reactivation information is accepted (step S306: Yes), the determination unit 207 starts the initial startup program stored in the initial startup program storage area and refers to the update information. It is determined whether or not update preparation is complete (step S307).

  In Step S306, when input of re-operation information is not accepted (Step S306: No), it returns to Step S301 and repeats processing.

  In step S307, when the update preparation is completed (step S307: Yes), the update unit 208 updates the execution target program by copying the update program to the program execution area (step S308). Then, the execution target program updated in step S308 is executed by the execution unit 209 (step S309), and the series of processing ends.

  If the update preparation is not completed in step S307 (step S307: No), the process proceeds to step S309, and the execution unit 209 executes the execution target program stored in the program execution area (step S309). ). Then, a series of processing ends.

  In other words, in steps S307 to S309, if the update preparation is completed, the updated execution target program is executed after updating the execution target program. In addition, when the update preparation is not completed, the execution target program stored in the program execution area may be executed without updating the execution target program.

  As described above, according to the present embodiment, since the execution target program is updated by the update program stored in the temporary storage unit, the execution target program is updated without preparing a dedicated external device. be able to.

  Further, according to the present embodiment, since the execution target program is updated after the update program update preparation is completed, even if a power failure or the like occurs during the input of the update program, It is possible to prevent harmful effects.

  Further, according to the present embodiment, since the execution target program is updated by the update program including the virtual initial startup program, the initial startup program need not be updated. Therefore, even if a power failure or the like occurs during the update, the self-device can be activated by the initial activation program after recovery.

  That is, according to the present embodiment, the execution target program can be updated or executed by the initial activation program even after the power failure is recovered. Specifically, for example, according to the present embodiment, when re-operation information is input after recovery from a power failure, the update is in progress due to a power failure, so the update may be continued or re-executed by the initial startup program. it can. In addition, according to the present embodiment, if the update is completed even if there is a power failure, the virtual target startup program can be executed by the initial startup program, and the execution target program can be executed.

  In addition, since the execution target program is executed by the virtual initial activation program, it is possible to design the arrangement of the execution target program with high versatility and to improve the efficiency of use of the program execution area. In other words, since the execution target program is executed by the virtual initial startup program that is updated together with the execution target program instead of the initial startup program, the virtual initial startup program is not limited to the arrangement limited by the initial startup program. An arrangement with a set degree of freedom can be realized.

  In addition, according to the present embodiment, the execution target program is updated to an executable format by verifying the update program, so that the execution target program can be updated accurately.

  Examples of the present invention will be described below. In the present embodiment, an example in which the information processing apparatus of the present invention is implemented by a one-chip microcomputer with a built-in flash ROM (Read Only Memory) will be described.

(Hardware configuration of one-chip microcomputer)
First, the hardware configuration of the one-chip microcomputer according to the present embodiment will be described with reference to FIG. FIG. 4 is a block diagram illustrating an example of a hardware configuration of the one-chip microcomputer according to the present embodiment.

  In FIG. 4, the one-chip microcomputer 400 includes a CPU 401, a flash ROM 402, a RAM (Random Access Memory) 403, and an input / output I / F (interface) 404. Each component 401 to 404 is connected by a bus 410.

  First, the CPU 401 controls the entire one-chip microcomputer 400. Specifically, for example, the CPU 401 may read a program recorded in the flash ROM 402 and execute the program read using the RAM 403 as a work area.

  The flash ROM 402 records various programs such as a boot program and an execution target program to be executed. Although details will be described with reference to FIG. 5, the flash RAM 402 is, for example, a nonvolatile semiconductor memory in which various programs are recorded in a rewritable manner and data is not lost even when the power is turned off.

  The RAM 403 is used as a work area for the CPU 401. Specifically, for example, the RAM 403 may be a semiconductor memory in which data can be written and read as needed, and serves as a work area for executing a program read by the CPU 401.

  The input / output I / F 404 is connected to an external device (not shown) and functions as an interface between the one-chip microcomputer 400 and the CPU 401. The input / output I / F 404 is further connected to a communication network such as the Internet via wired or wireless, and also functions as an interface between the communication network and the CPU 401.

  Although details will be described later with reference to FIG. 5, the input / output I / F 404 receives an update program input from the microcomputer connected to the outside of the one-chip microcomputer 400 to the execution target program recorded in the flash ROM 402 through the communication between the microcomputers. It is good also as accepting.

  Although not described in FIG. 4, the one-chip microcomputer 400 according to this embodiment includes a CPU, a flash ROM 402, a RAM 403, an input / output I / F 404, a timer, an LCD (Liquid Crystal Display) driver, an MMU (MMU). Peripheral functions such as a Memory Management Unit), a DMAC (Direct Memory Access Controller), and an A / D (Analog / Digital) converter may be provided.

  Of the functional configuration of the information processing apparatus 200 according to the embodiment, the update program input unit 201 and the restart information input unit 206 are temporarily stored by the input / output I / F 404, the determination unit 203, and the generation unit. 204, the update information storage unit 205, the determination unit 207, the update unit 208, and the execution unit 209 realize their functions by the CPU 401 executing various programs recorded in the flash ROM 402 and RAM 403, respectively.

(Overview of updating the execution target program in the one-chip microcomputer 400)
Next, an outline of updating the execution target program in the one-chip microcomputer 400 according to the present embodiment will be described with reference to FIG. FIG. 5 is an explanatory diagram showing an outline of updating the execution target program in the one-chip microcomputer according to the present embodiment.

  In FIG. 5, the program update system 500 includes a one-chip microcomputer 400, an update program transmission side microcomputer 502, and a flash memory 503.

  The flash ROM 402 shown in FIG. 4 in the one-chip microcomputer 400 includes an effective program information storage area 510, an empty area 511, an update program storage area 512, an effective program area 513, an IPL area 514, and a Vector area 515. , Is composed of.

  The effective program information storage area 510 is an area for storing update information indicating that the preparation for updating the execution target program recorded in the effective program area 513 described later is completed. Specifically, for example, update information is updated when there is no excess or deficiency in the update program that is divided and input from the update program transmission side microcomputer 502 into the update program storage area 512 described later. It may be information that is completed.

  The update information may be information indicating that the update preparation is not completed, for example, instead of indicating that the preparation for update of the execution target program is completed.

  The empty area 511 is an unused area of the flash ROM 402 in this embodiment, and can be changed by initial setting.

  The update program storage area 512 is an area for temporarily storing an update program transmitted from an update program transmission side microcomputer 502 described later. The update program is, for example, a program for updating an execution target program that is input from the update program transmission side microcomputer 502 via an input / output I / F 404 (not shown) by communication between microcomputers and is an execution target of the one-chip microcomputer 400. is there.

  The update program is copied (copied) to the valid program area 513 when, for example, update information stored in the valid program information storage area 510 is referred to by the CPU 401 (not shown) and update preparation is completed. . In other words, for example, the update program is overwritten and saved on the execution target program by the CPU 401, and the execution target program is updated.

  As described above, when the execution target program is updated with reference to the update information, it is possible to prevent the execution target program from being updated in a state where the update program is incomplete and causing problems. In other words, if the temporary storage of the update program is stopped due to some failure, such as a power failure, the program to be executed in the halfway state is not updated by the update program at the time when it was stopped by the reset start. Returning to the previous procedure, the temporary storage of the update program can be started.

  Further, the update program may include a virtual initial startup program executed by the initial startup program when executed as the execution target program. The initial activation program is, for example, a program that is activated at the time of re-operation (reset start).

  The effective program area 513 is an area for storing an execution target program to be executed by the one-chip microcomputer 400. Although details will be described with reference to FIG. 6, a plurality of execution target programs stored in the valid program area 513 may be read, or may be read and executed by the CPU 401 (not shown).

  When the update program is copied to the valid program area 513, the CPU 401 may update the execution target program into an executable format by verifying the copied update program. Specifically, for example, the verification of the update program may be configured to confirm whether or not the update program has been copied as an execution target program without excess or deficiency.

  The IPL area 514 is an area for storing an initial startup program that is first executed by the CPU 401 (not shown) at the start of reset. Specifically, for example, the IPL area 514 copies the update program temporarily stored in the update program storage area 512 to the valid program area 513 or executes each execution target program stored in the valid program area 513. Save the program that determines what to do.

  The Vector area 515 stores the address of a program to be executed by the one-chip microcomputer 400 when an event occurs. Specifically, for example, the CPU 401 (not shown) reads the address of the program stored in the IPL area 514 with reference to the Vector area 515 at the start of reset. Further, for example, during normal startup, the CPU 401 may read the address of each execution target program stored in the valid program area 513 with reference to the Vector area 515.

  As described above, since the data stored in the IPL area 514 and the Vector area 515 is not rewritten by the update program, even if a failure occurs during the temporary storage of the update program or the update of the execution target program. When the CPU 401 refers to the data stored in the IPL area 514 and the Vector area 515 by the reset start, the operation of the one-chip microcomputer 400 can be resumed normally.

  The update program transmission side microcomputer 502 transmits the update program of the execution target program to be executed by the one-chip microcomputer 400 to the one-chip microcomputer 400. Specifically, for example, the update program transmission side microcomputer 502 reads the update program stored in the flash memory 503 and transmits the read update program to the one-chip microcomputer 400.

  The flash memory 503 is a recording medium that can store various data. In FIG. 5, the flash memory 503 stores a program for updating an execution target program that is an execution target of the one-chip microcomputer 400. Specifically, for example, the flash memory 503 outputs the stored update program to the update program transmission side microcomputer 502.

  Here, a program stored in the effective program area 513 will be described with reference to FIG. FIG. 6 is an explanatory diagram showing programs stored in the effective program area according to the present embodiment.

  In FIG. 6, the effective program area 513 includes a virtual vector area 601 that stores a virtual initial startup program, and an execution target program area 602 that stores execution target programs a, b, and c to be executed. .

  The virtual initial activation program stored in the virtual vector area 601 is read by the CPU 401 (not shown) when the normal activation is performed at the reset start. The virtual initial activation program is, for example, a program that executes the execution target programs a, b, and c that are execution targets at the normal startup, and is executed by the CPU 401 with respect to the execution target programs a, b, The configuration may be such that the address of c is designated.

  Specifically, for example, the CPU 401 refers to the Vector area 515 and reads the address of the program stored in the IPL area 514 at the time of reset start, thereby copying the update program (updating the execution target program), or Execute the execution target program.

  More specifically, for example, the CPU 401 selects replication of the update program or execution of the execution target program based on the update information stored in the valid program information storage area 510, and executes the execution target program. In this case, the address of the virtual vector area 601 is read with reference to the vector area 515.

  Then, the CPU 401 may execute the execution target programs a, b, and c whose addresses are designated by the virtual initial activation program stored in the virtual vector area 601.

  As described above, the IPL area 514 and the Vector area 515 are not updated, but the virtual object area 601 and the execution target program area 602 that store the virtual initial activation program in the effective program area 513 are updated, thereby executing the execution target programs a, Limitations regarding the arrangement of b and c can be minimized.

  In other words, for example, as shown in FIG. 1, if there is no virtual initial activation program and the vector area 113 is not updated, the area for storing the execution target programs a, b, and c is provided with a margin. And shall be. On the other hand, when the Vector area 113 is updated by the update program, if a power failure occurs during the program update, a failure occurs in the Vector area 113 and the program execution microcomputer 101 does not operate.

(Contents of processing by the one-chip microcomputer 400)
Next, contents of processing of the one-chip microcomputer 400 according to the present embodiment will be described with reference to FIGS. FIG. 7 is a flowchart of the update program acceptance processing procedure in the one-chip microcomputer according to the present embodiment. In the flowchart of FIG. 7, first, it is determined by the input / output I / F 404 whether or not a program update preparation completion notification has been received from the update program transmission side microcomputer 502 (step S701). The program update preparation completion notification is transmitted from the update program transmission side microcomputer 502 to the one-chip microcomputer 400 when the update program transmission side microcomputer 502 acquires the update program from the flash memory 503 or other external device, for example. It is good.

  In step S701, after waiting for acceptance of the program update preparation completion notification (step S701: Yes), the one-chip microcomputer 400 shifts to the program update mode (step S702), and the CPU 401 uses the update program. The storage area 512 is initialized (step S703). The update program storage area 512 may be initialized by, for example, making the capacity of the update program storage area 512 empty, that is, deleting halfway data in the update program storage area 512. It is good.

  Next, when the update program storage area 512 is initialized in step S703 by the input / output I / F 404, an acceptability notification is output to the update program transmitting side microcomputer 502 (step S704).

  Then, the input / output I / F 404 receives the update program data output from the update program transmission side microcomputer 502 in response to the acceptance notification output in step S704 (step S705).

  Next, the input / output I / F 404 outputs a packet reception completion notification to the update program transmission side microcomputer 502 for the update program data received in step S705 (step S706).

  Subsequently, it is determined whether or not all the update programs have been received by the input / output I / F 404 (step S707). The determination as to whether or not all the update programs have been received may be, for example, a configuration in which it is determined that all the update programs have been received when the flag attached to the data of the last update program received in the packet in step S705 is received. .

  If all the update programs have been received in step S707 (step S707: Yes), the CPU 401 confirms the checksum of the update program temporarily stored in the update program storage area 512 (step S708). The checksum may be determined, for example, as to whether or not all the update programs that are divided into a plurality of times and received as packets are temporarily stored in the update program storage area 512.

  In step S707, when all the update programs are not received (step S707: No), the process returns to step S705 and the process is repeated.

  Next, when the checksum is confirmed in step S708, the CPU 401 writes that the update program is ready in the valid program information storage area 510 (step S709). The update program preparation completion state is written, for example, by storing update information indicating that the preparation for updating the execution target program is completed in the valid program information storage area 510.

  Although not described in the flowchart of FIG. 7, if the checksum cannot be confirmed in step S708, an update program may be requested again from the update program transmission side microcomputer 502 as an error.

  The input / output I / F 404 outputs a shutdown request to the update program transmission side microcomputer 502 (step S710). Thereafter, the input / output I / F 404 receives a shutdown completion notification in response to the shutdown request in step S710 from the update program transmission side microcomputer 502 (step S711), and ends a series of update program acceptance processing.

  Next, the activation process procedure of the one-chip microcomputer 400 according to the present embodiment will be described with reference to FIG. FIG. 8 is a flowchart showing the starting process procedure of the one-chip microcomputer according to the present embodiment. In the flowchart of FIG. 8, first, a reset start is accepted by the input / output I / F 404 (step S801).

  In step S801, upon receiving a reset start, the CPU 401 activates the IPL stored in the IPL area 514 (step S802), and refers to the valid program information storage area 510 (step S803).

  Then, the CPU 401 determines from the update information in the valid program information storage area 510 referred to in step S803 whether or not the update program preparation has been completed (step S804). In the update program preparation, for example, it may be determined whether or not the update program preparation completion state is written in the valid program information storage area 510 (for example, step S709 shown in FIG. 7). .

  If the update program preparation has been completed in step S804 (step S804: Yes), the CPU 401 starts the copy program (step S805). The copy program may be, for example, a program that overwrites and saves an update program temporarily stored in the update program storage area 512 with various programs such as an execution target program stored in the valid program area 513.

  Then, after waiting for the copy by the copy program activated in step S805 to end (step S806: No), if it ends (step S806: Yes), the CPU 401 stores the program copied to the valid program area 513. Verification is performed (step S807). The program may be verified, for example, by checking whether the update program has been copied as an execution target program without excess or deficiency.

  When the program is verified in step S807, the CPU 401 writes that the program is in the normal activation state in the valid program information storage area 510 (step S808), and returns to step S801 to repeat the process.

  Although not described in the flowchart of FIG. 8, if the result of program verification in step S807 indicates that the execution target program has not been copied without excess or deficiency, copying from the update program storage area 512 is again performed as an error. It is good to do.

  If the update program preparation is not completed in step S804 (step S804: No), whether or not writing to the valid program information storage area 510 referred to in step S803 by the CPU 401 is in a normal activation state. Is determined (step S809).

  In step S809, when it is in the normal activation state (step S809: Yes), the CPU 401 activates the program in the valid program area 513 (step S810).

  Specifically, for example, when the program in the effective program area 513 is activated, the CPU 401 reads the address of the virtual Vector area 601 with reference to the Vector area 515. Then, the CPU 401 may execute the execution target programs a, b, and c whose addresses are specified by the virtual initial activation program stored in the virtual vector area 601.

  In step S809, when it is not in the normal activation state (step S809: No), the process returns to step S801 and the process is repeated.

  Next, it is determined by the input / output I / F 404 whether interrupt processing has been accepted (step S811). If interrupt processing is accepted in step S811 (step S811: Yes), the CPU 401 performs interrupt processing (step S812), and determines whether the program has ended (step S813). Details of the interrupt process will be described later with reference to FIG.

  If interrupt processing is not accepted in step S811 (step S811: No), the process proceeds to step S813, and it is determined whether the program is completed (step S813).

  If the program ends in step S813 (step S813: YES), the process returns to step S801 and the process is repeated. If the program does not end in step S813 (step S813: No), the process returns to step S810 to repeat the process.

  Next, an interrupt process (step S812 in FIG. 8) in the one-chip microcomputer 400 according to the present embodiment will be described with reference to FIG. FIG. 9 is a flowchart showing the procedure of interrupt processing (step S812 in FIG. 8) in the one-chip microcomputer according to this embodiment. In the flowchart of FIG. 9, first, the CPU 401 refers to the virtual vector area 601 (step S901).

  Next, the CPU 401 activates the virtual initial activation program stored in the virtual vector area 601 referred to in step S901, and refers to the execution target program area 602 (step S902).

  Then, the CPU 401 starts a program to be executed from among the programs stored in the execution target program area 602 referred to in step S902 (step S903), and ends a series of interrupt processing.

  As described above, according to the one-chip microcomputer according to the present embodiment, the execution target program is updated by the update program stored in the update program storage area. The execution target program can be updated appropriately.

  In addition, since the program to be executed is updated after the update program ready state is written in the valid program information storage area, a power failure occurs before the update program ready state is entered. However, the one-chip microcomputer can start up normally after recovery.

  Furthermore, since the effective program area including the virtual vector area is updated without rewriting the vector area, even if a power failure occurs during the update, the one-chip microcomputer will start up normally after recovery. And effective use of the effective program area can be achieved.

DESCRIPTION OF SYMBOLS 200 Information processing apparatus 201 Update program input part 202 Temporary storage part 203 Judgment part 204 Generation part 205 Update information storage part 206 Reactivation information input part 207 Judgment part 208 Update part 209 Execution part

Claims (2)

An information processing apparatus comprising a memory for storing a program and a control means for executing the program,
The memory is
A Vector area that stores the address of the program to be executed,
IPL area for storing the initial startup program executed at reset start,
An execution target program area for storing an execution target program, and a virtual Vect for storing a virtual initial startup program for executing the execution target program at reset start
or area, an effective program area, and an update program storage area for temporarily storing an update program for updating a program in the effective program area,
Have
The control means includes
When a reset start is accepted, the initial activation program of the IPL area is executed with reference to the Vector area, and the update program is stored in the update program storage area without any shortage, and the update preparation is completed. Determine whether or not
When the update preparation is completed, the update program is copied to the valid program area, and when the update preparation is not completed, the virtual initial activation program in the virtual vector area is executed and the execution is executed. An information processing apparatus that executes an execution target program in a target program area. An information processing method executed by an information processing apparatus including a memory for storing a program,
The memory is
A Vector area that stores the address of the program to be executed,
IPL area for storing the initial startup program executed at reset start,
An effective program area configured to store an execution target program area for storing the execution target program, and a virtual vector area for storing a virtual initial startup program for causing the execution target program to be executed at reset start, and Update program storage area for temporarily storing an update program for updating the program,
Have
When a reset start is accepted, the initial activation program of the IPL area is executed with reference to the Vector area, and the update program is stored in the update program storage area without any shortage, and the update preparation is completed. Determine whether or not
When the update preparation is completed, the update program is copied to the valid program area, and when the update preparation is not completed, the virtual initial activation program in the virtual vector area is executed and the execution is executed. An information processing method comprising a control step of executing an execution target program in a target program area.

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