JP5019362B2 - Voltage amplifier for wireless transceivers in sensor networks - Google Patents

Description

  The present invention relates to a wireless sensor network including sensor nodes driven by battery capacity, and more particularly to a voltage amplifier used in a receiving circuit of a wireless transceiver in each sensor node.

  A wireless sensor network (WSN) attracting attention in recent years is a network of sensor nodes having a sensing function by wireless communication. Wireless sensor networks can acquire environmental information at each sensor node and collect data at base stations in multiple hops, so remote sensing of rivers and forests, crime prevention sensing, farm monitoring systems, factory production management systems, etc. Various applications are considered. However, since each sensor node normally operates on a battery, the sensor node can be installed in a system that has a huge number of sensor nodes (tens of thousands to millions), a large site, or a place where access is difficult. In a system that installs and uses a battery, battery replacement is a major issue. For this reason, reducing the number of battery replacements for each sensor node (minimizing battery replacement) and extending the usable time of the entire system (expanding the lifetime) will lead to the practical application of sensor networks. It has become a technical issue.

The power consumption in each sensor node is dominant in the portion related to wireless data communication. A part related to wireless data communication in each sensor node is an RF (Radio Frequency) transceiver.
For example, in the case of a sensor network that employs a 433 MHz band non-coherent OOK (on-off keying) transceiver as the RF transceiver, the communication distance between the nodes is about 5 m, and the target power consumption of each node is 1 mW. . In the receiving circuit of this RF transceiver, a voltage amplifier connected in series accounts for about 94% of the power consumption of the entire receiving circuit.

  A conventional voltage amplifier is shown in FIG. A conventional voltage amplifier is an inverter type voltage amplifier, and has a configuration in which an input / output of an inverter as a main amplifier is short-circuited by a resistor. A plurality of inverter type voltage amplifiers are connected in series in the receiving circuit of the RF transceiver. As shown in FIG. 7, since this inverter type voltage amplifier has a feedback loop composed of resistors, the main amplifier does not need to perform bias adjustment. The bias voltage of the main amplifier can be automatically set to half of the supply voltage. Although this inverter type voltage amplifier has a large voltage gain, since a through current flows, there is a problem that power consumption is large even if there is no input signal.

For this reason, a latch-type voltage amplifier shown in FIG. 8 has been proposed instead of the above-described inverter-type voltage amplifier (Non-Patent Document 1). This latch-type voltage amplifier has been proposed to suppress a through current that is a problem of the inverter-type voltage amplifier. This latch-type voltage amplifier has bistability _{in the} absence of the input signal Vin. This is shown from the DC characteristics of the latch-type voltage amplifier shown in FIG.
When there is an input signal V _in, the main amplifier amplifies it to drive the sub-amplifier concurrently. The sub-amplifier helps the main amplifier to be amplified by the feedback.

When there is a change over 2V _a input signal V _in, that the sub-amplifier is fed back a signal to the main amplifier, it is possible to the operating point of the main amplifier and V _t. Since the potential difference 2V _a applied is very small, sub-amplifier (including a through current) power to operate in the subthreshold region can be made very small. Further, since the bias voltage of the main amplifier becomes V _h or V ₁ during non-operation, the through current can be reduced as can be seen from FIG. 9B.

R. Drost, R. Hopkins, and I. E, “Proximity Communication,” Proc. IEEE CICC, pp. 469-472, Sep. 2003.

Voltage amplifier of the latch type, the input signal V _in is intended to function only effective in the case of a square wave, the input signal is a problem occurs when the alternating current (AC). That is, when an AC input signal is input to this latch-type voltage amplifier, a delay occurs until feedback to the main amplifier, and a phase difference occurs between the input signal and the output signal of the sub-amplifier as shown in FIG. . Therefore the input signal of the main amplifier becomes a composite signal of an input signal V _in and the feedback signal, DC level of the main amplifier is varied as shown in FIG. 11, the amplification factor along with it there is a problem decreases.
As a method of avoiding this phase difference, a method of improving the delay by increasing the sizes of the main amplifier and the sub-amplifier can be considered, but this method is not suitable for low power consumption.

  An object of the present invention is to provide a voltage amplifier for a radio transceiver that suppresses a through current and is excellent in power consumption effect and signal amplification effect.

In order to solve the above problems, a voltage amplifier for a radio transceiver in a sensor network according to the present invention includes a main amplifier and a sub-amplifier that feeds back an output of the main amplifier, and the dynamic range of the sub-amplifier has a first voltage (V _h ). And the second voltage (V _l ), and is bistable when there is no input signal (V _in ), and the input signal has an intermediate voltage difference (2V _a ) or more between the first voltage and the second voltage. In the voltage amplifier in which the sub-amplifier feeds back a signal to the main amplifier and the operating point of the main amplifier is the threshold voltage (V _t ) of the main amplifier, a capacitor and a resistor are provided on the input side of the sub-amplifier, The input voltage of the sub-amplifier is clamped (fixed) to a predetermined voltage (V _m ). Here, the predetermined voltage (V _m ) is preferably an intermediate voltage between the first voltage (V _h ) and the second voltage (V _l ).

The voltage amplifier for a radio transceiver of the present invention reduces the through current of the main amplifier by shifting the operating point of the main amplifier by the action of the sub amplifier when there is no input signal (V _in ) when the voltage amplifier is operating. Further, when the voltage amplifier is in operation, when there is no input signal (V _in ), the bias point of the sub amplifier is shifted, so that the through current of the sub amplifier is reduced.
When the voltage amplifier is in operation and there is an input signal (V _in ), feedback is generated by inputting a signal having an input amplitude greater than the intermediate voltage difference (V _a ) to the sub-amplifier, increasing the amplification factor. To do.

  The radio transceiver voltage amplifier according to the present invention is characterized in that, in the radio transceiver voltage amplifier circuit, a Zigzag circuit is applied to reduce power consumption during non-operation (standby). Here, the Zigzag circuit is “K. Min, H. Kawaguchi, and T. Sakurai,” Zigzag Super Cut-off CMOS (ZSCCMOS) Block Activation with Self-Adaptive Voltage Level Controller, ”Dig. IEEE ISSCC, pp. 400-401, Feb. 2003. "This Zigzag circuit is used to reduce leakage current and speed up startup by fixing the potential of each node. be able to.

Further, the voltage amplifier for a radio transceiver according to the present invention is a voltage generator that generates the first voltage (V _h ), the second voltage (V _l ), and the predetermined voltage (V _m ) required for the sub-amplifier. Is provided. Then, by changing the impedance between the first voltage (V _h ) and the second voltage (V _l ) required for the sub-amplifier, the intermediate voltage difference (2V _a ) is changed, thereby The minimum input signal amplitude is controlled for the voltage amplifier.

  According to the voltage amplifier for a radio transceiver of the present invention, a signal input in a non-operating state (standby) or in an operating state with respect to a cascaded voltage amplifier (cascade gain amplifier) that accounts for about 94% of the power consumption of a non-coherent receiver When there is no signal, there is an effect that the through current in each state when there is a signal input during operation can be reduced and the power consumption can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the scope of the present invention is not limited to the following examples and illustrated examples, and various changes and modifications can be made.

FIG. 1 shows a circuit diagram of a voltage amplifier for a radio transceiver according to the first embodiment. It is composed of a main amplifier and a sub-amplifier that feeds back its output. The dynamic range of the sub-amplifier is limited to the first voltage (V _h ) and the second voltage (V _l ). The sub-amplifier feeds back a signal to the main amplifier when there is a change greater than the intermediate voltage difference (2V _a ) between the two voltages, and the operating point of the main amplifier is set to the threshold voltage (V _t ) of the main amplifier. This is the same as the latch type voltage amplifier.

A difference from the circuit diagram of the latch-type voltage amplifier shown in FIG. 8 is a portion within a broken line ellipse indicated by an arrow in FIG. 1, and a capacitor C _fb and a resistor R _fb are added. The input voltage is clamped to a predetermined voltage (V _m ). This different point stabilizes the bias point of the voltage amplifier and also accepts a sinusoidal input signal.
The main amplifier amplifies the input signal (V _in ), operates the output buffer, and generates the output signal (V _out ).

The circuit of the voltage amplifier of the first embodiment shown in FIG. 1 cannot avoid the problem of the phase difference as in the circuit diagram of the latch type voltage amplifier shown in FIG. However, by clamping the input voltage of the sub-amplifier to a predetermined voltage (V _m ) and fixing the input DC level (input voltage) of the sub-amplifier, when there is no signal input during non-operation (standby) or operation, By reducing the through current in each state when there is a signal input during operation, the power consumption can be reduced.

Next, the DC characteristics of the voltage amplifier according to the first embodiment will be described. 2A and 2B are graphs showing DC characteristics of the voltage amplifier according to the first embodiment. FIG. 2A shows a bias voltage, and FIG. 2B shows a bias current. FIG. 2 (a) illustrates the operating point at a supply voltage of 1V. The curve on the graph of FIG. 2A indicates that the operation curves of the main amplifier and the sub amplifier intersect at two places. Whenever the output voltage (V _i ) of the main amplifier exceeds the intermediate voltage difference (2V _a ) between the first voltage (V _h ) and the second voltage (V _l ), the sub amplifier's dynamic range The points are swapped. Since the intermediate voltage difference (V _a ) is a small value, the bias point is almost the same as that of a conventional latch-type voltage amplifier.

FIG. 2B shows the bias current flowing through the main amplifier and the sub-amplifier composed of transistors having a predetermined design value . In the case of the bias current characteristics as shown in FIG. 2B, the bias current of the main amplifier is 240 μamperes (down 12% from the maximum value) thanks to the shifted bias voltage. This then reduces the through current flowing through the output buffer. Here, the bias voltage of the sub-amplifier is fixed at V _m (= 0.5 V), but the supply current of the sub-amplifier is 50 mV (= V _h −V _l ), so the bias current becomes very small.

Second Embodiment Next, in the voltage amplifier circuit of the first embodiment, the setting parameters such as V _m , V _h , V _l , and V _a are changed, and power consumption during non-operation and transient characteristics during operation are shown.
The voltage amplifier circuit according to the second embodiment has the same configuration as the circuit shown in FIG. 1 and is set to V _m = 0.5 V, V _h = 0.6 V, and V _l = 0.4 V (V _a = 0.1 V). is doing. About the _{V t} of the main amplifier 0.51 V, by a 0.49V the _{V t} of the sub-amplifier, the output of the biased sub amplifier to _{V m} during non-operation is fixed to _{V l.} This suppresses the through current during non-operation.

  Table 1 shows the power consumption of each part when the voltage amplifier of Example 2 is not operating. The power consumption of the circuit when not operating is approximately 289 μW.

Next, the transient analysis result at the time of operation | movement of the voltage amplifier of Example 2 is shown. This voltage amplifier, since if there is no input signal is transitioning to a stable point, if the input signal of the sub-amplifier is not exceeded at least V _a (unless beyond the intersection of the main amplifier and the sub amplifier), the two draft fixed point An unstable operation of repeating the amplification operation while making a transition is performed. Thus, the input amplitude of the voltage amplifier input amplitude of at least the sub-amplifier is required size of greater than 2V _a. In the voltage amplifier of the second embodiment, the input amplitude is set to 0.1V. V _a determines the minimum value of the input signal amplitude.

Input signals of the sub-amplifier of Example 2 exceeds 2V _a, shows a waveform of each part when (if the input signal is 0.1 V) which is operating normally in Figure 3-1. On the contrary, the input signal of the sub-amplifier of the second embodiment does not exceed 2V _a, shows what is done unstable operation (if the input signal is 0.09 V) in Figure 3-2.

Since the input of the sub-amplifier is fixed to 0.5 V by V _m , V _t > 0.5 V of the main amplifier and V _t <0.5 V of the sub-amplifier, the input bias of the main amplifier is approximately 0.5 V. It becomes fixed to. As described above, the amplification operation can be performed when the gain of the main amplifier is high. The same operation can be expected by applying V _m to the input of the main amplifier instead of the sub-amplifier. However, the power consumption during non-operation cannot be reduced, so that the configuration of this circuit can achieve the lowest power consumption. Conceivable.

  Table 2 below summarizes the power consumption and voltage gain when the input signal voltage is changed. In the simulation, it is assumed that high impedance probes are used at the input terminal and output terminal in order to see the voltage gain. As shown in Table 2, the power consumption is 418 μW when the input signal amplitude is 0.1 V, and the voltage gain is 11.0 dB.

The voltage amplifier according to the third embodiment is provided with an input voltage amplitude adjustment circuit capable of adjusting the input voltage amplitude with respect to the input signal (V _in ) of the voltage amplifier according to the first embodiment. FIG. 4 shows a circuit diagram of the voltage amplifier according to the third embodiment. By providing the input voltage amplitude adjustment circuit, it is possible to realize a carrier sense function necessary for confirming the carrier status in wireless communication.

  In the voltage amplifier of the above-described embodiment, power consumption has already been reduced both when there is no signal input during operation and when there is no signal input. Focusing on the fact that the voltage amplifier of the present invention is a multistage connection of inverters, a Zigzag circuit is applied in order to reduce power consumption during non-operation (standby). For the Zigzag circuit, see “K. Min, H. Kawaguchi, and T. Sakurai,” Zigzag Super Cut-off CMOS (ZSCCMOS) Block Activation with Self-Adaptive Voltage Level Controller, ”Dig. IEEE ISSCC, pp. 400-401. , Feb. 2003. ”is described in detail. By using this Zigzag circuit, the potential of each node is fixed, so that leakage current can be reduced and startup speed can be increased. FIG. 5 shows a circuit diagram of the voltage amplifier of Example 4 in which this Zigzag circuit is introduced.

The circuit diagram of the voltage amplifier according to the present invention requires V _h , V _l , and V _m . Therefore, a voltage generator for generating these three potentials is required. A circuit diagram of a voltage generator for generating three potentials is shown in FIG.
V _h , V _l and V _m necessary for the sub-amplifier can be generated by a single circuit of this voltage generator. In addition, since V _h −V _l = 2V _a is very small, the power supply capability can be kept low, and the power consumption is low. In addition, a P-MOS switch and an N-MOS switch are provided for non-operation (standby). Further, by changing the impedance between V _h, V _l by Selv signal, it is possible to vary the 2V _a, and thus can control the minimum input signal amplitude.

Next, the comparison result with the conventional voltage amplifier circuit by simulation is described. It should be noted, 2V _a is set to 0.05V.
FIG. 12 shows the voltage gain characteristic when the input signal amplitude is changed. As can be seen from FIG. 12, it can be seen that when the input signal amplitude reaches 0.04 V, the gain increases abruptly, and the minimum input signal amplitude exists.

FIG. 13 shows frequency characteristics. The gain decreases as the frequency increases, and the voltage amplifier of the present invention has a lower gain than the conventional amplifier due to the presence of the minimum signal input. However, this can be dealt with by optimizing at high frequencies.
FIG. 14 shows power consumption characteristics when there is a signal input during operation when the input signal amplitude is changed. The power consumption of the voltage amplifier of the present invention includes the power consumption of the voltage generator. From this result, it can be estimated that the voltage amplifier of the present invention always consumes less power than the conventional one, and that a 31% power reduction effect can be obtained when the input signal amplitude is 0.04V.
Table 3 below summarizes the power consumption during standby and the total power consumption when the duty cycle is 10 ⁻³ . From this result, it is estimated that the power consumption can be reduced by 54% when the duty cycle is 10 ⁻³ .

  FIG. 15 shows the transition (start-up time) of each circuit when the standby signal is set to high. From this result, it is understood that the start-up time can be reduced by 35% by introducing the Zigzag circuit.

  Next, software carrier sense will be described. In general, data collision and interference should be avoided so as not to waste wasted power in wireless sensor networks. It is desirable that one node transmits data while other nodes around it do not communicate. As one method for solving the problem, a carrier sense approach is widely used in many MACs (Media Access Control). It has been. All nodes perform carrier sense before transmitting data. If it is determined that the carrier is in space, the node defers packet transmission. A typical carrier sense method is to measure a received signal strength indicator (RSSI). If the detected channel power is greater than the threshold, the channel is considered busy. If not, the surroundings are considered inactive. Since RSSI carrier sense requires the addition of a circuit with relatively high power consumption, such as an A / D converter, it is not appropriate when power consumption is highly limited as in a wireless sensor network.

FIG. 16 shows a conceptual diagram of the software carrier sense of the present invention. In this conceptual diagram, Node-A transmits a packet to Node-B, and Node-C is one of the nodes outside the carrier sense range of Node-A. A binary signal to be subjected to OOK modulation as an RF signal to be transmitted is Manchester encoded. In Manchester encoding, the signal “0” is set to “01” and the signal “1” is set to “10” as an example. Both encoded signals contain "1", which is represented by the presence of a certain amplitude in the OOK signal. Therefore, if the receiver detects “1”, it can be determined that the carrier is being used. On the other hand, if it cannot be detected at all, it is determined that the carrier is open. There is BER (bit error rate in the communication, the packet signal when an error is also mixed with 1 bit would be lost. If, however, .BER no problem in carrier sense even if the BER is very large is ^{10 -1} However, this is because the amplitude in the Manchester code can be detected with a probability of 90%, which is used by software carrier sense.

  A signal strength threshold (Pamp) is set so that a certain BER is achieved. If the received data (Pdata) of Node-B is larger than Pamp, Node-B can correctly receive a packet from Node-A. Similarly, a threshold value (Pc) of the carrier signal strength is set. The carrier sense range is determined by Pc, and Pc is set smaller than Pamp. The voltage amplifier of the present invention has a minimum input amplitude, and smaller signals are negligible. In the voltage amplifier of the present invention, Pamp and Pc can be adjusted. Therefore, the threshold value may be set to Pc when the node performs carrier sense, and may be set to Pamp when the packet is received. In order to reduce collisions at the receiving node, the carrier sense range (rc) should be larger than the transmission range (rt). By setting Pc to be smaller than Pamp, the transmitting node can discover that transmissions from other nodes exist around the receiving node. This makes it possible to prevent collisions. Further, the input signal amplitude that can be ignored can be increased by setting Pamp larger. Therefore, it is possible to amplify only a signal having a high intensity and suppress an interference wave having a low intensity. In FIG. 16, even when Node-A cannot detect the transmission of Node-C, Node-B can ignore the interference wave from Node-C.

  According to the present invention, it is possible to improve the available time (low power consumption) of the entire wireless sensor network system, a system in which the number of sensor nodes is enormous, a large site, and a place that is difficult to enter It can be used for a system that installs and uses sensor nodes.

1 is a circuit diagram of a voltage amplifier for a radio transceiver according to a first embodiment. 5 is a graph illustrating DC characteristics of the voltage amplifier according to the first embodiment, where (a) represents a bias voltage and (b) represents a bias current. It shows the waveform of each part when the input signal of the voltage amplifier of Example 2 exceeds V _a, are operating normally. The input signal of the voltage amplifier of Example 2 does not exceed V _a and shows an unstable operation. The circuit diagram of the voltage amplifier of Example 3 is shown. The circuit diagram of the voltage amplifier of Example 4 is shown. The circuit diagram of the voltage generator which generate | occur | produces three electric potentials is shown. The circuit diagram of the conventional inverter type voltage amplifier is shown. A circuit diagram of a latch-type voltage amplifier is shown. The DC characteristic of a latch-type voltage amplifier is shown. A phase difference is shown between the input signal and the output signal of the sub-amplifier in the latch-type voltage amplifier. A state in which the DC level of the main amplifier in the latch-type voltage amplifier fluctuates and the gain decreases accordingly is shown. The comparison of the voltage gain characteristic at the time of an input signal amplitude change is shown. Comparison of frequency characteristics is shown. The comparison of the power consumption characteristic at the time of an input signal amplitude change is shown. A comparison of the startup time of each circuit when the standby signal is set to high is shown. A conceptual diagram of software carrier sense is shown.

Explanation of symbols

1 Main amplifier circuit 2 Sub amplifier circuit

Claims (8)

It consists sub-amplifier to feed back the output of the main amplifier and said main amplifier, the dynamic range of the sub-amplifiers are limited to a first voltage (V _h) and the second voltage (V _l), the input signal 1 The sub-amplifier feeds back the signal to the main amplifier when there is a change greater than the intermediate voltage difference (2V _a ) between the voltage (V _h ) and the second voltage (V _l ), and the operating point of the main amplifier is In a voltage amplifier having a threshold voltage (V _t ),
A voltage amplifier for a radio transceiver, wherein a capacitor and a resistor are provided on an input side of a sub-amplifier, and an input voltage of the sub-amplifier is clamped (fixed) to a predetermined voltage (V _m ). Wherein the predetermined voltage is (V _m), said first voltage (V _h) and the second voltage (V _l) radio transceiver voltage amplifier according to claim 1, characterized in that an intermediate voltage. When the voltage amplifier is in operation, when there is no input signal (V _in ), the operating point of the main amplifier is shifted by the action of the sub-amplifier, whereby the through current of the main amplifier is reduced. The voltage amplifier for a radio transceiver according to claim 1 or 2. The through current of the sub-amplifier can be reduced by shifting the bias point of the sub-amplifier when the voltage amplifier is in operation and there is no input signal (V _in ). A voltage amplifier for a radio transceiver according to claim 1. When the voltage amplifier is in operation and there is an input signal (V _in ), feedback is generated when a signal having an input amplitude greater than or equal to the intermediate voltage difference (V _a ) is input to the sub amplifier, thereby increasing the amplification factor. The voltage amplifier for a radio transceiver according to any one of claims 1 to 4.   6. A radio transceiver voltage amplifier, wherein a Zigzag circuit is applied to the radio transceiver voltage amplifier circuit according to claim 1 to reduce power consumption during non-operation (standby). The voltage generator for generating each of the first voltage (V _h ), the second voltage (V _l ), and a predetermined voltage (V _m ) necessary for the sub-amplifier is provided. A voltage amplifier for a radio transceiver according to any one of 1 to 6. By making the impedance between the first voltage (V _h ) and the second voltage (V _l ) required for the sub-amplifier variable, an intermediate voltage difference (2V _a ) is changed, thereby the voltage 8. The voltage amplifier for a radio transceiver according to claim 1, wherein a minimum input signal amplitude is controlled for the amplifier.