JP5024581B2 - Oxide semiconductor electrode, method for producing the same, and dye-sensitized solar cell provided with the same - Google Patents

Description

  The present invention relates to an oxide semiconductor electrode suitable for a dye-sensitized solar cell and a method for producing the same.

  Since a dye-sensitized solar cell having performance comparable to that of an amorphous silicon solar cell by Gretzell et al. Has been reported, research on a dye-sensitized solar cell with higher photoelectric conversion efficiency has been actively conducted.

  For example, in Patent Document 1, in the production of a porous titanium oxide thin film on a substrate by a spray pyrolysis method (SPD method), a titanium compound is added to a titanium oxide sol solution, which is a raw material solution, so Further, there is disclosed a technique for growing a neck and ensuring improvement in productivity by forming a film in a short time and improving conversion efficiency of a solar cell. In this document, the oxidation is performed by interposing a dense titanium oxide buffer layer made of an organic titanium compound as a raw material between the transparent electrode (fluorine-doped tin oxide thin film) on the substrate and the porous titanium oxide thin film. It is said that the difficulty of film formation due to the poor compatibility of the tin thin film and the titanium oxide sol solution is avoided, thereby eliminating the problem of short circuit due to contact between the electrolytic solution and the transparent electrode and the accompanying decrease in open circuit voltage. This is because the titanium oxide buffer layer is familiar with both the transparent electrode and the porous titanium oxide thin film and can easily form a bond.

  Further, in Patent Document 2, a conductive promote film such as an organometallic complex or an organic conductive material is formed between a conductive surface on a substrate and an oxide semiconductor film such as titanium oxide. It is assumed that the bonding property with the oxide semiconductor film can be improved, so that the oxide semiconductor film can be manufactured without using high temperature, and the energy conversion efficiency can be significantly improved.

  However, none of the documents focus on preventing the occurrence of cracks in the nanometer order between the conductive substrate and the porous oxide semiconductor thin film such as titanium oxide that are generated during high-temperature firing.

JP 2003-176130 A JP 2003-297443 A SAITO Y., KAMBE S., KITAMURA T., WADA Y., YANAGIDA S., Morphology control of mesoporous TiO2 nanocrystalline films for performance of dye sensitized solar cells, Solar Energy materials and Solar Cells, 2004, Vol.83, No. 1, Page 1-13 Yuki Saito, Shozo Yanagida Nanotechnology to improve the performance of titanium oxide solar cells (2003), Powder and Industry, Vol. 35, No. 4

  In the usual manufacturing method, the present inventors have a nanometer order between an oxide semiconductor film such as titanium oxide used as an n-type semiconductor in a dye-sensitized solar cell and a conductive substrate such as a glass electrode. It was discovered for the first time that the crack was generated, and one of the causes of the low performance of the dye-sensitized solar cell was thought to be the generation of this crack. That is, after applying the conventional method (oxide semiconductor nanoparticles dispersed in an aqueous solution containing an organic binder on a transparent conductive glass substrate by a squeegee method or the like so as to have a film thickness of 5 microns or more, firing at a temperature of about 450 ° C. Is observed with a focused ion beam (FIB) processing and observation device, and there are several gaps between the transparent electrode (fluorine-doped tin oxide thin film) and the porous titanium oxide thin film on the substrate. A 10 nm crack was observed. Moreover, as a result of observing the occurrence of cracks at various firing temperatures, it was found that cracks occurred during firing after the oxide semiconductor material was applied. The space of this crack is impossible for electrons to jump over at the electron density generated in the dye-sensitized solar cell, and only through a few columnar connecting parts that are connected in a form that bridges this crack, It was speculated that electrons were transmitted. If the generation of such cracks can be suppressed, electron transfer between the transparent electrode on the substrate and the porous titanium oxide thin film can be improved, and the photoelectric conversion efficiency can be dramatically improved.

  Accordingly, the present invention provides an oxide semiconductor electrode capable of dramatically improving the photoelectric conversion efficiency of a dye-sensitized solar cell by suppressing the occurrence of cracks on the order of nanometers, and a method for manufacturing the same. Is an issue.

  In order to suppress the occurrence of such cracks, we considered the provision of an underlayer between a transparent electrode (such as a fluorine-doped tin oxide thin film) on the substrate and a porous titanium oxide thin film. Even if it was possible to suppress the occurrence of cracks with the transparent electrode, it was difficult to simultaneously suppress the occurrence of cracks with the porous titanium oxide thin film. However, surprisingly, it has been found that the use of a specific intermediate layer between the underlayer and the porous titanium oxide thin film can suppress the occurrence of cracks between the layers.

That is, the first aspect of the present invention includes a substrate having a conductive surface, an underlayer formed on the conductive surface, an intermediate layer formed on the underlayer, and an intermediate layer on the intermediate layer. An oxide semiconductor electrode having an oxide semiconductor layer formed of crystalline oxide semiconductor particles (B1), the following requirements (1), (2), (3) and (4):
(1) The underlayer is made of crystalline oxide semiconductor particles (A1) having an average particle diameter of 25 nm or less, and the thickness of the layer is 50 to 1000 nm.
(2) the intermediate layer is made of a mixture of crystalline oxide semiconductor particles (A2) and crystalline oxide semiconductor particles (B2);
(3) The crystalline oxide semiconductor particles (A2) have the following conditions a and b:
a having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1), and b within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1) Having a lattice constant in the range of
Satisfying the conditions of
And
(4) The crystalline oxide semiconductor particles (B2) have the following conditions c and d, that is,
c having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1); and d within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1). Having a lattice constant in the range of
Satisfying the conditions of
It is characterized by satisfying the above requirements.

  Moreover, the 2nd aspect of this invention is a dye-sensitized solar cell characterized by having the oxide semiconductor electrode of the said 1st aspect.

Furthermore, the third aspect of the present invention provides a substrate having a conductive surface, an underlayer formed on the conductive substrate, an intermediate layer formed on the underlayer, and an intermediate layer on the intermediate layer. A method for manufacturing an oxide semiconductor electrode having an oxide semiconductor layer formed and formed of crystalline oxide semiconductor particles (B1),
(1) A crystalline oxide semiconductor particle (A1) having an average particle diameter of 25 nm or less or a precursor paste thereof is applied onto a substrate having a conductive surface, and then fired at a temperature of 80 to 550 ° C. Forming a base layer having a thickness of ˜1000 nm;
(2) After applying a mixture paste of the crystalline oxide semiconductor particles (A2) and the crystalline oxide semiconductor particles (B2) on the underlayer, the intermediate layer is baked at a temperature of 80 to 550 ° C. A process of forming,
The crystalline oxide semiconductor particles (A2) have the following conditions a and b:
a having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1), and b within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1) Having a lattice constant in the range of
And the crystalline oxide semiconductor particles (B2) satisfy the following conditions c and d:
c having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1); and d within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1). Having a lattice constant in the range of
A process that satisfies the conditions of
(3) A step of forming an oxide semiconductor layer by applying a paste of the crystalline oxide semiconductor particles (B1) on the intermediate layer and then baking the paste at a temperature of 400 to 550 ° C.
Are performed in order.

  According to the present invention, it is possible to prevent the occurrence of nanometer-order cracks generated between an oxide semiconductor film such as titanium oxide and a conductive substrate such as a glass electrode during high-temperature firing, and thus the photoelectric conversion efficiency of a dye-sensitized solar cell Can be dramatically improved.

(1) About the first aspect of the present invention In this aspect, an average particle diameter of 25 nm or less between the substrate having a conductive surface and the oxide semiconductor layer made of the crystalline oxide semiconductor particles (B1). From the viewpoint of the average particle diameter and lattice constant of the underlayer having a thickness of 50 to 1000 nm and the crystalline oxide semiconductor particles (A1). Interposing an oxide semiconductor particle (A2) and an intermediate layer composed of a mixture of the crystalline oxide semiconductor particles (B1) and the crystalline oxide semiconductor particles (B2) substantially the same in terms of average particle diameter and lattice constant. Thus, it is possible to provide an oxide semiconductor electrode capable of dramatically improving photoelectric conversion efficiency when applied to a dye-sensitized solar cell by suppressing generation of cracks between the respective layers.

(I) Here, a substrate having a conductive surface is a conductive metal oxide thin film such as indium oxide or tin oxide on a heat resistant substrate such as glass, a metal thin film such as gold, silver, or platinum, or conductive. This refers to those in which a conductive thin film such as a polymer is formed. When this is applied to a dye-sensitized solar cell and light is taken from the anode side, a transparent electrode such as a fluorine-doped tin oxide thin film can be preferably used from the viewpoint of heat resistance, chemical resistance, and translucency.

(Ii) As the above-mentioned A1, B1, A2 and B2 (hereinafter collectively referred to as “crystalline oxide semiconductor particles”) which are crystalline oxide semiconductor particles, each independently, titanium oxide, niobium oxide, zinc oxide, Examples thereof include one compound selected from the group consisting of tin oxide, indium oxide, zirconium oxide, tantalum oxide, vanadium oxide, yttrium oxide, aluminum oxide, and magnesium oxide, and among them, photoelectric conversion efficiency among them In view of the above, one or more selected from the group consisting of titanium oxide, niobium oxide, zinc oxide and tin oxide are preferable, and titanium oxide is particularly preferable. Further, from the viewpoint of suppressing the occurrence of cracks, A1 and A2 are preferably the same chemical composition, and similarly, B1 and B2 are preferably the same chemical composition. For example, both A1 and A2 and B2 and B1 are preferably titanium oxide.

  The crystalline oxide semiconductor particle is preferably a single crystal from the viewpoint of suppressing the occurrence of cracks. However, the crystalline oxide semiconductor particle is a polycrystal or amorphous material in which a small amount of other crystal systems are mixed within a range not impairing the effects of the present invention. May be mixed in a small amount. For example, P25 of Degussa, which is preferably used as B1 of the oxide semiconductor layer and B2 of the intermediate layer, is basically anatase crystal, but also contains a small amount of rutile. In addition, many titanium oxides are not completely anatase crystals but also include amorphous portions, which can also be used. When the crystalline oxide semiconductor particles are titanium oxide, three types of crystal systems of rutile, anatase, and brookite are known. Of these, anatase or brookite, particularly anatase is preferred.

(Iii) The underlayer is made of crystalline oxide semiconductor particles (A1) and is formed on the conductive surface. By using crystallinity, thinness, and the form of fine particles, generation of cracks between the conductive surface and the base layer can be suppressed. The average particle diameter of A1 is 25 nm or less from the viewpoint of preventing cracks from occurring, and from the viewpoint of increasing the voltage by preventing the intrusion of the electrolyte by obtaining a dense layer without gaps, and more preferably 10 to 20 nm. 12-18 nm is preferable. In addition, the thickness of the underlayer is 50 to 1000 nm, and preferably 100 to 300 nm, from the viewpoint of preventing cracking itself during high-temperature firing and suppressing crack generation. Here, the average particle diameter means the number average particle diameter throughout the present specification, and can be measured by FE-SEM or the like.

  As A1, for example, HPW-18NR (anatase type crystalline titanium oxide) manufactured by Catalytic Chemical, NTB-13 (Brookite type crystalline titanium oxide) manufactured by Showa Denko KK and the like can be suitably used. .

(Iv) The oxide semiconductor layer is made of crystalline oxide semiconductor particles (B1), and is formed on an intermediate layer described later. The B1 adsorbs more organic dye on the surface and is preferably porous from the viewpoint of the mobility of the electrolytic solution. The porosity of the oxide semiconductor layer serving as an index of the porosity [gas adsorption measurement] (Measured by nitrogen isothermal adsorption method) is preferably 40% or more. Here, the porosity of the oxide semiconductor layer is defined by the following equation.
Porosity = ρV / (ρV + 1) × 100 (%)
ρ: Theoretical density of titanium oxide (single crystal density g / cm ³ )
V: pore volume per unit weight (cm ³ / g) by gas adsorption analysis

The average particle size of B1 is preferably 10 to 30 nm, and particularly preferably 15 to 25 nm, from the viewpoint of the amount of dye adsorbed. The thickness of the oxide semiconductor layer is preferably 5 to 30 μm, and particularly preferably 8 to 16 μm, from the viewpoint of electron diffusion length. Furthermore, the roughness factor (ratio of the effective surface area to the projected area) that comprehensively evaluates the porosity, average particle diameter, and thickness of the oxide semiconductor layer is defined, and can be calculated by the following formula,
Roughness factor = (total surface area of oxide semiconductor layer ^{* 1} ) / (projected area of oxide semiconductor layer ^{* 2} )
* 1 Obtained by the BET equation in nitrogen isothermal adsorption measurement.
* 2 Effective area.
This is preferably 1000 or more.

  As preferable B1, for example, P25 (including anatase type crystalline titanium oxide and a small amount of rutile type) manufactured by Degussa can be suitably used.

(V) The intermediate layer is made of a mixture of the crystalline oxide semiconductor particles (A2) and the crystalline oxide semiconductor particles (B2), and is formed on the underlayer. The weight ratio of [A2]: [B2] is preferably 1: 4 to 4: from the viewpoint of suppressing the occurrence of cracks between the intermediate layer and the base layer and between the intermediate layer and the oxide semiconductor layer. 1, more preferably 1: 2 to 2: 1. In addition, the thickness of the intermediate layer is preferably 50 to 2000 nm, more preferably 50 to 1000 nm, and particularly preferably 100 to 300 nm from the viewpoint of suppressing the occurrence of cracks.

  Such an intermediate layer can be formed not only as a single layer but also as a plurality of layers. In such a case, for the intermediate layer closer to the base layer, the weight ratio of A2 in the intermediate layer is made larger, and conversely, for the intermediate layer closer to the oxide semiconductor layer, the weight ratio of B2 in the intermediate layer Is preferably larger.

(Vi) The crystalline oxide semiconductor particles (A2) have the following conditions a and b, that is,
a. Having an average particle size in the range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1); and b. Having a lattice constant within a range of ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1),
Satisfy the requirements of When A2 satisfies the above conditions a and b, it contributes to suppression of the occurrence of cracks between the underlayer and the intermediate layer.

  The average particle diameter of A2 is substantially the same as the average particle diameter of A1 from the viewpoint of further suppressing the occurrence of cracks, that is, within ± 10%, preferably ± 8% of the average particle diameter of A1. And particularly preferably have the same average particle size. It is more preferable that the particle size distribution represented by the standard deviation and the like is equivalent.

  The lattice constant of A2 is substantially the same as the lattice constant of A1, that is, a range within ± 10% of the lattice constant of A1, more preferably within ± 8%, particularly preferably the same.

  Here, the lattice constant is defined by taking the a, b, and c axes along the sides of the crystal unit lattice, and the lengths of the ridges of the unit lattice in the respective axial directions as a, b, and c, respectively. When the angles formed by the ab axis are α, β, and γ, respectively, the six values a, b, c and α, β, and γ are defined. In each of these six values, the A2 and the A1 are Are substantially the same, that is, at least within the range of ± 10%, more preferably within the range of ± 8%, and particularly preferably the same.

  Three types of crystal systems of anatase, brookite, and rutile are known for titanium oxide, but anatase (low temperature type) and rutile (high temperature type) are tetragonal [a = b ≠ c, α = β = γ = 90 °; a = b = 5.36 Å (anaters), 4.59 Å (rutile); c = 9.53 Å (anaters), 2.96 Å (rutile)], brookite is orthorhombic (a ≠ b ≠ c Α = β = 90 ° γ = 120 ° C .; a = 9.15 Å, b = 5.44 Å, c = 5.14 Å), and both A2 and A1 are, for example, anatase type crystallinity In the case of titanium oxide, the above-mentioned requirement b is satisfied unless there is a great difference between the trace components contained. In addition, when a plurality of crystal systems coexist, the main components of the plurality of crystal systems are compared to confirm whether the condition b regarding the lattice constant is satisfied.

  Further, the same material is preferable for the A1 and the A2, and it is preferable to use the same material of the same manufacturing method. That is, it is preferable to adopt the same A2 as A1.

(Vii) The crystalline oxide semiconductor particles (B2) have the following conditions c and d, that is,
c having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1); and d within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1). Having a lattice constant in the range of
Satisfy the requirements of

  When B2 satisfies the above conditions c and d, it can contribute to suppression of generation of cracks between the oxide semiconductor layer and the intermediate layer.

  The average particle diameter of B2 is substantially the same as the average particle diameter of B1 from the viewpoint of further suppressing the occurrence of cracks, that is, within ± 10%, preferably ± 8% of the average particle diameter of B1. And particularly preferably have the same average particle size. It is more preferable that the particle size distribution represented by the standard deviation and the like is equivalent.

  The lattice constant of B2 is substantially the same as the lattice constant of B1, that is, within a range of ± 10%, more preferably within ± 8% of the lattice constant of B1, and particularly preferably the same lattice. Have a constant. When a plurality of crystal systems coexist, the main components of the plurality of crystal systems are compared with each other to confirm whether or not the above condition d regarding the lattice constant is satisfied.

  Here, the lattice constant is the same as described in (vi) above. When both B1 and B2 are crystalline titanium oxide, it is preferable that both are anatases from the viewpoint of photoelectric conversion efficiency.

  B1 and B2 are preferably the same material, more preferably the same material of the same manufacturing method. That is, it is preferable to adopt the same B2 as the B1.

(2) Second Aspect of the Present Invention In this aspect, a dye-sensitized solar cell including the oxide semiconductor electrode described in the first aspect of the present invention (1) is provided. In accordance with a conventional method, a sensitizing dye such as a Ru sensitizing dye is adsorbed and supported on the oxide semiconductor layer of the oxide semiconductor electrode of the first aspect, and is superposed on the counter electrode, and then various ion additives, redox It can be completed by filling an electrode with an electrolyte solution containing an organic solvent containing iodine as an agent, an ionic liquid or the like, or a P-type hole transport layer such as a conductive polymer. In addition, as a counter electrode, what laminated | stacked thin and porous conductive polymers, such as elements, such as platinum and carbon, or PEDOT, as a catalyst on a conductive substrate can be used suitably.

(3) Third Aspect of the Present Invention In this aspect, a method for manufacturing an oxide semiconductor electrode described in (1) the first aspect of the present invention is provided. By the method of this aspect, the crack which generate | occur | produces in the baking after oxide semiconductor paste application | coating can be suppressed effectively, and the significant improvement of a photoelectric conversion efficiency can be anticipated.

  This embodiment consists of performing the following three steps in order.

Process (1)
After applying a paste of crystalline oxide semiconductor particles (A1) having an average particle diameter of 25 nm or less or a precursor thereof on a substrate having a conductive surface, the paste is fired at a temperature of 80 to 550 ° C. to have a thickness of 50 Forming a base layer having a thickness of ˜1000 nm;

Process (2)
A mixed paste of crystalline oxide semiconductor particles (A2) satisfying the following conditions a and b and crystalline oxide semiconductor particles (B2) satisfying the following conditions c and d is applied on the underlayer: Then, the process of baking at the temperature of 80-550 degreeC, and forming an intermediate | middle layer.
a having an average particle size in the range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1);
b It has a lattice constant within a range of ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1).
c It has an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1).
d It has a lattice constant within a range of ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1).

Process (3)
A step of forming an oxide semiconductor layer by applying a paste of the crystalline oxide semiconductor particles (B1) on the intermediate layer and firing at a temperature of 400 to 550 ° C.

(I) Application method and paste A1 used in the above steps or a precursor thereof (first step), a mixture of A2 and B2 (second step), or B1 (third step) (hereinafter referred to as “crystalline oxidation”) Examples of the application method of “semiconductor particles” are a spin coating method, a spray method, a dipping method, a screen printing method, a doctor blade method, and the like. From the viewpoint of mass production, the screen printing method is preferred as the method, spray method, and dipping method.

  The paste such as the crystalline oxide semiconductor particles is obtained by obtaining the crystalline oxide semiconductor or the like in the form of sol or slurry, and the solvent used is water, an organic solvent, or those Can be mentioned. Examples of the organic solvent include one or more solvents selected from alcohols such as methanol, ethanol and propanol, ketones such as methyl ethyl ketone, acetone and acetylacetone, and basic solvents such as dimethylformamide and pyridine. Among these, water, ethanol and the like are particularly preferable from the viewpoint of adhesion. In addition, the content of the oxide semiconductor particles and the like in these solvents is preferably 10 to 30% by weight in the case of a spin coating method, for example, from the viewpoint of the thickness after coating. In addition, a dispersion aid such as nitric acid and acetylacetone, and a viscosity modifier such as polyethylene glycol can be added to the paste. The pH is preferably in the range of 1 to 4 from the viewpoint of dispersion.

(Ii) First Step (Formation of Underlayer) In the first step, a paste of crystalline oxide semiconductor particles (A1) having an average particle size of 25 nm or less or a precursor thereof is formed on a substrate having a conductive surface. After coating, the base layer having a thickness of 50 to 1000 nm is formed by baking at a temperature of 80 to 550 ° C.

  As the firing temperature, a temperature of 80 to 550 ° C. is used, but from the viewpoint of necking between particles, in the case of a heat resistant substrate such as FTO glass, it is more preferably 450 to 500 ° C. However, this condition varies depending on the heat resistance of the substrate.

  As said A1, the commercially available oxide semiconductor particle with an average particle diameter of 25 nm or less, More preferably, an average particle diameter of 10-25 nm can be used. For example, the NTB series manufactured by Showa Denko (particle diameter of 20 nm or less, dispersion medium is water / alcohol) or the HPW series of catalyst chemical industry (particle diameter of 20 nm or less, dispersion medium is water) is already in the form of slurry. Therefore, it can be used as it is for spin coating. Since these commercially available slurry products such as NTB series made by Showa Denko are commercially available in various concentrations, spin coating is performed so that the film thickness finally becomes 50 to 1000 nm, preferably 100 to 300 nm. The number of times may be adjusted. Moreover, ST-01 (average particle diameter 7 nm) manufactured by Ishihara Sangyo Co., Ltd., AM-100 (average particle diameter 6 nm) manufactured by Teika, Super Titania F-6 manufactured by Showa Titanium (commercially available in powder form) Many are known, such as P90 (average particle size of about 15 nm) manufactured by Nippon Aerosil Co., Ltd., and these commercially available powder products are water-alcohol type so as to be 15 to 30% by weight. What is necessary is just to apply | coat so that it may disperse | distribute with a solvent and a film thickness may be set to 50-1000 nm by the spin coat method.

Further, in the first step, a precursor thereof can be used in place of A1. Examples of the precursor include metal alkoxides and metal halides that are converted into a corresponding crystalline oxide semiconductor during firing. From the viewpoint of improving adhesion, Ti (O ⁱ Pr) ₄ and TiCl ₄ are particularly preferable. Is preferred. These precursors become anatase-type crystals upon firing at a temperature of 450 ° C. or higher. Usually, the average particle diameter of the crystalline oxide semiconductor particles produced | generated according to this process will be 25 nm or less. For example, when 0.2M Ti (O ⁱ Pr) ₄ solution is spin-coated several times and fired at 450 ° C., crystalline titanium oxide particles having an average particle size of 20 nm or less (anatase type) have a thickness of 50 to 1000 nm. Can be applied.

(Iii) Second Step (Formation of Intermediate Layer) In the second step, crystalline oxide semiconductor particles (A2) satisfying the following conditions a and b on the underlayer, and the following c and d After applying the mixture paste with the crystalline oxide semiconductor particles (B2) satisfying the above conditions, the intermediate layer is formed by baking at a temperature of 80 to 550 ° C.
a having an average particle size in the range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1);
b It has a lattice constant within a range of ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1).
c It has an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1).
d It has a lattice constant within a range of ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1).

  A2 is substantially the same as A1 in terms of average particle size and lattice constant, and B2 is substantially the same as B1 in terms of average particle size and lattice constant. Here, “substantially the same in terms of average particle diameter and lattice constant” means that satisfy the above conditions a and b or c and d. More preferably, in the above a and b or c and d, the condition that “within ± 10%” is replaced with “within ± 8%” is satisfied, and particularly preferably, both the average particle diameter and the lattice constant are the same. That is.

  As specific examples of A2 or B2 whose lattice constant falls within “within ± 10%” of A1 or B1, it is most preferable to use those having the same chemical composition and manufacturing method.

  The mixture of A2 and B2 used in the second step has a weight ratio of [A2]: [B2], and there are cracks between the intermediate layer and the underlayer, and between the intermediate layer and the oxide semiconductor layer. From the viewpoint of suppressing the occurrence, it is preferably 1: 4 to 4: 1, more preferably 1: 2 to 2: 1.

  The thickness of the intermediate layer is preferably from 50 to 2000 nm, more preferably from 50 to 1000 nm, particularly preferably from 100 to 300 nm, from the viewpoint of inhibiting the generation of cracks.

  Moreover, as a calcination temperature in a 2nd process, although the temperature of 80-550 degreeC is used, from the viewpoint of the necking between particle | grains, in the case of heat resistant substrates, such as FTO glass, More preferably, it is 450-500 degreeC. However, this condition varies depending on the heat resistance of the substrate.

(Iv) Third Step (Formation of Oxide Semiconductor Layer) In the third step, the crystalline oxide semiconductor having an average particle diameter of preferably 10 to 30 nm, more preferably 15 to 25 nm is formed on the intermediate layer. After applying the paste of particles (B1), firing is performed at a temperature of 400 to 550 ° C. to form an oxide semiconductor layer.

  Any known method can be used for forming the oxide semiconductor layer.

The oxide semiconductor layer preferably has a porosity of 40% or more. However, as a method of forming an oxide semiconductor layer with a porosity of 40% or more, a plurality of spherical particles are aggregated as B1. Even if a commercial product having a structure such as a secondary particle (three-dimensional daisy chain structure) or a tube-like structure is used, or the B1 is not such, a considerable amount (in the particle diameter) Although it depends, for example, an oxide semiconductor layer having a predetermined porosity can be manufactured by forming an intermediate layer using a paste containing a binder of 40% by weight or more based on the weight of the oxide semiconductor particles.

  For example, ST21 manufactured by Ishihara Sangyo (average particle size 20 nm), AM600 manufactured by Teika (average particle size 30 nm), Super Titanium F-5 manufactured by Showa Titanium (average particle size about 20 nm), P25 manufactured by Nippon Aerosil (average particle size) After obtaining commercially available titanium oxide nanoparticles such as about 25 nm, adding a dispersion aid such as acetylacetone to the titanium oxide and mixing with a stirrer such as a paint shaker while adding a predetermined amount of water, a considerable amount of A binder [polyethylene glycol or glycol additives such as polyethylene glycol monoether such as Triton X100 (octylphenoxyethoxylate, average polymerization degree 9.5)] is added to form a slurry. By applying and baking the slurry using the squeegee method, an oxide semiconductor layer (thickness of about 10 μm) made of the oxide semiconductor material (B1) having a porosity of about 60% can be obtained (Non-Patent Document 1). And Non-Patent Document 2).

Alternatively, titanium oxide obtained by a method in which a Ti (O ⁱ Pr) ₄ solution hydrolyzed under weak acidic conditions is stirred and aged at about 80 ° C. and then autoclaved at about 240 ° C. for half a day (from Solaronix) (Also commercially available) may be overcoated by squeegee method 2-3 times and then fired.

  In the third step, a firing temperature of 400 to 550 ° C., more preferably 450 to 500 ° C. is used from the viewpoint of firing the binder and promoting interparticle bonding.

  In the third step, the thickness of the oxide semiconductor layer to be formed is preferably 5 to 30 μm, more preferably 8 to 16 μm. However, since the thickness is generally larger than the other two layers, The spin coating method, the spray method, and the dipping method as in the second step can be repeatedly applied so as to have a predetermined thickness, or the viscosity can be increased and the coating can be performed at once by a squeegee method or a screen printing method.

  Hereinafter, the present invention will be described in more detail with reference to specific examples of the present invention.

(1) Preparation of titania particle dispersion A titania particle dispersion having a mean particle size of 18 nm and anatase type crystallinity (manufactured by Catalytic Chemicals, HPW-18NR) was prepared, and this was directly used as a particle dispersion A.

  On the other hand, after adding acetylacetone as a dispersion aid to P25 (manufactured by Degussa, average particle size 25 nm), which is titania particles, and dispersing in water, Triton-X100 is added as a surfactant and dispersed in water. Another dispersion was prepared so that the titania concentration was 40% by weight. The particle dispersion thus obtained was designated as Particle Dispersion B.

(2) Formation of base layer on substrate having conductive surface The particle dispersion A was used as a paste for the base layer, and this was applied to the conductive substrate by spin coating (1000 rpm, 15 seconds) [fluorine dope made by Nippon Sheet Glass. [SnO ₂ (FTO) glass] is applied to a thickness of about 300 nm. Then, this was baked at 450 degreeC for 30 minutes with the electric furnace, and the process conductive substrate 1 was obtained.

(3) Formation of intermediate layer First, a mixture of the particle dispersion A and the particle dispersion B is prepared. In order to mix the same amount of titania particles by weight, the particle dispersion A and the particle dispersion B were mixed at a volume ratio of 2: 1. In order to further promote the mixing, the mixture was stirred and mixed for 10 minutes with an ultrasonic cleaner. A few drops thereof were dropped on the treated conductive substrate 1 and applied to a thickness of about 600 nm by spin coating (1000 rpm, 15 seconds). Then, the process electroconductive board | substrate 2 which deposited the intermediate | middle layer on the base layer was obtained by baking for 30 minutes at 450 degreeC with an electric furnace.

(4) Formation of Oxide Semiconductor Electrode E1 Using the particle dispersion B, the particle dispersion B is formed on the intermediate layer formed on the treated conductive substrate 2 by a squeegee method so as to have a film thickness of 10 μm. Then, it was baked in an electric furnace at 450 ° C. for 30 minutes. Thus, an oxide semiconductor electrode E1 of the present invention (a porosity of the oxide semiconductor layer of 49%) was obtained.

(Comparative Example 1)
In the example, by omitting the intermediate layer forming step, an oxide semiconductor electrode E2 having an underlying layer but no intermediate layer was manufactured.

(Comparative Example 2)
In the example, an oxide semiconductor electrode E3 having neither an intermediate layer nor a base layer was manufactured by omitting the base layer formation step and the intermediate layer formation step.

(Comparative Examples 3-5)
In Comparative Example 1, the firing temperature of each layer was set at 350 ° C. to produce the oxide semiconductor electrode E4 (Comparative Example 3). Similarly, the firing temperature of each layer was set at 150 ° C. to produce the oxide semiconductor electrode E5 (Comparative Example 4). In the same manner, the oxide semiconductor electrodes E6 (Comparative Example 5) were respectively produced by replacing all firing temperatures with room temperature.

(Test Example 1)
When the cross section of each oxide semiconductor electrode E1-E6 obtained by the above was observed with the focused ion beam (FIB) processing observation apparatus, the FE-SEM image of FIGS. 2-8 was able to be obtained. Here, FIGS. 2 and 3 are the electrode E1 of the example, FIG. 4 is the electrode E2 of the comparative example 1 (an electrode having an underlayer but no intermediate layer), and FIG. FIG. 6 shows the electrode E4 of Comparative Example 3 (corresponding to the electrode E2 whose firing temperature is lowered to 350 ° C.), and FIG. 7 shows the electrode E5 of Comparative Example 4 (the firing temperature is 150 ° C.). FIG. 8 is an FE-SEM image of a cross section of the electrode E6 of Comparative Example 5 (corresponding to the electrode E2 in which the firing temperature is replaced with room temperature).

  2 to 5, it can be seen that cracks between the layers are not observed in the product electrode E1 of the present invention, whereas cracks are observed in the comparative product electrodes E2 and E3.

  Further, by observing FIG. 8 to FIG. 6 and FIG. 4 in order, it was shown that the occurrence of cracks that were to be suppressed in the present application occurred during the high-temperature firing process.

(Test Example 2)
On the oxide semiconductor layer of the oxide semiconductor electrode produced as described above, an organic dye film was formed as follows.

  That is, cis-bis (isothiocyanato) bis (2,2′-bipyridyl-4,4′-dicarboxylate) -ruthenium (II) (manufactured by Solaronix), which is a Ru dye, is mixed into a mixed solution of acetonitrile and t-butanol. It was dissolved to a concentration of 0.3 mM and prepared as a dye solution. Each of the oxide semiconductor electrodes E1 to E3 prepared according to the above preparation examples was previously heated at 120 ° C. for 20 minutes, then allowed to cool in a desiccator for a while, then immersed in the dye solution, and left in the dark overnight. The dye was adsorbed by allowing it to stand.

  Next, a dye-sensitized solar cell was produced as follows.

That is, the oxide semiconductor electrodes E1 to E3 on which the dye is adsorbed and the counter electrode carrying platinum are overlapped and fixed with a clip, and an electrolyte [LiI 0.1M, DMPImI (= 1,2-dimethyl) is interposed between the electrodes. -3-imidazolinium iodide) 0.3 M, tBP (= 4-tert-butylpyridine) 0.5 M, I ₂ 0.05 M, solvent MAN (= methoxyacetonitrile)] was inserted, and the open cell was Produced.

  For each dye-sensitized solar cell thus obtained, the photoelectric conversion efficiency was measured under the following conditions.

That is, with a solar simulator (manufactured by Yamashita Denso Co., Ltd.), AM (air mass, atmospheric mass) 1.5, 100 mW / cm ² of simulated sunlight was irradiated, and the short-circuit current density, open voltage, and fill factor (FF) were measured. The photoelectric conversion efficiency was calculated based on the following calculation formula.
(Formula 1)
Photoelectric conversion efficiency = (short-circuit current density x open-circuit voltage x fill factor) / (irradiated solar energy)
As a result, photoelectric conversion efficiency results as shown in Table 1 below were obtained.

  E1 of an Example shows that the photoelectric conversion efficiency is remarkably improved compared with E2 and E3 which are comparative examples.

  In Comparative Example 1 in which the intermediate layer is not provided but the base layer is provided, the open-circuit voltage is improved as compared with Comparative Example 2 in which both layers are not provided, whereas the improvement in the short-circuit current density is slight. In the example in which both layers are provided, both the short circuit current density and the open circuit voltage are improved as compared with Comparative Example 2 in which both layers are not provided. This is considered to be caused by suppression of peeling of titanium oxide.

  An organic dye film is formed on the oxide semiconductor layer of the oxide semiconductor electrode of the present invention and is used as an electrode for a dye-sensitized solar cell, thereby obtaining a dye-sensitized solar cell with greatly improved photoelectric conversion efficiency. Can do.

It is the outline of sectional drawing of the oxide semiconductor electrode of this invention. The FE-SEM image of the cross section of the oxide semiconductor electrode E1 of this invention (Example). Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times The FE-SEM image of the cross section of the oxide semiconductor electrode E1 of this invention (Example). 20,000 times magnification on the left, 50,000 times magnification on the right, The FE-SEM image of the cross section of the oxide semiconductor electrode E2 of the comparative example 1. FIG. Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times The FE-SEM image of the cross section of the oxide semiconductor electrode E3 of the comparative example 2. Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times The FE-SEM image of the cross section of the oxide semiconductor electrode E4 of the comparative example 3 obtained by replacing the calcination temperature in the comparative example 1 with 350 degreeC. Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times The FE-SEM image of the cross section of the oxide semiconductor electrode E5 of the comparative example 4 obtained by replacing the calcination temperature in the comparative example 1 with 150 degreeC. Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times The FE-SEM image of the cross section of the oxide semiconductor electrode E6 of the comparative example 5 obtained by replacing the calcination temperature with room temperature in the comparative example 1. FIG. Upper left figure magnification 5,000 times, upper right figure magnification 50,000 times, lower left figure magnification 100,000 times, lower right figure magnification 100,000 times

Explanation of symbols

2 Substrate 4 Transparent electrode 6 Underlayer 8 Intermediate layer 10 Oxide semiconductor layer

Claims (9)

A substrate having a conductive surface, an underlayer formed on the conductive surface, an intermediate layer formed on the underlayer, and crystalline oxide semiconductor particles (B1 formed on the intermediate layer) ) Oxide semiconductor electrode comprising an oxide semiconductor layer comprising the following requirements (1), (2), (3) and (4):
(1) The underlayer is made of crystalline oxide semiconductor particles (A1) having an average particle diameter of 25 nm or less, and the thickness of the layer is 50 to 1000 nm.
(2) the intermediate layer is made of a mixture of crystalline oxide semiconductor particles (A2) and crystalline oxide semiconductor particles (B2);
(3) The crystalline oxide semiconductor particles (A2) have the following conditions a and b:
a having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1), and b within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1) Having a lattice constant in the range of
Satisfying the conditions of
And
(4) The crystalline oxide semiconductor particles (B2) have the following conditions c and d, that is,
c having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1); and d within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1). Having a lattice constant in the range of
Satisfying the conditions of
And the oxide semiconductor particles (A1) and (B1) are not the same, and the oxide semiconductor particles (A2) and (B2) are not the same,
An oxide semiconductor electrode, characterized in that those satisfying the requirements of the.   The crystalline oxide semiconductor particles (A2) are the same as the crystalline oxide semiconductor particles (A1), and the crystalline oxide semiconductor particles (B2) 2. The oxide semiconductor electrode according to claim 1, wherein the same one as in B1) is employed.   The oxide semiconductor electrode according to claim 1 or 2, wherein the crystalline oxide semiconductor particles (B1) have an average particle diameter of 10 to 30 nm.   The thickness of the said intermediate | middle layer is 50-2000 nm, and the thickness of the said oxide semiconductor layer is 5-30 micrometers, The oxide semiconductor electrode in any one of Claims 1-3 characterized by the above-mentioned.   A dye-sensitized solar cell comprising the oxide semiconductor electrode according to claim 1. A substrate having a conductive surface, an underlayer formed on the conductive substrate, an intermediate layer formed on the underlayer, and a crystalline oxide semiconductor particle (B1) formed on the intermediate layer A method for producing an oxide semiconductor electrode having an oxide semiconductor layer comprising:
(1) A crystalline oxide semiconductor particle (A1) having an average particle diameter of 25 nm or less or a precursor paste thereof is applied onto a substrate having a conductive surface, and then fired at a temperature of 80 to 550 ° C. Forming a base layer having a thickness of ˜1000 nm;
(2) After applying a mixture paste of the crystalline oxide semiconductor particles (A2) and the crystalline oxide semiconductor particles (B2) on the underlayer, the intermediate layer is baked at a temperature of 80 to 550 ° C. A process of forming,
The crystalline oxide semiconductor particles (A2) have the following conditions a and b:
a having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (A1), and b within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (A1) Having a lattice constant in the range of
And the crystalline oxide semiconductor particles (B2) satisfy the following conditions c and d:
c having an average particle size within a range of ± 10% of the average particle size of the crystalline oxide semiconductor particles (B1); and d within ± 10% of the lattice constant of the crystalline oxide semiconductor particles (B1). Having a lattice constant in the range of
A process that satisfies the conditions of
(3) A step of forming the oxide semiconductor layer by applying the crystalline oxide semiconductor particles (B1) on the intermediate layer and then firing at a temperature of 400 to 550 ° C.
And a method for manufacturing an oxide semiconductor electrode.   The method for manufacturing an oxide semiconductor electrode according to claim 6, wherein the crystalline oxide semiconductor particles (B1) have an average particle diameter of 10 to 30 nm.   The crystalline oxide semiconductor particles (A2) are the same as the crystalline oxide semiconductor particles (A1), and the crystalline oxide semiconductor particles (B2) are the crystalline oxide semiconductor particles. The method for producing an oxide semiconductor electrode according to claim 6 or 7, wherein the same particles (B1) are employed.   9. The method for manufacturing an oxide semiconductor electrode according to claim 6, wherein the intermediate layer has a thickness of 50 to 2000 nm, and the oxide semiconductor layer has a thickness of 5 to 30 μm.

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