JP5041473B2 - Fluorescence test chart - Google Patents

Description

  The present invention relates to a fluorescence test chart.

In general, in a precision optical instrument such as a microscope, an observation image is quantitatively evaluated by using a test chart having a fine pattern as an observation sample. The result of this quantitative evaluation is applied to adjustment / maintenance of optical equipment, image analysis processing of observation images, and the like.
A test chart for a fluorescence microscope requires a special fluorescence test chart as disclosed in Non-Patent Document 1.
"Nanometer scale marker for fluorescent microscopy" TakashiHiraga et.al, REVIEW OF SCIENTIFIC INSTRUMENTS 76,073701 (2005)

In the fluorescence test chart of Non-Patent Document 1, a resist pattern mixed with a fluorescence reagent is formed on a substrate. The adhesive force between the substrate and the resist pattern is weak. Therefore, it is weak to external force, and handling becomes difficult, for example, the resist pattern is peeled off only by rubbing.
In view of the problems described above, an object of the present invention is to provide a fluorescence test chart suitable for applications such as a fluorescence microscope.

  The fluorescent test chart of the present invention is a substrate in which a thin film pattern is formed. This thin film pattern generates a fluorescence pattern image by arranging a fluorescent light emitting portion made of a compound semiconductor that emits fluorescence by a photoluminescence action and a non-fluorescent light emitting portion that does not emit fluorescence adjacent to each other.

  The present invention can provide a fluorescent test pattern that is less likely to peel off than a conventional resist pattern.

FIG. 1A is a top view of the fluorescence test chart 11 in the present embodiment. FIG. 1B is a diagram showing a cross-sectional structure of the fluorescent test chart 11 along the line XX ′.
This fluorescence test chart 11 is based on a substrate 12. Examples of the material of the substrate 12 include an insulating substrate such as sapphire (c-plane, r-plane, or a-plane), spinel (MgAl ₂ O ₄ ), magnesium oxide (MgO), and SiC (6H, 4H). 3C type), a semiconductor substrate such as silicon Si, ZnO, GaAs, AlN, GaN or the like is preferable. In addition, as this board | substrate 12, in order to raise the background contrast of the fluorescence test chart 11, the material which permeate | transmits fluorescence and excitation light, such as infrared light well, is preferable.

On one side of the substrate 12, the fluorescent light emitting layer 15 is provided with a thickness of about 10 nm to 200 nm, for example. In order to grow the fluorescent light emitting layer 15 satisfactorily, a buffer layer 13 may be provided between the substrate 12 and the fluorescent light emitting layer 15.
On the other hand, the fluorescent light emitting layer 15 is made of a compound semiconductor that emits fluorescence by a photoluminescence action. As such a compound semiconductor, for example, an InGaN compound or an AlGaInP compound is preferable.

This fluorescent light emitting layer 15 takes the form of a quantum well structure. That is, the thin film well layers 16 and the barrier layers 17 having a larger band gap than the well layers 16 are alternately stacked. The barrier layer 17 is preferably Si-doped in the order of 1 × 10 ¹⁹ cm ⁻³ for the purpose of increasing the emission intensity.
Note that FIG. 1B illustrates a case where the fluorescent light emitting layer 15 has a multiple quantum well structure (MQW) having a plurality of well layers 16. However, the present invention is not limited to this, and a single quantum well structure (SQW) having only one well layer 16 may be used.

As a material for the well layer 16 / barrier layer _{17, In A Ga B N /} In C Ga D N ( However, 0 ≦ A, B, C , D ≦ 1, A + B = 1, C + D = 1) is preferable. In this case, the composition ratio A: B of the well layer 16 (preferably A: B = 0.25: 0.75) and the composition ratio C: D of the barrier layer 17 (preferably C: D = 0: 1). ) Are made different, the band gap difference necessary for the quantum well structure can be generated while satisfying the single crystal condition.

Further, for example, as such a well layer 16 / barrier layer _{17, (Al E Ga (1-} E)) F In (1-F) P / (Al G Ga (1-G)) H In (1- _H) P (where 0 ≦ E, F, G, H ≦ 1, F≈H) is preferable. In this case, the coefficients E and F that determine the composition ratio of the well layer 16 and the coefficients G and H that determine the composition ratio of the barrier layer 17 are different from each other, thereby satisfying the single crystal condition and necessary for the quantum well structure. A significant band gap difference can be generated.
The fluorescent light emitting layer 15 as described above is subjected to pattern processing to form a stripe pattern with an interval of 50 nm to 3000 nm.
On the other hand, a protective layer 18 made of a GaN compound, an AlGaN compound or the like is provided on the surface of the fluorescent light emitting layer 15 as necessary.

<< Effects of the embodiment >>
In the present embodiment, a compound semiconductor that emits fluorescence by a photoluminescence action itself is used as a phosphor. Therefore, the thickness of the fluorescent light emitting layer 15 (well layer 16) can be made thinner than in the case where the fluorescent reagent is mixed into the base material as in the prior art. As a result, the fluorescence emission layer 15 of the fluorescence test chart 11 can be made thinner than the depth of field of the optical device (e.g., fluorescence microscope) to be evaluated.

Furthermore, in this embodiment, since the compound semiconductor is crystal-grown on the substrate, a phosphor with high mechanical strength can be obtained. As a result, the fluorescence test chart 11 that is easier to handle than the conventional one is realized.
Moreover, since the compound semiconductor of this embodiment is an inorganic material, its light resistance and heat resistance are significantly higher than conventional products using organic fluorescent reagents. Therefore, the fluorescence test chart 11 that emits fluorescence that is less likely to fade than conventional and has high color purity over a long period of time is realized.

Furthermore, in the present embodiment, the fluorescent light emitting layer 15 has a quantum well structure. In this structure, carriers are confined within the narrow width of the well layer 16. Therefore, the recombination efficiency of electron-hole pairs generated by the excitation light is high, and the fluorescence emission intensity is improved.
In the present embodiment, the fluorescent light emitting layer 15 has a multiple quantum well structure (MQW). In this case, since fluorescence is simultaneously generated from the plurality of well layers 16, the emission intensity of the fluorescence is further improved.

In this embodiment, an InGaN compound semiconductor is used as the fluorescent light emitting layer 15. Due to the properties of the InGaN compound semiconductor, a fluorescence test chart 11 having excellent durability, anti-fading property, color purity of fluorescence, and the like is realized.
Furthermore, in this embodiment, an AlGaInP compound semiconductor is used as the well layer 16 / barrier layer 17. Due to the properties of the AlGaInP compound semiconductor, a fluorescence test chart 11 having excellent durability, anti-fading property, fluorescence color purity, and the like is realized.

In this embodiment, Si doping is performed on the barrier layer 17 in the order of 1 × 10 ¹⁹ cm ⁻³ . According to Example 3 to be described later, the emission intensity of the fluorescence can be increased several times by this relatively high concentration doping.
Furthermore, in this embodiment, sapphire, spinel, magnesium oxide, SiC, Si, ZnO, GaAs, AlN, GaN, or the like is used as the substrate 12. These substrates are particularly preferable for crystal growth of a high-quality compound semiconductor.

Note that after the fluorescent light emitting layer 15 is grown on another substrate, the fluorescent light emitting layer 15 may be attached to a glass substrate and the separate substrate may be peeled off. By such a process, the fluorescence test chart 11 based on the glass substrate is realized.
In the present embodiment, the fluorescent light emitting layer 15 is subjected to pattern processing such as etching. However, the present invention is not limited to this. For example, a fluorescent pattern image may be generated by forming a light shielding pattern on the surface of the fluorescent light emitting layer 15 with a metal film or the like.

Next, an example of a specific method for manufacturing the fluorescence test chart 11 will be described.
(1) Thermal annealing First, the substrate 12 made of sapphire (c-plane) is set in a crystal growth furnace. After sufficiently replacing the inside of the crystal growth furnace with a hydrogen atmosphere, the substrate 12 is held (1150 ° C., 10 minutes) while flowing a gas mainly containing hydrogen on the surface of the substrate 12. Through this process, the substrate 12 is subjected to thermal cleaning.

(2) Formation of low-temperature buffer layer (lowermost layer of buffer layer 13) Subsequently, the substrate 12 is cooled to about 470 ° C., and a mixed gas of hydrogen and nitrogen is used as a carrier gas, and ammonia (5 slm) and TMG (trimethylgallium) are formed. 20 μmol / min) as a source gas is flowed over the surface of the substrate 12, and a low-temperature buffer layer made of a GaN compound is grown to a film thickness of 25 nm. The low-temperature buffer layer may be a nitride described by the general formula In _X Al _Y Ga _(1-XY) N (where 0 ≦ X, 0 ≦ Y, X + Y ≦ 1).
This low-temperature buffer layer is made of Al _Y Ga _(1-Y) N (where 0 ≦ Y ≦ 1) or In _X Ga _(1-X) N (where 0 ≦ X ≦ 0.1). It is preferable. In particular, the low-temperature buffer layer is more preferably a binary nitride semiconductor of AlN and GaN. By selecting the material for these low-temperature buffer layers, it is possible to form a high-quality first nitride semiconductor layer.

(3) Formation of the first nitride semiconductor layer (intermediate layer of the buffer layer 13) After the growth of the low temperature buffer layer, the temperature is raised to 1100 ° C. while only the carrier gas and ammonia are passed through the substrate 12 (stopping TMG). Warm up. In this 1100 ° C. state, ammonia (7 slm) and TMG (90 μmol / min) are used as source gases, and the first nitride semiconductor layer mainly composed of GaN is preferably formed without intentional doping. Growing 1 μm to 10 μm (more preferably 2 μm). The first nitride semiconductor layer may be a nitride semiconductor described by the general formula In _X Al _Y Ga _(1-XY) N (where 0 ≦ X, 0 ≦ Y, X + Y ≦ 1).
The first nitride semiconductor layer is preferably Al _Y Ga _(1-Y) N (where Y ≦ 0.5) or In _X Ga _(1-X) N (where X ≦ 0.1). . In particular, GaN is more preferable as the first nitride semiconductor layer. By selecting the material of the first nitride semiconductor layer, it is possible to form a second nitride semiconductor layer with higher quality. Although a layer not intentionally doped (so-called undoped layer) is used here, donor-type impurities such as Si and Ge may be added as long as the crystal quality is not deteriorated.

(4) Formation of Second Nitride Semiconductor Layer (Surface Layer of Buffer Layer 13) Subsequently, 1 × 10 ¹⁸ cm ^{−3 was} doped with Si at 1050 ° C. using TMG, ammonia gas, and silane gas. N-type GaN is grown by 2 μm.

(5) Formation of barrier layer 17 Next, the temperature is lowered to 800 ° C., the carrier gas is switched to nitrogen, and TMG, TMI (removed methylindium), and ammonia are used to dope 1 × 10 ¹⁸ cm ^−3. The n-type barrier layer 17 (for example, In _0.03 Ga _0.97 N) having a thickness of 10 nm is formed.

(6) Formation of well layer 16 Subsequently, at a temperature of 800 ° C., the carrier gas is nitrogen, and TMG, TMI (trimethylindium), and ammonia are used to form the undoped well layer 16 (for example, In _0.23 Ga _0.77 N). For example, it is formed with a thickness of 3 nm.
In order to further enhance the carrier confinement effect by the quantum well, the thickness of the well layer 16 is preferably set to, for example, 1 nm to 10 nm (preferably 2 nm to 4 nm).
Further, although the well layer 16 is set to be undoped, the well layer 16 may be doped. For example, suitable fluorescence characteristics can be obtained by doping of 0.5 × 10 ^{18 to} 5 × 10 ¹⁸ cm ⁻³ .

(7) Alternating lamination of barrier layers 17 and well layers 16 The barrier layers 17 and well layers 16 described above are alternately laminated. The uppermost barrier layer 17 is preferably formed to a thickness as thick as 11 nm to 50 nm. Increasing the number of well layers 16 improves the fluorescence emission intensity. On the other hand, it is preferable to suppress the number of the well layers 16 to such an extent that an image is within the depth of focus of the optical device to be evaluated (fluorescence microscope or the like). The normal number of layers is preferably about 2 to 20 layers.

(8) Formation of protective layer 18 Next, the temperature is raised again to 1050 ° C., and undoped Al _0.1 Ga _0.9 N is grown to 20 nm using TMG, TMA (trimethylamine), and ammonia. In the case of a light emitting device such as an LED, the protective layer 18 needs to be doped with Mg to form a P-type layer, but the fluorescent test chart 11 does not require Mg doping. The protective layer 18 can suppress surface recombination of carriers (electrons, holes) generated in the fluorescent light emitting layer 15 by excitation light, and can improve the recombination probability of electron-hole pairs.
The protective layer 18 may be Si-doped. Although there is no restriction | limiting in particular in thickness, Usually, 5-100 nm is preferable. Moreover, although there is no restriction | limiting in particular also in Al composition ratio, when it exceeds 0.3, it will become easy to generate | occur | produce a crack. Therefore, 0.05 ≦ Al composition ratio ≦ 0.3 is preferable.
Furthermore, the protective layer 18 may have a superlattice structure in which a plurality of types of Al _Y Ga _(1-Y) N crystal lattices are superimposed.

(9) Pattern Processing of Fluorescent Light-Emitting Layer 15 After the above-described steps (1) to (8) are completed, a predetermined test chart mask pattern is formed on the surface of the uppermost protective layer 18. Through this mask pattern, RIE (reactive ion etching) is performed to dig up to the depth of the second nitride semiconductor layer described above. By this treatment, the fluorescent light emitting layer 15 is completely removed from the etching region (non-light emitting portion shown in FIG. 1).
The etching gas is not particularly limited, but a mixed gas of chlorine and hydrogen and argon are suitable. In addition, since the etching depth is shallower than that at the time of manufacturing a normal light emitting element, a condition with a relatively slow etching rate is preferable.

(10) Post-processing After the etching, the fluorescence test chart 11 is completed by washing with an organic solvent or the like. In order to further protect the surface, a SiO ₂ film or the like may be attached by a method such as vacuum deposition or plasma CVD. Further, a metal film having high reflectance such as Al may be deposited on one of the front and back sides of the fluorescence test chart 11. In this case, a fluorescence test chart 11 for performing excitation light irradiation and fluorescence observation from the opposite side of the Al vapor deposition surface is obtained.

(11) Fluorescence Characteristics of Completed Product FIG. 2 is a diagram showing the fluorescence characteristics of the completed fluorescence test chart 11.
The fluorescence test chart 11 generates green fluorescence of about 530 nm with respect to excitation light irradiation with a center wavelength of 405 nm. The fluorescence has a color purity better than that of a conventional test chart in which a fluorescent reagent is mixed, and the emission intensity is strong, so that a fluorescence pattern image with good contrast can be obtained.

The thickness of the barrier layer 17 was 5 nm, the thickness of the well layer 16 was 2 nm, and the number of the well layers 16 was three. Furthermore, Si doping of 1 × 10 ¹⁸ cm ⁻³ was performed on both the barrier layer 17 and the well layer 16. Other manufacturing steps are the same as those in the first embodiment.
Although the fluorescence test chart 11 completed in this way has a fluorescence emission intensity lower than that of Example 1, a fluorescence pattern image preferable for evaluation and measurement of the depth of focus of the fluorescence microscope is obtained.

The Si doping amount in the barrier layer 17 was increased to 1 × 10 ¹⁹ cm ⁻³ . Other manufacturing steps are the same as those in the first embodiment.
In the fluorescence test chart 11 thus completed, the emission intensity of the fluorescence emission increased to about 5 times the emission intensity of Example 1. In a light emitting device such as an LED, when the Si doping amount is increased, the light emission intensity tends to decrease. However, in fluorescence emission by photoluminescence, an extremely bright fluorescence pattern image can be obtained by applying Si doping to the barrier layer 17 in the order of 1 × 10 ¹⁹ cm ⁻³ .

  A SiC substrate is used instead of the sapphire substrate. As the buffer layer 13, AlN is grown to 30 nm at 1050 ° C. Other steps are the same as those in the first embodiment.

  As described above, the present invention is a technique that can be used for a fluorescence test chart or the like.

FIG. 3 is a diagram showing a structure of a fluorescence test chart 11. It is a figure which shows the fluorescence characteristic of the fluorescence test chart.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Fluorescence test chart, 12 ... Board | substrate, 13 ... Buffer layer, 15 ... Fluorescence emission layer, 16 ... Well layer, 17 ... Barrier layer, 18 ... Protective layer

Claims (4)

A substrate,
A thin-film pattern that is formed on the substrate and is made of a compound semiconductor that emits fluorescence by a photoluminescence action, and a non-fluorescent light-emitting portion that does not emit fluorescence is arranged adjacently to generate a fluorescence pattern image. ,
In the thin film pattern, a thin film formed by crystal growth of the compound semiconductor on the substrate is partially etched by reactive ion etching, an etching region becomes the non-fluorescent light emitting portion, and a non-etching region becomes the fluorescent light. A light emitting part,
The fluorescent light emitting part has a thickness of 10 nm to 200 nm, and is formed by laminating a well layer of the compound semiconductor and a barrier layer having a larger band gap than the well layer in the thickness direction of the substrate, Construct a single quantum well structure (SQW) or multiple quantum well structure (MQW) sandwiched between barrier layers ,
The fluorescent test chart , wherein the barrier layer contains Si element in the order of 1 × 10 ¹⁹ cm ⁻³ . In the fluorescence test chart according to claim 1,
The well layer / the barrier _{layer, In A Ga B N / In} C Ga D N ( However, 0 ≦ A, B, C , D ≦ 1, A + B = 1, C + D = 1) , characterized in that it is Fluorescence test chart. In the fluorescence test chart according to claim 1,
The well layer / barrier layer is made of (Al _E Ga _(1-E) ) _F In _(1-F) P / (Al _G Ga _(1-G) ) _H In _(1-H) P (where 0 ≦ E, F, G, H ≦ 1, F≈H). In the fluorescence test chart according to any one of claims 1 to 3,
The substrate is made of sapphire (c-plane, r-plane or a-plane), spinel (MgAl ₂ O ₄ ), magnesium oxide (MgO), SiC (6H, 4H, 3C type), Si, ZnO, GaAs, AlN, GaN A fluorescence test chart, which is one of the group consisting of:

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