JP5068048B2 - Display device - Google Patents

Description

  The present invention relates to a hold response type display device such as a liquid crystal display or an organic EL (ElectroLuminescence) display.

  Conventionally, when display devices such as a display for a television or a personal computer (PC) are classified from the viewpoint of moving image display, they are roughly classified into an impulse response type and a hold response type. The impulse response type display device is a type of display device in which the luminance response decreases immediately after scanning, such as the afterglow characteristics of a cathode ray tube. The hold response type display device is a type of display that keeps the luminance based on the display data until the next scan, such as a liquid crystal display.

  The hold response type display device, for example, can obtain a good display quality without flickering when displaying a still image, but when displaying a moving image, the surroundings of the moving object appear blurred. There is a problem that so-called moving image blur occurs and display quality is remarkably lowered. The occurrence of this motion blur is, for example, when the observer moves his / her line of sight as the displayed object moves, the observer interpolates the display image before and after the movement with respect to the display image with fixed brightness. This is caused by a so-called retinal afterimage. Therefore, in the hold response type display, the moving image blur cannot be completely eliminated regardless of how much the response speed is improved. Thus, in the hold response type display device, for example, the display image is updated at a shorter cycle, or the retinal afterimage is canceled by inserting a black screen or the like, so that the visual effect on the observer can be improved. There has been proposed a method for reducing blurring of moving images close to a display device.

  A typical display device that is required to display a moving image is a television receiver, and its scanning frequency is standardized such as 60 Hz in the NTSC system and 50 Hz in the PAL system. Therefore, when the frame frequency of the display image generated based on these scanning frequencies is set to 60 Hz or 50 Hz, the frequency is not high, and thus moving image blur occurs.

  In order to improve the blurring of moving images in this television receiver, as a technique for updating the display image at a shorter cycle as described above, for example, while increasing the scanning frequency, the display data of the interpolated frame based on the display data between frames Has been proposed (hereinafter referred to as an interpolation frame generation method) (see, for example, Patent Document 1).

As a technique for inserting a black screen (black frame) as described above, for example, a method of inserting black display data between display data (hereinafter, abbreviated as black display data insertion method) has been proposed ( For example, see Patent Document 2.)
JP 2005-6275 A JP 2003-280599 A

  However, it is known that the application of the above technique to the hold response type display can improve the blurring of moving images, but the following problems are caused accordingly.

  In the interpolation frame generation method, display data of an interpolation frame that does not exist originally is generated. Therefore, the circuit scale increases if more accurate display data is to be generated. Conversely, if the circuit scale is reduced, a generation error may occur in the display data of the interpolation frame, and the display quality may be significantly degraded.

  On the other hand, in the method of inserting the black frame, there is no generation error of display data of the interpolation frame in principle. Also, the circuit scale is advantageous compared to the interpolation frame generation method. However, in any of the methods called the black display data insertion method or the blink backlight method, the display luminance in all gradations is reduced by the black frame. In order to compensate for this decrease in luminance, for example, if the luminance of the backlight is increased with respect to the black display data insertion method, power consumption is increased by that amount, and a great deal of labor is required for measures against heat generation. . Furthermore, an increase in the absolute value of light leakage in black display causes a decrease in contrast. Further, in the blink backlight system, a large current is required to shift from the non-lighting state to the lighting state, or coloring occurs due to the difference in the response speed of visible light for each wavelength due to the difference in the fluorescent material.

  An object of the present invention is to provide a display device that reduces motion blur while suppressing a decrease in luminance, a decrease in contrast, and an increase in power required for light emission.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The outline of typical inventions among the inventions disclosed in the present application will be described as follows.

(1) A display panel having a plurality of pixels and a gradation voltage corresponding to the gradation of each pixel based on display data input from an external system are generated and output to each pixel of the display panel. 1 driver and a second driver for selecting a pixel to which the gradation voltage is to be supplied. The first driver is based on the gradation of display data for one screen displayed in one frame period. Te first has first gradation voltage generating circuit for generating a gray scale voltage, and the second gradation voltage generating circuits for generating the second gradation voltage, the second driver, the Each pixel is scanned twice in one frame period, and each pixel of the display panel displays a gray scale by the first gray scale voltage and the second gray scale voltage in the one frame period. Is displayed from the external system. A display device for displaying gradation of each pixel in display data, wherein each of the first gradation voltage generation circuit and the second gradation voltage generation circuit includes a plurality of resistors connected in series. The resistance voltage dividing circuit of the first gradation voltage generating circuit has a plurality of resistance values that change the magnitudes of the plurality of gradation voltages of the intermediate gradation, and have a substantially constant value; The resistance voltage dividing circuit of the second gradation voltage generating circuit includes the first voltage dividing circuit of the first gradation voltage generating circuit in the gradation region in which the plurality of resistance values are substantially constant. A display device that changes from a resistance value lower than a resistance value of a resistance voltage dividing circuit of a gradation voltage generation circuit to a higher resistance value.
(2) In the display device according to (1), the first gradation voltage generation circuit and the second gradation voltage generation circuit include a resistance voltage dividing circuit that generates a positive gradation voltage and a negative electrode, respectively. And a resistance voltage dividing circuit for generating a characteristic gradation voltage.

( 3 ) a display panel having a plurality of video signal lines, a plurality of scanning signal lines, a plurality of pixel regions defined by the video signal lines and the scanning signal lines, and a video signal line that supplies video signals to the video signal lines 1 driver circuit and a second driver circuit for supplying a scanning signal for selecting a pixel to which the video signal is to be written to the scanning signal line. And a first gray scale for the first frame, wherein the first driver circuit supplies the display panel via the first driver circuit to the display panel. A display device comprising: a voltage generation circuit; and a second gradation voltage generation circuit for the second frame.
(4) In the display device of (3), each resistance value of the first gradation voltage generation circuit and the second gradation voltage generation circuit is set to the first gradation in the low gradation region. The resistance value of the voltage generation circuit is higher than the resistance value of the second gradation voltage generation circuit, and the resistance value of the second gradation voltage generation circuit is the first gradation voltage generation circuit in a high gradation region. Display device with a higher resistance value.
(5) In the display device of (4), the first driver circuit is a circuit that outputs 256 gradations from 0 gradation to 255 gradation, and the low gradation area is 0 A display device in a range from gradation to 127 gradations.
(6) In the display device of (3), the first gradation voltage generation circuit is divided into three areas of a low gradation area, an intermediate gradation area, and a high gradation area, and the luminance of the output A display device in which characteristics are adjusted, and the second gradation voltage generation circuit is divided into two areas of a low gradation area and a high gradation area, and the characteristics of output luminance are adjusted.
(7) In the display device of (6), the first driver circuit is a circuit that outputs 256 gradations from 0 gradation to 255 gradation, and generates the first gradation voltage. In the circuit, the low gradation region is a range from 0 gradation to 63 gradation, the intermediate gradation region is a range from 64 gradation to 191 gradation, and the high gradation region is from 192 gradation. A display device having a range up to 255 gradations.
(8) In the display device of (6), the first driver circuit is a circuit that outputs 256 gradations from 0 gradation to 255 gradation, and generates the second gradation voltage. In the circuit, the low gradation region is a range from 0 gradation to 127 gradation, and the high gradation region is a range from 128 gradation to 255 gradation.

  According to the display device of the present invention, in a hold response type display device, it is possible to reduce motion blur while suppressing a decrease in luminance, a decrease in contrast, and an increase in power required for light emission.

  In the hold response type display device, smooth gradation display can be performed while reducing the blur of the moving image.

Hereinafter, the present invention will be described in detail together with embodiments (examples) with reference to the drawings.
In all the drawings for explaining the embodiments, parts having the same function are given the same reference numerals and their repeated explanation is omitted.

  In the following description, a period for displaying display data for one screen input from the external system to the display device is one frame period, and a period for selecting all the scanning signal lines of the display device (display panel) once. Is defined as one field period. Therefore, in a conventional general display device, one frame period is equal to one field period.

  In addition, the luminance obtained by repeating scanning while the display data is constant is defined as static luminance, the average luminance in one field period is defined as dynamic luminance, and the luminance visually recognized by the observer is defined as visual luminance. Therefore, in the conventional general hold response type display device, when the display data does not change, the static luminance, dynamic luminance, and visual luminance are substantially equal.

  FIG. 1 is a schematic diagram for explaining the principle of the display method in the display device of the present invention. FIG. 2 is a schematic graph showing an example of the relationship between the first field period, the second field period, and the visual luminance in the display method shown in FIG.

  In the display device of the present invention, a plurality of field periods are assigned to one frame period, and the visual luminance obtained from the dynamic luminance of the plurality of fields is substantially equal to the static luminance based on display data input from an external system. The display data is converted so that they match. At this time, the visual luminance substantially matches the average value of the dynamic luminance in each field period of the plurality of field periods.

At this time, allocating two field periods with respect to one frame period, each pixel of the display panel are scanned twice in one frame period, for example, as shown in FIG. 1, a certain frame period FLM _n is Display data 1A is displayed in the first field period FLD1, and display data 1B is displayed in the second field period FLD2.

  At this time, the viewer visually recognizes display data 1C obtained by combining the display data 1A of the first field period FLD1 and the display data 1B of the second field period FLD2. Therefore, the average value of the dynamic luminance of each pixel of the display data 1A displayed in the first field period FLD1 and the dynamic luminance of each pixel of the display data 1B displayed in the second field period FLD2 is an external value. If the dynamic luminance of each field period is set so as to match the static luminance based on the display data input from the system, the visual luminance of each pixel of the display data 1C visually recognized by the observer is almost equal to the static luminance. Match.

Similarly, in the next frame period FLM _{n + 1} , display data 1D is displayed in the first field period FLD1, and display data 1E is displayed in the second field period FLD2.

  At this time, the viewer visually recognizes display data 1F obtained by combining display data 1D of the first field period FLD1 and display data 1E of the second field period FLD2. Therefore, the average value of the dynamic luminance of each pixel of the display data 1D displayed in the first field period FLD1 and the dynamic luminance of each pixel of the display data 1E displayed in the second field period FLD2 is static. If the dynamic luminance of each field period is set so as to match the target luminance, the visual luminance of each pixel of the display data 1F visually recognized by the observer substantially matches the display luminance input from the external system.

  Note that each of the display data 1A to 1F shown in FIG. 1 schematically represents the luminance of the display data of each pixel in a display panel composed of a total of 12 pixels of 4 horizontal pixels × 3 vertical pixels.

In the display apparatus using such a display method, a dynamic display data 1B for displaying the dynamic luminance of the display data 1A to be displayed on the first field period FLD1 frame period FLM _n, the second field period FLD2 When determining the luminance, for example, when the dynamic luminance for the first field period FLD1 and the dynamic luminance for the second field period FLD2 are compared, the dynamics for the first field period FLD1 in all the gradations TI. It is conceivable that the luminance BD1 is higher or equal. A luminance curve BD1 representing the relationship between the gray level and the relative luminance for the first field period FLD1 set from this viewpoint, and a luminance curve BD2 representing the relationship between the gray level and the relative luminance for the second field period FLD2. For example, as shown in FIG. In FIG. 2, the horizontal axis represents the display data gradation TI, and the vertical axis represents the relative luminance BR. FIG. 2 shows the case where 256 gradations from 0 gradation to 255 gradations can be displayed. The luminance at 0 gradation is 0, and the luminance at 255 gradation is 1. The brightness of each gradation is shown.

In a conventional display device in which one frame period and one field period coincide, for example, the relationship between the gradation TI of input display data and the relative luminance BR is represented by a luminance curve BT (thin solid line). Assuming that the gradation of the display data input from the external system is T _x , the display data displayed in the one frame period is converted so that the relative luminance (static luminance) is B _x. The

On the other hand, for example, in a display device in which one frame period is composed of two field periods, if the gray level of the display data input from the external system is T _x , as shown in FIG. The display data to be displayed is converted so that the relative luminance (dynamic luminance) becomes 1 based on the luminance curve BD1 (thick solid line), and the display data displayed in the second field period FLD2 is converted to the luminance curve BD2 (thick dotted line). relative brightness (dynamic luminance) is converted to become B ₂ based. In this way, the visual luminance substantially matches the average value of the relative luminance 1 and the relative luminance B _2. Therefore, the value of the relative luminance B ₂ is set so that the average value substantially matches the static luminance B _x. .

  Further, when the luminance curve BD1 for the first field period FLD1 and the luminance curve BD2 for the second field period FLD2 are compared, as shown in FIG. 2, the first field period FLD1 in all the luminance TIs. When the relative luminance is higher or becomes the same value as the relative luminance of the second field period FLD2, the first field period FLD1 is called a bright field, and the second field period FLD2 is called a dark field.

  At this time, if the static luminance is in the range of 0 to 1, for example, the dynamic luminance in the first field period FLD1 (bright field) is 0.5, and in the second field period FLD2 (dark field), for example. When the dynamic luminance is set to 0, a visual luminance of about 0.25 is obtained by switching the dynamic luminance for each field. Similarly, when the dynamic luminance is 1 in the first field period FLD1 and the dynamic luminance is 0 in the second field period FLD2, a visual luminance of about 0.5 is obtained by switching this for each field. Thus, if the dynamic luminance in the second field period FLD2 is 0, the same effect as that of the black frame insertion method can be obtained, and moving image blur can be improved.

  Further, as a technique similar to the present invention, a multi-gradation system called a so-called FRC (Frame Rate Control) system is generally known. The FRC method is a method that realizes more gradation than the data driver has by repeating different gradation display for each frame. On the other hand, the present invention provides an improvement in moving image blur and an apparatus for realizing the same, and in order to realize this, one frame period is divided into a first field period FLD1 and a second field FLD2, and an external system is provided. The difference is that the driving is performed at a frequency twice as high as the frame frequency input from.

  FIG. 2 shows an example of the luminance curve BD1 for the first field period FLD1 and the luminance curve BD2 for the second field period FLD2. In the display device of the present invention, the distribution is as shown below. As a result, blurring of moving images is improved and smooth gradation expression is enabled.

  FIG. 3A is a schematic block diagram showing an example of a schematic configuration of a display device according to the present invention. FIG. 3B is a schematic circuit diagram illustrating an example of a schematic configuration of one pixel of the display panel illustrated in FIG. FIG. 3C is a schematic block diagram illustrating an example of a schematic configuration of the data driver illustrated in FIG. FIG. 3D is a schematic circuit diagram illustrating an example of a schematic configuration of the resistance voltage dividing circuit illustrated in FIG.

  The display device according to the present invention is a display device that converts and displays display data input from an external system according to the principle described with reference to FIG. 1 and FIG. FIG. 3A to FIG. 3D are configured.

When a liquid crystal display device is given as an example of the display device according to the present invention, for example, as shown in FIG. 3A, a liquid crystal display panel 2 that displays display data input from an external system and presents it to an observer is shown. A plurality of video signal lines DL extending in the vertical direction and a plurality of scanning signal lines GL extending in the horizontal direction are provided. Further, one pixel of the liquid crystal display panel 2 has a configuration as shown in FIG. 3B, for example, and has two adjacent video signal lines DL _p and DL _{p + 1} and two adjacent scanning signal lines GL. _q, a region surrounded by _{GL q + 1} corresponds to one pixel region. At this time, for example, a TFT used as a switching element (active element) is provided in each pixel region, the gate (G) of the TFT is connected to the scanning signal line GL _{q + 1,} and the drain (D) of the TFT is an image. Connected to the signal line DL _p , the source (S) of the TFT is connected to the pixel electrode PX. In addition, the pixel electrode PX forms a pixel capacitance (sometimes called a liquid crystal capacitance) together with the liquid crystal material LC and the common electrode CT (sometimes called a counter electrode) sealed between a pair of substrates. In the liquid crystal display device according to the present invention, the shape and configuration of the video signal line DL, the scanning signal line GL, the TFT, the pixel electrode PX, the common electrode CT of the liquid crystal display panel 2, the type of the liquid crystal material LC, etc. Since it may be the same as a liquid crystal display panel, detailed description is abbreviate | omitted.

  The liquid crystal display device also includes a data driver 3 that generates a video signal (also referred to as gradation data) to be output to each video signal line DL of the liquid crystal display panel 2, and each scanning signal line GL of the liquid crystal display panel 2. And a timing control circuit 5 for controlling the timing for outputting the grayscale voltage from the data driver 3 and the timing for outputting the scanning signal from the scanning driver 4.

  In addition, the liquid crystal display device is based on the frame memory 6 that stores and holds display data for at least one screen (one frame period) and the gradation data (gradation voltage) generated by the data driver 3. And a reference voltage generation circuit 7 for generating a reference voltage.

  Further, for example, as shown in FIG. 3 (c), the data driver 3 has four gradation voltage generation circuits 301a, 301b, 301c, and 301d and the gradation voltages generated by the four gradation voltage generation circuits. A gradation voltage selection circuit 302 for selecting one of them, and a plurality of gradation voltages selected by the gradation voltage selection circuit 302 in one line selection period, that is, a plurality of TFTs connected to one scanning signal line GL. And an output buffer circuit 303 that holds until display data to be displayed on each pixel is collected.

Four gradation voltage generating circuit 301a, 301b, 301c, the gradation voltage generation circuit 301a of 301d, for example, to generate a gradation voltage FLD1 _P of positive polarity with respect to the display data to be displayed on the first field period FLD1 Circuit. The gradation voltage generating circuit 301b is, for example, a circuit for generating a negative gradation voltage FLD1 _N for the display data to be displayed on the first field period FLD1. The gradation voltage generation circuit 301c is a circuit that generates, for example, a positive gradation voltage (FLD2 _P ) for display data to be displayed in the second field period FLD2, and the gradation voltage generation circuit 301d is, for example, , A circuit that generates a negative gradation voltage (FLD2 _N ) for display data to be displayed in the second field period FLD2.

  The positive polarity and the negative polarity are polarities indicating the relationship between the potential of the gradation voltage written to the pixel electrode PX and the potential of the common electrode CT, and the positive polarity is the potential of the pixel electrode PX when the potential of the common electrode CT. The higher polarity and the negative polarity are polarities in which the potential of the pixel electrode PX is lower than the potential of the common electrode CT.

The gradation voltage generating circuit 301a is, for example, a resistance voltage dividing circuit in which a plurality of resistors are connected in series, and each pixel of the liquid crystal display panel is a liquid crystal display device corresponding to 256 gradation display. In this case, for example, as shown in FIG. 3D, ₂₅₅ resistors R _{1 to} R ₂₅₅ are connected in series. At this time, for example, reference voltages V _{C0 to} V _C3 are input to the gradation voltage generation circuit 301a from the reference voltage generation circuit 7, and the gradation voltage corresponding to the minimum gradation (0 gradation) is output by the resistance voltage dividing circuit. 256 positive gradation voltages from V _T0 to gradation voltage V _T255 corresponding to the maximum gradation (255 gradations) are generated. The generated positive gradation voltage is output to the gradation voltage selection circuit 302.

At this time, the resistance values of the resistors R _{1 to} R ₂₅₅ constituting the resistance voltage dividing circuit of the gradation voltage generation circuit 301a are such that the relative luminance BR when displayed with the generated gradation voltage is, for example, as shown in FIG. The distribution is set so as to have the luminance curve BD1 shown.

Although not described because it will be repeated, the configurations of the remaining gradation voltage generation circuits 301b, 301c, and 301d are the same as the configuration of the gradation voltage generation circuit 301a. For example, 255 resistors R ₁ to R ₁ . The resistor voltage divider circuit in which R ₂₅₅ is connected in series generates 256 positive or negative grayscale voltages and outputs them to the grayscale voltage selection circuit 302.

  The gradation voltage selection circuit 302 is generated by each gradation voltage generation circuit 301a, 301b, 301c, 301d based on, for example, a clock signal from the timing control circuit 5 and display data held in the frame memory 6. A gradation voltage corresponding to one pixel of display data is selected from the gradation voltages, and the output buffer circuit 303 stores the gradation voltage as the gradation data of the pixel. At this time, the gradation voltage selection circuit 302 repeats this operation for all the pixels of the display data, and sequentially selects the gradation voltages for all the pixels of the display data to be displayed in the one line selection period.

  When the gradation data for all the pixels of the display data to be displayed in one line selection period is collected, the output buffer circuit 303 collects the collected gradation data (gradation voltage, for example) based on the clock signal from the timing control circuit 5. ) Is output to each video signal line DL.

  The display device of the present invention displays video data input from an external system with the above-described configuration and display principle, thereby suppressing a decrease in brightness, a decrease in contrast, and an increase in power required for light emission, Video blur can be reduced.

  FIG. 4 is a schematic graph showing an example of the display method of the display device according to the embodiment of the present invention.

  The present invention uses the display device configured as shown in FIGS. 3A to 3D, and for example, as shown in FIGS. 1 and 2, one frame period is divided into the first field period FLD1. The display data for one frame period is displayed in the second field period FLD2.

  At this time, if the luminance curve BD1 of the display data to be displayed in the first field period FLD1 is distributed as shown in FIG. 2, for example, the minimum gradation (0) divided in 256 stages in the conventional display device. The luminance between the luminance of the gradation and the luminance of the maximum gradation (255 gradation) is divided into about 192 levels (gradation). For this reason, for example, the difference in gradation voltage (relative luminance) between adjacent gradations in the intermediate gradation from 64 gradations to about 192 gradations becomes larger than in the past, and gradation expression becomes rough.

  Similarly, if the luminance curve BD2 of the display data displayed in the second field period FLD2 is distributed as shown in FIG. 2, for example, the minimum gradation (0) divided in 256 stages in the conventional display device. The gradation between the luminance of the gradation and the luminance of the maximum gradation (255 gradation) is divided into about 64 levels (gradation). For this reason, for example, a difference in gradation voltage (relative luminance) between adjacent gradations in gradations of 192 gradations or more becomes larger than in the past, and gradation expression becomes rough.

  That is, when the luminance curve BD1 for the first field period FLD1 and the luminance curve BD2 for the second field period FLD2 have the distribution shown in FIG. 2, the luminance curves BD1 and BD2 and the luminance in the conventional display device Since the difference from the curve BT is large, the gradation expression may be coarse.

  Therefore, in this embodiment, one frame period is divided into the first field period FLD1 and the second field period FLD2 in the display device having the configuration shown in FIGS. 3A to 3D. An example of a display method capable of reducing moving image blurring and smooth gradation expression when displaying display data for a frame period will be described.

  In order to reduce moving image blur and enable smooth gradation expression with the display device configured as shown in FIGS. 3A to 3D, for example, the first field period FLD1 is used. The inventors of the present application have found that the luminance curve BD1 with respect to and the luminance curve BD2 with respect to the second field period FLD2 may be distributed as shown in FIG.

  In FIG. 4, the horizontal axis represents the gradation TI of the display data, and the vertical axis represents the relative luminance BR. FIG. 4 shows a case where 256 gradations from 0 gradation to 255 gradations can be displayed. The luminance at 0 gradation is 0 and the luminance at 255 gradation is 1. The brightness of each gradation is shown.

The luminance curve BD1 ′ (thick solid line) for the first field period FLD1 shown in FIG. 4 is generated by the following method, for example. First, the relative luminance BR of each gradation in the range TR11 from the minimum gradation (0 gradation) to the 63 gradation in the luminance curve BD1 ′ is, for example, for the second field period FLD2 (dark field) shown in FIG. The luminance curve BD2 is generated by synthesizing the relative luminance (0) of the 0th gradation and the relative luminance in each gradation from the 0th gradation to the 63rd gradation of the luminance curve BD1 for the first field period FLD1 (bright field). . In this way, in the range TR11 of the luminance curve BD1 ′, the rate of change in luminance is larger than that of the luminance curve BT in the conventional display device, and the difference between the two increases as the luminance increases.

  Further, the relative luminance BR of each gradation in the range TR12 from the 64th gradation to the 191st gradation in the luminance curve BD1 ′ is, for example, 0 of the luminance curve BD2 for the second field period FLD2 (dark field) shown in FIG. It is generated by synthesizing the relative luminance (0) of the gradation and the relative luminance in each gradation from the 64th gradation to the 191st gradation of the luminance curve BD1 for the first field period FLD1 (bright field). In this way, the range TR12 of the luminance curve BD1 'has a lower luminance change rate than the luminance curve BT in the conventional display device, and the luminance curve BD1' becomes smaller at a certain gradation.

  Also, the relative luminance BR of each gradation in the range TR13 from the 192 gradation to the 255 gradation in the luminance curve BD1 ′ is, for example, 0 of the luminance curve BD2 for the second field period FLD2 (dark field) shown in FIG. The relative luminance (0) of the gradation and the relative luminance in each gradation from the 192 gradation to the 255 gradation of the luminance curve BD1 for the first field period FLD1 (bright field) are synthesized and generated. In this way, the range TR13 of the luminance curve BD1 ′ has a higher luminance change rate than the luminance curve BT in the conventional display device, and the relative luminance of both becomes 1 at the maximum gradation (255 gradations). .

On the other hand, the luminance curve BD2 ′ for the second field period FLD2 shown in FIG. 4 is generated by the following method, for example. First, the relative brightness BR of each gradation in the range TR21 from the minimum gradation (0 gradation) in the brightness curve BD2 'to 12 7 gradation, for example, the relative luminance of 0 gradation to 0, the maximum floor in the region TR21 the relative intensity of the tone (12 7 gradation) is increased gradually brightness to be about 0.05.

The relative brightness BR of each gradation in the range TR22 from 1 28 gradation in the luminance curve BD2 'to 255 gradations, for example, the brightness curve BD1 for the first field period shown in FIG. 2 FLD1 (bright field) 255 gradations of relative luminance (1), is generated by synthesizing the relative luminance at each gradation from 1 28 gradations of brightness curve BD2 for the second field period FLD2 (dark field) to 255 gradations.

  In this way, for example, the distribution (shape) of the luminance curve BD1 ′ for the first field period FLD1 and the luminance curve BD2 ′ for the second field period FLD2 are both represented by the luminance curves BD1 and BD2 shown in FIG. In comparison, the distribution (shape) of the conventional luminance curve BT with respect to display data input from an external system is approached. Therefore, smooth gradation expression is possible as compared with the example shown in FIG.

In the example shown in FIG. 4, the dynamic luminances of both the luminance curve BD1 ′ for the first field period FLD1 and the luminance curve BD2 ′ for the second field period FLD2 are input from the external system to the high gradation side. There is a region that is lower than the display brightness in the brightness curve BT of the display data to be displayed. However, if the average value of the dynamic luminance in the first field period FLD1 and the dynamic luminance in the second field period FLD2 substantially match the display luminance in the luminance curve BT of the display data input from the external system. , Motion blur can be reduced.

Furthermore , in the example shown in FIG. 4, the dynamic luminance in the luminance curve BD1 ′ for the first field period FLD1 is higher than the dynamic luminance in the luminance curve BD2 ′ for the second field period FLD2 on the high gradation side. There are areas that are lowered. However, if the average value of the dynamic luminance in the first field period FLD1 and the dynamic luminance in the second field period FLD2 substantially match the display luminance in the luminance curve BT of the display data input from the external system. , Motion blur can be reduced.

FIG. 5 is a schematic graph for explaining the characteristics of the gradation voltage generation circuit for realizing the display method of this embodiment.

In the display device configured as shown in FIGS. 3A to 3D, for example, the dynamic luminance in the first field period FLD1 as shown in the luminance curves BD1 ′ and BD2 ′ shown in FIG. When dynamic luminance is generated in the second field period FLD2, the resistance values in the resistance voltage dividing circuits of the gradation voltage generating circuits 301a, 301b, 301c, and 301d may be set as shown in FIG. . 5, the horizontal axis represents the gradation number m, the vertical axis represents the value of the resistance R _m of each resistor divider. FIG. 5 shows an example in which each pixel corresponds to 256 gradation display, and corresponds to the resistors R ₁ to R ₂₅₅ of the resistor voltage dividing circuit shown in FIG. Yes.

Four gradation voltage generating circuit 301a, 301b, 301c, of 301d, the gradation voltage generation circuit 301a for generating a gradation voltage FLD1 _P of positive polarity with respect to the display data to be displayed on the first field period FLD1, for example, As shown in FIG. 3D, 254 resistors R _{1 to} R ₂₅₅ are connected in series. At this time, the resistance value of each of the resistors R _{1 to} R ₂₅₅ is set to a value such as, for example, a distribution RD 1 indicated by a dotted line in FIG. The resistance value of each resistor _R 1 _{to R 255} of the gradation voltage generating circuit 301b which generates a negative gradation voltage FLD1 _N for the display data to be displayed on the first field period FLD1 also, for example, a dotted line in FIG. 5 Is set to a value such as the distribution RD1 shown in FIG. At this time, for example, the resistance values of the resistors R _{64 to} R ₁₉₁ that change the magnitude of the gradation voltage with respect to the intermediate gradation from the 64 gradation to the 191 gradation are set to a substantially constant value.

  In this way, the luminance of the display data displayed at each gradation voltage generated by the gradation voltage generation circuits 301a and 301b is as shown by the luminance curve BD1 'shown in FIG.

On the other hand, the grayscale voltage generating circuit for generating a second field period FLD2 gradation voltage generating circuit for generating a positive gradation voltage FLD2 _P of for the display data to be displayed on 301c, and negative polarity gray scale voltages FLD2 _N 301d The resistance values of the resistors R _{1 to} R ₂₅₅ are set to values such as the distribution RD2 indicated by the solid line in FIG. At this time, for example, the resistance value is suddenly changed in the vicinity of the 128th gradation, and the gradation voltage generation circuits 301c and 301d have a lower resistance value in the gradation lower than the 128th gradation, and the gradation is higher in the gradation higher than the 128th gradation. The regulated voltage generating circuits 301c and 301d are set to have a higher resistance value.

  In this way, the luminance of the display data displayed at each gradation voltage generated by the gradation voltage generation circuits 301c and 301d is as shown by the luminance curve BD2 'shown in FIG.

  As described above, according to the display device of the present embodiment, it is possible to reduce moving image blur while suppressing a decrease in luminance, a decrease in contrast, and an increase in power required for light emission.

  In addition, smooth gradation expression can be performed within a range where the moving image display performance such as moving image blur does not deteriorate.

  The present invention has been specifically described above based on the above-described embodiments. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. is there.

  For example, the liquid crystal display device has been described as an example in the above embodiment, but the present invention is not limited to the liquid crystal display device, and can be applied to any hold response type display device that displays video and images on the same principle. Examples of display devices to which the present invention can be applied other than liquid crystal display devices include organic EL displays and LCOS (Liquid Crystal On Silicon) displays.

It is a schematic diagram for demonstrating the principle of the display method in the display apparatus of this invention. It is a schematic graph which shows an example of the relationship between the 1st field period and 2nd field period, and visual luminance in the display method shown in FIG. It is a schematic block diagram which shows an example of schematic structure of the display apparatus in connection with this invention. FIG. 4 is a schematic circuit diagram illustrating an example of a schematic configuration of one pixel of the display panel illustrated in FIG. FIG. 4 is a schematic block diagram illustrating an example of a schematic configuration of a data driver illustrated in FIG. FIG. 4 is a schematic circuit diagram showing an example of a schematic configuration of a resistance voltage dividing circuit shown in FIG. It is a schematic graph which shows an example of the display method of the display apparatus of one Example by this invention. It is a schematic graph for demonstrating the characteristic of the gradation voltage generation circuit which implement | achieves the display method of a present Example.

Explanation of symbols

FLM _n , FLM _{n + 1} ... 1 frame period FLD1 ... first field period FLD2 ... second field period 1A, 1D ... display data in the first field period 1B, 1E ... display data in the second field period 1C, 1F ... display frame period data 2 ... liquid crystal display panel _{DL, DL p, DL p +} 1 ... video signal lines _{GL, GL q, G L q} + 1 ... scanning signal lines PX ... pixel electrode LC ... liquid crystal material CT ... common electrode 3 ... data driver 301a, 301b, 301c, 301d ... gradation voltage generation circuit 302 ... gradation voltage selection circuit 303 ... output buffer circuit 4 ... scan driver 5 ... timing control circuit 6 ... frame memory 7 ... reference voltage generation circuit

Claims (2)

A display panel having a plurality of video signal lines, a plurality of scanning signal lines, and a plurality of pixel regions defined by the video signal lines and the scanning signal lines;
A first driver circuit for supplying a video signal to the video signal line;
A second driver circuit for supplying a scanning signal for selecting a pixel to which the video signal is to be written to the scanning signal line;
A display device that temporally divides a standard image for one frame into a first frame and a second frame, and supplies the standard image to the display panel via the first driver circuit,
The first driver circuit includes a first gradation voltage generation circuit for the first frame and a second gradation voltage generation circuit for the second frame ;
The first and second gradation voltage generation circuits include a resistance dividing circuit in which a plurality of resistors are connected in series, and the resistance dividing circuit generates a gradation voltage corresponding to the number of gradations,
The resistance value of each of the first gradation voltage generation circuit and the second gradation voltage generation circuit is a low gradation region, and the resistance value of the first gradation voltage generation circuit is the second level. A display having a resistance value higher than that of the regulated voltage generation circuit and having a resistance value higher than that of the first gradation voltage generation circuit in a high gradation region. apparatus. The first driver circuit is a circuit that outputs 256 gradations from 0 gradation to 255 gradation, and the low gradation area is a range from 0 gradation to 127 gradation. The display device according to claim 1 .

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