JP5082686B2 - Print head control device - Google Patents

Description

  The present invention relates to a print head control apparatus used in a printing apparatus such as a printer apparatus, and more particularly to a print head control apparatus that can cope with print heads having different characteristics.

  A conventional printing apparatus receives print data supplied from a host device such as a personal computer (PC), performs drawing processing of the print data, sends drawing data to a print head controller, and prints on a recording medium. ing. In such a printing apparatus, the conventional print head controller uses a dedicated print head controller according to the characteristics of the print head and designs a dedicated control chip and board.

  Note that the invention of Patent Document 1 has also been proposed as a recording apparatus that performs high-quality recording at high speeds depending on changes in the operating environment and recording density.

JP-A-8-112901

  However, in the conventional print head control device, for example, when development targeting a higher-order model is performed, it causes a cost increase. That is, when developing a printing apparatus capable of high-resolution and high-speed printing, an expensive head control chip must be used, and a print head control apparatus having no versatility is designed.

  Therefore, the present invention provides a print head control device using a chip that can be used from a standard printing device to a high-performance printing device by developing one head control chip and using this head control chip in combination. Is.

According to the first aspect of the present invention, there is provided a print head control device for driving a plurality of print heads having different print colors based on print data to perform printing on a recording medium, wherein the print head is optimally driven. First and second print head control means having a serial input / output unit for transmitting and receiving print head control information for adjustment or correction control, and the print data input / output unit, and the first print head a daisy chain connection means for connecting the serial output of the serial input-output unit of the control means to the serial input of the serial input-output unit of the second print head control unit, processing of the first print head control means means, the daisy chain connection means and the second print head control control information of the print head from a storage means provided in the first print head control unit through the Sent to stage, and registers in the storage unit provided in the print head control means of the second control information transmitted the print head, and inputs from the input unit of the print data input and output portion of the print data The print data is adjusted or corrected based on print head control information registered in the storage unit, and the adjusted print data is printed in the print color from the print data output unit of the print data input / output unit. This can be achieved by providing a print head controller that outputs to the head.

According to a second aspect of the present invention, there is provided a print head control apparatus for driving a plurality of print heads having different print colors based on print data to perform printing on a recording medium, wherein the print head is optimally driven. A first input / output unit having a serial input / output unit for transmitting / receiving print head control information for adjustment or correction control, and a print data input / output unit, and a plurality of print head control units, The serial output unit of the serial input / output unit of the first print head control unit is connected to the serial input unit of the serial input / output unit of one print head control unit of the plurality of print head control units. It said one other one printhead system of the plurality of print head control means the serial output of the serial input-output unit of the print head control means in the print head control means Performs a daisy chain connection to connect to the serial input of the serial input-output unit of the device, processing means of the first print head control means, provided in the first print head control unit through the daisy chain connection means The print head control information is sequentially transmitted to the plurality of print head control means from the stored storage means, and the transmitted print head control information is registered in a storage unit provided in each of the plurality of print head control means. In addition, the print data input from the print data input unit of the print data input / output unit is adjusted or corrected based on print head control information registered in the storage unit, and the print data input / output unit providing the print head control apparatus for outputting print data the adjustment from the output of the print data to the each print color of a print head Thus it can be achieved.

According to a third aspect of the present invention, the print head control information includes control information for color adjustment corresponding to the print color of each print head, density adjustment control information corresponding to the characteristics of each print head, or This can be achieved by providing a print head control device including any of the control information for correcting the print position deviation of each print head .

According to a fourth aspect of the present invention, the registration of the print head control information is performed based on address information output from a processing unit provided in the first print head control unit. Alternatively, this can be achieved by providing a print head control device registered in a plurality of print head control means.

  According to the means for solving the above problems, the number of print head control means to be used is determined in accordance with the specifications required for the printing apparatus, and the resolution, gradation value, and printing speed are set to desired settings by daisy chain connection. be able to. Therefore, a versatile head control chip can be combined to cope with a standard printing apparatus to a high-performance printing apparatus, and the cost of the apparatus can be reduced.

  Further, by switching and using the sub-structured print head control means for the daisy chain-connected print head control means, it is possible to provide a versatile print head control apparatus including print heads having different characteristics.

Embodiments of the present invention will be described below with reference to the drawings.
(Embodiment 1)

  FIG. 1 is a system diagram for explaining the overall configuration of a printing apparatus for explaining an embodiment of the present invention.

  In FIG. 1, a printing apparatus 1 includes an interface controller (hereinafter referred to as an I / F controller) 2 and an engine control unit 3. The I / F controller 2 includes a reception control unit 4, a ROM 5, a font 6, and a display control unit 7. , A video I / F control unit 8, a memory 9 (standard RAM 9a, expansion RAM 9b), a DMA control unit 10, and an MPU 11. On the other hand, the engine control unit 3 includes a print head control unit (hereinafter simply referred to as a head control unit) 12, a motor control unit 13, an MPU 14, a fixing control unit 15, a high voltage control unit 16, a print head 17, a main motor 18, and various loads. 19, various sensors 20, a fixing thermistor 21, a fixing heater 22, and a high voltage unit 23.

  The printing apparatus 1 having the above configuration is supplied with print data from a host device 25 such as a personal computer (PC) or a printer server via a Centronics interface and a LAN (local area network). The print data supplied from the host device 25 is transferred to the reception control unit 4, and when a predetermined amount of print data is transferred to the reception control unit 4, it is transferred to, for example, the memory 9 (standard RAM 9a). The print data transferred to the memory 9 is subsequently analyzed according to the control of the MPU 11, compressed and decompressed by the DMA control unit 10, and then from the video I / F control unit 8 to the engine control unit 3 (head). Is output to the controller 12).

  The video data output to the head control unit 12 is subjected to processing described later and output to the print head 17. The motor control unit 13 controls the driving of the main motor 18, and the MPU 14 controls the head control unit 12 and the motor control unit 13 and also controls the fixing control unit 15 and the high voltage control unit 16.

  FIG. 2 is a block diagram illustrating a specific configuration of the head control unit 12 in the printing apparatus having the above configuration. The head controller 12 is formed in an ASIC (application specific integrated circuit) together with the motor controller 13.

  The head control unit 12 includes a video I / F control unit 26, a head I / F control unit 27, a basic timing generation unit 28, and a CPU I / F control unit 29. The video I / F control unit 26, head I / F control The unit 27, the basic timing generation unit 28, and the CPU I / F control unit 29 are connected by a CPU bus. In addition, the video I / F control unit 26 communicates with the above-described I / F controller 2 in a vertical synchronization signal (VHYNC), a horizontal synchronization signal (HSYNC), video data (Video), and a vertical synchronization signal (described later). VCLK). The video I / F control unit 26 is also connected to the video RAM 30, and exchanges video data with the video RAM 30.

The head I / F control unit 27 includes a dot pattern generation unit 31, a head setting register unit 32, a head data transmission unit 33, a head control signal generation unit 34, and a strobe signal generation unit 35. The dot pattern generation unit 31 is a video. Based on the video data supplied from the I / F control unit 26, dot pattern data according to the number of gradations is generated, and the dot pattern data is transferred to the print head 17 via the head data transmission unit 33. The head control signal generation unit 34 generates a horizontal synchronization signal (HSYNC) and a synchronization signal (DCLK) when transferring the dot pattern data to the print head 17 and outputs the generated signal to the print head 17. The strobe signal generator 35 generates a strobe signal and outputs the strobe signal to the print head 17.
The dot pattern data output to the print head 17 has a 4-bit configuration (D [3: 0]), and dot pattern data for four colors (for example, yellow (Y), magenta (M), cyan (C). , Black (K) dot pattern data) is output to the print head 17.

  On the other hand, the CPU I / F control unit 29 communicates with the above-described MPU 14 and includes a parallel I / F 30 and a serial I / F 31. The parallel I / F 30 and the serial I / F 31 are connected by the converter P / S and the converter S / P, and the serial signal is converted into a parallel signal via the converter S / P. The parallel signal is converted into a serial signal.

  The CPU I / F control unit 29 includes both a parallel communication port and a serial communication port, and performs read / write processing of the register group of each module and the I / O port. In addition, the serial I / F 31 has a switching function between the master side and the slave side by mode setting described later, and realizes a daisy chain connection that is connected in a so-called daisy chain.

  The basic timing generation unit 28 divides the sub-scanning direction into n according to the set gradation information, and generates basic timing according to each throughput. In accordance with these various timing signals, signals such as the aforementioned horizontal synchronization signal (HSYNC) and dot clock (DCLK) are generated. The strobe signal output from the strobe signal generator 35 described above is a three-time strobe signal of sublines (1/3), (2/3), and (3/3), for example, when the sub-scanning direction is divided into three. When the sub-scanning direction is divided into four, the strobe signal is output four times for sublines (1/4), (2/4), (3/4), and (4/4).

FIG. 3 is a diagram for explaining the basic configuration of the head control chip used in this example, and is an example in which the head control chip 24 of this example is used alone. The head control chip 24 includes a video I / F control unit 26, a head I / F control unit 27, a basic timing generation unit 28, and a CPU I / F control unit 29. In FIG. Description is omitted.
In the figure, the CPU I / F control unit 29 is composed of a parallel I / F 30, a serial I / F 31, a converter S / P, and a converter P / S, and further includes various timing signal generators (TIM) 35. ing. In addition to the head control chip 24, a CPU 37 and an SDRAM (synchronous DRAM) 38 are also provided on the head controller board 36 shown in FIG.

  The CPU 37 has a flash memory (not shown), and stores data for controlling each chip and control data before printing. For example, data such as color adjustment data corresponding to the print color set for each chip, density characteristic data corresponding to the characteristics of the print head, and print position deviation correction data are stored. The SDRAM 38 stores video data of the corresponding color and the control data stored in the CPU 37 is written by a process described later.

  The head controller board 36 is provided with a serial communication connector A, a serial communication connector B, various signal input / output connectors C, and a head connector D. The serial communication connectors A and B are connectors for daisy chain connection of the head controller board 36 configured as described above. The various signal input / output connectors C are connectors that exchange various signals when communicating with the I / F controller 2 and the MPU 14 described above.

  The head connector D is composed of four ports. When the head controller board 36 of this example is used alone, yellow (Y), magenta (M), cyan (C), and black (K) are used. The print head 17 is connected. When two head controller boards 36 are used, two of the four ports are used. When four head controller boards 36 are used, one of the four ports is used. Is done.

  FIG. 4 is a diagram for explaining a hardware configuration corresponding to the number of the head controller boards 36 used. FIG. 4A is an example of a standard model using one head controller board 36, and FIG. 4B is an example of a mid-range model using two head controller boards 36. FIG. ) Is an example of a high-end model using four head controller boards 36. FIG. 4D shows a comparative example of the gradation value and the printing speed when each model is adopted.

  Next, FIG. 5 shows an example of daisy chain connection using two head controller boards 36 configured as described above. In the figure, the head controller board (# 1) 36a is a master side board, the head controller board (# 2) 36b is a slave side board, and the serial communication connector B of the head controller board (# 1) 36a is It is connected to the serial communication connector A of the head controller board (# 2) 36b.

  The signal line group 39 for transmitting and receiving the CS (chip select) signal, TW (write cycle) signal, SCLK (synchronization signal), and CMD (output data) of the head controller board (# 1) 36a is a serial communication connector A. And B are connected, and the above signals are transmitted and received between the head controller board (# 1) 36a and the head controller board (# 2) 36b.

  Here, the CS signal is a signal for selecting the head controller board 36, the TW (write cycle) signal is a data write signal for each line, and the CMD (control data) is stored in the CPU 37 as described above. Data when writing control data to each head controller board 36 is meant, and SDI (input data) and SDO (output data) mean data when reading data to the CPU 37. The CPU 37 and the parallel I / F 30 are connected by a bus, and the CS signal, control data (CMD), and address data described later are transmitted and received.

  In the above configuration, the processing operation of this example will be described below.

  FIG. 6 is a time chart for explaining the processing of this example, and shows the output timing of each signal between the CPU 37 and the parallel I / F 30 at the time of data reading and writing. First, a process (write process) for writing control data (CMD) stored in the flash memory of the CPU 37 to the corresponding head controller board 36 is performed. The CPUCLK shown in the figure is a clock signal output from the CPU 37 at a constant cycle, and the following signal output is performed in synchronization with this clock signal.

  In the case of this example, it is an example of the mid-range model shown in FIG. 4B, and as shown in FIG. 5, the head controller board (# 1) 36a (head control chip 24a) has a mode. Information of “1Ch” is input, and information of mode “03h” is input to the head controller board (# 2) 36b (head control chip 24b). The mode information is set by, for example, operating a dip switch (not shown) or by cutting the wiring.

  FIG. 7 shows a table for explaining the setting of the mode information. The single shown in the figure corresponds to the above-mentioned standard model, and in the case of this example is a dual corresponding to the mid-range model, and the head controller board (# 1) 36a on the master side has the above-mentioned standard model. Information of “1Ch” (11100) is input, and information of “03h” (00011) is input to the head controller board (# 2) 36b on the slave side. In accordance with this mode information, each CPU sets the color information shown in FIG.

  In this case, the head controller board (# 1) 36a on the master side is responsible for printing processing of yellow (Y) and magenta (M), and the head controller board (# 2) 36b on the slave side is cyan (C) and black ( K) is in charge of the printing process.

  7 shows a mode in which each of yellow (Y), magenta (M), cyan (C), and black (K) is set on the head controller board 36 on the slave side.

  The CPU 37 first outputs a CS signal and outputs address data (timing a shown in FIG. 6). The CS signal is a signal for selecting the head controller board 36 to which the data output from the CPU 37 is written, and the address data indicates address information when data is written to the selected head controller board 36.

  FIG. 8 is a register map of the address data. “000h” to “03Fh” indicate yellow (Y) addresses, “040h” to “07Fh” indicate magenta (M) addresses, “080h” to “0BFh” indicates a cyan (C) address, and “0C0h” to “0FFh” indicate a black (K) address. The other address areas are used as a common area.

  Therefore, in this example, address data “000h” to “03Fh” and “040h” to “07Fh” corresponding to yellow (Y) and cyan (C) are received from the CPU 37 in the head controller board (# 1) 36a. Supplied to the parallel I / F 30. Among the address data supplied to the parallel I / F 30, the address data of “000h” to “03Fh” is used for writing data to the SDRAM 38a in the head controller board (# 1) 36a. The address data of “07Fh” is converted into serial data via the converter P / S, and the serial I / F 31 → serial communication connector B → serial communication connector A via the serial I / F of the head controller board (# 2) 36b. Supplied to F31.

  Next, control data (CMD) is output from the CPU 37 to the parallel I / F 30 (timing b shown in FIG. 6). Specifically, the control data (CMD) and the address data are composed of 3 bytes as shown in FIG. 9, and “0” indicating the write process is described in the bit b7 of the first byte. Bits b6 to b1 of the eye are reserved areas, address data is described in bits b0 to 2 bytes, and the control data (CMD) is described in the third byte. Therefore, the address data is supplied immediately before the control data (CMD) is supplied to the corresponding head controller board 36, and the data is written into the instructed SDRAM 38.

  That is, when a write instruction is issued (timing c shown in FIG. 6), data ((WDATA) (control data (CMD) is stored in the area specified by the address data “000h” to “03Fh” and “040h” to “07Fh”. As described above, this data is print control data corresponding to each chip, and the video data to be input thereafter can be controlled to perform appropriate printing on the print head 17. For example, Color adjustment corresponding to the print color set on the chip, density adjustment corresponding to the characteristics of the print head, and print processing with corrected print position deviation can be performed.

  On the other hand, the address data and control data (CMD) on the head controller board (# 2) 36b side are supplied to the serial I / F 31 in the head controller board (# 2) 36b as described above, and the head controller board (# 2). ) Is written in the SDRAM 38b on the 36b side. That is, in this case, data ((WDATA) control data (CMD)) is written in the area designated by the address data “080h” to “0BFh” and “0C0h” to “0FFh”.

  After the control data (CMD) is registered in the SDRAMs 38a and 38b as described above, yellow (Y) and magenta (M) video data is input to the head controller board (# 1) 36a, and the control data The corresponding gradation control, density adjustment, and the like are performed according to (CMD), and are output to the yellow (Y) and magenta (M) print heads 17 via the head connector D. On the other hand, cyan (C) and black (K) video data is input to the head controller board (# 2) 36b, and corresponding gradation control, density adjustment, and the like are performed in accordance with the control data (CMD). The data is output to the cyan (C) and black (K) print heads 17 via the head connector D.

  By controlling in this way, it is possible to function as a printing apparatus having a dual-structure head control unit using two CPU I / F control units 29, and to perform printing processing corresponding to the corresponding resolution, gradation value, and printing speed. It can be carried out. Therefore, the print head control unit can be easily configured by combining the versatile head control chip 29, and the cost of the apparatus can be reduced.

  On the other hand, when registering data is read from the SDRAM 38b, the following processing is performed. That is, according to the read time chart shown in FIG. 6, the CS signal is first output and the address data is output (timing d shown in FIG. 6). This CS signal is a signal for selecting the head controller board 36 for data read processing, and also outputs address data together with this CS signal. The SDRAM 38 (SDRAM 38b) of the head controller board 36 designated by the above processing is read from the SDRAM 38 (SDRAM 38b) in synchronization with the output of the read signal (timing e shown in FIG. 6).

  The data SDO at this time is also 3 bytes of data, for example, having the configuration shown in FIG. That is, the first byte and the second byte are dummy, and the data is described in the third byte. Therefore, this data SDO is read from the serial I / F 31 on the head controller board 36b side, and serial data on the head controller board (# 1) 36a side via the serial communication connector A → communication line group 39 → serial communication connector B. The data is transferred to the I / F 31, converted into parallel data by the converter S / P, and then read into the CPU 37, for example.

As described above, according to this example, the number of head control chips to be used is determined according to the specifications required for the printing apparatus, and the resolution, gradation value, and printing speed are set to desired settings by daisy chain connection. Can do.
(Embodiment 2)

Next, Embodiment 2 of the present invention will be described.
FIG. 11 is a connection diagram of the head controller board 36 (head control chip 24) for explaining the present embodiment, and this example is a print head control apparatus in which four head controller boards 36 are connected in a daisy chain. The basic configuration of a printing apparatus using the print head control apparatus of this example is as shown in FIG.

  This example is a high-end model shown in FIG. 4C described above, and is a quad-structured print head control device using four head controller boards 36. This will be specifically described below.

  In this example, the print head control apparatus of the first embodiment uses two head controller boards 36, whereas in this example, four head controller boards 36 are daisy chain connected. Therefore, the configuration of each head controller board 36 is the same as that shown in FIG.

  That is, the head controller board 36 includes a parallel I / F 30, a serial I / F 31, and a head control chip 24 including a converter S / P, a converter P / S, and a TIM 35, a CPU 37, and an SDRAM 38. The CPU 37 is not illustrated. Control data (CMD) and address data for controlling each chip are stored. The head controller board 36 is provided with the serial communication connector A, the serial communication connector B, the various signal input / output connectors C, and the head connector D as described above.

  The head connector D is composed of four ports. When the head controller board 36 of this example is used alone, yellow (Y), magenta (M), cyan (C), and black (K) are used. The print head 17 is connected. In this example, since four head controller boards 36 are used, one port is used for each. That is, the head controller board 36a (head control chip 24a) performs a yellow (Y) printing process, the head controller board 36b (head control chip 24b) performs a magenta (M) printing process, and the head controller board 36c (head). The control chip 24c) performs a cyan (C) printing process, and the head controller board 36d (head control chip 24d) performs a black (K) printing process.

  Specifically, the head controller board (# 1) 36a is a master board, the head controller boards (# 2) 36b to 36d are slave boards, and the serial communication connector B of the head controller board (# 1) 36a is a signal. The serial communication connector A of the head controller board (# 2) 36b is connected to the serial communication connector A of the head controller board (# 3) 36c. The serial communication connector B of the head controller board (# 3) 36c is connected to the serial communication connector A of the head controller board (# 4) 36d.

  Further, in order to set the mode to each head controller board 36, the master side head controller board (# 1) 36a is set to “18h” (based on the table shown in FIG. 7 and the register map shown in FIG. 11000), information “04h” (00100) is input to the head controller board (# 2) 36b on the slave side, and “02h” (00010) information is input to the head controller board (# 3) 36c. Information is input, and information “01h” (00001) is input to the head controller board (# 4) 36d, and the corresponding control data (CMD) is set.

  The address data and control data (CMD) transfer processing to the slave head controller boards 36b to 36d is the same as described above. At timing a shown in FIG. 6, the CS signal and address data, and then further control is performed. Data (CMD) is output to the SDRAMs 38a to 38d (the SDRAMs 38c and 38d are not shown) of the head controller boards 36a to 36d, and the control data (CMD) is written.

  That is, in the case of this example, in synchronization with the timing c shown in FIG. 6, control data (CMD) for performing yellow (Y) print processing on the SDRAM 38a of the head controller board 36a in accordance with the address data “000h” to “03Fh”. ) And control data (CMD) for performing magenta (M) printing processing is written to the SDRAM 38b of the head controller board 36b according to the address data "040h" to "07Fh". Further, control data (CMD) for printing cyan (C) is written to the SDRAM 38c of the head controller board 36c according to the address data “080h” to “0BFh”, and the head according to the address data “0BFh” to “0FFh”. Control data (CMD) for black (K) printing processing is written in the SDRAM 38d of the controller board 36d.

By performing the processing in this way, it is possible to function as a printing apparatus having a quad-structure head control unit using four head control chips 24, and to perform printing processing with the corresponding resolution, gradation value, and printing speed. . Therefore, the apparatus can be configured by easily combining versatile head control chips, and the cost of the apparatus can be reduced.
(Embodiment 3)

Next, a third embodiment of the present invention will be described.
12 and 13 are diagrams for explaining the configuration of the print head control apparatus for explaining the present embodiment, and FIG. 12 shows the configuration in the case where the same print head as that of the first and second embodiments is connected. Shows a configuration when a print head having characteristics different from those of the first and second embodiments is connected.
First, an example of connecting a print head having the same characteristics as those of the first and second embodiments will be described. In this case, the configuration shown in FIG. In the configuration of FIG. 12, the same circuits as those of FIG.

  The head control unit 40 of this example is also formed in the ASIC as described above, and includes a video I / F control unit 26, a head I / F control unit 27, a basic timing generation unit 28, and a CPU I / F control unit 29. The video I / F control unit 26, the head I / F control unit 27, the basic timing generation unit 28, and the CPU I / F control unit 29 are connected by a CPU bus. In addition, the video I / F control unit 26 communicates with the above-described I / F controller 2 such as a vertical synchronization signal (VHYNC), a horizontal synchronization signal (HSYNC), video data (Video), and a vertical synchronization signal (VCLK). Send and receive signals.

  The head I / F control unit 27 includes a dot pattern generation unit 31, a head setting register unit 32, a head data transmission unit 33, a head control signal generation unit 34, and a strobe signal generation unit 35. The dot pattern generation unit 31 is a video. The dot pattern data is created based on the video data supplied from the I / F control unit 26, and the dot pattern data is transferred to the print head 17 by the head data transmission unit 33.

The CPU I / F control unit 29 communicates with the above-described MPU 14 and includes a parallel I / F 30 and a serial I / F 31. The parallel I / F 30 and the serial I / F 31 are connected by the converter P / S and the converter S / P, and the serial signal is converted into a parallel signal via the converter S / P. The parallel signal is converted into a serial signal.
Therefore, by performing daisy chain connection, the head controller board 36 can be used in a single configuration, a dual configuration, or a quad configuration, as in the first and second embodiments.

  On the other hand, in this example, the main / sub switching circuit 41 is disposed between the head I / F control unit 27 and the print head 17 as described above, and the output to the print head 17 is transmitted to the head I / F control unit 27 and this. It is possible to switch to a configuration in which the head I / F control unit 27 is not used.

  For example, when performing processing using the print head control device with daisy chain connection as in the first and second embodiments, the main / sub switching circuit 41 is switched to the main side and used. On the other hand, when performing print control without using the print head control device having the above configuration, the main / sub switch circuit 41 is switched to the sub side and used.

  With this configuration, it is possible to perform print processing corresponding to a wider print specification. That is, printing processing that can be applied in detail according to the specification is possible.

  Next, a case where print heads having different characteristics are used will be described. FIG. 13 is a diagram illustrating this example, and a sub head control unit 43 is disposed between the head I / F control unit 27 and the print head 42. The configuration of the head controller 40 is the same as that shown in FIG. 12 described above. The video I / F control unit 26, the head I / F control unit 27, the basic timing generation unit 28, and the CPU I / F control unit 29 are connected by a CPU bus.

  Further, by performing daisy chain connection, the head I / F control unit 27 can use the head controller board 36 in a single configuration, a dual configuration, or a quad configuration as in the first and second embodiments. .

  On the other hand, the sub head control unit 43 includes an expansion head I / F control unit 45 and a CPU I / F control unit 51. The expansion head I / F control unit 45 includes a dot pattern generation unit 46, a head setting register unit 47, and head data transmission. 48, a head control signal generator 49, and a strobe signal generator 50. The extended head I / F control unit 45 is configured to perform print control corresponding to the characteristics of the connected print head 42, and the dot pattern generation unit 46 corresponds to the number of divided dot pattern data based on the supplied video data. The dot pattern data is transferred to the print head 42 by the head data transmission unit 48.

  FIG. 14 is a diagram showing the configuration of the register map in this case. In this example, the addresses on the main chip side are the same as those in the first and second embodiments, “000h” to “03Fh” indicate yellow (Y) addresses, and “040h” to “07Fh” are magenta. (M) indicates an address, “080h” to “0BFh” indicate a cyan (C) address, and “0C0h” to “0FFh” indicate a black (K) address.

  In the above-described embodiment, the address areas “100h” to “1FFh”, which are common areas, are used as addresses on the subchip side. That is, “100h” to “13Fh” indicates the address of yellow (Y) on the sub side, “140h” to “17Fh” indicates the address of magenta (M) on the sub side, and “180h” to “1BFh” The sub-side cyan (C) address is indicated, and “1C0h” to “1FFh” indicate the sub-side black (K) address.

  With the configuration described above, the sub head control unit 43 can perform printing processing using the extended head I / F control unit 45 by performing the same control as that on the main side. In this case, the control data (CMD) on the sub side is information corresponding to the print head 42, such as density information and print position information corresponding to the print head.

  FIG. 15 is a time chart for explaining the processing of the third embodiment. Similar to the time chart shown in FIG. 6, the same control is performed on the sub side. That is, on the sub side, at the time of writing, the CS signal and the address data are output at the timing a shown in the figure, the control data (CMD) is output at the timing b, and the control data (CMD) is output at the timing c. Write processing. On the other hand, at the time of writing, the CS signal and address data are output at the timing d, and the data reading process is performed at the timing e.

  FIG. 16 is a diagram showing the configuration of address data and control data (CMD), which is basically the same as the time chart shown in FIG. 9, and shows the output timing of the sub-SDI corresponding to SDI and SDO. .

  As described above, according to this example, it is possible to perform printing processing corresponding to a wider range of printing specifications. That is, even when a print head having different characteristics is used, the main / sub switching circuit 41 is switched to the sub side, and the extended head I / F control unit 45 is used to perform print processing corresponding to the print head 42 having different characteristics. It can be carried out.

1 is a system diagram illustrating an overall configuration of a printing apparatus according to an embodiment of the present invention. It is a block diagram explaining the specific structure of a head control part. It is a figure explaining the basic composition of a head control chip. (A)-(c) is a figure explaining the hardware constitutions corresponding to the number which uses a head controller board, (d) is a figure which shows the characteristic in each case of said (a)-(c). is there. It is a figure which shows the example of the daisy chain connection which uses two head controller boards. It is a time chart explaining the process of this embodiment. It is a figure explaining the setting of mode information. It is a figure explaining the register map of address data. It is a figure explaining the structure of address data and control data (CMD). It is a figure explaining the data structure of SDI and SDO. 6 is a diagram illustrating a configuration of a second embodiment. FIG. FIG. 10 is a diagram illustrating a configuration of a third embodiment, and illustrates a configuration in a case where the characteristics of the print head are the same as those of the first and second embodiments. FIG. 10 is a diagram illustrating a configuration of a third embodiment, and is a diagram illustrating a configuration when the characteristics of the print head are different from those of the first and second embodiments. It is a figure which shows the structure of the register map used in Embodiment 3. 10 is a flowchart illustrating processing of the third embodiment. It is a figure which shows the structure of address data and control data (CMD).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Printing apparatus 2 ... I / F controller 3 ... Engine control part 4 ... Reception control part 5 ... ROM
6 ... Font 7 ... Display control unit 8 ... Video I / F control unit 9 ... Memory 10 ... DMA control unit 11 ... MPU
12 .... Print head controller 13 ... Motor controller 14 ... MPU
15. ・ Fixing control unit 16 ・ ・ High pressure control unit 17 ・ Print head 18 ・ Main motor 19 ・ Various loads 20 ・ Various sensors 21 ・ Fixing thermistor 22 ・ Fixing heater 23 ・ ・ High pressure unit 26 Video I / F control unit 27... Head I / F control unit 28. Basic timing generation unit 29 CPU I / F control unit 30 Video RAM
31..Dot pattern generation unit 32..Head setting register unit 33..Head data transmission unit 34..Head control signal generation unit 35..Strobe signal generation unit 36..Head controller board 37..CPU
38 ・ ・ SDRAM
39..Signal line group 40..Head controller board 41..Main / sub switching circuit 42..Print head 43..Sub head control unit 45..Expansion head I / F control unit 46..Dot pattern generation unit 47. Head setting register section 48 Head data transmission section 49 Head control signal generation section 50 Strobe signal generation section 51 CPU I / F control section

Claims (4)

A print head control device that drives a plurality of print heads having different print colors based on print data and performs printing on a recording medium,
First and second print head control means having a serial input / output unit for transmitting and receiving print head control information for adjustment or correction control for optimally driving the print head, and the print data input / output unit When,
Daisy chain connection means for connecting a serial output section of the serial input / output section of the first print head control means to a serial input section of the serial input / output section of the second print head control means;
The processing means of the first print head control means receives the control information of the print head from the storage means provided in the first print head control means via the daisy chain connection means. The print head control information transmitted is registered in a storage unit provided in the second print head control unit, and is input from the print data input unit of the print data input / output unit. The print data is adjusted or corrected based on print head control information registered in the storage unit, and the adjusted print data is printed in the print color from the print data output unit of the print data input / output unit. A print head control device that outputs to a head. A print head control device that drives a plurality of print heads having different print colors based on print data and performs printing on a recording medium,
A first print head control means having a serial input / output unit for transmitting / receiving print head control information for optimally adjusting or correcting the print head , and a plurality of print data input / output units; Printing head control means,
The serial output unit of the serial input / output unit of the first print head control unit is connected to the serial input unit of the serial input / output unit of one print head control unit of the plurality of print head control units. The serial output unit of the serial input / output unit of the one print head control unit in the print head control unit is used as the serial input of the serial input / output unit of the other print head control unit of the plurality of print head control units. Daisy chain connection to the
The processing means of the first print head control means receives the print head control information from the storage means provided in the first print head control means via the daisy chain connection means. The print head control information is registered in a storage unit provided in each of the plurality of print head control means, and is input from the print data input unit of the print data input / output unit. The print data is adjusted or corrected based on print head control information registered in the storage unit, and the adjusted print data is printed in the print color from the print data output unit of the print data input / output unit. A print head control device that outputs to a head. The print head control information corrects control information for color adjustment corresponding to the print color of each print head, density adjustment control information corresponding to the characteristics of each print head, or print position deviation of each print head. 3. The print head control apparatus according to claim 1, further comprising: control information . The registration of the print head control information is registered in the corresponding second or plural print head control means based on address information output from the processing means provided in the first print head control means. The print head control apparatus according to claim 1, 2, or 3.