JP5084224B2 - Self-synchronous stream cipher encryption apparatus, decryption apparatus, self-synchronous stream cipher system, MAC generation apparatus, encryption method, decryption method, MAC generation method, and program - Google Patents

Description

  The present invention relates to a self-synchronous stream cipher encryption apparatus, decryption apparatus, self-synchronous stream cipher system, MAC generation apparatus, encryption method, decryption method, MAC generation method, and program.

  In recent years, various services using computers have been provided due to the remarkable spread of the Internet. Many of the services provided in this way use encryption to conceal the communication contents. Here, as the encryption method, a common key encryption method in which encryption and decryption are performed with one key is common, but this common key encryption method is roughly divided into a block encryption method and a stream encryption method. Is done.

Since the stream encryption method can be expected to process faster than the block encryption method, for example, as a method for transmitting large-capacity data such as a movie in recent years, attention has been paid to the stream encryption method. There is a problem that the encryption process and the decryption process must be synchronized. For this reason, a self-synchronous stream cipher apparatus that automatically recovers synchronization using a ciphertext received without error of a certain size or more has been proposed (for example, see Patent Document 1).
JP 2001-16197 A

  However, although the conventional method can automatically recover the synchronization, since the processing unit is 1 bit at a time, there is a problem that the processing takes time. Accordingly, the present invention has been made in view of the above-described problems, and is a self-synchronous stream cipher encryption device, a decryption device, and a self-synchronous stream that can execute automatic synchronization recovery processing at high speed. An object is to provide an encryption system, a MAC generation device, an encryption method, a decryption method, a MAC generation method, and a program.

The present invention proposes the following matters in order to solve the above problems.
(1) The present invention is a self-synchronous stream cipher encryption device that inputs plaintext, outputs ciphertext, and feeds back the ciphertext to the input. A plurality of first non-linear replacement functions (e.g., corresponding to S functions 1a to 1h in FIG. 1) and a plurality of non-linear replacements that perform an exclusive OR operation on a sentence and perform non-linear transformation processing The output of the function is input, compression processing is performed, and a compression function that outputs one compression result (for example, equivalent to the F function 2 in FIG. 1) and a plurality of second nonlinear replacement functions (for example, in FIG. 1) A plurality of registers (for example, corresponding to the registers R1, R2,..., R16 in FIG. 1) connected via the S functions 4a, 4b,. Input output values from multiple registers, A ciphertext is obtained by performing an exclusive OR operation between a random number sequence generation function (for example, equivalent to G function 5 in FIG. 1) for generating a number sequence and the input plaintext and the random number sequence generated by the random number sequence generation function. Generating an exclusive OR operation means (e.g., corresponding to XOR6 in FIG. 1), and the compression function performs an exclusive OR operation on the values input from the plurality of first non-linear replacement functions. By doing so, a self-synchronous stream cipher encryption device that performs compression processing is proposed.

  According to the present invention, a plurality of first nonlinear replacement functions input a ciphertext, perform an exclusive OR operation on the input ciphertext, and perform a nonlinear transformation process. The compression function receives the output of a plurality of first nonlinear replacement functions, performs compression processing, and outputs a compression result of 1. The plurality of registers are connected via a plurality of second non-linear replacement functions and store the output of the compression function. Then, the random number sequence generation function inputs output values from a plurality of registers, generates a random number sequence, and the exclusive OR operation means exclusively outputs the input plaintext and the random number sequence generated by the random number sequence generation function. A ciphertext is generated by performing an OR operation.

Therefore, since the generated ciphertext is fed back to the input side, the synchronization can be automatically recovered even if the synchronization is disturbed. Further, since the apparatus configuration is simplified, the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased.
In addition, according to the present invention, since the compression function performs the compression process by performing an exclusive OR operation on the values input from the plurality of first nonlinear replacement functions, the subsequent operation is made more efficient. Thus, the calculation load can be reduced.

( 2 ) The present invention relates to the self-synchronous stream cipher encryption device according to (1 ) , wherein the random number sequence generation function expands the number of bits of the output value from the plurality of registers by an expansion function, A self-synchronous stream cipher encryption device is characterized in that a random number sequence is generated by performing an exclusive OR operation on all the values.

  According to the present invention, the random number sequence generation function performs the exclusive OR operation on all the expanded values after expanding the number of bits of the output values from the plurality of registers by the expansion function, and the random number sequence Since each input element influences the output equally, the safety can be improved.

( 3 ) The present invention is a self-synchronous stream cipher decryption device that inputs ciphertext and outputs plaintext, and inputs the plaintext and performs an exclusive OR operation on the input plaintext. A plurality of first nonlinear permutation functions (for example, corresponding to S functions 7a to 7h in FIG. 4) and a plurality of first nonlinear permutation functions output for performing nonlinear transformation processing; A compression function that performs compression processing and outputs a compression result of 1 (for example, equivalent to F function 2 in FIG. 4) and a plurality of second nonlinear replacement functions (for example, S functions 4a, 4b,. And a plurality of registers (e.g., corresponding to the registers R1, R2,..., R16 in FIG. 4) connected to the output of the compression function, and output values from the plurality of registers To generate a random number sequence, a random number sequence generation function ( For example, an exclusive OR operation means for generating a plaintext by performing an exclusive OR operation between the input ciphertext and the random number sequence generated by the random number sequence generation function (corresponding to G function 5 in FIG. 1). For example, the compression function performs a compression process by performing an exclusive OR operation on values input from the plurality of first nonlinear replacement functions. A decryption apparatus for synchronous stream cipher is proposed.

  According to the present invention, a plurality of first nonlinear replacement functions input a ciphertext, perform an exclusive OR operation on the input ciphertext, and perform a nonlinear transformation process. The compression function receives the output of a plurality of first nonlinear replacement functions, performs compression processing, and outputs a compression result of 1. The plurality of registers are connected via a plurality of second non-linear replacement functions and store the output of the compression function. The random number sequence generation function inputs output values from a plurality of registers, generates a random number sequence, and the exclusive OR operation means excludes the input ciphertext from the random number sequence generated by the random number sequence generation function. A plain text is generated by performing a logical OR operation.

  Therefore, even if the synchronization is disturbed, the synchronization can be automatically recovered thereafter if all the first nonlinear replacement functions are satisfied by the ciphertext input from the encryption device. Further, since the apparatus configuration is simplified, the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased.

( 4 ) The present invention relates to the self-synchronous stream cipher encryption device of ( 3 ), wherein the random number sequence generation function expands the number of bits of the output values from the plurality of registers by an expansion function, A self-synchronous stream cipher encryption device is characterized in that a random number sequence is generated by performing an exclusive OR operation on all the values.

  According to the present invention, the random number sequence generation function performs the exclusive OR operation on all the expanded values after expanding the number of bits of the output values from the plurality of registers by the expansion function, and the random number sequence Since each input element influences the output equally, the safety can be improved.

( 5 ) The present invention includes the self-synchronous stream cipher encryption device according to (1) or ( 2 ) and the self-synchronous stream cipher decryption device according to ( 3 ) or ( 4 ). A self-synchronous stream cipher system characterized by being configured is proposed.

  According to this invention, the self-synchronous stream cipher encryption device according to any one of (1) to (3) and the self-synchronous stream cipher decryption according to any of (4) to (6) By combining with an apparatus, a self-synchronous stream cipher system that can automatically recover synchronization can be constructed.

( 6 ) The present invention is a MAC generation device for inputting plaintext, outputting ciphertext, feeding back the ciphertext to input, and outputting a final ciphertext as a message authenticator, the ciphertext And a first non-linear replacement function (for example, corresponding to S functions 1a to 1h in FIG. 7) that performs exclusive OR operation on the input ciphertext and performs non-linear transformation processing. A plurality of first non-linear replacement function outputs, a compression process for performing a compression process, and outputting one compression result (for example, equivalent to F function 2 in FIG. 7), a plurality of A plurality of registers (for example, registers R1, R2 in FIG. 7) connected via a second nonlinear replacement function (for example, corresponding to S functions 4a, 4b,... In FIG. 7) and storing the output of the compression function. , ..., equivalent to R16) A random number generation function (for example, equivalent to the G function 5 in FIG. 1) that inputs output values from the plurality of registers and generates a random number sequence, and the input plaintext and the random number sequence generated by the random number sequence generation function And an exclusive OR operation means (for example, corresponding to XOR6 in FIG. 7) for generating a final ciphertext as a message authenticator by performing an exclusive OR operation with the compression function. A MAC generation apparatus that performs compression processing by performing an exclusive OR operation on values input from a plurality of first nonlinear permutation functions has been proposed.

  According to the present invention, a plurality of first nonlinear replacement functions input a ciphertext, perform an exclusive OR operation on the input ciphertext, and perform a nonlinear transformation process. The compression function receives the output of a plurality of first nonlinear replacement functions, performs compression processing, and outputs a compression result of 1. The plurality of registers are connected via a plurality of second non-linear replacement functions and store the output of the compression function. Then, the random number sequence generation function inputs output values from a plurality of registers, generates a random number sequence, and the exclusive OR operation means exclusively outputs the input plaintext and the random number sequence generated by the random number sequence generation function. A final ciphertext is generated as a message authenticator by performing an OR operation.

  Therefore, since the apparatus configuration is simplified, the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased.

( 7 ) The present invention is a self-synchronous stream cipher encryption method using the self-synchronous stream cipher encryption device according to (1) or ( 2 ), wherein a key is input to an extended key generation function Then, a first step (for example, corresponding to step S101 in FIG. 4) for generating an extended key and setting it in each of the first nonlinear permutation functions, and a second step for substituting 0 into all the registers (For example, equivalent to step S102 in FIG. 4) and the third step (for example, in step S103 in FIG. 4), the initial value is input as plaintext, the encryption process is performed once, and the value of the register is updated. Equivalent), a fourth step (for example, equivalent to step S104 in FIG. 4) in which plain text consisting of all zeros is input and the encryption process is executed 32 times, and the value of each of the registers is set to the random number sequence generation function. A fifth step (for example, corresponding to step S105 in FIG. 4) that inputs a number to generate a random number sequence, performs an exclusive OR operation between the input plaintext and the generated random number sequence, and performs an encryption process. A sixth step (for example, corresponding to step S106 in FIG. 4), a seventh step (for example, corresponding to step S107 in FIG. 4) for shifting the value of the register by one to the output-side register, An eighth step (e.g., corresponding to step S108 in FIG. 4) of inputting ciphertext into an empty register and returning to the fifth step, is provided. An encryption method is proposed.

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set in each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the key stream processing for generating a random number sequence by inputting the value of each register into the random number sequence generation function is performed, the exclusive OR operation of the input plaintext and the generated random number sequence is performed, and the encryption processing is performed. Run. Then, the value of the register is shifted by one to the output side register, the internal state update process for inputting the ciphertext to the empty register is executed, and the operation returning to the key stream process is repeated. Therefore, since the generated ciphertext is fed back to the input side, the synchronization can be automatically recovered even if the synchronization is disturbed.

( 8 ) The present invention is a self-synchronous stream cipher decryption method using the self-synchronous stream cipher decryption device described in ( 3 ) or ( 4 ), wherein a key is input to an extended key generation function Then, a first step (for example, corresponding to step S201 in FIG. 6) for generating an expanded key and setting it in each of the first nonlinear permutation functions, and a second step for substituting 0 into all the registers (For example, equivalent to step S202 in FIG. 6) and the third step (for example, in step S203 in FIG. 6), the initial value is input as plaintext, the encryption process is performed once, and the register value is updated. Equivalent) and a fourth step (for example, equivalent to step S204 in FIG. 6) in which a plaintext consisting of all zeros is input and the encryption process is executed 32 times, and the value of each of the registers is generated as the random number sequence. A fifth step (for example, corresponding to step S205 in FIG. 6) that inputs a number to generate a random number sequence, performs an exclusive OR operation on the input ciphertext and the generated random number sequence, and performs decryption processing. A sixth step (for example, corresponding to step S206 in FIG. 6), a seventh step (for example, corresponding to step S207 in FIG. 6) for shifting the value of the register by one to the output-side register, An eighth step (for example, corresponding to step S208 in FIG. 6) of inputting ciphertext into an empty register and returning to the fifth step, is provided. A decoding method is proposed.

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set in each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the value of each register is input to the random number sequence generation function, key stream processing is performed to generate a random number sequence, and the exclusive OR operation of the input ciphertext and the generated random number sequence is performed to perform decryption processing Execute. Then, the value of the register is shifted by one to the output side register, the internal state update process for inputting the ciphertext to the empty register is executed, and the operation returning to the key stream process is repeated. Therefore, even if the synchronization is disturbed, the synchronization can be automatically recovered thereafter if all the first non-linear replacement functions are satisfied by the ciphertext input from the encryption device. .

( 9 ) The present invention is a MAC generation method using the MAC generation device according to ( 6 ), wherein a key is input to an extended key generation function to generate an extended key, and the first nonlinear replacement function A first step (corresponding to step S301 in FIG. 8) to be set for each, a second step (corresponding to step S302 in FIG. 8) for assigning 0 to all the registers, and initial values are input as plain text. A third step (corresponding to step S303 in FIG. 8) for updating the register value by performing the encryption process once and a plaintext consisting of all 0s are input, and the encryption process is executed 32 times. A fourth step (corresponding to step S304 in FIG. 8), a fifth step (corresponding to step S305 in FIG. 8) for generating a random number sequence by inputting the values of the registers to the random number sequence generation function; Entered flat A sixth step (corresponding to step S306 in FIG. 8) in which an exclusive OR operation is performed on the sentence and the generated random number sequence to execute encryption processing, and the value of the register is stored in one register on the output side The seventh step of shifting (corresponding to step S307 in FIG. 8), the eighth step of inputting ciphertext into the empty register (corresponding to step S308 in FIG. 8), and whether all plaintexts have been input A ninth step (corresponding to step S309 in FIG. 8), and a tenth step of outputting a message authenticator when it is determined in the ninth step that all plaintexts have been input ( And a MAC generation method characterized by comprising: (corresponding to step S310 in FIG. 8).

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set to each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the key stream processing for generating a random number sequence by inputting the value of each register into the random number sequence generation function is performed, the exclusive OR operation of the input plaintext and the generated random number sequence is performed, and the encryption processing is performed. Run. Then, the register value is shifted by one to the register on the output side, and an internal state update process for inputting the ciphertext into the empty register is executed. Then, it is determined whether all plaintexts have been input, and when it is determined that all plaintexts have been input, a message authenticator is output.

( 10 ) The present invention is a program for causing a computer to execute a self-synchronous stream cipher encryption method using the self-synchronous stream cipher encryption apparatus described in (1) or ( 2 ). A first step (for example, corresponding to step S101 in FIG. 4), which is input to the expanded key generation function, generates an expanded key, and is set in each of the first nonlinear replacement functions, and 0 in all the registers. A second step (for example, corresponding to step S102 in FIG. 4) to be substituted, and an initial value are input as plain text, and an encryption process is performed once to update the value of the register (for example, 4) (corresponding to step S103 in FIG. 4), a fourth step (for example, corresponding to step S104 in FIG. 4) for inputting the plaintext consisting of all 0s and executing the encryption process 32 times, A fifth step (for example, corresponding to step S105 in FIG. 4) of inputting each register value to the random number sequence generation function to generate a random number sequence, and an exclusive OR of the input plaintext and the generated random number sequence A sixth step (for example, equivalent to step S106 in FIG. 4) that performs an operation and performs encryption processing, and a seventh step (for example, FIG. 4) that shifts the value of the register by one to the output-side register. 4) (equivalent to step S107 in FIG. 4) and the eighth step (for example, equivalent to step S108 in FIG. 4) of inputting the ciphertext into the empty register and returning to the fifth step. Propose a program.

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set in each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the key stream processing for generating a random number sequence by inputting the value of each register into the random number sequence generation function is performed, the exclusive OR operation of the input plaintext and the generated random number sequence is performed, and the encryption processing is performed. Run. Then, the value of the register is shifted by one to the output side register, the internal state update process for inputting the ciphertext to the empty register is executed, and the operation returning to the key stream process is repeated. Therefore, since the generated ciphertext is fed back to the input side, the synchronization can be automatically recovered even if the synchronization is disturbed.

( 11 ) The present invention is a program for causing a computer to execute a self-synchronous stream cipher decryption method using the self-synchronous stream cipher decryption device described in ( 3 ) or ( 4 ). A first step (for example, corresponding to step S201 in FIG. 6) that inputs to the extended key generation function, generates an extended key, and sets it in each of the first non-linear replacement functions, and 0 in all the registers A second step (for example, corresponding to step S202 in FIG. 6) to be substituted, an initial value is input as plain text, an encryption process is performed once, and a third step (for example, the value of the register is updated) 6) (corresponding to step S203 in FIG. 6), a fourth step (for example, corresponding to step S204 in FIG. 6) for inputting the plaintext consisting of all zeros and executing the encryption process 32 times, A fifth step (for example, corresponding to step S205 in FIG. 6) of inputting each register value to the random number sequence generation function to generate a random number sequence, and the exclusive logic of the input ciphertext and the generated random number sequence A sixth step (for example, equivalent to step S206 in FIG. 6) that performs a sum operation and performs a decoding process, and a seventh step (for example, FIG. 6) that shifts the value of the register by one to the output-side register. 6) (equivalent to step S207 in FIG. 6) and the eighth step (for example, corresponding to step S208 in FIG. 6) of inputting the ciphertext into the empty register and returning to the fifth step. Propose a program.

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set in each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the value of each register is input to the random number sequence generation function, key stream processing is performed to generate a random number sequence, and the exclusive OR operation of the input ciphertext and the generated random number sequence is performed to perform decryption processing Execute. Then, the value of the register is shifted by one to the output side register, the internal state update process for inputting the ciphertext to the empty register is executed, and the operation returning to the key stream process is repeated. Therefore, even if the synchronization is disturbed, the synchronization can be automatically recovered thereafter if all the first non-linear replacement functions are satisfied by the ciphertext input from the encryption device. .

( 12 ) The present invention is a program for causing a computer to execute the MAC generation method using the MAC generation device according to ( 6 ), wherein a key is input to an extended key generation function to generate an extended key, and A first step (corresponding to step S301 in FIG. 8) set for each of the first nonlinear replacement functions, a second step (corresponding to step S302 in FIG. 8) for assigning 0 to all the registers, and an initial A third step (corresponding to step S303 in FIG. 8) in which the value is input as plaintext and the encryption process is performed once to update the register value, and a plaintext consisting of all 0s is input and encrypted. A fourth step (corresponding to step S304 in FIG. 8) for executing the process 32 times and a fifth step (in FIG. 8) for generating a random number sequence by inputting the values of the registers to the random number sequence generation function A sixth step (corresponding to step S306 in FIG. 8) for performing an exclusive OR operation between the input plaintext and the generated random number sequence, and performing the encryption process; A seventh step (corresponding to step S307 in FIG. 8) for shifting the value by one to the output-side register, and an eighth step (corresponding to step S308 in FIG. 8) for inputting the ciphertext into the empty register And a ninth step (corresponding to step S309 in FIG. 8) for determining whether or not all plaintexts have been input, and message authentication when it is determined in the ninth step that all plaintexts have been input. A program that causes a computer to execute a tenth step of outputting a child (corresponding to step S310 in FIG. 8).

  According to the present invention, a key is input to an extended key generation function, an extended key is generated, set to each of the first nonlinear replacement functions, and 0 is substituted into all registers. Then, the initial value is input as plaintext, the encryption process is performed once, the register value is updated, and the plaintext consisting of all 0s is input, and the initialization process for executing the encryption process 32 times is performed. Do. Next, the key stream processing for generating a random number sequence by inputting the value of each register into the random number sequence generation function is performed, the exclusive OR operation of the input plaintext and the generated random number sequence is performed, and the encryption processing is performed. Run. Then, the register value is shifted by one to the register on the output side, and an internal state update process for inputting the ciphertext into the empty register is executed. Then, it is determined whether all plaintexts have been input, and when it is determined that all plaintexts have been input, a message authenticator is output.

  According to the present invention, there is an effect that it is possible to realize a stream cipher capable of performing synchronization recovery automatically at high speed and safely.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Note that the constituent elements in the present embodiment can be appropriately replaced with existing constituent elements and the like, and various variations including combinations with other existing constituent elements are possible. Therefore, the description of the present embodiment does not limit the contents of the invention described in the claims.

<Configuration of encryption device for self-synchronous stream cipher>
The self-synchronous stream cipher encryption apparatus according to the present embodiment, as shown in FIG. 1, is an S function (nonlinear replacement function, denoted as “S” in the figure) 1a, 1b, 1c, 1d, 1e, 1f. 1g, 1h, 4a, 4b, F function (compression function, indicated as “F” in the figure) 2 and registers 3a, 3b,..., 3p (in the figure, “R1, R2,... , R16 "), a G function (nonlinear function, indicated as" G "in the figure) 5, and an exclusive OR calculator 6.

  The S functions 1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h, 4a, and 4b are bijective functions with the same input / output length when the CPU word length is W bits, and are input. A non-linear process is performed on the ciphertext after performing an exclusive OR operation on the expanded key.

  The F function 2 is a compression function that compresses an nW-bit ciphertext into a W-bit ciphertext. A specific configuration will be described later. The registers 3a, 3b,..., 3p are storage means for temporarily holding the output from the F function 2. The G function 5 is a non-linear function that converts nW-bit data into mW-bit data. At this time, n and m have a relationship of n> m. A specific configuration will be described later. The exclusive OR calculator 6 performs an exclusive OR operation between the mW-bit random number sequence output from the G function 5 and the input plaintext, and outputs an mW-bit ciphertext.

<Configuration of F function (compression function)>
As shown in FIG. 2, the F function (compression function) 2 includes exclusive OR calculators 20a, 20b, 20c, 20d, 20e, 20f, and 20g. In other words, the F function (compression function) 2 has exclusive OR calculators 20a, 20b, and outputs from the S functions (nonlinear replacement functions) 1a, 1b, 1c, 1d, 1e, 1f, 1g, and 1h. Using 20c, 20d, 20e, 20f, and 20g, an exclusive OR operation is performed to perform compression processing. Thereby, subsequent calculations can be made more efficient and the calculation load can be reduced.

<Configuration of G function (nonlinear function)>
As shown in FIG. 3, the G function (nonlinear function) 5 includes T functions (enlarged functions, indicated as “T” in the figure) 51a, 51b,..., 51o, 51p, and an exclusive OR calculator. 52a, 52b,..., 52o, 52p.

  That is, the G function (nonlinear function) 5 uses the T function (enlargement function) to set the word length W bits of the input data to mW bits, converts the value of each register, and then excludes all converted values. A random number sequence is generated by performing an exclusive OR operation using the logical OR calculators 52a, 52b,..., 52o, 52p. Thereby, since each input element comes to have influence on an output equally, the improvement of safety can be aimed at.

<Processing of the self-synchronous stream cipher encryption device>
Next, the processing operation of the self-synchronous stream cipher encryption apparatus will be described with reference to FIG.
First, initial processing is performed to set the internal state of the stream cipher. Specifically, the key is input to the extended key function to generate an extended key, which is set as the key of each S function 1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h (step S101). Next, “0” is assigned to all the registers 3a, 3b,..., 3p (step S102), the initial value is input as plain text, the encryption process is performed once (step S103), and the register 3a. 3b,..., 3p are updated. Then, the plaintext of all “0” is input and the encryption process is executed 32 times (step S104).

  Next, as a key stream generation process, the values of the registers 3a, 3b,..., 3p are input to the G function 5 to obtain a random number sequence (step S105). Further, as an encryption process, the input plaintext and the random number sequence output from the G function 5 are input to the exclusive OR calculator 6 and exclusive OR is performed to execute encryption (step) S106).

  And as an internal state update process, the internal state of each register | resistor 3a, 3b, ..., 3p is updated in the following procedures. Specifically, the values temporarily stored in the registers 3a, 3b,..., 3p are shifted one by one in the output direction (left direction in FIG. 1) (step S107). When shifting, non-linear processing using S functions 4a, 4b,... Is executed. Further, the value protruding from the register 3p arranged in the leftmost row is deleted. Further, the ciphertext is input to the register 3a arranged in the rightmost row (step S108). Here, the ciphertext input to the register 3 a is a value calculated by the F function 2. When this series of processing ends, the process returns to step S105 to continue the processing.

  As described above, the self-synchronous stream cipher encryption apparatus according to the present embodiment is configured to feed back the generated ciphertext to the input side. Even you can automatically recover synchronization. Further, since the apparatus configuration is simplified, the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased.

<Configuration of Self-Synchronized Stream Cipher Decryption Device>
As shown in FIG. 5, the self-synchronous stream cipher decryption apparatus according to the present embodiment has S functions (nonlinear replacement functions, denoted as “S” in the figure) 7a, 7b, 7c, 7d, 7e, 7f. , 7g, 7h, 4a, 4b, F function (compression function, indicated as “F” in the figure) 2 and registers 3a, 3b,..., 3p (in the figure, “R1, R2,... , R16 "), a G function (non-linear function, indicated as" G "in the figure) 5, and an exclusive OR calculator 8. In addition, about the component which attached | subjected the code | symbol same as FIG. 1, since it has the same function, the detailed description is abbreviate | omitted.

  S functions 7a, 7b, 7c, 7d, 7e, 7f, 7g, and 7h are bijective functions with the same input / output length when the CPU word length is W bits. Then, after performing an exclusive OR operation on the expanded key, nonlinear processing is executed. The exclusive OR calculator 8 performs an exclusive OR operation between the mW-bit random number sequence output from the G function 5 and the input ciphertext, and outputs an mW-bit plaintext.

<Processing of Self-Synchronous Stream Cipher Decryption Device>
Next, the processing operation of the self-synchronous stream cipher decrypting apparatus will be described with reference to FIG.
First, initial processing is performed to set the internal state of the stream cipher. Specifically, the key is input to the expanded key function to generate an expanded key, which is set as a key for each S function 7a, 7b, 7c, 7d, 7e, 7f, 7g, 7h (step S201). Next, “0” is assigned to all the registers 3a, 3b,..., 3p (step S202), the initial value is input as plain text, the encryption process is performed once (step S203), and the register 3a. 3b,..., 3p are updated. Then, the plaintext of all “0” is input and the encryption process is executed 32 times (step S204).

  Next, as a key stream generation process, the values of the registers 3a, 3b,..., 3p are input to the G function 5 to obtain a random number sequence (step S205). Further, as the decryption process, the input ciphertext and the random number sequence output from the G function 5 are input to the exclusive OR calculator 6, the exclusive OR is taken, and the decryption is executed (step) S206).

  And as an internal state update process, the internal state of each register | resistor 3a, 3b, ..., 3p is updated in the following procedures. Specifically, the values temporarily stored in the registers 3a, 3b,..., 3p are shifted one by one in the output direction (left direction in FIG. 5) (step S207). When shifting, non-linear processing using S functions 4a, 4b,... Is executed. Further, the value protruding from the register 3p arranged in the leftmost row is deleted. Further, the ciphertext is input to the register 3a arranged in the rightmost row (step S208). Here, the ciphertext input to the register 3 a is a value calculated by the F function 2. When this series of processing ends, the process returns to step S205 to continue the processing.

  As described above, according to the self-synchronous stream cipher decryption device according to the present embodiment, even if the synchronization is disturbed, all the first ciphertexts are input by the ciphertext input from the encryption device. If the non-linear permutation function is satisfied, the synchronization can be automatically recovered thereafter. Further, since the apparatus configuration is simplified, the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased. Also, a self-synchronous stream cipher system capable of automatically recovering synchronization by combining the self-synchronous stream cipher encryption device and the self-synchronous stream cipher decryption device described above is constructed. Can do.

<Configuration of MAC generator>
As shown in FIG. 7, the configuration of the MAC generation device is basically the same as that of the self-synchronous stream cipher encryption device shown in FIG. 1 described above. A continuous S-bit message authenticator is output from the mW-bit ciphertext.

<Processing operation of MAC generator>
Next, the processing operation of the MAC generation device will be described with reference to FIG.
First, initial processing is performed to set the internal state of the stream cipher. Specifically, the key is input to the extended key function to generate an extended key, which is set as the key of each S function 1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h (step S301). Next, “0” is assigned to all the registers 3a, 3b,..., 3p (step S302), the initial value is input as plain text, the encryption process is performed once (step S303), and the register 3a. 3b,..., 3p are updated. Then, the plaintext of all “0” is input and the encryption process is executed 32 times (step S304).

  Next, as a key stream generation process, the values of the registers 3a, 3b,..., 3p are input to the G function 5 to obtain a random number sequence (step S305). Further, as an encryption process, the input plaintext and the random number sequence output from the G function 5 are input to the exclusive OR calculator 6 and exclusive OR is performed to execute encryption (step) S306).

  And as an internal state update process, the internal state of each register | resistor 3a, 3b, ..., 3p is updated in the following procedures. Specifically, the values temporarily stored in the registers 3a, 3b,..., 3p are shifted one by one in the output direction (left direction in FIG. 1) (step S307). When shifting, non-linear processing using S functions 4a, 4b,... Is executed. Further, by shifting from the register 3p arranged in the leftmost row, the protruding value is erased. Further, the ciphertext is input to the register 3a arranged in the rightmost row (step S308). Here, the ciphertext input to the register 3 a is a value calculated by the F function 2. If all the plaintexts are not input (“No” in step S309), the process returns to step S305 and the processing is continued. On the other hand, if all plaintexts have been input (“YES” in step S309), an S-bit message authenticator is output (step S310), and all processing ends.

  As described above, according to the MAC generation apparatus according to the present embodiment, the apparatus configuration is simplified, so that the processing speed can be increased. In addition, a plurality of nonlinear replacement functions are arranged on the input side, and the compression function inputs the outputs of the plurality of nonlinear replacement functions, performs compression processing, and outputs one compression result. By minimizing the non-linear function processing, the processing speed can be increased.

  The above-described series of processing is recorded as a program on a computer-readable recording medium, and the program recorded on the recording medium is stored in a self-synchronous stream cipher encryption device, a self-synchronous stream cipher decryption device, Synchronous stream cipher system, self-synchronous stream cipher encryption apparatus, self-synchronous stream cipher decryption apparatus, self-synchronous stream cipher system, MAC generation apparatus of the present invention by being read and executed by a MAC generation apparatus Can be realized.

  In addition, if a WWW (World Wide Web) system is used, a homepage providing environment (or display environment) is also included. Further, the program may be transmitted from a computer storing the program in a storage device or the like to another computer via a transmission medium or by a transmission wave in the transmission medium. Here, the “transmission medium” for transmitting the program refers to a medium having a function of transmitting information, such as a network (communication network) such as the Internet or a communication line (communication line) such as a telephone line.

  The program may be for realizing a part of the functions described above. Furthermore, what can implement | achieve the function mentioned above in combination with the program already recorded on the computer, what is called a difference file (difference program) may be sufficient.

  The embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to the embodiments, and includes designs and the like that do not depart from the gist of the present invention.

It is a block diagram of the encryption apparatus of the self-synchronous stream cipher of this invention. It is a block diagram of F function. It is a block diagram of G function. It is a processing flow figure of the encryption apparatus of the self-synchronous stream cipher of this invention. It is a block diagram of the decoding apparatus of the self-synchronous stream cipher of this invention. It is a processing flow figure of the decoding apparatus of the self-synchronous stream cipher of this invention. It is a block diagram of the MAC generation apparatus of this invention. It is a processing flowchart of the MAC generation apparatus of this invention.

Explanation of symbols

  1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h, 4a, 4b, 7a, 7b, 7c, 7d, 7e, 7f, 7g, 7h ... S function, 2 ... F function, 3a, 3b,..., 3p... Register, 5... G function, 6, 8.

Claims (12)

A self-synchronous stream cipher encryption device that inputs plaintext, outputs ciphertext, and feeds back the ciphertext to the input,
A first non-linear replacement function consisting of a plurality of input ciphertexts, performing an exclusive OR operation on the input ciphertext and performing non-linear transformation processing;
A compression function for inputting the output of the first non-linear replacement function consisting of the plurality, performing compression processing, and outputting a compression result of 1;
A plurality of registers connected via a plurality of second nonlinear permutation functions to store the output of the compression function;
A random number sequence generation function that inputs output values from the plurality of registers and generates a random number sequence;
An exclusive OR operation means for generating a ciphertext by performing an exclusive OR operation between the input plaintext and the random number sequence generated by the random number sequence generation function ,
A self-synchronous stream cipher encryption apparatus that performs compression processing by performing an exclusive OR operation on values input from the plurality of first nonlinear replacement functions . After the random number sequence generation function expands the number of bits of the output values from the plurality of registers by an expansion function, an exclusive OR operation is performed on all the expanded values to generate a random number sequence The self-synchronous stream cipher encryption apparatus according to claim 1 . A decryption device for a self-synchronous stream cipher that inputs ciphertext and outputs plaintext,
A first non-linear replacement function consisting of a plurality of input ciphertexts, performing an exclusive OR operation on the input ciphertext and performing non-linear transformation processing;
A compression function for inputting the output of the first non-linear replacement function consisting of the plurality, performing compression processing, and outputting a compression result of 1;
A plurality of registers connected via a plurality of second nonlinear permutation functions to store the output of the compression function;
A random number sequence generation function that inputs output values from the plurality of registers and generates a random number sequence;
An exclusive OR operation means for generating a plaintext by performing an exclusive OR operation between the input ciphertext and the random number sequence generated by the random number sequence generation function ,
A self-synchronous stream cipher decryption apparatus that performs compression processing by performing an exclusive OR operation on values input from the plurality of first nonlinear replacement functions . The random number sequence generation function generates a random number sequence by performing an exclusive OR operation on all the expanded values after expanding the number of bits of the output values from the plurality of registers by the expansion function. The self-synchronous stream cipher decryption apparatus according to claim 3 , wherein: The self-synchronous stream cipher encryption apparatus according to claim 1 or 2 and the self-synchronous stream cipher decryption apparatus according to claim 3 or 4 are configured. A self-synchronizing stream cipher system. A MAC generation device that inputs plaintext, outputs ciphertext, feeds back the ciphertext to input, and outputs the final ciphertext as a message authenticator,
A first non-linear replacement function consisting of a plurality of input ciphertexts, performing an exclusive OR operation on the input ciphertext and performing non-linear transformation processing;
A compression function for inputting the output of the first non-linear replacement function consisting of the plurality, performing compression processing, and outputting a compression result of 1;
A plurality of registers connected via a plurality of second nonlinear permutation functions to store the output of the compression function;
A random number sequence generation function that inputs output values from the plurality of registers and generates a random number sequence;
An exclusive OR operation means for generating an ultimate ciphertext as a message authenticator by performing an exclusive OR operation between the input plaintext and the random number sequence generated by the random number sequence generation function ,
A MAC generation device that performs compression processing by performing an exclusive OR operation on values input from the plurality of first nonlinear replacement functions . A method for encrypting a self-synchronous stream cipher using the encryption apparatus of the self-synchronous stream cipher according to claim 1 or claim 2,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing an encryption operation by performing an exclusive OR operation between the input plaintext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering the ciphertext into the empty register and returning to the fifth step;
A self-synchronizing stream cipher encryption method characterized by comprising: A self-synchronous stream cipher decryption method using the self-synchronous stream cipher decryption device according to claim 3 or 4 ,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing a decryption process by performing an exclusive OR operation between the input ciphertext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering the ciphertext into the empty register and returning to the fifth step;
A method of decrypting a self-synchronous stream cipher characterized by comprising: A MAC generation method using the MAC generation device according to claim 6 ,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing an encryption operation by performing an exclusive OR operation between the input plaintext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering ciphertext into an empty register;
A ninth step for determining whether all plaintexts have been entered;
A tenth step of outputting a message authenticator when it is determined in the ninth step that all plaintexts have been input;
A MAC generation method comprising: A program for causing a computer to execute a self-synchronous stream cipher encryption method using the self-synchronous stream cipher encryption apparatus according to claim 1 or 2 ,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing an encryption operation by performing an exclusive OR operation between the input plaintext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering the ciphertext into the empty register and returning to the fifth step;
A program that causes a computer to execute. A program for executing the decoding method of self-synchronizing stream cipher using a decoding device of a self-synchronizing stream ciphers according to claim 3 or claim 4 on a computer,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing a decryption process by performing an exclusive OR operation between the input ciphertext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering the ciphertext into the empty register and returning to the fifth step;
A program that causes a computer to execute. A program for causing a computer to execute a MAC generation method using the MAC generation device according to claim 6 ,
A first step of inputting a key into an expanded key generation function, generating an expanded key, and setting each of the first nonlinear replacement functions;
A second step of assigning 0 to all the registers;
A third step of inputting an initial value as plain text, performing encryption processing once, and updating the value of the register;
A fourth step of inputting plaintext consisting of all zeros and executing the encryption process 32 times;
A fifth step of generating a random number sequence by inputting a value of each of the registers to the random number sequence generation function;
A sixth step of performing an encryption operation by performing an exclusive OR operation between the input plaintext and the generated random number sequence;
A seventh step of shifting the value of the register by one to an output-side register;
An eighth step of entering ciphertext into an empty register;
A ninth step for determining whether all plaintexts have been entered;
A tenth step of outputting a message authenticator when it is determined in the ninth step that all plaintexts have been input;
A program that causes a computer to execute.

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