JP5093040B2 - Solenoid driver - Google Patents

Description

  The present invention relates to a solenoid driver for duty driving a solenoid coil.

  For example, as described in Patent Document 1, a conventional solenoid driver integrates a difference between a current flowing through a solenoid coil driven by a duty and a target value to be supplied, and a sawtooth wave with an output of the deviation integration. The duty signal for driving the solenoid coil is generated and output.

  This solenoid driver is configured as an analog circuit using an operational amplifier or a comparator. For this reason, the circuit area is increased, and adjustment of the resistance value and the like is necessary to ensure accuracy.

  For this reason, Patent Document 2 discloses that the solenoid driver is constituted by a digital circuit. The solenoid driver disclosed in Patent Document 2 includes two counters. One counter is given a count initial value from the microcomputer and continues counting until the count value overflows. During this counting period, one of the counters outputs a high level carry signal, and after the overflow, the carry signal becomes low level. The other counter determines the duty drive cycle, and always starts counting from zero. When it overflows, it resets itself and starts counting from zero again, and sends a load signal to one of the counters described above. Output. With this load signal, one counter resets the initial value from the microcomputer and starts counting from the initial value again.

When the two counters repeat the above-described operation, the carry signal of one counter repeats high and low, and the solenoid coil is duty driven by the ratio of the high and low.
Japanese Utility Model Publication No. 54-23255 JP-A-5-35303

  As described in Patent Document 2 described above, by configuring the solenoid driver as a digital circuit, effects such as a reduction in circuit scale can be obtained.

  However, in the solenoid driver described in Patent Document 2, no consideration is given to external environmental factors such as ambient temperature and power supply voltage, which cause errors when the solenoid coil is driven by duty. For this reason, even if the solenoid coil is duty-driven in accordance with data from the microcomputer, there is a possibility that a desired current amount cannot be obtained.

  The present invention has been made in view of the above-described points. The drive duty ratio is determined based on the magnitude of an external environment factor that causes an error in the duty drive of the solenoid coil while the solenoid driver is configured by a digital circuit. An object of the present invention is to provide a solenoid driver that can be corrected.

In order to achieve the above object, the solenoid driver according to claim 1 comprises:
Measuring means for measuring an external environmental factor that causes an error when the solenoid coil is driven by a duty;
Based on the target duty signal indicating the target duty ratio, by counting the period according to either the on period or the off period of the target duty signal, the first on-period is counted during the period according to the on period of the target duty signal. A first counter for outputting a signal;
Calculation means for calculating the length of the second on signal to be output subsequent to the on signal output from the first counter based on the measurement result by the measuring means;
By counting a period corresponding to the length of the second on signal calculated by the calculating means, the second counter outputs the second on signal immediately after the first counter finishes outputting the first on signal. A counter,
Output means for outputting a duty drive signal for duty driving the solenoid coil by combining the first on signal output from the first counter and the second on signal output from the second counter; It is characterized by providing.

  As described above, the solenoid driver according to claim 1 has a second on-state having a length calculated based on the measurement result of the external environmental factor immediately after the first counter finishes outputting the first on-signal. A second counter for outputting a signal; This second ON signal is combined with the first ON signal by the output means to be a duty drive signal for driving the solenoid coil in a duty manner. Therefore, according to the solenoid driver of the first aspect, the drive duty ratio is corrected based on the magnitude of the external environmental factor that causes an error in the duty drive of the solenoid coil while the solenoid driver is constituted by a digital circuit. be able to.

  According to a second aspect of the present invention, the external environmental factor is the temperature of the solenoid coil, and the measuring means may measure the temperature of the solenoid coil. This is because when the temperature of the solenoid coil rises, the resistance value of the solenoid coil changes and affects the current value flowing through the solenoid coil.

  Specifically, as described in claim 3, the calculating means calculates the length of the second ON signal to be longer as the temperature measured by the measuring means is higher. Thereby, even if the resistance of the solenoid coil increases due to a temperature rise, a decrease in the current value can be suppressed.

  According to a fourth aspect of the present invention, the external environmental factor is a power supply voltage, and the measuring means may measure the power supply voltage supplied to the solenoid driver. This is because when the power supply voltage fluctuates, the current value of the solenoid coil fluctuates even if the drive duty ratio is constant.

  Specifically, as described in claim 5, the calculation unit calculates the length of the second ON signal to be shorter as the power supply voltage measured by the measurement unit increases. Thereby, the fluctuation | variation of the electric current value of the solenoid coil accompanying the fluctuation | variation of a power supply voltage can be suppressed.

  As described in claim 6, the first counter and the second counter may perform a counting operation based on different clock signals. For example, by making the clock frequency of the second counter higher than the clock frequency of the first counter, the resolution of the second on signal can be increased more precisely than the resolution of the first on signal. The drive duty ratio can be corrected.

  Hereinafter, a solenoid driver according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram showing the overall configuration of the solenoid driver according to the present embodiment.

  In FIG. 1, a microcomputer 10 determines a driving amount of a driving member (not shown) driven by a solenoid coil 60 based on various sensor signals and outputs a target duty signal for realizing the driving amount. To do.

  The target duty signal output from the microcomputer 10 is input to the digital / digital conversion unit (D / D conversion unit) 20. The D / D conversion unit 20 includes first to third counters 23, 25, 21, a register 22, an OR circuit 24, and a duty adjustment logic unit 26.

  In the D / D conversion unit 20, the third counter 21 receives the target duty signal from the microcomputer 10, and for example, the third counter receives the third clock signal while the target duty signal is on (on period). The count-up operation is performed from zero. Therefore, the count value of the third counter 21 corresponds to the ON period in the target duty signal.

  The register 22 stores the count value of the third counter 21. That is, the count value of the third counter 21 is written into the register 22, and the register 22 holds the written count value. Note that writing to the register 22 is performed at least when the count operation of the third counter 21 is stopped.

  The first counter 23 counts down from the initial value to zero according to the first clock signal when the count value held in the register 22 is set as the initial value at the timing when the counting operation of the third counter 21 is stopped. Is to do. The first counter 23 outputs a high level signal while performing the countdown operation, and outputs a low level signal when the countdown operation stops.

  In the above-described example, the third counter 21 performs the count-up operation and the first counter 23 performs the count-down operation. Conversely, the third counter 21 performs the count-down operation from the maximum value, and the first counter 23 The count-up operation may be performed from the initial value at which is set to the maximum value. In this case, a high level signal may be output while the first counter 23 is performing the count up operation, and a low level signal may be output when the count up operation is stopped.

  The second counter 25 receives the count stop signal from the first counter 23 at the timing when the count operation of the first counter 23 is stopped, and starts the count operation in response to the count stop signal. The count value calculated by the duty adjustment logic unit 26 is set in the second counter 25. The second counter 25 performs a count-down operation (or count-up operation) from the set count value in accordance with the second clock signal. The second counter 25 outputs a high level signal while performing the countdown operation, and outputs a low level signal when the countdown operation is stopped.

  In the duty adjustment logic unit 26, the second counter 25 counts down (or counts down) based on the detection results of the temperature detection unit 27 that detects the temperature of the solenoid coil 60 and the voltage detection unit 28 that detects the power supply voltage (+ VB). (Up operation) is calculated. Then, a count value corresponding to the calculated period is set in the second counter 25.

  Specifically, as shown in FIG. 2, the duty adjustment logic unit 26 increases the count value of the second counter so that the period during which the second counter 25 counts down increases as the temperature of the solenoid coil 60 increases. That is, the duty correction value is calculated. As the temperature of the solenoid coil 60 increases, the resistance value of the solenoid coil 60 increases. As a result, the current value flowing through the solenoid coil 60 may decrease. In contrast to this, as the temperature of the solenoid coil 60 becomes higher as in the present embodiment, the period of the count operation of the second counter 25 is lengthened, so that even if the resistance of the solenoid coil 60 increases due to the temperature rise, the solenoid A decrease in the value of current flowing through the coil 60 can be suppressed.

  The temperature detector 27 detects the temperature from the change in the rise voltage Vf of the diode provided in the vicinity of the solenoid coil 60, for example, using the fact that the rise voltage Vf of the diode changes with temperature, A constant current is passed through a resistor having a large coefficient, and the temperature is detected from the difference between the voltages at both ends.

  Further, as shown in FIG. 3, the duty adjustment logic unit 26 is configured so that as the power supply voltage (+ VB) detected by the voltage detection unit 28 increases, the period during which the second counter 25 performs the countdown operation is shortened. The count value of the counter, that is, the duty correction value is calculated. When the power supply voltage fluctuates, the current value of the solenoid coil may fluctuate even if the drive duty ratio is constant. As described above, the higher the power supply voltage (+ VB), the shorter the count operation period of the second counter 25, thereby suppressing fluctuations in the current value of the solenoid coil 60 due to fluctuations in the power supply voltage (+ VB). Can do.

  The OR circuit 24 combines the signal output from the first counter 23 and the signal output from the second counter 25 and outputs the resultant signal to the solenoid driving unit 30. The solenoid drive unit 30 converts the voltage level of the drive duty signal output from the OR circuit 24 and applies the drive duty signal to the gate of the MOS transistor 40. As a result, the MOS transistor 40 is turned on / off according to the drive duty signal, and the solenoid coil 60 is duty-driven. The diode 50 is a freewheeling diode.

  In the present embodiment, as described above, the second counter 25 starts the count operation at the timing when the first counter 23 stops counting, and outputs a high level signal while the count operation is being performed. For this reason, as shown in FIGS. 4A to 4C, the drive duty signal output from the OR circuit 24 becomes high level (ON) when the first counter 23 starts the count operation, and the second When the counter 25 finishes the counting operation, it becomes low level (off).

  As described above, in this embodiment, the output of the first counter 23 that is turned on / off according to the target duty signal output from the microcomputer 10 is corrected by the output of the second counter 25. The count period of the second counter 25 in which the output of the second counter 25 is turned on is determined by external environmental factors such as the temperature of the solenoid coil 60 and the power supply voltage, which cause an error in duty driving of the solenoid coil 60. For this reason, according to the present embodiment, the drive duty ratio can be corrected based on the external environment factor that is an error factor in the duty drive of the solenoid coil 60 while the solenoid driver is constituted by a digital circuit.

  In the present embodiment, the first counter 23 and the second counter 25 are configured to perform a counting operation based on different clock signals. At this time, for example, if the clock frequency of the second counter 25 is made higher than the clock frequency of the first counter 23, the second counter 25 has a shorter period per count than the first counter 23. As a result, the on-period resolution at the output of the second counter 25 can be increased more than the on-period resolution at the output of the first counter 23, and the drive duty ratio can be corrected more precisely.

  Further, in the present embodiment, the first counter 23 and the third counter 21 also perform a counting operation according to different clock signals. As a result, the duty ratio of the drive duty signal output from the D / D converter 20 can be arbitrarily adjusted with respect to the duty ratio of the target duty signal input to the D / D converter 20. FIG. 5 is a diagram illustrating an example of the relationship between the target duty signal and the drive duty signal. As shown in FIG. 5, in this embodiment, since the duty ratio of the drive duty signal can be arbitrarily adjusted with respect to the target duty signal, for example, according to the current-voltage characteristics of the MOS transistor 40, the solenoid coil The duty ratio of the drive duty signal can be adjusted so that the optimum current flows in the drive duty signal 60.

  The preferred embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  For example, in the above-described embodiment, the third counter 21 performs a counting operation while the target duty signal is on. However, the third counter 21 may perform a counting operation while the target duty signal is off. In this case, since the first counter 23 also performs the counting operation only during the period corresponding to the off period of the target duty signal, the first counter 23 outputs a low level signal during the counting operation, A high level signal is output when the count operation is stopped. Further, when the first counter 23 starts counting, the first counter 23 causes the second counter 25 to output a count start signal, and the second counter 25 starts the count operation in response to the count start signal. Configure.

  Even with such a configuration, a high level signal is output from the first counter 23 only during a period corresponding to the ON period of the target duty signal, and subsequently, a high level signal is output from the second counter 25. it can.

  In the above-described embodiment, the counter initial value of the second counter 25 is calculated as the duty correction value based on the temperature of the solenoid coil 60 and the power supply voltage. However, the duty correction value may be calculated based on at least one of the temperature of the solenoid coil 60 and the power supply voltage.

It is a block diagram which shows the whole structure of the solenoid driver by embodiment. It is a characteristic figure showing an example of a duty correction value computed based on the temperature of a solenoid coil in a duty adjustment logic part. FIG. 10 is a characteristic diagram illustrating an example of a duty correction value when calculated based on a power supply voltage in a duty adjustment logic unit. (A) shows the output of the first counter, (b) shows the output of the second counter, and (c) shows the drive duty signal output from the OR circuit based on the outputs of the first and second counters. It is a graph to show. It is a figure which shows an example of the relationship between a target duty signal and a drive duty signal.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Microcomputer 20 D / D conversion part 21 3rd counter 22 Register 23 1st counter 24 OR circuit 25 2nd counter 26 Duty adjustment logic 27 Temperature detection part 28 Voltage detection part 30 Solenoid drive part 40 MOS transistor 50 Free-wheeling diode 60 Solenoid coil

Claims (6)

A solenoid driver for driving a solenoid coil with a duty,
Measuring means for measuring an external environmental factor that causes an error when the solenoid coil is driven by a duty;
Based on the target duty signal indicating the target duty ratio, by counting the period according to either the on period or the off period of the target duty signal, the first period is determined during the period according to the on period of the target duty signal. A first counter that outputs an on signal;
Calculation means for calculating a length of a second ON signal to be output subsequent to the ON signal output from the first counter based on a measurement result by the measurement means;
By counting a period corresponding to the length of the second ON signal calculated by the calculating means, the second counter outputs the second ON signal immediately after the first counter finishes outputting the first ON signal. 2 counters,
Output means for outputting a duty drive signal for duty driving the solenoid coil by combining the first on signal output from the first counter and the second on signal output from the second counter And a solenoid driver characterized by comprising:   The solenoid driver according to claim 1, wherein the external environmental factor is a temperature of the solenoid coil, and the measurement unit measures the temperature of the solenoid coil.   3. The solenoid driver according to claim 2, wherein the calculating unit calculates the length of the second ON signal to be longer as the temperature measured by the measuring unit is higher.   The solenoid driver according to claim 1, wherein the external environmental factor is a power supply voltage, and the measuring unit measures a power supply voltage supplied to the solenoid driver.   3. The solenoid driver according to claim 2, wherein the calculation unit calculates the length of the second ON signal to be shorter as the power supply voltage measured by the measurement unit increases. 4. Wherein the first counter, said a second counter, vary based on the clock signal, the solenoid driver according to any one of claims 1 to 5, characterized in that performing the counting operation.

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