JP5110108B2 - Digital signal input device - Google Patents

Description

  The present invention relates to a device for inputting a digital signal, and more particularly to a digital signal input device using a waveform shaping circuit having an offset voltage at the input.

  2. Description of the Related Art Conventionally, as a digital signal input device, one having a saturation amplifier using a CMOS inverter and a CMOS inverter cascaded with the CMOS inverter having a waveform shaping function is known.

  Patent Document 1 discloses a sound drive control device that amplifies an input signal and shapes and outputs a waveform.

  As described above, the conventional digital signal input device can amplify and waveform-shape a digital signal having a small amplitude and supply it to the subsequent stage by using the saturation amplification function and the waveform shaping function.

Registered Utility Model No. 30621172

  However, in the conventional digital signal input device, when there is no input signal, the output of the saturation amplifier and the output of the waveform shaper are both fixed near the threshold voltage of the CMOS inverter. (1) Digital input signal circuit The whole becomes an analog amplifier with a large amplification degree, and the circuit becomes unstable and easily oscillates. (2) The CMOS LSI input often used in the latter stage becomes digitally indefinite and malfunctions due to external noise. As a result, there is a problem that a through current flows through the input section.

  In order to solve the above-described conventional problems, the present invention provides a digital signal input device that can supply a stable signal to a CMOS LSI that is stable even in the absence of an input signal and is often used in a subsequent stage. The purpose is to provide.

  In order to achieve the above object, the digital signal input device of the present invention is provided with a capacitor for holding an offset voltage to be applied to the input of the waveform shaper, and means for charging and discharging the capacitor. The digital signal input device is characterized.

  By adopting such a configuration, the digital signal input circuit itself is stable, and has the effect that the stable operation of the CMOS LSI in the subsequent stage can be realized.

  According to the above configuration, it is possible to provide a digital signal input device that can supply a signal that is stable by itself even in the absence of an input signal and that can realize a stable operation of the MOS LSI in the subsequent stage.

1 is a block diagram of a music playback device according to a first embodiment. 1 is a block diagram of a digital signal input device according to a first embodiment. Block diagram of a digital signal input device according to a second exemplary embodiment

Hereinafter, a music playback device using a digital input signal device will be described as an embodiment for carrying out the present invention, and will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 shows a block diagram of a music playback apparatus in which the present invention is used.

  The music playback device 100 includes a digital signal input device 101, an LSI 102, a DA converter 103, an amplifier 104, and a speaker 105.

  The digital signal input device 101 receives a digital signal supplied from another device connected to the music playback device 100.

  The LSI 102 performs digital signal processing and decoding processing on the digital signal output from the digital signal input device 2.

  The DA converter 103 converts the digital signal processed by the LSI 102 into an analog signal.

  The amplifier 104 amplifies the analog signal converted by the DA converter 103.

  The speaker 105 converts the analog signal amplified by the amplifier 104 into sound and outputs the sound.

  Next, the operation of the music playback device 100 will be described.

  A digital signal supplied from an external device connected to the music playback device 100 is amplified and shaped by the digital signal input device 101 and supplied to the LSI 102. The LSI 102 performs necessary processing and decoding on the input signal and supplies it to the DA converter 103. The DA converter 103 converts the input digital signal into an analog music signal and supplies it to the amplifier 104. The amplifier 104 amplifies the input analog music signal and supplies it to the speaker 105. The speaker 105 reproduces the input analog music signal.

  FIG. 2 is a block diagram of the digital signal input apparatus according to the first embodiment.

  The digital signal input device 2 includes a first capacitor 201, a first resistor 202, a second capacitor 203, a second resistor 204, a first CMOS inverter 205, a third capacitor 207, A third resistor 208, a diode 209, and a second CMOS inverter 210 are included. The diode 209 is usually provided inside the second CMOS inverter 210 for protection.

The capacitance of the first capacitor 201 is CinF, the resistance value of the first resistor 202 is RinΩ, the capacitance of the second capacitor 203 is C1F, the resistance value of the second resistor 204 is R1Ω, and the third capacitor The capacitance of 207 is C2F, and the resistance value of the third resistor 208 is R2Ω.

  The first capacitor 201 and the first resistor 202 remove the direct current component of the digital signal supplied from the external device connected to the music playback device 1 and set the input impedance.

  The second capacitor 203, the second resistor 204, and the first CMOS inverter 205 operate as a saturation amplifier 206 to saturate and amplify the digital signal.

  The third capacitor 207 holds a DC voltage.

  The third resistor 208 and the diode 209 charge the third capacitor 207 with a DC voltage and discharge it.

  The second CMOS inverter 210 shapes the waveform of the saturation-amplified digital signal.

  The operation of the digital input signal device in the music playback device configured as described above will be described below.

The DC signal is removed from the digital signal supplied from the external device by the first input capacitor 201. The digital signal from which the DC component has been removed is grounded with a prescribed input impedance by the first resistor 202 and is supplied to the saturation amplifier 206 by the first CMOS inverter 205 having the second capacitor 203 and the second resistor 204. The The saturation amplifier 206 saturates and amplifies the high frequency component of the input digital signal using the threshold voltage of the first CMOS inverter as a reference voltage. Therefore, the output signal of the saturation amplifier 206 is amplified up to the upper and lower saturation voltages with respect to the threshold voltage of the first CMOS inverter 205 as a reference. When the charging time constant C2R2 by the third resistor 208 is larger than the frequency cycle of the digital input signal, the third capacitor 207 is connected to the saturation amplifier 206 by the first CMOS inverter 205 via the third resistor 208. Try to charge to the average voltage of the output voltage. However, when the output of the saturation amplifier 206 by the first CMOS inverter 205 becomes the lower saturation voltage, the input voltage of the second CMOS inverter 210 tends to drop more than the ground voltage, so that the second CMOS inverter The voltage is instantaneously discharged to the forward voltage of the diode 209 via the diode 209 of 210. That is, when the charging time constant C2R2 by the third resistor 208 is larger than the frequency period of the digital input signal, the third capacitor 207 holds the forward voltage of the diode 209. Therefore, a voltage obtained by subtracting the forward voltage of the diode 209 from the output of the saturation amplifier 206 by the first CMOS inverter is applied to the waveform shaper by the second CMOS inverter. In this case, since the output of the saturation amplifier 206 by the first CMOS inverter is sufficiently saturated, the output of the waveform shaper by the second CMOS inverter is the same as the inverted output of the saturation amplifier 206 by the first CMOS inverter. become.

  If there is no input to the digital signal input device, the output of the saturation amplifier by the first CMOS inverter is fixed to the threshold voltage of the first CMOS inverter. In that case, the charging voltage of the third capacitor is gradually charged from the forward voltage of the diode 209 to the threshold voltage of the first CMOS inverter via the third resistor. At this time, the input voltage of the waveform shaper by the second CMOS inverter decreases toward 0 from the voltage obtained by subtracting the forward voltage of the diode 209 from the threshold voltage of the first CMOS inverter. .

Usually, the first CMOS inverter 205 and the second CMOS inverter 210 are made on the same semiconductor slice and sealed in the same package, so that the first CMOS inverter 205 and the second CMOS inverter 210 are the same. The threshold voltages are almost equal. In this case, the input voltage of the second CMOS inverter 210 is surely lower than the threshold value, so that the output voltage is reliably secured at the H level.
(Embodiment 2)
FIG. 3 is a block diagram of the digital signal input device according to the second embodiment. The digital signal input device according to the second embodiment is similar to the digital signal input device according to the first embodiment in that a fourth resistor having a resistance value of R3Ω that can charge and discharge the DC voltage to the third capacitor 207. 301 is added. Since the other configuration is the same as that of the first embodiment, description of each configuration is omitted.

  The operation of the digital input signal device configured as described above will be described below.

The DC signal is removed from the digital signal supplied from the external device by the first input capacitor 201. The digital signal from which the DC component has been removed is grounded with a prescribed input impedance by the first resistor 202 and supplied to the saturation amplifier 206 by the first CMOS inverter 205 having the second input capacitor 203 and the second resistor 204. Is done. The saturation amplifier 206 saturates and amplifies the high frequency component of the input digital signal using the threshold voltage of the first CMOS inverter 205 as a reference voltage. Therefore, the output signal of the saturation amplifier 206 is amplified to the upper and lower saturation voltages with respect to the threshold voltage of the first CMOS inverter 205 as a reference. If the time constant C2 × (parallel resistance value of R2 and R3) of charging and discharging by the third resistor 208 and the fourth resistor 301 is larger than the frequency cycle of the digital input signal, the third capacitor 207 Is charged via the third resistor 208 and the fourth resistor 301 according to the resistance voltage dividing ratio of the average voltage of the output voltage of the saturation amplifier 206 by the first CMOS inverter 205.

Therefore, a voltage obtained by subtracting the voltage charged in the third capacitor 207 from the output of the saturation amplifier 206 by the first CMOS inverter 205 is applied to the waveform shaper by the second CMOS inverter 210. In this case, since the output of the saturation amplifier 206 by the first CMOS inverter 205 is sufficiently saturated, the output of the waveform shaper by the second CMOS inverter 210 is the inversion of the saturation amplifier 206 by the first CMOS inverter 205. Same as output.

If there is no input to the digital signal input device, the output of the saturation amplifier 206 by the first CMOS inverter 205 is fixed to the threshold voltage of the first CMOS inverter 205. In that case, the charging voltage of the third capacitor 2 07, a third resistor 208 via a fourth resistor 301, the voltage corresponding to the resistance division ratio of the threshold voltage of the first CMOS inverter 205 Change gradually. Usually, the threshold voltage of the CMOS inverter can be considered to be approximately the center of the output voltage, so that the voltage held in the third capacitor 207 is almost equal when there is a signal and when there is no signal.

Usually, the first CMOS inverter 205 and the second CMOS inverter 210 are made on the same semiconductor slice and sealed in the same package, so that the first CMOS inverter 205 and the second CMOS inverter 210 are the same. The threshold voltages are almost equal. In this case, the input voltage of the second CMOS inverter 210 is certainly lower than the threshold voltage by the voltage held in the third capacitor 207 , so that the output voltage is reliably secured at the H level. become.

In the first embodiment, the internal protection diode of the second CMOS inverter is used for discharging the third capacitor 207. However, when the CMOS inverter has no internal protection diode or when the internal protection diode cannot be used, The same effect can be obtained by providing a new diode outside. In this case, the use of different devices forward voltage of the diode, it is possible to vary the voltage held in the third capacitor 207.

  The present invention relates to a device for inputting a digital signal, and more particularly to a digital signal input device using a waveform shaping circuit in which an offset voltage is provided at the input. The operation of the CMOS is stable and connected to a subsequent stage. It is possible to provide a digital signal input device that realizes stable operation of an LSI. For this reason, the present invention can be applied to an audio reproduction device constituted by such a digital signal input device.

100 music playback device 101 digital signal input device 102 LSI
103 DA converter 104 amplifier 105 speaker 201 first input capacitor 202 first resistor 203 a second capacitor 204 and the second resistor 205 first CMOS inverter 206 saturation amplifier 207 third capacitor 208 third resistor 209 diode 210 Second CMOS inverter 301 Fourth resistor

Claims (3)

A first inverter over,
A capacitor connected to one terminal to the output of the first inverter over,
A second inverter serving as the other terminal input of the capacitor;
A resistor connected between the input terminal and the ground of the second inverter over,
The cathode to the input terminal of the second inverter chromatography, and a diode connected to the anode to ground,
If there is an input signal to the first inverter, the input signal is amplified and output from the second inverter;
When there is no input signal to the first inverter, the output of the second inverter is fixed to a predetermined value.
A digital signal transmission device. The diode, a digital signal transmitting apparatus according to claim 1, characterized in that said second inverter over a protective diode that is configured on the same chip. A first inverter over,
A capacitor connected to one terminal to the output of the first inverter over,
A second inverter over to the other terminal input of said capacitor,
A resistor connected in parallel with the capacitor;
With connected resistors and between the input terminal and the ground of the second inverter over,
If there is an input signal to the first inverter, the input signal is amplified and output from the second inverter;
When there is no input signal to the first inverter, the output of the second inverter is fixed to a predetermined value.
A digital signal transmission device.

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