JP5111132B2 - Wiring board manufacturing method - Google Patents

Description

  The present invention relates to a method of manufacturing a wiring board used in electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices, and peripheral devices.

  Conventionally, wiring boards capable of mounting semiconductor elements such as IC (Integrated Circuit) or LSI (Large Scale Integration) are known.

  In recent years, a wiring board in which a plurality of insulating layers and conductive layers are alternately stacked has been developed for the purpose of reducing the size and weight of electronic components. In such a wiring board, conductive layers having different vertical positions are directly connected via via conductors. And electricity flows between conductive layers with different vertical positions.

As a method of forming a via conductor, there is a method of preparing a printed circuit board having a through hole on a copper foil, and forming a via conductor from the copper foil side in the through hole while observing the plating conditions using an electroplating method. It is disclosed (see Patent Document 1 below).
JP 2001-177238 A

  However, although the technique described in Patent Document 1 described above can adjust the deposition state of the via conductor, it is difficult to form the via conductor in a short time.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a method for manufacturing a wiring board capable of forming via conductors in a short time.

In order to solve the above problems, a method for manufacturing a wiring board according to the present invention includes a step of preparing a film layer having a metal layer on an upper surface, and a step of bonding the lower surface of the film layer to a conductive plate via an adhesive layer. A step of forming a through-hole penetrating both the film layer and the adhesive layer; and applying a current to the conductive plate to fill the through-hole in the through-hole and to contact a part of the metal layer forming a conductor, and comprising the a step you forming a conductive layer on the metal layer by flowing electricity to the metal layer continues.

A method of manufacturing a wiring board of the present invention, the the adhesive layer by containing an inorganic filler, wherein the through-hole The rewritable formed by Rukoto be irradiated with a laser beam, wherein the through hole of the inorganic filler one parts to expose characterized Rukoto.

Moreover, the manufacturing method of the wiring board of this invention coat | covers a part of said inorganic filler exposed from the said through-hole with the said via conductor.

A method of manufacturing a wiring board of the present invention, the through hole is characterized that you and narrow toward from the metal layer side to the adhesive layer side.

  In addition, the method for manufacturing a wiring board according to the present invention includes a step of separating the adhesive layer and the conductive plate.

A method of manufacturing a wiring board of the present invention, the conductive plate, characterized by using one made of stainless steel.

Further, the method of the wiring substrate manufacturing the present invention, the film layer is characterized by the use of made of polyparaphenylene benzobisoxazole resin.

  The present invention can provide a method of manufacturing a wiring board capable of forming via conductors in a short time.

  Hereinafter, a mounting structure including a wiring board according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view of a mounting structure including a wiring board according to an embodiment of the present invention. FIG. 2 is an enlarged view of a portion X1 in FIG. 1 and a sectional view of the via conductor.

  A mounting structure 1 according to the present embodiment includes a wiring board 2 and a semiconductor element 4 such as an IC or LSI that is flip-chip mounted on the wiring board 2 via bumps 3 such as solder. Yes.

  The wiring board 2 is configured by alternately laminating a plurality of conductive layers 5 and insulating layers 6. The conductive layer 5 has a function as a signal line for transmitting a predetermined electric signal and a function as a ground layer for setting the semiconductor element 4 to a common potential, for example, an earth potential. The conductive layer 5 is made of a metal material such as copper, silver, gold, aluminum, nickel, or chromium, for example.

  The insulating layer 6 is configured by alternately laminating a plurality of adhesive layers 6a and film layers 6b. The adhesive layer 6a is made of a thermosetting resin or a thermoplastic resin. As such a thermosetting resin, for example, at least one of polyimide resin, acrylic resin, epoxy resin, urethane resin, cyanate resin, silicon resin, and bismaleimide triazine resin can be used. As the thermoplastic resin, since it is necessary to have heat resistance that can withstand heating during solder reflow, it is desirable that the softening temperature of the constituent material is 200 ° C. or higher, and for example, a liquid crystal polymer or the like can be used. . The thermal expansion coefficient of the adhesive layer 6a is, for example, 15 ppm / ° C. or more and 80 ppm / ° C. or less. The adhesive layer 6a is set so that the thickness after drying is, for example, 1 μm or more and 15 μm or less.

  The adhesive layer 6a may contain a large number of fillers 7. By including the filler 7 in the adhesive layer 6a, the viscosity of the adhesive layer 6a before curing can be adjusted, and the adhesive layer 6a can be formed by bringing the thickness dimension of the adhesive layer 6a close to a desired value. it can. The filler 7 is spherical, and the diameter of the filler 7 is set to, for example, 0.05 μm or more and 6 μm or less, and the thermal expansion coefficient is, for example, −5 ppm / ° C. or more and 5 ppm / ° C. or less. The filler 7 is made of, for example, silicon oxide, silicon carbide, aluminum oxide, aluminum nitride, or aluminum hydroxide.

  The film layer 6b is bonded to the conductive layer 5 via an adhesive that becomes the adhesive layer 6a. For example, the film layer 6b is heated and pressurized using a heating press device, and then cooled, and then cooled. Is laminated.

  The thickness of the film layer 6b is precisely controlled in order to ensure the flatness of the wiring board 2. The film layer 6b is desirably a material that can be elastically deformed and has excellent heat resistance and hardness. As the film layer 6b having such characteristics, for example, polyparaphenylene benzbisoxazole resin, wholly aromatic polyamide resin, wholly aromatic polyester resin or liquid crystal polymer resin, or a mixture of these resins can be used. . The liquid crystal polymer refers to a polymer having a property of being in a liquid crystal state or optically birefringent at the time of melting, generally a lyotropic liquid crystal polymer exhibiting liquid crystallinity in a solution state, a thermotropic liquid crystal polymer exhibiting liquid crystallinity at the time of melting, or heat. This includes all liquid crystal polymers of type 1, type 2 and type 3 classified by deformation temperature.

  In particular, it is desirable to use a resin containing a polyparaphenylene benzbisoxazole resin or a resin film containing a polyparaphenylene benzbisoxazole resin. The polyparaphenylene benzbisoxazole resin has a low coefficient of thermal expansion of −5 ppm / ° C. to 5 ppm / ° C. By using such a low thermal expansion resin, the thermal expansion of the substrate itself on which the semiconductor element 4 is mounted can be suppressed. As a result, the coefficient of thermal expansion of the semiconductor element 4 can be approached, and the semiconductor element 4 can be effectively prevented from being destroyed. In addition, a thermal expansion coefficient applies to JISK7197.

  In addition, since a resin film containing a polyparaphenylene benzbisoxazole resin or a resin film containing a polyparaphenylene benzbisoxazole resin has a lower water absorption rate than a polyimide film, even when it is laminated, moisture is contained in the inner layer. Since it is difficult to accumulate, it is not necessary to perform a process of removing moisture even in a state of being stored in the atmosphere for a long time, and the manufacturing process can be simplified.

  Further, the thickness of the film layer 6b is set to be, for example, 2 μm or more and 20 μm or less, and is formed so that the difference in thickness from the adhesive layer 6a is 7 μm or less. Here, the difference in thickness between the film layer 6b and the adhesive layer 6a is the difference between the thicknesses after the adhesive layer 6a is dried. The thickness of the film layer 6b is set to be larger than the thickness of the adhesive layer 6a.

  As shown in FIG. 2, a through hole P is formed in the insulating layer 6, and a via conductor 8 that is widened from the upper part to the lower part is embedded in the through hole P. The via conductor 8 can electrically connect the conductive layers 5 having different vertical positions. By disposing the via conductors 8 directly below and directly below, the distance of the routed wiring can be shortened, and the wiring board 2 can be reduced in size. In addition, by shortening the distance of the wiring, the wiring resistance can be suppressed to a small value, which can contribute to reduction of power consumption. The via conductor 8 is made of a conductive material such as copper, silver, gold, platinum, aluminum, nickel, or chromium, for example.

  A concave portion D is formed in the via conductor 8, and a part of the filler 7 protruding from the adhesive layer 6 a is embedded in the concave portion D. That is, a part of the filler 7 protrudes from the inner wall surface of the through hole P, and the surface where the adhesive layer 6a and the via conductor 8 are in contact is formed in an uneven shape. Further, by forming a part of the via conductor 8 so as to cover a part of the filler 7, the contact area between the filler 7 and the via conductor 8 can be increased, and the adhesive force between them can be increased. The peeling between the via conductor 8 and the adhesive layer 6a can be suppressed. That is, the via conductor 8 can be prevented from peeling from the inner wall surface of the through hole P due to the anchor effect of a part of the filler 7 with respect to the inner wall surface of the through hole P.

  FIG. 3 is an enlarged view of a portion X2 in FIG. 2, and is a cross-sectional view of a part of the via conductor. As shown in FIG. 3, a metal layer 9 is formed on the surface of the film layer 6b and inside the adhesive layer 6a. The metal layer 9 includes a metal film 10 and a protective layer 11.

  The metal film 10 is directly formed on the surface of the film layer 6b. The metal film 10 has good adhesion to the film layer 6b and is made of a conductive material. The metal film 10 is formed on the surface of the film layer 6b by sputtering, and is made of a conductive material such as nickel, chromium, titanium, molybdenum, tungsten, or zirconium. The thickness of the metal film 10 is set to 0.5 μm or less, for example.

  Further, the protective layer 11 is formed directly on the surface of the metal film 10. The protective layer 11 is superior in mechanical strength to the metal film 10 and the conductive layer 5. The protective layer 11 is made of a material constituting the metal film 10 and a material constituting the conductive layer 5. For example, when the metal film 10 is nickel and the conductive layer 5 is copper, the protective layer 11 is an alloy of nickel and copper. In addition, since the film layer 6b and the conductive layer 5 have different coefficients of thermal expansion, cracks may propagate from the film layer 6b toward the metal film 10, but the protective layer 11 is an alloy layer and thus has mechanical strength. Is excellent, it is possible to stop the propagation of cracks from the film layer 6 b toward the metal film 10, and to suppress the generation of cracks in the via conductor 8. In addition, the thickness of the protective layer 11 formed on one main surface of the metal film 10 is set to, for example, 5.0 nm or more and 2.0 μm or less.

  Furthermore, a part of the via conductor 8 extends to the surface of the protective layer 11. Since the protective layer 11 has excellent mechanical strength, the via conductor 8 formed on the protective layer 11 is not easily affected by thermal expansion / contraction of the wiring board 2 and cracks are not easily propagated. As a result, the electrical conductivity of the via conductor 8 formed on the film layer 6b can be favorably maintained.

  For the semiconductor element 4, a material approximate to the thermal expansion coefficient of the insulating layer 6 is used. For example, silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or silicon carbide can be used. In addition, the thickness dimension of the semiconductor element 4 can use the thing of 0.1 mm to 1 mm, for example.

  As described above, according to the present embodiment, the metal layer 9 has excellent adhesion with the film layer 6b and also has good adhesion with the via conductor 8, so that the conductive layer 5 is peeled from the film layer 6b. Can be suppressed. Further, the propagation of cracks from the insulating layer 6 toward the via conductor 8 can be effectively suppressed by the protective layer 11 having excellent mechanical strength.

  Next, a method for manufacturing the mounting structure 1 described above will be described with reference to FIGS.

  First, a film layer 6b having a metal layer 9 on the upper surface is prepared. As the film layer 6b, for example, a sheet made of polyparaphenylene benzbisoxazole resin is used. The thickness of the film layer 6b is set to, for example, 1 μm or more and 25 μm or less.

  Then, the metal layer 9 is deposited on the film layer 6b by using a conventionally known sputtering method. Since the deposition of the metal layer 9 on the film enables a roll-to-roll process, a batch in which the metal layer 9 is deposited using a sputtering method with the film deposited on the substrate. Compared with processing, the time required for mounting and removal can be greatly reduced, and productivity can be improved. The metal layer 9 includes a metal film 10 and a protective layer 11. The metal film 10 is made of, for example, nickel, chromium, or an alloy thereof, and the protective layer 11 is made of, for example, copper. The thickness of the metal layer 9 is set to 2 μm or more and 15 μm or less, for example.

  Next, a conductive plate 12 capable of flowing electricity is prepared. The conductive plate 12 is made of, for example, an iron-based alloy such as stainless steel, a nickel-based alloy such as Inconel, or a cobalt alloy, and has a size that allows the film layer 6b to be bonded together. The surface of the conductive plate 12 is preferably flat and mirror-finished. The conductive plate 12 may be hard plated with chromium or the like. Then, as shown in FIG. 4A, the film layer 6b is bonded to the conductive plate 12 via the adhesive layer 6a by a conventionally known die coating method or the like. The adhesive layer 6a is made of, for example, an epoxy-based resin, a cyanate-based resin, a bismaleimide triazine-based resin, an imide-based resin, or the like, and a mixture thereof, and may include the filler 7. By adjusting the content of the filler 7, the thickness of the adhesive layer 6a can be adjusted. The filler 7 is made of, for example, silicon oxide, amorphous silica, aluminum oxide, aluminum hydroxide, calcium hydroxide or the like.

Then, as shown in FIG. 4B, for example, a YAG laser device or a CO ₂ laser device is used to irradiate the metal layer 9 with laser light and penetrate through the metal layer 9 to the adhesive layer 6a. P is formed. The through hole P is formed by exposing a part of the conductive plate 12 by irradiating laser light from a direction perpendicular to the metal layer 9. By irradiating the laser beam, a part of the filler 7 contained in the adhesive layer 6a is exposed from the inner wall surface of the through hole P. In addition, content of the filler 7 is adjusted so that the filler 7 may be exposed from the through-hole P by irradiating the adhesive layer 6a with laser light.

    Next, as shown in FIG. 4C, via conductors 8 are formed in the through holes P using an electroplating method. Specifically, a substrate on which the through hole P is formed is provided in the electroplating solution, and electricity is passed through the conductive plate 12 to deposit the plating from the conductive plate 12 exposed at the bottom of the through hole P. Then, the plating grows from the conductive plate 12 side and covers the filler 7 exposed from the inner wall surface of the through hole P. Further, the through hole P is filled by plating, and the plating is grown until it contacts a part of the metal layer 9. When the plating fills the through hole P and comes into contact with a part of the metal layer 9, the plating on the metal layer 9 is started. Similarly, the via conductor 8 is also plated on the metal layer 9 to bond the via conductor 8 and the metal layer 9 together. As a result, plating can be deposited on the through hole P and the metal layer 9. The plating deposited on the metal layer 9 constitutes a part of the conductive layer 5 and a part of the via conductor 8. Thus, by forming the metal layer 9 in advance, plating can be deposited on the metal layer 9 in addition to the plating deposited from the conductive plate 12 side. The surface layer conductor can be formed in one step, and can be formed in a shorter time than conventional.

  In addition, the via conductor 8 formed by electroplating has a higher density of molecules constituting the via conductor than a via conductor formed by electroless plating, and is less likely to crack due to heat from the outside. . Moreover, according to the electroplating method, since the plating which comprises a part of via conductor 8 grows from the inner wall face and bottom face of the through-hole P, it is easy to fill the through-hole P with plating.

  Next, as shown in FIG. 5A, a resist R is applied on the plating formed on the film layer 6b, and the resist R is patterned using a conventionally known thin film processing technique. Then, as shown in FIG. 5B, without exposing the resist R, the exposed plating is etched using an etchant mainly composed of an aqueous solution of ferric chloride, copper chloride, etc. Can be patterned. Further, as shown in FIG. 5C, the resist R that is still deposited on the conductive layer 5 is removed using a sodium hydroxide aqueous solution or the like.

  Then, as shown in FIG. 6A, an insulator 6x is newly prepared by depositing a metal layer 9 on the film layer 6b and applying an adhesive 6ax to the lower surface of the film layer 6b. The insulator 6x has the same configuration as that of the insulating layer 6 described above. Then, as shown in FIG. 6B, the insulator 6x is bonded onto the conductive layer 5 and further hot pressed to cure the adhesive 6ax and fix the film layer 6b onto the conductive layer 5. be able to.

  Next, using the above-described method, a through hole P is formed in the insulating layer 6 located immediately above the via conductor 8 as shown in FIG. The through hole P is formed so that a part of the conductive layer 5 is exposed, and a part of the filler 7 is exposed from the inner wall surface of the through hole P.

  Then, as shown in FIG. 7B, a via conductor 8 is formed in the through hole P by providing a substrate in which the through hole P is formed in the electroplating solution and allowing electricity to flow through the conductive plate 12. In the via conductor 8, the plating deposited from the bottom of the through-hole P grows to fill the through-hole P, and the grown plating extends to the metal layer 9. Electricity flows up to 9, and plating is deposited on the metal layer 9.

  Next, as shown in FIG. 8A, the resist R is patterned on the plating formed on the film layer 6b by using a well-known thin film processing technique such as a photoresist technique using a photosensitive resin. To do. Then, as shown in FIG. 8B, without exposing the resist R, the exposed plating is etched using an etching solution such as an etching solution mainly composed of an aqueous solution of ferric chloride, copper chloride or the like. The conductive layer 5 can be patterned. Further, as shown in FIG. 9A, the resist R remaining on the via conductor 8 and the conductive layer 5 is removed using a sodium hydroxide aqueous solution or the like.

  Further, by repeating the above-described laminating step of the insulating layer 6 and the conductive layer 5 using the above-described method, a multilayer wiring substrate 2 can be manufactured as shown in FIG. 9B.

Next, as shown in FIG. 10, the conductive plate 12 is peeled off from the adhesive layer 6a, and a coreless substrate that does not have a core substrate having a function as a base having excellent rigidity can be manufactured. And
Then, the mounting structure 1 shown in FIG. 1 can be manufactured by flip-chip mounting the semiconductor element 4 on the wiring board 2 via the bumps 3. The semiconductor element 4 is provided on the surface of the adhesive layer 6a to which the conductive plate 12 is bonded. Since the surface of the adhesive layer 6a to which the conductive plate 12 is bonded is formed flat on the surface of the conductive plate 12, the inclination of the semiconductor element 4 with respect to the surface of the wiring board 2 can be reduced. The distance from the wiring board 2 can be kept short.

  As described above, according to the method of manufacturing a wiring board according to the embodiment of the present invention, since the electroplating can be performed using the metal layer 9, the via conductor 8 can be formed in a short time.

  In addition, this invention is not limited to the above-mentioned form, A various change, improvement, etc. are possible in the range which does not deviate from the summary of this invention. The metal film may be formed by a vapor deposition method. When such a vapor deposition method is used, the metal film can be formed on the film layer 6b using a roll-to-roll continuous vacuum vapor deposition apparatus.

  The above-described embodiments of the present invention have described the manufacturing method using the subtractive method. Manufacturing using a semi-additive process is also possible. In this case, after FIG. 4B, a photosensitive resist is formed on the surface of the metal layer 9 and exposed using a mask. After development, when electroplating is performed in the same manner as in FIG. 4C, the plating grows from the through hole P and fills the through hole P. Further, when the plating grows and comes into contact with a part of the metal layer 9, the deposition of the plating on the metal layer 9 is started, and the plating grows in a portion where the resist is not formed. When the plating has grown to a desired thickness, the substrate is taken out, the resist is removed, and the metal layer 9 is removed by etching, whereby a wiring similar to that shown in FIG. 5C can be formed. Since this method can reduce the electroless plating process and the catalyst application process accompanying the electroless plating process as compared with the normal semi-additive process, the process can be greatly reduced and the manufacturing period can be shortened. In addition, the semi-additive method is more suitable for forming fine wiring because the control of the cross-sectional shape of the wiring is easier than when the subtractive method is used.

It is sectional drawing of the mounting structure containing the wiring board which concerns on embodiment of this invention. It is an expanded sectional view of a via conductor concerning an embodiment of the present invention. It is a partial expanded sectional view of a via conductor concerning an embodiment of the present invention. FIG. 4A, FIG. 4B, and FIG. 4C are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIG. 5A, FIG. 5B, and FIG. 5C are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. 6A and 6B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIGS. 7A and 7B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIGS. 8A and 8B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIG. 9A and FIG. 9B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention. FIGS. 10A and 10B are cross-sectional views illustrating a manufacturing process of a mounting structure including a wiring board according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Wiring board 3 Bump 4 Semiconductor element 5 Conductive layer 6 Insulating layer 6a Adhesive layer 6b Film layer 7 Filler 8 Via conductor 9 Metal layer 10 Metal film 11 Protective layer 12 Conductive plate P Through-hole D Concave

Claims (7)

Preparing a film layer having a metal layer on the upper surface;
Bonding the lower surface of the film layer to the conductive plate via an adhesive layer;
Forming a through-hole penetrating both the film layer and the adhesive layer;
Forming a via conductor in contact with a portion of the metal layer with filling the through-hole in the through hole by passing electricity to the conductive plate, on said metal layer by supplying electricity to the metal layer continues a step that to form a conductive layer,
A method of manufacturing a wiring board, comprising: In the manufacturing method of the wiring board of Claim 1,
Wherein the adhesive layer is an inorganic filler,
The through hole is The rewritable formed by Rukoto be irradiated with laser light, a manufacturing method of a wiring substrate characterized by Rukoto exposes a portion of the inorganic filler from the through hole. In the manufacturing method of the wiring board of Claim 2,
Wherein the via conductor, the manufacturing method of a wiring board, which comprises coating a portion of the inorganic filler exposed from the through hole. In the manufacturing method of the wiring board of Claim 1,
The through hole, a manufacturing method of a wiring substrate, characterized that you narrower toward the adhesive layer side from the metal layer side. In the manufacturing method of the wiring board of Claim 1,
A method of manufacturing a wiring board, comprising a step of separating the adhesive layer and the conductive plate. In the manufacturing method of the wiring board of Claim 1,
The conductive plate is method of manufacturing a wiring board, which comprises using one made of stainless steel. In the manufacturing method of the wiring board of Claim 1,
The film layer, the manufacturing method of a wiring board, which comprises using one made of polyparaphenylene benzobisoxazole resin.

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