JP5120614B2 - Semiconductor test equipment - Google Patents

Description

  The present invention relates to a semiconductor test apparatus, and more particularly to reduction of the overhead of the semiconductor test apparatus by performing automatic calibration on the semiconductor test apparatus in a semiconductor mass production site.

  In the semiconductor test apparatus, in order to maintain the measurement accuracy of the test execution unit for the semiconductor to be measured (hereinafter referred to as DUT), the test execution unit is automatically calibrated at a predetermined period to guarantee a stable measurement operation, Automatic calibration is also performed when the temperature change inside the test execution unit exceeds a certain value.

  By the way, although such automatic calibration of the test execution unit is indispensable for maintaining the measurement accuracy of the semiconductor test apparatus, from the standpoint of managing the operation rate of the semiconductor test apparatus in the semiconductor mass production site, FIG. As shown in Fig. 2, the ongoing mass production test is interrupted and automatic calibration is performed, resulting in overhead.

  Further, as other overhead factors of the semiconductor test apparatus in the semiconductor mass production site, as shown in FIG. 7, there are exchange of wafers and lots which are DUTs for which testing has been completed.

  Patent Document 1 describes the configuration of a calibration apparatus in a semiconductor test apparatus.

JP 2002-107438 A

  As a result, as shown in FIG. 8, the overhead time of the semiconductor test apparatus in the semiconductor mass production site is the sum of the calibration time, the wafer exchange time, and the lot exchange time, and the overhead occupying the actual operation time of the semiconductor test apparatus. The ratio of time becomes relatively high, which becomes an impediment to lowering the operating rate for testing the DUT with respect to the operating time of the semiconductor test apparatus.

  The present invention solves such a problem, and an object of the present invention is to realize a semiconductor test apparatus capable of improving the operating rate for performing the DUT test by reducing the overhead time ratio caused by the automatic calibration. There is.

In order to achieve such a problem, the invention according to claim 1 of the present invention is:
In a semiconductor test device that automatically calibrates the test execution unit at a predetermined cycle that guarantees stable measurement operation,
The automatic calibration is performed in parallel with overhead factors other than automatic calibration, and the measurement blocks constituting the test execution unit are divided into a plurality of groups according to functions that require periodic calibration, and the measurement accuracy is improved by the previous calibration. The transition of guaranteed calibration effective time is managed for each group, and automatic calibration is executed for the corresponding group whose remaining calibration effective time has reached the specified time, and the remaining calibration effective time is reset. And

According to a second aspect of the invention, in the semiconductor testing device according to claim 1, as an overhead factor other than the automatic calibration, characterized by utilizing the wafer exchange time and lot exchange time in mass production testing.

According to a third aspect of the invention, in the semiconductor testing device according to claim 2, wherein the classified by items in accordance with the time required to perform the automatic calibration for each group, auto calibration items that can be executed within the time required for the wafer exchange And automatic calibration items that require time required for lot change are assigned.

According to a fourth aspect of the present invention, in the semiconductor test apparatus according to any one of the first to third aspects, the automatic calibration is a calibration effective for managing a remaining time of the calibration effective time of the measurement block in the test execution unit. Time management means, test execution part temperature management means for managing the temperature transition of the test execution part, and automatic calibration execution means for executing automatic calibration based on output signals of these calibration effective time management means and test execution part temperature management means It is controlled by the automatic calibration control part containing.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor test apparatus which can improve the operation rate for performing the test of DUT by reducing the ratio of the overhead time resulting from automatic calibration is realizable.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, a test system control unit 1 comprehensively controls the operation of the entire semiconductor test apparatus. The test execution unit 2 executes a mass production test on the DUT 3 based on the control of the test system control unit 1 and outputs a wafer test completion signal to the automatic calibration control unit 4 when the test in wafer units is completed. When the test is completed, a lot test completion signal is output to the automatic calibration control unit 4. The automatic calibration control unit 4 controls automatic calibration for the test execution unit 2 via the test system control unit 1, and includes a calibration effective time management unit 41, a test execution unit temperature management unit 42, and an automatic calibration execution unit 43. The operation flag management unit 44 and the like. The test system control unit 1, the test execution unit 2, and the automatic calibration control unit 4 are connected via a bus.

  The calibration effective time management unit 41 divides measurement blocks that require periodic calibration, such as a signal generation unit and a signal measurement unit that constitute the test execution unit 2, into a plurality of functional groups, and performs measurement accuracy by the previous calibration. The transition of the calibration effective time that guarantees this is managed for each group. When the remaining calibration effective time reaches a predetermined time, automatic calibration is executed for the corresponding group via the automatic calibration execution unit 43, and the remaining time is reset.

  The test execution unit temperature management unit 42 manages the transition of the internal temperature for each group managed by the calibration effective time management unit 41. When the temperature change exceeds a predetermined range from the temperature at the time of previous calibration, automatic calibration is executed for the group via the automatic calibration execution unit 43, and the remaining time of the calibration effective time management unit 41 and the measured temperature are Perform resetting.

The automatic calibration execution unit 43 executes predetermined automatic calibration for a predetermined group requiring automatic calibration based on the output signals of the calibration effective time management unit 41 and the test execution unit temperature management unit 42. Automatic calibration items that can be executed within the time required for wafer replacement based on the wafer test completion signal and lot test completion signal input from the test execution unit 2 according to the time required for execution of automatic calibration for the group. And assign automatic calibration items that require time to change lots.

  The operation flag management unit 44 turns on the flag to determine whether the output signal states of the calibration effective time management unit 41 and the test execution unit temperature management unit 42 are abnormal for each group or for any one of the groups. / Manage off. In addition to the time and temperature, whether the startup operation is performed can be managed by turning on / off the flag.

  FIG. 2 is a timing chart for explaining the overall operation flow in the block diagram of FIG. That is, in the mass production test for the DUT wafer, the wafer is replaced when the test for each wafer is completed, and the lot is replaced when the test for each lot is completed. Therefore, in the present invention, automatic calibration is performed in units of groups based on the calibration effective time using these wafer exchange time and lot exchange time.

  Thus, as shown in the timing chart of FIG. 3, the calibration time in the conventional one-day actual operation time shown in (A) is the wafer exchange time and lot in the one-day actual operation time of the present invention shown in (B). As a result, the mass production test time can be extended by the calibration time that was conventionally required, and the operating rate for testing the DUT can be improved by this time extension.

  FIG. 4 is an explanatory diagram of a specific operation example, and shows a case where automatic calibration is performed using the wafer exchange time. Here, the time required for a single wafer test is 2 hours, and the measurement blocks that require periodic calibration constituting the test execution unit 2 are divided into five groups A to E according to functions, and calibration of each group is performed. The calibration period is determined in units of 4 hours with a maximum valid time of 60 hours. When the temperature inside the test execution unit 2 changes by ± 3 ° C from the temperature at the previous calibration, Group A, B, and D are calibrated again. When the temperature changes by ± 6 ° C, all groups should be recalibrated.

  First, at time T0, calibration (full calibration) is performed on all groups A to E at start-up, so that the calibration effective time expires with a time difference of 4 hours, for example, group A is 44 hours, group B is 48 hours, The calibration effective time management unit 41 sets 52 hours for group C, 56 hours for group D, and 60 hours for group E. Further, 24 ° C. is set in the test execution unit temperature management unit 42 as the temperature at the time of calibration of each of the groups A to E.

  Note the elapsed time of group A from time T0 when full calibration is performed. Assuming that 44 hours have passed from time T0 at time T1 when a certain wafer test is completed, the automatic calibration execution unit 43 performs automatic calibration of group A using the wafer exchange time at that time, and sets the temperature of group A. taking measurement. The calibration effective time of the group A managed by the calibration effective time management unit 41 is updated and set to 60 hours, and the temperature at the time of calibration of the group A managed by the test execution unit temperature management unit 42 is set to the current temperature, for example, Update to 23 ° C. The remaining calibration effective time of the other group at time T1 is 44 hours, so that group B is 4 hours, group C is 8 hours, group D is 12 hours, and group E is 16 hours.

  Since almost 4 hours have passed since time T2 when the two wafer tests were completed from time T1 when automatic calibration of group A was performed, the automatic calibration execution unit 43 uses the wafer exchange time at that time to Perform automatic calibration and measure Group B temperature. The calibration effective time of the group B managed by the calibration effective time management unit 41 is updated and set to 60 hours, and the temperature at the time of calibration of the group B managed by the test execution unit temperature management unit 42 is set to the current temperature, for example, Update to 23 ° C. Since the remaining calibration effective time of the other group at time T2 has passed 4 hours from time T1, group A is 56 hours, group C is 4 hours, group D is 8 hours, and group E is 12 hours. become.

  Similarly, the automatic calibration execution unit 43 repeats automatic calibration based on the passage of time in order of group C → group D → group E → group A → group B →. Update setting and temperature measurement update at that time.

  Next, automatic calibration based on a temperature change of ± 3 ° C. will be described. It is assumed that the temperatures of the groups A, B, and D become 25 ° C. at a time T11 during a wafer test in which 8 hours have elapsed from the time T10. The automatic calibration execution unit 43 interrupts the wafer test being executed and sequentially executes the automatic calibration of the groups A, B, and D, and resumes the wafer test when these automatic calibrations are completed.

  In the update setting of the calibration effective time of the automatic calibration based on the temperature change, the latest calibration group D is set to 60 hours at the maximum, the previous calibration group B is set to 56 hours, and the first calibration group A is set to 52 hours. If the time overlaps, the calibration valid time of the older group is reset. In the example of FIG. 4, the groups A and E overlap in 52 hours, but the older group E is updated and set to 48 hours.

  In FIG. 4, the case where the temperatures of the groups A, B, and D are 25 ° C. has been described. It is assumed that the update setting is performed.

  In addition, when the card replacement of the test execution unit 2 occurs, the calibration effective time is not updated.

  FIG. 5 is also an explanatory diagram of a specific operation example, and shows a case where automatic calibration is performed using the lot exchange time. Here, the time required to test one lot is approximately 8 hours, and the test execution unit 2 divides the measurement blocks that require periodic calibration into five groups A to E according to functions, as in FIG. The calibration valid period of each group is set to 60 hours at maximum, and the automatic calibration cycle is determined in units of 4 hours. When the temperature inside the test execution unit 2 changes by ± 3 ° C. from the temperature at the previous calibration, about groups A, B and D Calibrate again, and if it changes ± 6 ° C, calibrate again for all groups.

  First, at time T0, calibration (full calibration) is performed on all groups A to E at start-up in the same manner as in FIG. 4, and the effective calibration time expires with a time difference of 4 hours. B is set to 48 hours, group C is set to 52 hours, group D is set to 56 hours, and group E is set to 60 hours in the calibration effective time management unit 41. Further, 24 ° C. is set in the test execution unit temperature management unit 42 as the temperature at the time of calibration of each of the groups A to E.

  Assuming that the lot test is completed at time T1, when approximately 52 hours have elapsed from the time T0 at which full calibration was performed, the automatic calibration execution unit 43 uses the lot exchange time at that time to automatically perform group A, B, and C automatic operations. Calibrate and measure the temperature of each group A, B, C. The calibration effective time of the group A managed by the calibration effective time management unit 41 is updated to 52 hours, the calibration effective time of the group B is updated to 56 hours, and the calibration effective time of the group C is updated to 60 hours. The temperature at the time of calibration of the groups A, B, and C managed by the management unit 42 is updated and set to the current temperature, for example, 23 ° C. The remaining calibration valid time of the other group at time T1 is 4 hours for group D and 8 hours for group E.

  Assuming that the lot test that has continued for about 60 hours from time T0 and about 8 hours from time T1 has been completed, the automatic calibration execution unit 43 uses the lot exchange time at that time to automatically Perform calibration and measure the temperature of each group D and E. The calibration effective time of the group D managed by the calibration effective time management unit 41 is updated to 56 hours, the calibration effective time of the group E is updated to 60 hours, and each group managed by the test execution unit temperature management unit 42 is set. The temperature at the time of calibration of D and E is updated to the current temperature, for example, 22 ° C. The remaining calibration effective time of the other group at time T2 is 44 hours for group A, 48 hours for group B, and 52 hours for group C because 8 hours have elapsed since time T1.

  Assuming that another lot test has been completed at time T3 when approximately 48 hours have elapsed from time T2, the automatic calibration execution unit 43 performs automatic calibration of groups A and B using the lot exchange time at that time and each group. Measure the temperatures of A and B. The calibration effective time of the group A managed by the calibration effective time management unit 41 is updated to 56 hours and the calibration effective time of the group B is updated to 60 hours, and each group managed by the test execution unit temperature management unit 42 is set. The temperature at the time of calibration of A and B is updated to the current temperature, for example, 22 ° C. Since the remaining calibration effective time of other groups at time T3 has passed 48 hours from time T2, group C is 4 hours, group D is 8 hours, and group E is 12 hours.

  Assuming that the lot test continued at time T4 when almost 12 hours have elapsed from time T3, the automatic calibration execution unit 43 performs automatic calibration of groups C, D, and E using the lot exchange time at that time and Measure group C, D and E temperatures. The calibration effective time of the group C managed by the calibration effective time management unit 41 is updated to 52 hours, the calibration effective time of the group D is updated to 56 hours, and the calibration effective time of the group E is updated to 60 hours. The temperature at the time of calibration of each group C, D, E managed by the management unit 42 is updated to the current temperature, for example, 24 ° C. The remaining calibration effective times of the other groups A and B at time T4 are 44 hours for group A and 48 hours for group B because 12 hours have elapsed since time T3.

  Next, automatic calibration based on a temperature change of ± 3 ° C. will be described. Assume that the temperature of groups A, B, and D reaches 25 ° C. during a lot test. The automatic calibration execution unit 43 interrupts the lot test being executed, sequentially executes the automatic calibration of the groups A, B, and D, and resumes the lot test when these automatic calibrations are completed.

  In the update setting of the calibration effective time of the automatic calibration based on the temperature change, the latest calibration group D is set to the maximum 60 hours, the previous calibration group B is set to 56 hours, and the first calibration group A is set to the same as in FIG. 52 hours. If the time overlaps, the calibration effective time of the older group is reset, and in the example of FIG. 5, the group C is updated to 24 hours and the group E is updated to 32 hours.

  As described above, according to the present invention, it is possible to realize a semiconductor test apparatus capable of improving the operating rate for performing the DUT test by reducing the overhead time ratio resulting from the automatic calibration.

It is a block diagram which shows one Example of this invention. 2 is a timing chart illustrating the overall operation of FIG. 1. It is a timing chart which compares time relations. It is explanatory drawing of the specific operation example using wafer exchange time. It is explanatory drawing of the specific operation example using lot exchange time. It is a timing chart explaining the conventional automatic calibration operation. It is a timing chart explaining the flow of the conventional mass production test. It is a timing chart explaining the conventional overhead.

Explanation of symbols

1 Test System Control Unit 2 Test Execution Unit 3 DUT
4 automatic calibration control unit 41 calibration effective time management unit 42 test execution unit temperature management unit 43 automatic calibration execution unit 44 operation flag management unit

Claims (4)

In a semiconductor test device that automatically calibrates the test execution unit at a predetermined cycle that guarantees stable measurement operation,
The automatic calibration is performed in parallel with overhead factors other than automatic calibration, and the measurement blocks constituting the test execution unit are divided into a plurality of groups according to functions that require periodic calibration, and the measurement accuracy is improved by the previous calibration. The transition of guaranteed calibration effective time is managed for each group, and automatic calibration is executed for the corresponding group whose remaining calibration effective time has reached the specified time, and the remaining calibration effective time is reset. Semiconductor test equipment.   2. The semiconductor test apparatus according to claim 1, wherein a wafer exchange time and a lot exchange time in a mass production test are used as an overhead factor other than the automatic calibration.   The automatic calibration for each group is classified according to the time required for execution, and automatic calibration items that can be executed within the time required for wafer replacement and automatic calibration items that require time for lot replacement are assigned. The semiconductor test apparatus according to claim 2.   The automatic calibration includes calibration effective time management means for managing the remaining calibration effective time of the measurement block in the test execution section, test execution section temperature management means for managing the temperature transition of the test execution section, and calibration effective 4. An automatic calibration control unit including an automatic calibration execution unit that executes automatic calibration based on output signals of a time management unit and a test execution unit temperature management unit, according to any one of claims 1 to 3. The semiconductor test apparatus as described.

Images