JP5151782B2 - Manufacturing method of TFT array substrate - Google Patents

Description

  The present invention relates to a method for manufacturing a TFT array substrate.

  In general, in a flat panel display device, a display medium is formed using an element utilizing liquid crystal, organic EL, electrophoresis, or the like. In such a display medium, a technique using an active drive element constituted by a thin film transistor (TFT) as a drive element has become the mainstream in order to ensure uniformity of screen brightness, screen rewrite speed, and the like.

  Here, the TFT element is usually formed on a glass substrate, mainly a semiconductor thin film such as a-Si (amorphous silicon) or p-Si (polysilicon), or a metal thin film such as a source, drain, or gate electrode on the substrate. Manufactured by sequentially forming. The production of flat panel displays using TFT elements usually requires high-precision photolithography processes in addition to vacuum systems such as CVD and sputtering and thin film formation processes that require high-temperature processing processes. The load of is very large. Furthermore, along with the recent needs for larger display screens, their costs have become enormous.

  In recent years, research and development of organic TFT elements using organic semiconductor materials has been actively promoted as a technique to compensate for the disadvantages of conventional TFT elements (see Patent Document 1, Non-Patent Document 1, etc.).

  On the other hand, in order to improve the aperture ratio of a display, it is effective to form a Pixel on Passivation structure in which an insulating layer is formed on a pixel and a pixel electrode is further provided thereon (see, for example, Patent Document 2).

  Conventionally, in order to achieve such a structure, an insulating layer is first formed on the uppermost layer of a substrate on which a TFT element is formed, and then a photoresist is applied to the entire surface of the insulating layer, and contact holes are formed on the insulating layer. After pattern exposure with a mask patterned into a shape, development is performed to form a resist layer. Next, after providing a contact hole in the insulating layer by dry etching, the photoresist was removed.

  Next, a conductive film is formed by sputtering on the upper layer of the insulating layer provided with the contact hole thus formed and on the side wall of the contact hole. Further, a photoresist is applied onto the conductive film by, for example, spin coating, pattern exposure is performed with a mask patterned in the shape of the pixel electrode, and development, etching, and photoresist removal are performed to form the pixel electrode.

  As described above, in the conventional manufacturing process, it is necessary to repeat the photolithography process, which increases the cost of manufacturing the substrate.

In order to solve such problems, a method is proposed in which an insulating layer is formed on an insulating substrate on which a TFT element is formed, and a photoresist coating process and a resist removing process are omitted when forming a contact hole. Has been. (For example, refer to Patent Document 3).
Japanese Patent Laid-Open No. 10-190001 Advanced Material 2002 2002 No. 2 page 99 (Review) Japanese Patent Laid-Open No. 4-68318 JP-A-10-221712

  However, in Patent Document 3, there is no disclosure regarding the process reduction at the time of forming the pixel electrode layer, and if the conventional method as described above is used for forming the pixel electrode layer, a photolithography process is added, so that the substrate The manufacturing cost cannot be reduced sufficiently.

  The present invention has been made in view of the above problems, and includes a process for manufacturing a TFT array substrate that includes a process for forming a pixel electrode layer, lowers the substrate manufacturing cost, and forms a pixel electrode and a contact hole in a simple process. It is an issue to provide.

1. A TFT array in which an insulating film and a pixel electrode are sequentially formed on a driving element formed on a substrate, and the electrode of the driving element and the pixel electrode are electrically connected by a contact hole provided in the insulating film. In the method for manufacturing a substrate,
Forming an insulating film;
Forming a conductive film on the insulating film;
Patterning the conductive film to form a pixel electrode having an opening;
Forming a contact hole communicating with the opening in the insulating film by an etching method using the pixel electrode provided with the opening as an etching mask;
I have a,
The step of forming the pixel electrode provided with the opening includes:
Applying a photosensitive organic resin material on the conductive film;
Exposing the photosensitive organic resin material to a pattern of a pixel electrode provided with the opening;
Developing the photosensitive organic resin material;
Etching the conductive film using the photosensitive organic resin material remaining on the conductive film as an etching mask;
Consisting of
The insulating film is formed using an organic material in the step of forming the insulating film, and the photosensitive organic resin material remaining on the conductive film is formed in the insulating film in the step of forming the contact hole. A method for manufacturing a TFT array substrate, wherein the TFT array substrate is removed together with the portion .

2 . 2. The method of manufacturing a TFT array substrate according to 1, wherein a conductive material is applied between the electrode, the contact hole, and the pixel electrode.

3 . 3. The method of manufacturing a TFT array substrate according to the item 1 or 2 , wherein after the step of forming the contact hole, a step of applying an insulating material to a portion where the insulating film has been removed is performed.

  According to the present invention, an insulating film is formed on a substrate on which a TFT element is formed, a conductive film is formed on the insulating film, and the conductive film is patterned to provide an opening for a contact hole. Then, a contact hole that communicates with the opening is formed in the insulating film by an etching method using the pixel electrode as an etching mask. In this way, it is possible to omit a photoresist coating process and a resist removing process when patterning the insulating film while using a material that does not deteriorate the semiconductor material of the TFT element for the insulating film.

  Therefore, it is possible to provide a manufacturing method of a TFT array substrate in which the pixel electrode and the contact hole are formed by a simple process without deteriorating the characteristics of the TFT element.

  Hereinafter, the present invention will be described in detail with reference to embodiments, but the present invention is not limited thereto.

  The TFT array substrate of the present invention is used in a matrix type liquid crystal display device or a matrix type organic EL display device, and a display material such as a liquid crystal or an organic EL is sandwiched between a counter substrate and the display material has a pixel. A voltage is selectively applied every time. In the TFT array substrate, TFTs and pixel electrodes are provided in a matrix for each pixel on an insulating substrate made of glass or the like, and signal lines such as gate lines and source lines are provided.

  FIG. 1 is a process diagram for explaining an outline of a manufacturing method of a TFT array substrate according to the present invention, and FIG. 2 is an explanatory diagram for explaining an outline of a manufacturing method of a TFT array substrate according to the present invention. 1 and 2 will be used to explain the steps in FIG. 2 (1-a) to 2 (6-a) are plan views of the substrate 1 as viewed from above, and FIGS. 2 (1-b) to 2 (6-b) show the substrate 1 in FIG. 2. It is sectional drawing cut | disconnected by the cross section AA 'of (1-a)-FIG. 2 (6-a).

  S10: A step of forming a TFT element.

  This is a step of forming a TFT element as a driving element on the substrate 1. As shown in the cross-sectional view of FIG. 2 (1-b), in this embodiment, the gate electrode 2 is provided on the substrate 1, the gate insulating layer 7, the source electrode 8 and the drain electrode 9 are formed, and the semiconductor layer 10 is formed. The provided bottom gate bottom contact type TFT is illustrated.

  FIG. 2 (1-a) is a plan view of one pixel formed in a matrix on the substrate 1, and includes a gate electrode 2, a source electrode 8, and a TFT electrode formed under the transparent insulating film 20. The drain electrode 9 and the semiconductor layer 10 are shown in FIG. The source electrode 8 is connected to the source electrode 8 of another pixel by the source electrode line 8a.

  The gate electrode 2 is formed by depositing a conductive material such as Cr or Al on the substrate 1. The gate insulating layer 7 is formed by a dry process such as vapor deposition, sputtering, CVD, or atmospheric pressure plasma. The material for the gate insulating layer 7 is not particularly limited, and various insulating films can be used. However, it is preferable to select from a material including a compound selected from inorganic oxides and inorganic nitrides and a polymer.

  The source electrode 8 and the drain electrode 9 are formed, for example, by depositing a metal material such as gold by sputtering. Alternatively, a conductive organic material typified by PEDOT / PSS or a coating material in which metal nanoparticles are dispersed can be used as the coating material.

  Next, the semiconductor layer 10 is formed so as to be in electrical contact with the source electrode 8 and the drain electrode 9 and in contact with the gate insulating layer 7. As the semiconductor material, an Si-based material such as a-Si or Poly-Si, or an organic material such as a pentacene derivative, a pentacene precursor, an oligothiophene precursor, or a porphyrin precursor can be used.

  In the present embodiment, a bottom gate bottom contact type TFT will be described below as an example. However, the application of the present invention is not particularly limited, and a bottom gate top contact type, a top gate bottom contact type, a top gate top contact type It can also be applied to TFTs.

  S11: A step of forming an insulating film.

  After forming the TFT element, an insulating film 20 is formed on the entire surface of the substrate 1 as shown in FIG. The insulating film 20 is formed by a method such as a CVD method, a TEOS CVD method, vapor deposition, or sputtering. As the material of the insulating film 20, a material having good insulating properties and not deteriorating the semiconductor material of the TFT element at the time of film formation can be used.

  When the semiconductor material is a-Si or Poly-Si, an inorganic oxide such as silicon oxide or an inorganic nitride such as silicon nitride can be used. Or, polyimide, polyamide, polyester, polyacrylate, photo radical polymerization system, photo cation polymerization system photo-curing resin, copolymer containing acrylonitrile component, polyvinyl phenol, polyvinyl alcohol, novolac resin, cyanoethyl pullulan, parylene, etc. Organic compounds are applicable.

  When the semiconductor material is an organic material, an organic material such as a paraxylylene-based resin such as polyvinyl alcohol or parylene is applicable. Furthermore, a plurality of layers of an organic material and an inorganic material may be stacked in consideration of gas barrier properties, electrical insulation, and influence on a semiconductor material in a film formation process.

  S12: A step of forming a conductive film.

  A conductive film 29 is formed on the entire surface of the insulating film 20 as shown in FIGS. 2 (2-a) and 2 (2-b). The conductive film 29 is formed by a dry process such as vapor deposition or sputtering, for example. As the material of the insulating film 20, for example, various metal materials such as Cu, Au, Al, Ag, Pt, Pd, and Cr, and transparent electrode materials such as ITO (Indium Tin Oxide) can be used.

  S13: A step of patterning the conductive film.

  The conductive film 29 is patterned using a photolithography method or the like, and an opening 39 to be a part of the contact hole 40 is provided in a later step as shown in FIGS. 2 (3-a) and 2 (3-b). A pixel electrode 30 and a light shielding film 31 are formed. When the conductive film 29 is formed of an opaque material, the light shielding film 31 can prevent the TFT element from being irradiated with light and malfunctioning.

  Details of this step will be described later.

  S14: Patterning the insulating film.

  Using the conductive film 29 patterned in step S13 as an etching mask, a portion of the insulating film 20 not covered with the conductive film 29 is patterned by an etching method. After the etching, the insulating film 20 in the region masked by the pixel electrode 30 has a portion having substantially the same shape as the pixel electrode 30 as shown in FIG. It is formed.

  Thus, in the present invention, the contact hole 40 communicating with the opening 39 is formed using the pixel electrode 30 provided with the opening 39 as an etching mask. Therefore, the resist coating process, the pattern exposure process, the development process, and the resist removal process that are necessary in the process of patterning the conventional insulating film 20 can be omitted. In addition, production costs can be reduced by reducing these steps.

  S15: A step of applying a conductive material.

  A conductive material is applied to the drain electrode 9, the contact hole 40, and the conductive film 29, and the drain electrode 9 and the conductive film 29 are electrically connected as shown in FIGS. 2 (5-a) and (5-b). The wiring part 41 is formed. The method of forming the wiring portion 41 is not particularly limited as long as it can form a pattern simultaneously with the application of the conductive material, and an application method such as an ink jet method, a dispenser method, screen printing, or micro contact printing can be applied to the present invention. is there. As the conductive material, a conductive organic material typified by PEDOT / PSS or a conductive material in which metal nanoparticles are dispersed can be used.

  Thus, since the coating method is used in the present invention, the wiring portion 41 can be formed by a simple process.

  Details of this step will be described later.

  S16: A step of applying an insulating material.

  As shown in FIGS. 2 (6-a) and (6-b), the insulating material 50 is applied so as to cover the exposed source electrode 8, source electrode line 8 a, and drain electrode 9. There is no particular limitation as long as it is a method capable of forming a pattern simultaneously with the application of the insulating material 50, and an application method such as an ink jet method, a dispenser method, screen printing, or micro contact printing is applicable to the present invention. As the insulating material, for example, various resin materials such as polyvinyl alcohol can be used.

  Of the locations where the insulating film 20 has been removed in step S14, an insulating material is applied to the required locations to ensure long-term reliability of the TFT array substrate.

  The outline of the manufacturing method of the TFT array substrate has been described above.

  Next, the step of patterning the conductive film and the step of patterning the insulating film will be described in detail with reference to FIGS. FIG. 3 is an explanatory diagram for explaining a process of patterning a conductive film and a process of patterning an insulating film according to the first embodiment. FIG. 4 is an explanatory diagram for explaining a process of patterning a conductive film and a process of patterning an insulating film according to the second embodiment. FIG. 5 is an explanatory diagram for explaining a process of patterning a conductive film and a process of patterning an insulating film according to the third embodiment.

  3, 4, and 5 show the substrate 1 in the same manner as FIGS. 2 (1-b) to 2 (6-b), and the cross section A- of FIG. 2 (1-a) to 1 (6-a). It is sectional drawing cut | disconnected by A '.

  First, the step of patterning the conductive film and the step of patterning the insulating film according to the first embodiment of FIG. 3 will be described.

  FIG. 3A shows the same state as FIG. 2B in which the step of forming the conductive film in step S12 is completed. FIGS. 3B to 3F show the process of patterning the conductive film of the first embodiment, and FIG. 3G shows the process of patterning the insulating film in step S14 in FIG. It is the same state as -b).

  The step of patterning the conductive film in step S13 includes steps S100 to S104 in the present embodiment.

  S100: A step of applying a photoresist.

  FIG. 3B shows a step of forming a photoresist 35 by applying a photoresist material on the conductive film 29.

  S101: Pattern exposure step.

  As shown in FIG. 3C, the photoresist 35 is irradiated with light indicated by an arrow through the mask 36, and the pattern of the mask 36 is exposed to the photoresist 35. In the present embodiment, an example in which the positive photoresist 35 is used will be described, but a negative type may be used.

S102... Step of developing photoresist The substrate 1 is developed with a developer, and the exposed portion of the photoresist 35 is removed as shown in FIG.

S103... Step of etching conductive film As shown in FIG. 3E, the portion of the conductive film 29 not covered with the photoresist 35 is removed by etching.

S104... Step for removing photoresist As shown in FIG. 3F, the photoresist 35 is removed using a solvent.

  S14: Patterning the insulating film.

  Using dry etching such as RIE (Reactive Ion Etching), the portion of the insulating film 20 that is not covered with the conductive film 29 (pixel electrode 30, light shielding film 31) is etched to obtain the state shown in FIG. .

  The description of the step of patterning the conductive film and the step of patterning the insulating film of the first embodiment has been described above.

  Next, the process of patterning the conductive film and the process of patterning the insulating film according to the second embodiment of FIG. 4 will be described.

  When the insulating film 20 is formed of an organic material such as parylene, the photoresist 35 can be removed at the same time in the step of patterning the insulating film. In the present embodiment, paying attention to this point, the process of removing the photoresist described in the first embodiment is omitted, and the process is simplified.

  FIG. 4A shows the same state as FIG. 2B in which the step of forming the conductive film in step S12 is completed. FIGS. 4B to 4E show the process of patterning the conductive film of the second embodiment, and FIG. 4F shows the process of patterning the insulating film in step S14. It is the same state as -b).

  The process of patterning the conductive film in step S13 includes the processes of steps S100 to S103 in this embodiment, and the removal of the photoresist is simultaneously performed in the process of patterning the insulating film in step S14.

  S100: A step of applying a photoresist.

  FIG. 4B is a process of forming a photoresist 35 by applying a photosensitive organic resin material on the conductive film 29.

  S101: Pattern exposure step.

  As shown in FIG. 4C, the photoresist 35 is irradiated with light indicated by an arrow through the mask 36, and the pattern of the mask 36 is exposed to the photoresist 35. In the present embodiment, an example in which the positive photoresist 35 is used will be described, but a negative type may be used.

S102... Photoresist development step The substrate 1 is developed with a developer, and the exposed portion of the photoresist 35 made of a photosensitive organic resin material is removed as shown in FIG.

S103... Process for etching conductive film As shown in FIG. 4E, the portion of the conductive film 29 not covered with the photoresist 35 is removed by etching.

  S14: Patterning the insulating film.

Using the O ₂ ashing method, the photoresist 35 made of a photosensitive organic resin material and the portion of the insulating film 20 made of an organic material that is not covered with the conductive film 29 are etched to obtain the state shown in FIG.

  The description of the step of patterning the conductive film and the step of patterning the insulating film of the second embodiment is as described above.

  Next, the step of patterning the conductive film and the step of patterning the insulating film according to the third embodiment of FIG. 5 will be described.

  FIGS. 5A to 5E show the process of patterning the conductive film of the third embodiment, and FIG. 5F shows the process of patterning the insulating film in step S14 after FIG. It is the same state as -b).

  In the present embodiment, after performing steps S100 to S102 as in the first embodiment, the conductive film 29 is formed and lifted off to pattern the conductive film.

  S100: A step of applying a photoresist.

  FIG. 5A shows a step of applying a photoresist 35 on the insulating layer 20.

  S101: Pattern exposure step.

  As shown in FIG. 5B, the photoresist 35 is irradiated with light indicated by an arrow through the mask 36, and the pattern of the mask 36 is exposed to the photoresist 35. In the present embodiment, an example in which the positive photoresist 35 is used will be described, but a negative type may be used.

S102... Photoresist development step The substrate 1 is developed with a developer, and the exposed portion of the photoresist 35 is removed as shown in FIG.

S113... Process for forming a conductive film A conductive film 29 is formed as shown in FIG.

S114... Patterning of conductive film The photoresist 35 on which the conductive film 29 is formed is removed with a solvent, and the conductive film 29 is patterned as shown in FIG.

  S14: Patterning the insulating film.

A portion of the insulating film 20 that is not covered with the conductive film 29 is etched using a dry etching method such as an O ₂ ashing method or a RIE (Reactive Ion Etching) method to obtain the state shown in FIG.

  In the third embodiment, the conductive film can be patterned by the same number of steps as in the first embodiment.

  This is the end of the description of the step of patterning the conductive film and the step of patterning the insulating film of the third embodiment.

  Next, the conductive material application process will be described in detail with reference to FIGS. FIG. 6 is an explanatory diagram for explaining the conductive material application step of the fourth embodiment, and FIG. 7 is an explanatory diagram for explaining the conductive material application step of the fifth embodiment. 6 (a) and 7 (a) are the same cross-sectional views as FIG. 2 (4-b), and FIGS. 6 (c) and 7 (c) are the same cross-sections as FIG. 2 (5-b). It is a figure and description is omitted.

  A conductive material application process of the fourth embodiment shown in FIG. 6B will be described.

  In the fourth embodiment, the conductive material is applied using an inkjet method. As shown in FIG. 6B, a droplet of Ag nanoink is dropped into the contact hole 40 from the head 80 of the inkjet apparatus. After dropping, heat treatment is performed to electrically connect the drain electrode 9, the contact hole 40, and the pixel electrode 30 as shown in FIG.

  Next, the conductive material application process of the fifth embodiment shown in FIG.

  In the fifth embodiment, the conductive material is applied using the micro contact printing method.

  A plate 85 having a protrusion that can be inserted into the contact hole 40 is made of, for example, polydimethylsiloxane (PDMS), and is molded by a molding method. The plate depth is, for example, 2 μm. On the surface of the plate 85, an aqueous solution 86 of a conductive polymer material (PEDOT / PSS) is applied by, for example, spin coating as shown in FIG. 7B.

  Using a micro contact printer, the protrusions of the plate 85 are overlaid on the contact holes 40 of the substrate 1 that have been processed up to the insulating film patterning step of FIG. Is transferred to the contact hole 40.

  After the transfer, heat treatment is performed in a vacuum to dry, and the drain electrode 9, the contact hole 40, and the pixel electrode 30 are electrically connected as shown in FIG.

  As described above, since the conductive material application step of the present invention uses the application method, the drain electrode 9, the contact hole 40, and the pixel electrode 30 can be electrically connected by a simple process.

  Hereinafter, although the Example performed in order to confirm the effect of this invention is described, this invention is not limited to these.

[Example 1]
[Production of TFT array substrate]
Since it produced in the process of S10-S16 demonstrated in FIG. 1, and the process of S100-S104 demonstrated in FIG. 3, it attaches | subjects the number of each process and demonstrates in order, and abbreviate | omits description about a common point.

  S10: A step of forming a TFT element.

  As the substrate 1, a polyethersulfone (PES) substrate made of Sumitomo Bakelite having a size of 150 mm × 150 mm with an Al film formed on the surface of 130 nm as the conductive thin film 2 was used. As shown in the cross-sectional view of FIG. 2 (1-b), a bottom gate bottom contact type TFT element was formed. The semiconductor layer 10 was formed by applying a pentacene derivative solution.

  S11: A step of forming an insulating film.

The insulating film 20 was formed by depositing 100 nm of SiO ₂ by TEOS CVD.

  S12: A step of forming a conductive film.

  ITO was deposited to 50 nm by sputtering to form a conductive film 29.

  S13: A step of patterning the conductive film.

  The process of patterning the conductive film 29 was performed by the following process described with reference to FIG.

    S100: A step of applying a photoresist.

  Positive type OFPR-800 (trade name) was applied on the conductive film 29, and a photoresist 35 was formed to a thickness of 2 μm.

    S101: Pattern exposure step.

  As shown in FIG. 3C, light indicated by an arrow was irradiated to the photoresist 35 through the mask 36, and the pattern of the mask 36 was exposed to the photoresist 35.

S102... Photoresist development step The substrate 1 was developed with a developer, and the exposed portion of the photoresist 35 was removed as shown in FIG.

S103... Process of etching conductive film As shown in FIG. 3E, the portion of the conductive film 29 not covered with the photoresist 35 was removed by etching. By this process, the pixel electrode 30 provided with the circular opening 40 having a hole diameter of 10 μm was formed.

S104... Step of removing photoresist As shown in FIG. 3F, the photoresist 35 was removed using a solvent.

  S14: Patterning the insulating film.

Using the conductive film 29 as an etching mask, the portion of the insulating film 20 not covered with the conductive film 29 was patterned by the RIE method using CHF ₃ gas. The pressure in the decompression vessel on which the substrate 1 was placed was 2.9 Pa, the flow rate of CHF ₃ gas was 0.135 Pa · m ³ / sec, and the plasma output was 90 W. The insulating film 20 was patterned by this process to form a contact hole 40 having a hole diameter of 10 μm communicating with the opening 40.

  S15: A step of applying a conductive material.

  After applying Ag ink to the contact hole 40 using an ink jet apparatus, heat treatment was performed to form the wiring part 41. The amount of Ag ink droplets dropped by the inkjet apparatus is about 1 pl.

  S16: A step of applying an insulating material.

  Polyvinyl alcohol was applied onto the exposed electrode as an insulating material 50 using an ink jet apparatus, and was subjected to heat treatment to be solidified.

  The steps for manufacturing the TFT array substrate of Example 1 are as described above.

[Example 2]
[Production of TFT array substrate]
Since the steps S10 to S16 described in FIG. 1 and the steps S100 to S102, S113, and S114 described in FIG. 4 are used, the numbers are assigned to the respective steps, and the description of common points is omitted. .

The difference from Example 1 is that the material of the conductive film 29 is parylene, and the photoresist 35 is also removed using an O ₂ ashing method in the step of patterning the insulating film 20.

  S10: A step of forming a TFT element.

  As the substrate 1, a polyethersulfone (PES) substrate made of Sumitomo Bakelite having a size of 150 mm × 150 mm with an Al film formed on the surface of 130 nm as the conductive thin film 2 was used. As shown in the cross-sectional view of FIG. 2 (1-b), a bottom gate bottom contact type TFT element was formed. The semiconductor layer 10 was formed by applying a pentacene derivative solution.

  S11: A step of forming an insulating film.

  An insulating film 20 was formed by depositing 100 nm of parylene by the CVD method.

  S12: A step of forming a conductive film.

  ITO was deposited to 50 nm by sputtering to form a conductive film 29.

  S13: A step of patterning the conductive film.

  The process of patterning the conductive film 29 was performed by the following process described with reference to FIG.

    S100: A step of applying a photoresist.

  Positive type OFPR-800 (trade name) was applied on the conductive film 29 to form a photoresist 35 with a thickness of 2 μm.

    S101: Pattern exposure step.

  As shown in FIG. 4C, the photoresist 35 was irradiated with light indicated by an arrow through the mask 36, and the pattern of the mask 36 was exposed to the photoresist 35.

S102... Photoresist development step The substrate 1 was developed with a developer, and the exposed portion of the photoresist 35 was removed as shown in FIG.

S103... Step of etching conductive film As shown in FIG. 4E, the portion of the conductive film 29 not covered with the photoresist 35 was removed by etching. By this process, the pixel electrode 30 provided with the circular opening 40 having a hole diameter of 10 μm was formed.

  S14: Patterning the insulating film.

Using the conductive film 29 as an etching mask, the portion of the insulating film 20 not covered with the conductive film 29 was patterned by an O ₂ ashing method using O ₂ gas. The pressure in the decompression vessel on which the substrate 1 was placed was 5.3 Pa, the flow rate of O ₂ gas was 0.101 Pa · m ³ / sec, and the plasma output was 100 W. In this step, the photoresist 35 was removed, and the insulating film 20 was patterned to form a contact hole 40 having a hole diameter of 10 μm communicating with the opening 40.

  S15: A step of applying a conductive material.

  After applying Ag ink to the contact hole 40 using an ink jet apparatus, heat treatment was performed to form the wiring part 41. The amount of Ag ink droplets dropped by the inkjet apparatus is about 1 pl.

  S16: A step of applying an insulating material.

  Polyvinyl alcohol was applied onto the exposed electrode as an insulating material 50 using an ink jet apparatus, and was subjected to heat treatment to be solidified.

  The process for producing the TFT array substrate of Example 2 is as described above.

  When an appropriate amount of nematic liquid crystal was applied to the center of the pixel electrode 30 of the TFT array substrate manufactured in Example 1 and Example 2 and sandwiched between the liquid crystal display device and the opposite substrate, a liquid crystal display device was prepared. In operation, it was confirmed that a display image quality equivalent to or higher than that of a conventional liquid crystal display device was obtained. Further, the liquid crystal display device was continuously operated for 3000 hours in an environment of 40 ° C., and the durability test was performed.

  As described above, according to the present invention, it is possible to provide a method for manufacturing a TFT array substrate in which a pixel electrode and a contact hole are formed by a simple process.

It is process drawing for demonstrating the outline of the manufacturing method of the TFT array substrate concerning this invention. It is explanatory drawing for demonstrating the outline of the manufacturing method of the TFT array substrate concerning this invention. It is explanatory drawing for demonstrating the process of patterning the electrically conductive film of 1st Embodiment, and the process of patterning an insulating film. It is explanatory drawing for demonstrating the process of patterning the electrically conductive film of 2nd Embodiment, and the process of patterning an insulating film. It is explanatory drawing for demonstrating the process of patterning the electrically conductive film of 3rd Embodiment, and the process of patterning an insulating film. It is explanatory drawing for demonstrating the electrically-conductive material application | coating process of 4th Embodiment. It is explanatory drawing for demonstrating the electrically-conductive material application | coating process of 5th Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Gate electrode 7 Gate insulating layer 8 Source electrode 9 Drain electrode 10 Semiconductor layer 20 Insulating film 29 Conductive film 30 Pixel electrode 35 Photoresist 39 Opening 40 Contact hole 41 Wiring part 80 Head 85 Plate 86 Aqueous solution

Claims (3)

A TFT array in which an insulating film and a pixel electrode are sequentially formed on a driving element formed on a substrate, and the electrode of the driving element and the pixel electrode are electrically connected by a contact hole provided in the insulating film. In the method for manufacturing a substrate,
Forming an insulating film;
Forming a conductive film on the insulating film;
Patterning the conductive film to form a pixel electrode having an opening;
Forming a contact hole communicating with the opening in the insulating film by an etching method using the pixel electrode provided with the opening as an etching mask;
I have a,
The step of forming the pixel electrode provided with the opening includes:
Applying a photosensitive organic resin material on the conductive film;
Exposing the photosensitive organic resin material to a pattern of a pixel electrode provided with the opening;
Developing the photosensitive organic resin material;
Etching the conductive film using the photosensitive organic resin material remaining on the conductive film as an etching mask;
Consisting of
The insulating film is formed using an organic material in the step of forming the insulating film, and the photosensitive organic resin material remaining on the conductive film is formed in the insulating film in the step of forming the contact hole. A method for producing a TFT array substrate, comprising removing together with the portion . Method for producing a TFT array substrate according to claim 1, comprising the step of applying a conductive material between the pixel electrode and the contact hole and the electrode. 3. The method of manufacturing a TFT array substrate according to claim 1, wherein after the step of forming the contact hole, a step of applying an insulating material to a portion where the insulating film has been removed is performed.

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