JP5154190B2 - Data processing device - Google Patents

Description

  The present invention relates to a data processing apparatus configured to execute predetermined data processing on a plurality of input data.

  As this type of data processing apparatus, Japanese Patent Application Laid-Open No. 2003-185682 discloses a waveform display apparatus configured to be able to execute processing for determining whether or not a measurement waveform is included in a reference waveform area. In this waveform display device, the measurement waveform amplified or attenuated by the amplifier is converted into measurement waveform data by the A / D converter, and this measurement waveform data is output to the first trigger generation means and also written to the memory by the write control means. Stored (stored). In addition, the first trigger generation means is configured when the output measurement waveform data satisfies a preset condition (for example, “when rising edge with respect to trigger level is detected”: hereinafter, “when trigger level is exceeded”) The first trigger signal is output. At this time, along with the output of the trigger signal, trigger information (information that can specify the time when the first trigger signal is output) is added to the measurement waveform data in the memory.

  Next, the departure point detection means generates reference waveform area data based on the reference waveform data stored in the memory. In this case, the reference waveform data is, for example, normal measurement waveform data for a predetermined period (for example, measurement waveform data for a predetermined period from the time when the trigger level is exceeded in measurement waveform data acquired in a normal state). Has been generated based on. Further, the departure point detection means executes a waveform determination process for determining pass / fail of the measurement waveform data (measurement waveform) based on the generated reference waveform area data and measurement waveform data. At this time, the deviation point detection means outputs a detection signal to the write control means when the waveform based on the measured waveform data deviates from the reference area based on the reference waveform area data. In addition, the write control means, when the measurement waveform data storage for a predetermined section starting from the time when the detection signal is output (for a predetermined time from the time when the detection signal is output) is completed, Pause the storage process.

  Next, the display means measures the measurement waveform data for a predetermined section after the detection signal output time (the time when the waveform based on the measurement waveform data deviates from the reference area) from the measurement waveform data stored in the memory. And the reference waveform area data are read from the memory. Subsequently, the display unit displays the waveform based on the measured waveform data and the reference area based on the reference waveform area data so as to overlap each other on the same screen. As a result, the portion corresponding to the time when the measured waveform data exceeds the trigger level when the reference waveform data is acquired in the reference area, and the time when the first trigger signal is output in the waveform based on the measured waveform data (the measured waveform data is triggered). The reference area and the waveform are displayed in a state where the part corresponding to the time) exceeds the level) on the time axis.

  On the other hand, as an example of a method of using this type of waveform display device, a process for monitoring an operation signal output from a manufacturing device installed in an article manufacturing line (operation of the manufacturing device by determining the waveform of the operation signal) Status monitoring process). In this case, for example, when there are two manufacturing apparatuses that execute different manufacturing processes in parallel on one manufacturing line, two waveform display apparatuses are used from the viewpoint of the introduction cost and installation space of the waveform display apparatus. Instead, it is preferable to monitor the operating states of the two manufacturing apparatuses with a single waveform display device.

  Specifically, measurement channels 1 and 2 (hereinafter also referred to as “Ch.1” and “Ch.2”) are provided so that waveform determination processing can be executed in the same procedure as a conventional waveform display device. When using a waveform display device (hereinafter, this waveform display device is also referred to as a “conventional waveform display device”) to monitor two manufacturing apparatuses, as shown in FIG. The operation signal (input signal Si1x in the figure) is monitored by “Ch.1”, and the operation signal (input signal Si2x in the figure is output by “Ch.2”) from the other manufacturing apparatus. Monitor. In this case, for the first trigger generation means, as an example, the measured waveform data (data of the input signal Si1x) output from the “Ch.1” A / D converter is the voltage value L1V (an example of the trigger level). The first trigger signal is set to be output when the value exceeds. Therefore, the first trigger generating means outputs the first trigger signal at the time t1x when the input signal Si1x exceeds the voltage value L1V. Thereby, trigger information is added to the measured waveform data (data of the input signals Si1x and Si2x) in the memory. In addition, the write control unit pauses the storage process at a time t3x when a predetermined time elapses from the time t1x when the first trigger signal is output.

Next, the departure point detection means executes a waveform determination process for determining pass / fail of the measured waveform data based on the reference waveform area data generated based on the reference waveform data and the measured waveform data. Specifically, as shown in FIG. 11, the departure point detection means first stores reference waveform area data (data of input signals Si1x and Si2x acquired in a normal state) generated in advance for both manufacturing apparatuses from a memory. Read out to define the reference areas A1x and A2x. Next, as an example, the departure point detection means includes measurement waveform data (data of the input signals Si1x and Si2x) for a time Ts11x from a time t0x that is a time Ts1x before the time t1x when the input signal Si1x exceeds the voltage value L1V. It is read from the memory and it is determined whether or not the signal waveform based on the measured waveform data deviates from the reference areas A1x and A2x. At this time, when one of the two signal waveforms deviates from the reference areas A1x and A2x, the deviation point detecting means operates abnormally in the manufacturing apparatus that outputs the measured waveform data of the signal waveform. Is determined. The departure point detection means determines that both manufacturing apparatuses are operating normally when both signal waveforms do not deviate from the reference areas A1x and A2x.
JP 2003-185682 A (page 3-4, Fig. 1-4)

  However, the conventional waveform display device has the following problems. That is, in the conventional waveform display device, for example, the measurement waveform data after the time Ts1x before the time when the measurement waveform data of the measurement waveform data acquired in the normal state exceeds the trigger level is used as the reference waveform data. In addition to defining a reference area, measurement for a predetermined section after a time Ts1x before the time when the detection signal is output (time when the measured waveform data exceeds the trigger level) is performed for this reference area. A configuration is employed in which waveforms based on waveform data are superimposed to execute display processing and waveform determination processing. In this case, FIGS. 10 and 11 illustrate an example in which the time point t1x when the input signal Si1x exceeds the voltage value L1V and the time point t2x when the input signal Si2x exceeds the voltage value L2V match. The timings at which the input signals Si1x and Si2x exceed the voltage values L1V and L2V do not always match. For example, as shown in FIG. 12, when the input signal Si1x exceeds the voltage value L1V, the input signal Si2x is at the voltage. There is a case where the time t2x exceeding the value L2V does not match. In such a state, it is difficult for the conventional measuring apparatus to execute an accurate pass / fail determination for the input signal Si2x.

  Specifically, in the conventional waveform display device, as shown in FIG. 12, the time t2x when the input signal Si2x exceeds the voltage value L2V is the time Ts21x with respect to the time t1x when the input signal Si1x exceeds the voltage value L1V. In the state of being delayed only by the time Ts1x from the time t1x, the input signals Si1x and Si2x for the time Ts11x from the time t0x to the time t3x before the time Ts1x and the reference waveform area data generated in advance for both manufacturing apparatuses are used. The pass / fail of the input signals Si1x and Si2x is determined. In this case, the reference waveform area data for the manufacturing apparatus that has output the input signal Si1x is equal to the time Ts11x from the time t0x that is the time Ts1x before the time t1x when the input signal Si1x acquired in the normal state exceeds the voltage value L1V. It is generated based on the input signal Si1x. The reference waveform area data for the manufacturing apparatus that has output the input signal Si2x is the input signal for the time Ts11x from the time point T2x before the time point t2x when the input signal Si2x acquired in the normal state exceeds the voltage value L2V. It is generated based on Si2x.

  Therefore, when the waveforms based on the input signals Si1x and Si2x, which are shifted by the time Ts21x between the time points t1x and t2x, are compared with the reference areas A1x and A2x based on the reference waveform area data for both manufacturing apparatuses. As shown in FIG. 13, for the input signal Si1x, a normal pass / fail judgment is possible, but for the input signal Si2x, the waveform based on the input signal Si2x is timed relative to the reference area A2x based on the reference waveform area data. As a result of being delayed by Ts21x, even if the normal input signal Si2x is output from the manufacturing apparatus, it is determined that the waveform based on the input signal Si2x deviates from the reference area A2x. There is a risk of erroneous determination that an abnormality has occurred in the operation of the apparatus. Thus, although the input signals Si1x and Si2x may be asynchronous, the waveform based on the input signal Si2x and the reference waveform area data are based on the time point t1x when the input signal Si1x exceeds the voltage value L1V. Due to the fact that the configuration for comparing with the reference area A2x is adopted, the conventional waveform display device has a problem that it is difficult to accurately determine whether the input signal Si2x is acceptable.

  The present invention has been made in view of such problems, and a main object of the present invention is to provide a data processing apparatus capable of executing accurate data processing with a single unit for a plurality of asynchronous input data.

To achieve the above object, a data processing apparatus according to claim 1, wherein the first N from the first input data (N is a natural number of 2 or more) predetermined data process on the respective input data to the input data , A trigger signal output unit that outputs a trigger signal at a first time point when an electrical parameter of the first input data satisfies a first condition, and a memory that stores the input data Each of the signal waveforms from the first signal waveform based on the first input data to the Nth signal waveform based on the Nth input data, and the first signal waveform, A determination process for determining pass / fail of each input data based on each allowable area from a first allowable area corresponding to the signal waveform to an Nth allowable area corresponding to the Nth signal waveform; Data processing Together to executable configured, when the trigger signal is outputted, on the basis of the storage unit the respective input data stored in, the M (M is 2 or more N a natural number equal to or less than) the The Mth time point when the electrical parameter of the input data satisfies the Mth condition is specified, the time length between the specified Mth time point and the first time point is calculated, and the first time point and each process of identifying the context of the time of the first M repeatedly executes "M" from "2" to the "N", the during the determination process, before Symbol each time period and before Symbol each Using the context, a part corresponding to the Nth time point as the Mth time point in the Nth signal waveform from a part corresponding to the second time point as the Mth time point in the second signal waveform In each of the relevant parts up to and in the second permissible area Wherein determining the pass or fail in the state of being matched with the respective portions of the portion corresponding to the second time point to the region corresponding to the time point of the first N in permissive areas of the N-th in the time axis.

The data processing apparatus according to claim 2, wherein the first N from the first input data (N is a natural number of 2 or more) data processing for executing a predetermined data process on the respective input data to the input data A trigger signal output unit that outputs a trigger signal at a first time point when an electrical parameter of the first input data satisfies a first condition, and a storage unit that stores the input data. The data processing unit performs a waveform display process for displaying each signal waveform from a first signal waveform based on the first input data to an Nth signal waveform based on the Nth input data on a display unit. It is configured to be executable as predetermined data processing, and when the trigger signal is output, based on each input data stored in the storage unit, Mth (M is 2 or more and N or less) Natural number The Mth time point at which the electrical parameter of the input data satisfies the Mth condition is calculated, the time length between the specified Mth time point and the first time point is calculated, and the first time point is calculated. Repeat run time and the processing for identifying the context of the time of the first M "M" from "2" to the "N", when the waveform display processing, pre SL each time period and before Using the respective contexts, the part from the part corresponding to the first time point in the first signal waveform to the part corresponding to the Nth time point as the Mth time point in the Nth signal waveform Each signal waveform is displayed with each part matched on the time axis .

Furthermore, the data processing apparatus according to claim 3, wherein the first N from the first input data (N is a natural number of 2 or more) data processing for executing a predetermined data process on the respective input data to the input data A trigger signal output unit that outputs a trigger signal at a first time point when an electrical parameter of the first input data satisfies a first condition, and a storage unit that stores the input data. The data processing unit corresponds to each of the signal waveforms from the first signal waveform based on the first input data to the Nth signal waveform based on the Nth input data, and the first signal waveform. A determination process for determining pass / fail of each input data based on each allowable area from the first allowable area to the Nth allowable area corresponding to the Nth signal waveform, and from the first signal waveform Said Together with the waveform display process for displaying on the display unit each signal waveform to the signal waveform executable configured as the predetermined data processing, when the trigger signal is outputted, stored in the storage unit Based on the input data, the Mth point in time when the electrical parameter of the Mth input data (M is a natural number of 2 or more and N or less) satisfies the Mth condition is specified, and the specified Each process for calculating the time length between the M time point and the first time point and specifying the context between the first time point and the M time point is changed from “2” to “N” . site made repeatedly executed until, during the determination process, before SL with the time length and before Symbol each context corresponds to a second time point as a time point of the first M of the second signal waveform To before the Nth signal waveform Each part up to the part corresponding to the Nth time point as the Mth time point and the part corresponding to the second time point in the second allowable area to the Nth time point in the Nth allowable area the acceptance is determined and the respective parts to corresponding site in a state of being matched in the time axis, during the waveform display processing, using pre SL each time period and before Symbol each context, the first Display each signal waveform by matching the respective parts from the part corresponding to the first time point in one signal waveform to the part corresponding to the Nth time point in the Nth signal waveform on the time axis. To do.

The data processing device according to claim 1, wherein when the trigger signal is output from the trigger signal output unit, the data processing unit performs the M-th input data based on each input data stored in the storage unit. The Mth point in time when the electrical parameter of the first input data satisfies the Mth condition, and the first point in time when the electrical parameter of the specified Mth time point and the first input data satisfies the first condition (trigger The time length between the first time point and the Mth time point is repeatedly executed until M becomes 2 to N, and the calculated time times are calculated. that perform predetermined data processing using a long and identified each context.

In the data processing device according to any one of claims 1 and 3 , the data processing unit uses the calculated time lengths and the identified contexts in the determination processing to determine the second to Nth signal waveforms. Each portion corresponding to each of the second to Nth time points and each corresponding to each of the second to Nth time points of each of the second to Nth permissible areas are matched with each other on the time axis. Determine whether the input data is acceptable . Therefore, according to the data processing device of the first and third aspects, without using a plurality of data processing devices, the data processing can be performed reliably and accurately by synchronizing each input data for N pieces of asynchronous input data. it is possible to perform, and the signal waveform from the second occurs a deviation in the time axis between the allowable area from the signal waveform and the second from the second to the N-th to N-th to N-th However, it is possible to avoid a situation in which each of the second to Nth allowable areas does not exist. Thus, according to this data processing device, it is possible to avoid a situation in which each of the second to Nth input data is erroneously determined to be abnormal, and to correctly determine whether it is acceptable or not.

Further, in the data processing device according to claims 2 and 3, in the waveform display process, the data processing unit uses the calculated time lengths and the identified contexts for each of the first to Nth signal waveforms. Each signal waveform is displayed by matching the portions corresponding to the first to Nth time points on the time axis . Therefore, according to the second and third aspects of the data processing apparatus, it is possible to reliably and accurately perform data processing by synchronizing each input data with respect to asynchronous N pieces of input data without using a plurality of data processing apparatuses. Since the first to Nth signal waveforms can be easily compared, the difference between the signal waveforms can be intuitively recognized.

  The best mode of a data processing apparatus according to the present invention will be described below with reference to the accompanying drawings.

  First, the configuration of the waveform recording apparatus 1 will be described with reference to the drawings.

  A waveform recording apparatus 1 shown in FIG. 1 is an example of a data processing apparatus according to the present invention, and includes A / D conversion units 2a and 2b, a storage controller 3, a storage memory 4, a trigger signal output unit 5, a display unit 6, A video memory 7, a recording unit 8, and a CPU 9 are provided. As will be described later, the waveform recording apparatus 1 performs data processing on two data (examples where N is 2 in the present invention) of sampling data Ds1 and Ds2 corresponding to the first to Nth input data in the present invention. Is configured to run. The A / D converter 2a, together with an amplifier (not shown), constitutes a measurement channel 1 (hereinafter also referred to as “Ch.1”), and performs analog-to-digital conversion of the input signal Si1 (input signal Si1 is predetermined). Sampling data Ds1 (an example of the first input data in the present invention: digital data of the input signal Si1) is output. The A / D converter 2b, together with an amplifier (not shown), constitutes a measurement channel 2 (hereinafter also referred to as “Ch.2”), and performs analog-digital conversion on the input signal Si2 (input signal Si2). Is sampled at a predetermined sampling period) sampling data Ds2 (an example of input data of Nth (example of N is 2) and input data of Mth (example of M is 2) in the present invention: digital of input signal Si2 Data).

  The storage controller 3 executes recording processing of the sampling data Ds1 and Ds2 with respect to the storage memory 4 and reading processing of the sampling data Ds1 and Ds2 from the storage memory 4 under the control of the CPU 9. In this case, the storage controller 3 stores the sampling data Ds1 and Ds2 output from the A / D converters 2a and 2b in the storage memory 4 by FIFO (first-in first-out method) as an example during the recording process. The latest sampling data Ds1 and Ds2 for a predetermined time (for a predetermined sampling number) are stored in the storage memory 4. Further, the storage controller 3 starts the reading process when the trigger signal St is output from the trigger signal output unit 5 as will be described later, and starts from a predetermined time before the output time of the trigger signal St. Sampling data Ds 1 and Ds 2 for a predetermined time are read from the storage memory 4 and output to the CPU 9.

  The storage memory 4 corresponds to a storage unit in the present invention, and, as an example, is configured by an SDRAM (Synchronous Dynamic Random Access Memory) and temporarily records sampling data Ds1 and Ds2 transferred by the storage controller 3. The trigger signal output unit 5 includes a trigger detector, a logic processing circuit (not shown), and the like. In this case, the trigger signal output unit 5 includes, for example, an FPGA (Field Programmable Gate Alley), and the above-described logic processing circuit is constructed in the FPGA. Specifically, in this waveform recording apparatus 1, the electrical parameters (for example, voltage, frequency, phase, etc.) of the sampling data Ds1 output from the A / D converter 2a and preset as described later. A trigger signal St is output based on the comparison value or the comparison result with the comparison range. More specifically, the trigger signal output unit 5 outputs the trigger signal St when the sampling data Ds1 exceeds the voltage value L1V (when the “first condition” in the present invention is satisfied).

  The display unit 6 is composed of an LCD (Liquid Crystal Display), for example, and is controlled by the CPU 9 to control signal waveforms based on the waveform data Dw1 and Dw2 stored in the video memory 7 (from the first to the Nth in the present invention). Each signal waveform). The video memory 7 stores waveform data Dw1 and Dw2 generated by the CPU 9. For example, the recording unit 8 includes a removable memory (memory card or the like) or an HDD (Hard Disc Drive), and records sampling data Ds1 and Ds2 for a predetermined time output from the CPU 9. The recording unit 8 stores allowable area data Da1 and Da2 for allowable areas A1 and A2 (first to Nth allowable areas in the present invention) to be described later, an operation program for the CPU 9, and the like. In this case, the allowable area data Da1 and Da2 are generated in advance based on sampling data Ds1 and Ds2 for a predetermined time acquired in a normal state as an example. The CPU 9 comprehensively controls the waveform recording apparatus 1 and constitutes a data processing unit in the present invention, and performs various data processing on the sampling data Ds1 and Ds2 output from the A / D conversion units 2a and 2b. Run.

  Specifically, the CPU 9 controls the trigger signal output unit 5 to start the process of monitoring the voltage values of the sampling data Ds1 and Ds2 when the start of measurement is instructed by operating an operation unit (not shown). In addition, when the sampling data Ds1 and Ds2 for a predetermined time are output from the storage controller 3, the CPU 9 is the time when the sampling data Ds1 exceeds the voltage value L1V (an example of “first time point” in the present invention). When the sampling data Ds2 exceeds a predetermined voltage value L2V (an example of the “Mth time point” when the “Mth condition” in the present invention is satisfied: in this example where N = M = 2, “Second time point” in which the “second condition” is satisfied), the time length between the two specified time points, and the context of both time points (which is earlier and which is later) And specify. Further, the CPU 9 uses the information on the specified time length and context to generate waveform data Dw1, Dw2 for displaying signal waveforms based on both sampling data Ds1, Ds2 (“waveform display processing in the present invention”). ) And waveform determination processing (an example of “determination processing” in the present invention) based on both sampling data Ds1 and Ds2 and allowable area data Da1 and Da2.

  Next, a method for data processing of the sampling data Ds1 and Ds2 using the waveform recording apparatus 1 will be described with reference to the drawings.

  First, Ch. 1, Ch. 2 (A / D conversion units 2a and 2b) are connected to a monitoring device, for example, a manufacturing apparatus, and in this state, a start switch (not shown) of the operation unit is operated. In response to this, the CPU 9 controls the A / D converters 2a and 2b to start sampling processing (AD conversion processing) for the input signals Si1 and Si2. At this time, the A / D converters 2a and 2b sample the input signals Si1 and Si2 at a preset sampling rate to generate sampling data Ds1 and Ds2, respectively. The generated sampling data Ds1 and Ds2 are stored in the storage controller. 3 and the trigger signal output unit 5. The storage controller 3 sequentially records the sampling data Ds1 and Ds2 output from the A / D conversion units 2a and 2b in the storage memory 4 by, for example, a first-in first-out method, under the control of the CPU 9.

  On the other hand, the trigger signal output unit 5 starts the process of monitoring the voltage value of the sampling data Ds1 in accordance with the control of the CPU 9, and when the sampling data Ds1 exceeds the voltage value L1V (“first input data of the present invention” The trigger signal St is output to the storage controller 3 at an example of “a first time point when the electrical parameter satisfies the first condition”. In response to this, the storage controller 3 reads out the sampling data Ds1, Ds2 for a predetermined time from among the sampling data Ds1, Ds2 sequentially recorded in the storage memory 4, and outputs them to the CPU 9. . Specifically, as shown in FIG. 2, the storage controller 3 has a time Ts1 after the time t1 when the trigger signal St is output from the trigger signal output unit 5 (that is, when the sampling data Ds1 exceeds the voltage value L1V). The sampling data Ds1 and Ds2 corresponding to the time Ts11 from the previous time point t0 to the time point t3 are read from the storage memory 4 and output to the CPU 9. In this case, the times Ts1 and Ts11 in the above example are defined in advance to an arbitrary time length.

  In response to this, the CPU 9 is based on the sampling data Ds1 and Ds2 output from the storage controller 3 (read from the storage memory 4), and when the sampling data Ds1 exceeds the voltage value L1V (the first time in the present invention). 1) and the time t2 when the sampling data Ds2 exceeds the voltage value L2V (the Mth time when the electrical parameter of the Mth input data in the present invention satisfies the Mth condition: in this example, the second time And the time length between the specified time points t1 and t2 and the context of both time points t1 and t2. At this time, the CPU 9 calculates that the time length between the time points t1 and t2 is the time Ts21, and “the time point t1 is a time point before the time point t2” (or “the time point t2 is the time point t1. Later) ”). In this example where N = M = 2, the time point t2 when the sampling data Ds2 exceeds the voltage value L2V is specified, the time length between the specified time point t2 and the time point t1 is calculated, and the time point t1 and the time point M in the present invention becomes N (2 in this example) only by executing each process specifying the context of t2 once without repeating.

  Next, the CPU 9 executes the waveform display process and the determination process according to the present invention in parallel based on the specified time length and context and the sampling data Ds1 and Ds2 read from the storage memory 4. Specifically, the CPU 9 firstly displays waveform data Dw1, Dw2 for displaying the signal waveforms of the sampling data Ds1, Ds2 (input signals Si1, Si2) (the first to Nth signal waveforms in the present invention). Is generated. At this time, based on the above specific matter that “time point t1 is a time point before time t2 by time Ts21”, for example, the CPU 9 generates a signal waveform based on the sampling data Ds2 only for time Ts21 (time Ts21). The waveform data Dw1 and Dw2 are generated by relatively moving so as to advance the phase corresponding to (example in which the second signal waveform is moved relative to the first signal waveform in the time axis direction). . As a result, as shown in FIG. 3, the portion corresponding to the time point t1 when the sampling data Ds1 exceeds the voltage value L1V and the portion corresponding to the time point t2 where the sampling data Ds2 exceeds the voltage value L2V coincide with each other on the time axis. Waveform data Dw1 and Dw2 in which the rising edges of the signal waveforms of both input signals Si1 and Si2 coincide with each other are generated.

  Subsequently, the CPU 9 reads the allowable area data Da1, Da2 from the recording unit 8 and defines the allowable areas A1, A2. In this case, the allowable area data Da1 is sampled for a predetermined time from the time point Ts1 before the time point (time point t1 in the above example) when the voltage value L1V of the sampling data Ds1 acquired in the normal state is exceeded. Based on the data Ds1, the upper limit value and the lower limit value for the sampling data Ds1 are defined and generated. Further, the allowable area data Da2 is a sampling data for a predetermined time from a time point Ts1 before the time point (time point t2 in the above example) that exceeds the voltage value L2V of the sampling data Ds2 acquired in the normal state. Based on Ds2, the upper limit value and the lower limit value for the sampling data Ds2 are defined and generated.

  Next, the CPU 9 performs sampling data based on the signal waveform based on the waveform data Dw1 and Dw2 (the sampling data Ds1 and Ds2 in the state where the time t1 and the time t2 are matched) and the allowable areas A1 and A2. Ds1 and Ds2 pass / fail are determined (in the present invention, “a part corresponding to each of the second to Nth time points of each of the second to Nth signal waveforms and each of the second to Nth allowable areas” An example of a configuration of “determining whether or not to pass / fail in a state where the portions corresponding to the second to Nth time points are matched on the time axis”). Specifically, when the signal waveform based on the waveform data Dw1 is included in the allowable area A1, the CPU 9 determines that the waveform data Dw1 (sampling data Ds1) is normal, and the waveform data Dw1 is any of the waveform data Dw1. When the part is out of the allowable area A1, it is determined that the waveform data Dw1 (sampling data Ds1) is abnormal. Further, when the signal waveform based on the waveform data Dw2 is included in the allowable area A2, the CPU 9 determines that the waveform data Dw2 (sampling data Ds2) is normal, and the waveform data Dw2 is allowed in any part. When outside the area A2, it is determined that the waveform data Dw2 (sampling data Ds2) is abnormal.

  At this time, in the signal waveform based on the waveform data Dw1 and the permissible area A1, the portions corresponding to the time points when the voltage value L1V is exceeded coincide with each other on the time axis. For this reason, as shown in FIG. 4, there is a situation in which a deviation in the time axis occurs between the signal waveform based on the waveform data Dw1 and the allowable area A1, and the normal waveform data Dw1 (sampling data Ds1) is determined to be abnormal. Avoided. Further, in the waveform recording apparatus 1, as described above, during the generation of the waveform data Dw2, the interval between the time point t1 when the sampling data Ds1 exceeds the voltage value L1V and the time point t2 when the sampling data Ds2 exceeds the voltage value L2V. By moving the sampling data Ds2 relative to the sampling data Ds1 by the time length (time Ts21) (relative to the second allowable area in the time axis direction). The time point t1 when the voltage value L1V in the waveform data Dw1 is exceeded and the time point t2 when the voltage value L2V in the waveform data Dw2 is exceeded are matched. Therefore, the part corresponding to the time t2 when the voltage value L2V exceeds the voltage value L2V in the signal waveform based on the waveform data Dw2 coincides with the part corresponding to the time when the voltage value L2V exceeds the allowable area A2 based on the allowable area data Da2. Become. For this reason, a situation in which a deviation in the time axis between the signal waveform based on the waveform data Dw2 and the allowable area A2 occurs and the normal waveform data Dw2 (sampling data Ds2) is determined to be abnormal is avoided.

  Next, the CPU 9 stores the image data of the allowable areas A1 and A2 in the video memory 7 together with the waveform data Dw1 and Dw2, thereby displaying the signal waveform based on the waveform data Dw1 and Dw2 and the allowable areas A1 and A2 on the display unit. 6 are displayed on the same screen in the same manner (in the present invention, “the first to Nth signal waveforms in the respective first to Nth time points corresponding to the first to Nth time points are made to coincide with each other on the time axis. An example of a configuration of “display”. At this time, as described above, in the signal waveform based on the waveform data Dw1, the sampling data Ds1 is obtained when the allowable area data Da1 is acquired in the portion corresponding to the time point t1 when the sampling data Ds1 exceeds the voltage value L1V. A portion corresponding to a time point when the voltage value L1V is exceeded, a portion corresponding to a time point t2 when the sampling data Ds2 exceeds the voltage value L2V in the signal waveform based on the waveform data Dw2, and a sampling at the time of obtaining the allowable area data Da2 in the allowable area A2. All of the parts corresponding to the time point when the data Ds2 exceeds the voltage value L2V coincide with each other on the time axis. Therefore, on the waveform display screen displayed on the display unit 6, as shown in FIG. 4, whether the sampling data Ds1, Ds2 (input signals Si1, Si2) that are the basis of both signal waveforms are output in synchronism with each other. Thus, both signal waveforms and allowable areas A1 and A2 are displayed. As a result, Ch. 1, Ch. It is possible to intuitively recognize the operating state of both the manufacturing apparatuses connected to 2.

  On the other hand, in the waveform recording apparatus 1, the sampling data Ds1 is the first input data in the present invention, and the sampling data Ds2 is each of the second to Nth input data (in this example, the second input data). In addition to the waveform display process and the waveform determination process described above, the sampling data Ds2 is the first input data in the present invention, and the sampling data Ds1 is the second to Nth input data (in the present invention). In this example, waveform display processing and waveform determination processing as second input data) can also be executed. Specifically, when adopting such a method of use, first, when the sampling data Ds2 exceeds a preset voltage value L2V with respect to the trigger signal output unit 5 (" The trigger signal St is set to be output (when the condition “1” is satisfied).

  Next, when a start switch (not shown) of the operation unit is operated, the A / D conversion units 2a and 2b generate sampling data Ds1 and Ds2 and output them to the storage controller 3 and the trigger signal output unit 5, and the storage controller 3 However, the output sampling data Ds 1 and Ds 2 are sequentially recorded in the storage memory 4. Further, as shown in FIG. 5, in addition to the time t12 when the sampling data Ds2 exceeds the voltage value L2V (the “first time when the electrical parameter of the first input data satisfies the first condition” in the present invention). In the example, the trigger signal output unit 5 outputs the trigger signal St, and in response to this, the storage controller 3 reads the sampling data Ds1, Ds2 for a predetermined time from the storage memory 4 and outputs it to the CPU 9 To do. Specifically, the storage controller 3 starts from the time point t10 that is a time Ts2 before the time point t12 when the trigger signal St is output from the trigger signal output unit 5 (that is, the sampling data Ds2 exceeds the voltage value L2V). Sampling data Ds1, Ds2 corresponding to time Ts12 until t13 are read from the storage memory 4 and output to the CPU 9. In this case, the times Ts2 and Ts12 in the above example are defined in advance to an arbitrary time length.

  In response to this, based on the sampling data Ds1 and Ds2 output from the storage controller 3 (read from the storage memory 4), the CPU 9 receives the time t11 when the sampling data Ds1 exceeds the voltage value L1V (the first time in the present invention). The Mth time point when the electrical parameter of the input data of M satisfies the Mth condition: in this example, the second time point, and the time point t12 when the sampling data Ds2 exceeds the voltage value L2V (first time in the present invention). And the time length between the specified time points t11 and t12 and the context of both time points t11 and t12 are specified. At this time, the CPU 9 calculates that the time length between the time points t11 and t12 is the time Ts22, and “the time point t12 is a time point after the time point t11” (or “the time point t11 is the time point t12. It ’s an earlier point in time ”). In this example where N = M = 2, the time point t12 when the sampling data Ds2 exceeds the voltage value L2V is specified, the time length between the specified time point t12 and the time point t11 is calculated, and the time point t11 and the time point By simply executing each process for specifying the context of t12 once without repeating, M in the present invention becomes N (2 in this example).

  Next, the CPU 9 executes the waveform display process and the determination process according to the present invention in parallel based on the specified time length and context and the sampling data Ds1 and Ds2 read from the storage memory 4. Specifically, the CPU 9 firstly displays waveform data Dw1, Dw2 for displaying the signal waveforms of the sampling data Ds1, Ds2 (input signals Si1, Si2) (the first to Nth signal waveforms in the present invention). Is generated. At this time, on the basis of the sampling data Ds1 and Ds2 read from the storage memory 4, the CPU 9 performs the time 10a that is a time Ts1 before the time t11 in the sampling data Ds1 and the above-mentioned in the sampling data Ds2. A time point 10b that is a time Ts1 before the time point t12 is specified.

  Next, the CPU 9 discards the information before the time point t10a in the sampling data Ds1 and the information before the time point t10b in the sampling data Ds2 (part indicated by a broken line in FIG. 6), and “the time point t12 is the time point t11. As shown in FIG. 6, as an example, the signal waveform based on the sampling data Ds <b> 1 is only the time Ts <b> 22 (the phase corresponding to the time Ts <b> 22). Waveform data Dw1 and Dw2 are generated by being moved relatively so as to be delayed (example in which the second signal waveform is moved relative to the first signal waveform in the time axis direction). As a result, the waveform data Dw1 in a state where the portion corresponding to the time point t11 when the sampling data Ds1 exceeds the voltage value L1V and the portion corresponding to the time point t12 when the sampling data Ds2 exceeds the voltage value L2V are matched on the time axis. Dw2, that is, waveform data Dw1 and Dw2 in which the rising edges of the signal waveforms of both input signals Si1 and Si2 coincide with each other are generated.

  Subsequently, the CPU 9 reads the allowable area data Da1, Da2 from the recording unit 8 and defines the allowable areas A1, A2. In this case, as described above, the allowable area data Da1 is from the time point before the time Ts1 before the time point (time point t11 in the above example) that exceeds the voltage value L1V of the sampling data Ds1 acquired in the normal state. Based on the sampling data Ds1 for a predetermined time, the upper limit value and the lower limit value for the sampling data Ds1 are defined and generated. Further, the allowable area data Da2 is a sampling data for a predetermined time from a time point Ts1 before the time point (time point t12 in the above example) when the voltage value L2V of the sampling data Ds2 acquired in the normal state is exceeded. Based on Ds2, the upper limit value and the lower limit value for the sampling data Ds2 are defined and generated.

  Next, the CPU 9 performs sampling data based on the signal waveform based on the waveform data Dw1 and Dw2 (the sampling data Ds1 and Ds2 in the state where the time t11 and the time t12 are matched) and the allowable areas A1 and A2. Ds1 and Ds2 pass / fail are determined (in the present invention, “a part corresponding to each of the second to Nth time points of each of the second to Nth signal waveforms and each of the second to Nth allowable areas” Another example of the configuration of “determining pass / fail is determined in a state where the portions corresponding to the second to Nth time points are matched on the time axis”). At this time, as indicated by a solid line in FIG. 6, in the signal waveform based on the waveform data Dw2 and the allowable area A2 based on the allowable area data Da2, the time points when the voltage value L2V is exceeded coincide with each other on the time axis. For this reason, a situation in which a deviation in the time axis between the signal waveform based on the waveform data Dw2 and the allowable area A2 occurs and the normal waveform data Dw2 (sampling data Ds2) is determined to be abnormal is avoided.

  Further, in the waveform recording apparatus 1, as described above, during the generation of the waveform data Dw1, the interval between the time t11 when the sampling data Ds1 exceeds the voltage value L1V and the time t12 when the sampling data Ds2 exceeds the voltage value L2V. Is moved relative to the sampling data Ds2 by delaying the sampling data Ds1 by the time length (time Ts22) (the second signal waveform is relative to the second allowable area in the time axis direction). The time t11 when the voltage value L1V in the waveform data Dw1 is exceeded is matched with the time t12 when the voltage value L2V in the waveform data Dw2 is exceeded. Therefore, the part corresponding to the time point t11 when the voltage value L1V exceeds the signal value based on the waveform data Dw1 matches the part corresponding to the time point when the voltage value L1V exceeds the allowable area A1 based on the allowable area data Da1. Become. For this reason, a situation in which a deviation in the time axis between the signal waveform based on the waveform data Dw1 and the allowable area A1 occurs and the normal waveform data Dw1 (sampling data Ds1) is determined to be abnormal is avoided.

  Next, the CPU 9 stores the image data of the allowable areas A1 and A2 in the video memory 7 together with the waveform data Dw1 and Dw2, thereby displaying the signal waveform based on the waveform data Dw1 and Dw2 and the allowable areas A1 and A2 on the display unit. 6 are displayed on the same screen in the same manner (in the present invention, “the first to Nth signal waveforms in the respective first to Nth time points corresponding to the first to Nth time points are made to coincide with each other on the time axis. Another example of a configuration of “display”. At this time, as described above, in the signal waveform based on the waveform data Dw1, the sampling data Ds1 is obtained at the time of obtaining the allowable area data Da1 in the portion corresponding to the time t11 when the sampling data Ds1 exceeds the voltage value L1V. Sampling at the time of obtaining the allowable area data Da2 in the portion corresponding to the time point when the voltage value L1V is exceeded, the portion corresponding to the time point t12 when the sampling data Ds2 exceeds the voltage value L2V in the signal waveform based on the waveform data Dw2, and the allowable area A2. All of the parts corresponding to the time point when the data Ds2 exceeds the voltage value L2V coincide with each other on the time axis. Therefore, on the waveform display screen displayed on the display unit 6, as shown in FIG. 7, whether the sampling data Ds1, Ds2 (input signals Si1, Si2) that are the basis of both signal waveforms are output in synchronism with each other. Thus, both signal waveforms and allowable areas A1 and A2 are displayed. As a result, Ch. 1, Ch. It is possible to intuitively recognize the operating state of both the manufacturing apparatuses connected to 2.

  Thus, in this waveform recording apparatus 1, when the trigger signal St is output from the trigger signal output unit 5, the CPU 9 (data processing unit) stores the sampling data Ds1 stored in the storage memory 4 (storage unit). , Ds2 (each input data in the present invention), a time point t2 when the sampling data Ds2 exceeds the voltage value L2V (or a time point t11 when the sampling data Ds1 exceeds the voltage value L1V: Mth input data in the present invention And the time point t1 at which the sampling data Ds1 exceeds the voltage value L1V (or the sampling data Ds2 is at the voltage value). Time t12 when the voltage exceeds L2V: Time when the trigger signal St is output: Electricity of the first input data in the present invention A time length (in this example, time Ts21 or time Ts22) between the first time point and the Mth time point in the present invention is calculated. Each process for specifying the context is repeatedly executed until M in the present invention becomes 2 to N (in this example where N = M = 2, each process is executed once), the calculated time length and the specified before and after Predetermined data processing (in this example, waveform display processing and waveform determination processing) is executed using the relationship. Therefore, according to the waveform recording apparatus 1, data processing is performed on the asynchronous sampling data Ds1, Ds2 (input signals Si1, Si2) by synchronizing both sampling data Ds1, Ds2 without using a plurality of devices. (Waveform display processing and waveform determination processing) can be executed reliably and accurately.

  Further, according to the waveform recording apparatus 1, the CPU 9 uses the calculated time length and the specified context to determine the signal waveform (or sampling data) of the sampling data Ds1 during the waveform determination process (determination process in the present invention). Ds2 signal waveform: first signal waveform in the present invention and sampling data Ds2 signal waveform (or sampling data Ds1 signal waveform: examples of each of the second to Nth signal waveforms in the present invention. In this example of N = 2, at least one of the second signal waveform) is moved relative to the other in the time axis direction, and the time t2 of the signal waveform of the sampling data Ds2 (or the sampling data Ds1) Signal waveform time point t11: an example of each of the second to Nth time points in the present invention. In this example, A point corresponding to a point) and a time point t2 of the allowable area A2 (or a time point t11 of the allowable area A1 (second to Nth time points of the second to Nth allowable areas in the present invention). In this example, the signal waveform (or sampling data) of the sampling data Ds2 is determined by determining pass / fail in a state where the portion corresponding to the second time point of the second allowable area is matched on the time axis. The signal waveform of the sampling data Ds2 (or the signal waveform of the sampling data Ds1) is changed from the allowable area A2 (or the signal waveform of the sampling data Ds1). It is possible to avoid the occurrence of a situation that deviates from the permissible area A1). Over data Ds2 (or, the sampling data Ds1) and avoid a situation where it is determined erroneously to be abnormal, it is possible to determine the acceptance correctly.

  Furthermore, according to the waveform recording apparatus 1, the CPU 9 uses the calculated time length and the specified context in the waveform display processing to determine the signal waveform of the sampling data Ds1 and the signal waveform of the sampling data Ds2 (the first waveform in the present invention). Sampling is performed by displaying both signal waveforms by matching the portions corresponding to the time points t1 and t2 (the first to Nth time points in the present invention) of the 1st to Nth signal waveforms) on the time axis. Since the signal waveform of the data Ds1 and the signal waveform of the sampling data Ds2 can be easily compared, the difference between the two signal waveforms can be intuitively recognized.

  In addition, this invention is not limited to said structure. For example, in the waveform determination process, an example of determining whether or not the signal waveform based on the waveform data Dw2 is included in the allowable area A2 in a state where the signal waveform is advanced by the time Ts21 (the signal waveform is relatively set with respect to the allowable area A2). An example of determining whether the signal waveform based on the waveform data Dw1 is included in the allowable area A1 in a state where the signal waveform based on the waveform data Dw1 is delayed by the time Ts22 (for the allowable area A1) In this example, the signal waveform is relatively moved (relatively delayed example)), but the present invention is not limited to this. For example, as shown in FIG. 8, the time point t2 when the sampling data Ds2 (input signal Si2) exceeds the voltage value L2V is the time Ts21 than the time point t1 when the sampling data Ds1 (input signal Si1) exceeds the voltage value L1V. In the case of the later time point, the CPU 9 calculates the time length between the time point t1 and the time point t2 as the time Ts21, and the time point t2 is a time point later than the time point t1 (“context relationship” in the present invention). In this case, the waveform data Dw2 (in the state of being moved relative to the signal waveform based on the waveform data Dw2 (sampling data Ds2) and superimposed so as to delay the allowable area A2 by the time Ts21. A configuration for determining whether the sampling data Ds2) is acceptable or not can be adopted.

  Further, as shown in FIG. 9, the time t11 when the sampling data Ds1 (input signal Si1) exceeds the voltage value L1V is only the time Ts22 than the time t12 when the sampling data Ds2 (input signal Si2) exceeds the voltage value L2V. In the case of the previous time point, the CPU 9 calculates the time length between the time point t11 and the time point t12 as the time Ts22, and the time point t11 is the time point before the time point t12 (“context relationship” in the present invention). In this case, the waveform data Dw1 (in the state of being moved relative to the signal waveform based on the waveform data Dw1 (sampling data Ds1) so as to advance the allowable area A1 by time Ts22. A configuration for determining whether the sampling data Ds1) is acceptable can be adopted. Even when such a configuration is adopted, the signal waveform based on the waveform data Dw2 (or the waveform data Dw1) and the allowable area A2 (or the allowable area A1) are similar to the waveform recording apparatus 1 described above. Thus, it is possible to avoid a situation in which a shift in the time axis occurs and normal waveform data Dw2 (waveform data Dw1) is determined to be abnormal.

  Further, in order to facilitate understanding of the present invention, the waveform recording apparatus 1 having two measurement channels (Ch.1, Ch.2) has been described as an example, but the data processing apparatus according to the present invention is described below. It is only necessary that predetermined data processing can be executed on at least two input data. Specifically, it is possible to provide three or more measurement channels and perform various data processing on three or more input data (N is three or more in the present invention). Example). In this case, for example, when three measurement channels (Ch. 1 to Ch. 3) are provided and data processing for three input data (first to third input data) can be executed, the trigger signal output unit 5 When the trigger signal St is output from the CPU 9, the CPU 9 (data processing unit) determines that the Mth input data in the present invention is the Mth input data based on each input data stored in the storage memory 4 (storage unit). The Mth time point that satisfies the condition is specified, and the time length between the specified Mth time point and the first time point when the first input data satisfies the first condition is calculated and the first time point is calculated. Each process for specifying the context of the time point and the Mth time point is repeatedly executed until M in the present invention changes from 2 to N (in this example, where N = M = 3, each process is executed twice) to calculate Each time length and each identified Predetermined data processing using a post-relationship (e.g., waveform display processing and waveform determination processing) may be executed. By adopting such a configuration, in the same manner as the waveform recording device 1 configured to be able to process data for two input data, without using a plurality of devices, each asynchronous input data, Data processing (waveform display processing and waveform determination processing) can be executed reliably and accurately by synchronizing each input data.

Furthermore, although the example which applied the data processing apparatus which concerns on this invention to the waveform recording apparatus 1 was demonstrated, this invention is not limited to this, The waveform display apparatus which can perform a waveform display process, and a waveform determination process can be performed The present invention can be applied to various data processing devices such as simple waveform monitoring devices. Further, the waveform recording apparatus 1 configured to execute the waveform display process and the waveform determination process (determination process) as the predetermined data process in the present invention has been described as an example. For example, the waveform data Dw1, Dw2 in the above example is described. It may be generated and recorded in the recording unit 8 processes adopting the structure to perform (data recording processing) as the data processing Jo Tokoro a. In addition, the data processing apparatus according to the present invention is not limited to the processing apparatus including the A / D conversion units 2a and 2b, and the sampling data Ds1 and Ds2 generated by the measuring apparatus as an external apparatus are used in the present invention. A configuration in which data processing is performed as each of the first to Nth input data can also be adopted.

2 is a block diagram showing a configuration of a waveform recording apparatus 1. FIG. It is explanatory drawing for demonstrating the relationship between the time t1 when the sampling data Ds1 (input signal Si1) exceeded voltage value L1V, and the time t2 when the sampling data Ds2 (input signal Si2) exceeded voltage value L2V. It is explanatory drawing for demonstrating the waveform data Dw1, Dw2 in the state which made time t1, t2 correspond. It is explanatory drawing for demonstrating the relationship between waveform data Dw1, Dw2 in FIG. 3, and permissible areas A1, A2. It is explanatory drawing for demonstrating the relationship between the time t11 when the sampling data Ds1 (input signal Si1) exceeded voltage value L1V, and the time t12 when the sampling data Ds2 (input signal Si2) exceeded voltage value L2V. It is explanatory drawing for demonstrating the waveform data Dw1, Dw2 in the state which made time t11 and t22 correspond. It is explanatory drawing for demonstrating the relationship between waveform data Dw1, Dw2 in FIG. 6, and permissible area A1, A2. It is explanatory drawing for demonstrating the relationship between waveform data Dw1, Dw2 and permissible area A1, A2 in other embodiment. It is explanatory drawing for demonstrating the relationship between waveform data Dw1, Dw2 and permissible area A1, A2 in other embodiment. It is explanatory drawing for demonstrating the relationship between the time t1 when the input signal Si1x exceeded voltage value L1V, and the time t2 when the input signal Si2x exceeded voltage value L2V. It is explanatory drawing for demonstrating the relationship between input signal Si1x, Si2x and reference | standard area A1x, A2x. It is explanatory drawing for demonstrating the other case about the relationship of the time t1 when the input signal Si1x exceeded voltage value L1V, and the time t2 when the input signal Si2x exceeded voltage value L2V. It is explanatory drawing for demonstrating the relationship between input signal Si1x, Si2x and reference | standard area A1x, A2x in another case.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Waveform recording device 3 Storage controller 4 Storage memory 5 Trigger signal output part 6 Display part 7 Video memory 9 CPU
A1, A2 Allowable area Da1, Da2 Allowable area data Ds1, Ds2 Sampling data Dw1, Dw2 Waveform data L1V, L2V Voltage value St Trigger signal Si1, Si2 Input signal Ts1, Ts2, Ts11, Ts12, Ts21, Ts22 Time t0 to t3 t10 to t13

Claims (3)

(The N, 2 or greater natural number) Nos. 1 through N input data and a data processing unit for executing a predetermined data process on the respective input data to the input data, electrical of the first input data A trigger signal output unit that outputs a trigger signal at a first time point when the parameter satisfies the first condition, and a storage unit that stores the input data,
The data processing unit corresponds to each of the signal waveforms from the first signal waveform based on the first input data to the Nth signal waveform based on the Nth input data, and the first signal waveform. A determination process for determining pass / fail of each input data based on each allowable area from the first allowable area to the Nth allowable area corresponding to the Nth signal waveform can be executed as the predetermined data process. And when the trigger signal is output, based on the input data stored in the storage unit, the M-th input data (M is a natural number of 2 or more and N or less) of the input data The Mth time point when the electrical parameter satisfies the Mth condition is specified, the time length between the specified Mth time point and the first time point is calculated, and the first time point and the Mth time point are calculated. Context at the time of Repeatedly executes the processes of identifying "M" from "2" to the "N" at the time of the determination processing by using the pre-Symbol respective duration and pre SL each context, the second signal Each part from a part corresponding to the second time point as the Mth time point in the waveform to a part corresponding to the Nth time point as the Mth time point in the Nth signal waveform; data to determine the pass or fail in the state of being matched with the respective portions of the portion corresponding to the second point in the permissible area to the site corresponding to the point of the first N in permissive areas of the N-th in the time axis Processing equipment. (The N, 2 or greater natural number) Nos. 1 through N input data and a data processing unit for executing a predetermined data process on the respective input data to the input data, electrical of the first input data A trigger signal output unit that outputs a trigger signal at a first time point when the parameter satisfies the first condition, and a storage unit that stores the input data,
The data processing unit performs a waveform display process for displaying each signal waveform from a first signal waveform based on the first input data to an Nth signal waveform based on the Nth input data on a display unit. It is configured to be executable as predetermined data processing, and when the trigger signal is output, based on each input data stored in the storage unit, Mth (M is 2 or more and N or less) The M-th time point when the electrical parameter of the input data (natural number) satisfies the M-th condition is specified, and the time length between the specified M-th time point and the first time point is calculated and the first time point is calculated. each process of identifying the context of the time of the first time point and the second M repeatedly executes "M" from "2" to the "N", when the waveform display processing, pre-Symbol the duration Oyo by using the beauty before Symbol each context, The respective parts from the part corresponding to the first time point in the first signal waveform to the part corresponding to the Nth time point as the Mth time point in the Nth signal waveform are matched on the time axis. A data processing device for displaying each signal waveform . (The N, 2 or greater natural number) Nos. 1 through N input data and a data processing unit for executing a predetermined data process on the respective input data to the input data, electrical of the first input data A trigger signal output unit that outputs a trigger signal at a first time point when the parameter satisfies the first condition, and a storage unit that stores the input data,
The data processing unit corresponds to each of the signal waveforms from the first signal waveform based on the first input data to the Nth signal waveform based on the Nth input data, and the first signal waveform. A determination process for determining pass / fail of each input data based on each allowable area from the first allowable area to the Nth allowable area corresponding to the Nth signal waveform, and from the first signal waveform Waveform display processing for displaying each signal waveform up to the Nth signal waveform on the display unit is configured to be executable as the predetermined data processing, and when the trigger signal is output to the storage unit Based on each of the stored input data, the Mth point in time when the electrical parameter of the Mth input data (M is a natural number of 2 to N) satisfies the Mth condition is specified. The second The "N" time and the processing for identifying the context of the time of the first time point and the second M while calculating the duration between the first time point "M" from "2" repeatedly executed until, during the determination process, before SL with the time length and before Symbol each context, a portion corresponding to the second time point as a time point of the first M of the second signal waveform The Nth tolerance from the part corresponding to the Nth time point as the Mth time point in the Nth signal waveform and the part corresponding to the second time point in the second tolerance area. and the respective portions to portions corresponding to the time point of the first N determines the acceptance in the state of being matched in the time axis in the area, at the time of the waveform display processing, pre SL each time period and before Symbol each using context, the first signal waveform Data processing apparatus for displaying a definitive first from the portion corresponding to the time until a portion corresponding to the time point of the first N of the signal waveform of the first N of the individual portions are matched in the time axis by the signal waveforms .

Images