JP5197811B2 - Power converter - Google Patents

Description

  The present invention relates to a power converter in which a forward converter and an inverse converter in which a plurality of element units each having a pair of first switching elements and second switching elements that operate alternately are connected in parallel constitute a series resonance circuit.

  Conventionally, as this type of power conversion device, as shown in Patent Document 1 below, a current detection circuit is provided for each IGBT serving as a switching element, and an IGBT collector current value D is detected. The turn-off command signal is input when the difference between the current detection value detected in the vicinity of the input time point of the IGBT turn-off command signal and the maximum current value detected during the period when the turn-off command signal is input is equal to or greater than a predetermined value. There is known a gate drive circuit that balances the currents of the respective elements by shortening the time from when the IGBT is actually turned off until the IGBT is turned off.

JP 2002-369498 A

  However, in such a conventional gate drive circuit, it is necessary to provide a current detection circuit for each IGBT. Therefore, when a plurality of IGBTs are connected in parallel to form an inverse converter or the like, the current detection circuits are equal to the number of IGBTs. This necessitates a complicated and large circuit configuration, which increases the cost.

  In view of the above circumstances, the present invention provides a power conversion device that can easily and reliably eliminate current imbalance even when a plurality of switching elements are connected in parallel to constitute an inverse converter or the like. With the goal.

A power converter according to a first aspect of the present invention includes a forward converter and an inverse converter in which a plurality of element units each having a pair of alternately operating first and second switching elements are connected in parallel to form a series resonant circuit. A power conversion device comprising:
The element unit is connected in series to the first switching element and the second switching element included in the element unit, and detects one direct current detection for detecting a current flowing through the first switching element and the second switching element. Means, a first gate drive circuit for driving the first switching element, and a second gate drive circuit for driving the second switching element,
The inverse converter is
One element unit is used as a reference in one or both of a first state in which a current flows in the first switching element and a second state in which a current flows in the second switching element between a plurality of element units connected in parallel. As the element unit, the reference unbalance amount between the current detected by the DC current detecting means of the reference element unit and the current detected by the DC current detecting means of an element unit other than the reference element unit is eliminated. Controlling the operation timing of one or both of the first gate driving circuit and the second gate driving circuit of the element unit other than the element unit, and in either one or both of the first state and the second state, Set on the waveform of the current detected by the DC current detecting means of the reference element unit. The time difference between the reference measurement point and the measurement point set on the waveform of the detected current by the DC current detection means of the element unit other than the reference element unit corresponding to the reference measurement point is the current unbalance amount. It detects as .

  According to the power converter of the first invention, in each element unit, the current flowing through the first switching element and the second switching element is detected by one current detection means.

  In the first state where the current flows through the first switching element of each element unit, the current unbalance amount between the detection current of the reference element unit and the detection current of the other element units is eliminated. The operation timing of the first switching element is controlled by the first gate drive circuit.

  On the other hand, in the second state in which current flows through the second switching element of each element unit, the current imbalance between the detection current of the reference element unit and the detection current of the other element units is eliminated. The operation timing of the second switching element is controlled by the second gate drive circuit.

  Thereby, even if it does not provide a direct current detection means in each of a 1st switching element and a 2nd switching element, the current imbalance between each element unit can be eliminated.

  As described above, according to the power conversion device of the first invention, even when a plurality of switching elements are connected in parallel to constitute an inverse converter or the like, current imbalance can be easily and reliably eliminated.

Furthermore, according to the power converter of the first invention, since the waveform of the detected current of the current detecting means in each element unit shows a change over time, the detected current value itself can be compared to quantify the unbalance. Where it is difficult, instead of using the time difference between the reference measurement points set on the waveform as the current unbalance amount, the current unbalance amount can be easily quantified, and the time difference can be eliminated. Thus, current imbalance can be easily and reliably eliminated.

The power converter of the second invention is the first invention,
The inverse converter has a reference time from a turn-off point to a zero-cross point as a reference measurement point with a turn-off point on a waveform of a current detected by the DC current detection means of the reference element unit, and other than the reference element unit The turn-off point on the waveform of the current detected by the DC current detection means of the element unit is used as the measurement point, and the time difference from the time from the turn-off point to the zero cross point is detected as the current unbalance amount. And

According to the power converter of the second invention, the reference measurement point set on the waveform of the current detected by the current detection means is used as the turn-off point, so that the γ time, which is the time difference to the zero cross point, is determined as the current unbalance amount. Can be easily quantified. In addition, the γ time represents a phase difference between the output current and the voltage, and is measured in some form in a normal power converter. By using the γ time as the current unbalance amount, the current unbalance amount can be easily quantified without requiring a new device configuration.

Power conversion device of the third invention, the first or second shot Oite bright,
The inverse converter includes: a gate signal generation circuit that generates an operation signal of the first gate drive circuit and the second gate drive circuit of the reference element unit and an element unit other than the reference element unit; and at least the reference element unit A gate adjustment circuit for advancing and retreating the operation signals of the first gate drive circuit and the second gate drive circuit of the element unit other than
The gate adjustment circuit advances / retreats an operation signal of one or both of the first gate drive circuit and the second gate drive circuit of an element unit other than the reference element unit so that the current imbalance amount is eliminated. It is characterized by that.

According to the power conversion device of the third invention, the first gate drive circuit via the gate adjustment circuit so that the drive timing of the first switching element and the second switching element other than the reference element unit eliminates the current unbalance amount. And the operation signal of the second gate driving circuit is advanced and retracted. Thereby, even when a plurality of switching elements are connected in parallel to constitute an inverse converter or the like, current imbalance can be surely eliminated.

The block diagram which shows the whole structure of the power converter device of this embodiment. The circuit diagram at the time of comprising an inverter with a plurality of element units. Explanatory drawing which shows the structure of the gate adjustment circuit at the time of connecting an inverse converter in parallel. Explanatory drawing which shows the relationship between a current waveform and a gate signal.

  With reference to FIG. 1, the structure of the power converter device of this embodiment is demonstrated. The power converter of this embodiment is used for the heating control apparatus of an induction melting furnace, for example, as shown in FIG.

  Specifically, the heating control device for the induction melting furnace includes a power source 1, a high-voltage power receiving panel 2, a transformer 3 for a converter, a forward converter 4, an inverse converter 5, a high-frequency matching device 6, an induction A heating device 7 and a control circuit 10 are provided. A circuit composed of the forward converter 4 and the inverse converter 5 corresponds to a power converter.

  Here, the power source 1 is a rated AC power source and is connected to the high-voltage power receiving panel 2.

  The high-voltage power receiving board 2 is a device for energizing / stopping the power to the induction heating device and shutting off the power when a failure occurs, and includes a power fuse 2a and a circuit breaker 2b. The power fuse 2a is a means for interrupting current in the event of a short circuit accident, and the circuit breaker 2b performs an opening / closing operation accompanying energization and stop of the power source.

  The converter transformer 3 is connected to the high voltage power receiving panel 2 and adjusts the input voltage to the forward converter 4 of the power converter to a predetermined value.

  The power converter is an apparatus for generating an arbitrary high-frequency current from a commercial power supply of 50 Hz or 60 Hz connected to the transformer 3 for the converter, and a forward converter 4 functioning as an AC / DC converter; The inverter 5 functions as a DC / AC converter, and is controlled by an output control signal from the control circuit 10.

  Specifically, the forward converter 4 includes diode-type forward converters 41a and 41b, and smoothing reactors 43a and 43b are connected in series to the diode-type forward converters 41a and 41b, respectively.

  On the other hand, the inverse converter 5 includes IGBT inverse converters 511a and 511b, and smoothing capacitors 521a and 521b are connected in parallel to the IGBT inverse converters 511a and 511b. The IGBT inverse converters 511a and 511b are driven by gate drive circuits 551u and 551x (see FIG. 2), respectively. The IGBT inverse converter 511a corresponds to the first switching element of the present invention, and the IGBT inverse converter 511b corresponds to the second switching element.

  Further, the inverse converter 5 includes a DC voltage detector 531 that detects a DC voltage on the output side of the diode type forward converters 41a and 41b and outputs a DC voltage signal (a), and a DC current that detects a DC current. A DC current detector 541 for outputting a current signal (b) (corresponding to the DC current detecting means of the present invention), and output values of the DC voltage detector 531 and the DC current detector 541 are output to the control circuit 10. Is done.

  The control process in the inverse converter 5 may be executed by providing a control circuit (a gate signal generation circuit 11 and a gate adjustment circuit 12 described later) in the inverse converter 5, but in the present embodiment, the control circuit A case where the control process of the inverse converter 5 is performed as one function of the tenth will be described. Details of control contents of the inverse converter 5 by the control circuit 10 will be described later.

  The high-frequency matching device 6 is provided between the inverter 5 and the induction heating device 7 and improves the load power factor because the induction heating device 7 has a low power factor.

  Specifically, the high frequency matching device 6 detects the output from the resonance capacitors 61a and 61b, the current detector 62 that detects the output current of the high frequency matching device 6 and outputs the output current signal (d), and the output voltage. The voltage detector 63 is configured to output a voltage signal (e).

  The induction heating device 7 causes the heating coil 70 to pass a high-frequency current supplied from the high-frequency matching device 6 to generate an eddy current in the material X to be heated stored in the melting furnace body, and the eddy current causes a metal material to be generated. The to-be-heated material X is heated up and melt | dissolved with the Joule heat generated in the meantime.

  The control circuit 10 controls the operation / stop of the induction melting furnace, the output adjustment, and the like, and also controls the power factor detection unit that detects the output power factor as a control device of the induction melting furnace, and the IGBT inverse converters 511a and 511b. It has a function as a control signal generation part which performs.

  Next, with reference to FIG. 2, the case where the inverse converter 5 is configured by connecting a plurality of inverse converters 501 in FIG. 1 in parallel will be described.

  In FIG. 2, the inverse converter 5 of FIG. 1 is used as a reference element unit 501, and the element unit 502 in parallel with the output of the forward converter 4 and the high-frequency matching device 6 are in parallel with the IGBT inverse converters 512 a and 512 b. The smoothing capacitors 522a and 522b are connected in parallel to the IGBT inverse converters 512a and 512b. The IGBT inverse converters 512a and 512b are driven by gate drive circuits 552u and 552x, respectively. The IGBT inverse converter 512a corresponds to the first switching element of the present invention, and the IGBT inverse converter 512b corresponds to the second switching element.

  Further, a DC voltage detector 532 (not shown) that detects a DC voltage on the input side of the element unit 502 and outputs a DC voltage signal (a), and detects a DC current and outputs a DC current signal (b). DC current detector 542 (corresponding to the DC current detecting means of the present invention), and output values of DC voltage detector 532 (not shown) and DC current detector 542 are output to control circuit 10.

  In FIG. 2, for convenience of explanation, two inverse converters 5 are connected in parallel. However, when the number of parallel converters is three or more, the element unit 503 (not shown) is similarly forward-converted. IGBT type inverse converters 513a and 513b (not shown) and smoothing capacitors 523a and 523b (not shown) are connected in parallel to the output of the unit 4 and the high frequency matching device 6 and the IGBT type inverse converters 513a and 513b. The IGBT inverse converters 513a and 513b are driven by gate drive circuits 553u and 553x (not shown), respectively.

  Further, the element unit 503 (not shown) includes a DC voltage detector 533 and a DC current detector 543 (corresponding to the DC current detecting means of the present invention). In this case, the IGBT inverse converter 513a corresponds to the first switching element of the present invention, and the IGBT inverse converter 513b corresponds to the second switching element.

  Next, the configuration of a drive circuit that drives the IGBT inverse converters 511a, 511b, 512a, and 512b will be described with reference to FIG.

  The gate drive circuits 551u, 551x, 552u, and 552x that drive the IGBT inverse converters 511a, 511b, 512a, and 512b, respectively, are operations output by the gate signal generation circuit 11 and the gate adjustment (delay) circuit 12 of the control circuit 10. Operates by signal.

  For example, the gate signal generation circuit 11 outputs the output current signal (d) of the high frequency matching device 6 that is the output value of the current detector 62 and the output voltage signal (e) of the high frequency matching device 6 that is the output value of the voltage detector 63. ) To calculate the output power factor of the alternating current / voltage output from the high-frequency matching device 6, and the IGBT inverse converters 511a, 511b, 512a, 512b so that the output power factor becomes a desired power factor. The operation signal is generated.

  The gate adjustment circuit 12 eliminates the amount of current unbalance between the element units based on the DC current signals (b) of the DC current detectors 541 and 542 of the reference element unit 501 and the element units 502 other than the reference element unit. As described above, the operation signals of the gate drive circuits 551u, 551x, 552u, and 552x to be driven are advanced / retreated (delayed).

  Specifically, the gate adjustment circuit 12 sets the DC current signal (b) of the DC current detector 541 in the reference element unit 501 to the DC current signal Id1, and also detects the DC current detector in the element units 502 other than the reference element unit 501. As shown in FIG. 4, the operation signals S1u, S1x, S2u, and S2x of the gate drive circuits 551u, 551x, 552u, and 552x are generated using the DC current signal (b) of 542 as the DC current signal Id2.

  In FIG. 4, first, the output current waveform of the reference element unit 501 is shown at the top. In the lower stage, the upper side is a description of the first state in which current flows through the IGBT inverse converters 511a and 512a which are the first switching elements, and the lower side is the IGBT inverse converter 511b and the second switching element. It is description about the 2nd state in which an electric current flows into 512b.

  First, with respect to the first state, the detected value Id1 of the DC current detector 541 in the reference element unit 501 is shown, and the current value Iu1 of the IGBT inverse converter 511a in the reference element unit 501 is shown in the lower stage. Note that the current value Iu1 of the IGBT inverse converter 511a is used for explanation and is not an actual measurement value.

  Further, for the first state, the detection value Id2 of the DC current of the DC current detector 542 in the element unit 502 other than the reference element unit 501 is shown, and the current value of the IGBT inverse converter 512a in the element unit 502 is shown in the lower stage. Iu2 is shown. Note that the current value Iu2 of the IGBT inverse converter 512a is used for explanation and is not an actual measurement value.

  In the lower stage, the operation signal S1u of the gate drive circuit 551u for operating the IGBT inverse converter 511a of the reference element unit 501 and the IGBT inverse converter 512a of the element units 502 other than the reference element unit 501 are operated. The operation signal S2u of the gate drive circuit 552u for this is shown.

  On the other hand, the lower stage shows the current value Ix1 of the IGBT inverse converter 511b in the reference element unit 501 in the second state. Note that the current value Ix1 of the IGBT inverse converter 511b is used for explanation and is not an actual measurement value.

  Furthermore, regarding the second state, the current value Ix2 of the IGBT inverse converter 512b in the element units 502 other than the reference element unit 501 is shown in the lower stage. Note that the current value Ix2 of the IGBT inverse converter 512b is used for explanation, and is not an actual measurement value.

  In the lower stage, the operation signal S1x of the gate drive circuit 551x for operating the IGBT inverse converter 511b of the reference element unit 501 and the IGBT inverse converter 512b of the element units 502 other than the reference element unit 501 are operated. The operation signal S2x of the gate drive circuit 552x for this purpose is shown.

  Next, a method for adjusting current imbalance in the present embodiment will be described with reference to FIG.

  First, the IGBT inverse converters 511a and 512a in the first state are turned off by switching the operation signal S1u of the gate drive circuit 551u and the operation signal S2u of the gate drive circuit 552u from on to off, respectively. The inverse converters 511a and 512a are turned off.

  Here, each of the IGBT inverse converters 511a and 512a has a unique operation delay time. Due to variations in the operation delay time, as shown in FIG. 4, the IGBT inverse converter 511a (see Iu1) is used. Thus, the IGBT inverse converter 512a (see Iu2) is turned off earlier by the time difference Δt.

  The time difference Δt is the time γ1 from the turn-off of the DC current detection value Id1 of the DC current detector 541 in the reference element unit 501 to the zero cross point, and the DC current of the DC current detector 542 in the element units 502 other than the reference element unit 501. This is equal to the time difference from the time γ2 from the turn-off of the detected current value Id2 to the zero cross point. That is, the relationship is γ2−γ1 = Δt.

  Therefore, the gate adjustment circuit 12 sets the DC current detection value Id1 of the DC current detector 541 in the reference element unit 501 and the DC current detection value Id2 of the DC current detector 542 in the element units 502 other than the reference element unit 501. Based on the time γ1 and the time γ2, the time difference Δt can be calculated as the current unbalance amount. At this time, since the time γ represents the phase difference between the output current and the voltage, the time γ is measured for each element unit in a normal power conversion device. By using the time γ as the current unbalance amount, the current unbalance amount can be easily quantified without requiring a new device configuration.

  Then, the gate adjustment circuit 12 adds the time difference Δt quantified as the current imbalance amount to the operation signal S2u of the gate drive circuit 552u as a delay time at the turn-off timing in the next first state. As a result, in FIG. 4, the substantial turn-off timing of the IGBT inverse converters 511 a and 512 a can be aligned at the next turn-off timing of the first state. As a result, at the next turn-off timing of the first state, the time difference Δt does not occur, and thereby the current imbalance between the element units can be surely eliminated.

  As described above, according to the power conversion device of the present embodiment, even when the inverse converters 5 are configured by connecting a plurality of IGBT inverse converters 511a, 511b, 512a, and 512b in parallel, each IGBT inverse converter Current imbalance can be easily and reliably eliminated without providing current detection means in converters 511a, 511b, 512a, and 512b.

  In the present embodiment, the case where the current imbalance is eliminated in the first state where the current flows in the IGBT inverters 511a and 512a which are the first switching elements has been described. However, the IGBT type which is the second switching element. Similarly, in the second state in which current flows through the inverse converters 511b and 512b, the DC current detection value Id1 of the DC current detector 541 in the reference element unit 501 and the DC current detection in the element units 502 other than the reference element unit 501 The current imbalance can be eliminated based on the detected value Id2 of the direct current of the device 542.

  In addition, in each of the transition state from the first state to the second state and the transition state from the second state to the first state, the on-gate signal of the next other phase given from the off-gate signal through a certain dead time. However, at the turn-on in the delayed phase, current does not flow through the IGBT inverse converters 511a, 511b, 512a, and 512b, but actually flows through the flywheel diode (hatched line in FIG. 4). Part), there is no effect. Rather, this can eliminate the imbalance of the current flowing through the flywheel diode.

  Further, in the present embodiment, the DC current detection value Id1 of the DC current detector 541 in the reference element unit 501 and the DC current detection value Id2 of the DC current detector 542 in the element units 502 other than the reference element unit 501 are used. The γ time from each turn-off to the zero crossing point was quantified, but it is not limited to this. For example, the maximum or minimum value on these current waveforms is used as a reference measurement point, and the deviation is directly measured. A current unbalance amount may be used, and a time difference from a maximum or minimum value timing to a specific point such as a zero cross point may be used as the current unbalance amount.

DESCRIPTION OF SYMBOLS 1 ... Power supply, 2 ... High voltage receiving board, 3 ... Transformer for converters, 4 ... Forward converter, 5 ... Inverter, 6 ... High frequency matching device, 7 ... Induction heating device, 10 ... Control circuit, 11 ... Gate Signal generation circuit, 12 ... gate adjustment circuit, 41a, 41b ... diode type forward converter, 70 ... heating coil, 501 ... reference element unit, 502 ... element unit, 511a, 512a ... IGBT type inverse converter (first switching element) ) 511b, 512b ... IGBT type inverse converter (second switching element), 541, 542 ... DC current detector (DC current detection means), 551u, 551x, 552u, 552x ... gate drive circuit, X ... heated material .

Claims (3)

A forward converter and a reverse converter in which a plurality of element units each having a pair of first switching element and second switching element that operate alternately are connected in parallel constitutes a series resonant circuit,
The element unit is connected in series to the first switching element and the second switching element included in the element unit, and detects one direct current detection for detecting a current flowing through the first switching element and the second switching element. Means, a first gate drive circuit for driving the first switching element, and a second gate drive circuit for driving the second switching element,
The inverse converter is
One element unit is used as a reference in one or both of a first state in which a current flows in the first switching element and a second state in which a current flows in the second switching element between a plurality of element units connected in parallel. As the element unit, the reference unbalance amount between the current detected by the DC current detecting means of the reference element unit and the current detected by the DC current detecting means of an element unit other than the reference element unit is eliminated. Controlling the operation timing of one or both of the first gate driving circuit and the second gate driving circuit of the element unit other than the element unit ;
In one or both of the first state and the second state, a reference measurement point set on a waveform of a current detected by the DC current detection means of the reference element unit, and corresponding to the reference measurement point A power converter that detects a time difference from a measurement point set on a waveform of a current detected by the DC current detecting means of an element unit other than the reference element unit as the current imbalance amount . The power conversion device according to claim 1 ,
The inverse converter has a reference time from a turn-off point to a zero-cross point as a reference measurement point with a turn-off point on a waveform of a current detected by the DC current detection means of the reference element unit, and other than the reference element unit The turn-off point on the waveform of the current detected by the DC current detection means of the element unit is used as the measurement point, and the time difference from the time from the turn-off point to the zero cross point is detected as the current unbalance amount. A power converter. In the power converter device according to claim 1 or 2 ,
The inverse converter includes: a gate signal generation circuit that generates an operation signal of the first gate drive circuit and the second gate drive circuit of the reference element unit and an element unit other than the reference element unit; and at least the reference element unit A gate adjustment circuit for advancing and retreating the operation signals of the first gate drive circuit and the second gate drive circuit of the element unit other than
The gate adjustment circuit advances / retreats an operation signal of one or both of the first gate drive circuit and the second gate drive circuit of an element unit other than the reference element unit so that the current imbalance amount is eliminated. The power converter characterized by the above-mentioned.

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