JP5207939B2 - Method for manufacturing silicon carbide semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a silicon carbide semiconductor device, and more particularly to a method for manufacturing a silicon carbide semiconductor device suitable for manufacturing a silicon carbide Schottky diode.

  A kV class high breakdown voltage silicon carbide (hereinafter referred to as SiC) Schottky diode is configured by forming a Schottky electrode on an n-type epitaxial layer made of SiC. In this structure, the electric field tends to concentrate on the periphery of the junction surface between the epitaxial layer and the Schottky electrode, so that a p-type termination structure for reducing the electric field concentration is formed on the surface layer of the periphery of the junction surface (Schottky junction surface). There is a need.

  In order to form the p-type termination structure, a method is generally used in which p-type impurities such as Al (aluminum) and B (boron) are ion-implanted into the n-type epitaxial layer, and activation annealing is performed by high-temperature heat treatment at about 1500 ° C. or higher. . In order to form a Schottky junction with good characteristics, it is necessary to remove the altered layer on the SiC surface by this high-temperature heat treatment. For example, techniques described in Patent Documents 1 to 3 are known as techniques for removing the deteriorated layer.

JP 2008-53418 A JP 2001-35838 A JP 2004-363326 A

  In Patent Document 1, as a method for removing the above-described deteriorated layer, a method is proposed in which a sacrificial oxide film having a thickness of 40 nm or more is formed on the SiC surface layer after activation annealing, and the deteriorated layer is removed together with the sacrificial oxide film.

  The thickness of the altered layer by activation annealing is 100 nm or more, and in order to remove the altered layer by the method of Patent Document 1, it is necessary to increase the sacrificial oxide film in accordance with the thickness of the altered layer. There are problems peculiar to SiC, such as the behavior of C, and that it takes time to form a sacrificial oxide film. In addition, since the sacrificial oxide film is formed on the entire surface of the SiC surface, the surface of the p-type ion implantation layer is also removed by 100 nm or more.

  As a result, it is necessary to increase the p-type ion implantation amount in advance in anticipation of the removal amount or to perform deeper implantation, which increases the time and energy required for implantation.

  Patent Document 2 proposes a method of removing the altered layer by surface etching with plasma or surface etching in a high-temperature molten salt. However, this method also has a problem that the surface of the p-type ion implantation layer is removed by 100 nm or more as in the case of Patent Document 1, and the thickness of the implantation layer is reduced.

  Patent Document 3 proposes a method of removing a deteriorated layer by hydrogen etching. However, hydrogen etching is not only dangerous and requires an expensive high-temperature process apparatus. Similarly, the surface of the p-type ion implantation layer is also removed by 100 nm or more, and there is a problem that the thickness of the implantation layer becomes thin.

  As described above, when removing the altered layer after the activation annealing, the surface of the ion implantation layer is also removed at the same time, but a method with a small removal amount is desirable.

  The present invention has been made to solve the above-described problems, and provides a method for manufacturing a silicon carbide semiconductor device capable of reducing the amount of removal of the thickness of an ion-implanted layer that is an ion-implanted region. For the purpose.

A method for manufacturing a silicon carbide semiconductor device according to a first aspect of the present invention includes: (a) a step of selectively annealing ions in a silicon carbide layer and then activating annealing the silicon carbide layer; and (b) the ions. forming a photoresist implanted region, removing by (c) said photoresist as a mask, 100 nm or more dry etching of the surface layer of the silicon carbide layer after the activation annealing, (d) the Removing the photoresist; (e) after the step (d), forming a sacrificial oxide film over the entire surface of the silicon carbide layer; and (f) removing the sacrificial oxide film by wet etching. Is provided.

According to a first aspect of the present invention, in the method for manufacturing a silicon carbide semiconductor device, (a) a step of selectively annealing the silicon carbide layer and then activating annealing the silicon carbide layer; wherein the step of forming a photoresist on the ion implanted region, a step of removing by (c) said photoresist as a mask, 100 nm or more dry etching of the surface layer of the silicon carbide layer after the activation annealing, (d ) Removing the photoresist; (e) after the step (d), forming a sacrificial oxide film over the entire surface of the silicon carbide layer; and (f) removing the sacrificial oxide film by wet etching. And the step of dry etching the surface layer of the silicon carbide layer using the photoresist as a mask, and then wet etching the sacrificial oxide film. It is possible to reduce the removal of the ion implanted region of the thickness at the time of wet etching.

<A. Embodiment 1>
Hereinafter, as an example of a method for manufacturing a silicon carbide semiconductor device according to the first embodiment, a manufacturing process of a silicon carbide Schottky diode (SiC-SBD) will be described with reference to FIGS.

<A-1. Method for forming p-type termination structure>
First, as shown in FIG. 1, a high-concentration n-type silicon carbide (SiC) substrate 1 made of 4H—SiC having a (0001) silicon surface is prepared. The resistivity of silicon carbide substrate 1 is, for example, about 0.02 Ω · cm.

Next, on the (0001) silicon surface of the silicon carbide substrate 1, a low-concentration n-type epitaxial layer (hereinafter referred to as an epi layer) 2 having an impurity concentration of about 5 × 10 ¹⁵ / cm ^{3 as} a silicon carbide layer is grown. . Note that after the formation of the epi layer 2, a thermal oxide film (SiO ₂ thermal oxide film) may be formed on the surface of the epi layer 2 by heat treatment. In that case, the thermal oxide film functions as a process protective film.

  Next, in order to create a p-type termination structure that secures a breakdown voltage exceeding kV, for example, Al (aluminum) ions, which are p-type dopants, are implanted into the surface layer of the epi layer 2, and p is a region where ions are implanted. The type ion implantation layer 3 is selectively formed at a depth of about 0.8 μm. This formation may be performed by forming an implantation pattern with a photoresist by photolithography.

  Here, the p-type ion implantation layer 3 is formed continuously from an annular GR (Guard Ring) serving as a p-type termination structure and the outside of the GR, and JTE (Junction Termination Extension) for reducing the surface electric field. ). The Al ion concentration of JTE is set slightly lower than that of GR.

  In order to complete the p-type termination structure, it is necessary to activate the p-type ion implantation layer 3. Therefore, for example, using an RTA (Rapid Thermal Anneal) type annealing furnace, the entire epi layer 2 is subjected to high-temperature heat treatment (activation annealing) at 1600 ° C. for about 10 minutes in an atmospheric pressure Ar (argon) atmosphere.

  Then, in the surface layer of the epi layer 2 that has been subjected to the activation annealing, a modified layer (an outermost surface modified layer after the activation annealing) 4 is generated by the activation annealing. The thickness of the altered layer 4 is considered to be about 100 to 200 nm. In order to form a good Schottky junction, it is necessary to remove the altered layer 4.

<A-2. Removal method of altered layer>
Next, a method for removing the deteriorated layer 4 will be described. In the following, for convenience of explanation, it is assumed that the altered layer 4 has a thickness of 150 nm.

  First, as shown in FIG. 2, the p-type ion implantation layer 3 is protected by forming a pattern with a photoresist 5 on the p-type ion implantation layer 3 by photolithography and masking.

Next, as shown in FIG. 3, the surface layer of the epi layer 2 where the altered layer 4 is generated is removed by dry etching (here, RIE (Reactive ion etching)), for example, to a thickness of about 150 nm to remove the altered layer 4. To do. The etching conditions at this time are, for example, an SF ₆ gas flow rate of 30 sccm, a treatment chamber pressure of 0.5 Pa, an etching time of 20 seconds, and an etching rate of about 7.5 nm / second. The p-type ion implantation layer 3 is not etched because it is protected by the photoresist 5.

  On the new surface of the epi layer 2 after removing the surface layer 6a, a new altered layer 6b having a thickness of, for example, less than about 20 nm is generated by this dry etching.

  Next, the new altered layer 6b is removed. Even if the deteriorated layer 4 is not completely removed by dry etching and the lower layer portion remains, the portion is included in the new deteriorated layer 6b. If removed, the remaining lower layer portion of the altered layer 4 is also removed.

  Regarding the removal of the altered layer 6b, as shown in FIG. 4, the photoresist 5 is removed with a plasma ashing apparatus or an acetone solution, and the surface is washed with sulfuric acid.

Next, as shown in FIG. 5, the surface layer of the new surface of the epi layer 2 is sacrificial oxidized, and a sacrificial oxide film (SiO ₂ oxide film) 7 having a thickness of about 20 nm is formed on the surface layer. Since the sacrificial oxide film 7 is formed on the entire surface of the epi layer 2, it is also formed on the surface of the p-type ion implantation layer 3. The conditions for the sacrificial oxidation at this time are dry oxidation, 1150 ° C., and oxidation time of 2 hours. By this sacrificial oxidation, a sacrificial oxide film 7 is formed on the surface layer of the epi layer 2 so as to incorporate a new altered layer 6b.

  Next, as shown in FIG. 6, the sacrificial oxide film 7 is removed by wet etching, for example, in a 10-fold diluted hydrofluoric acid for 5 minutes, for example, thereby removing the new altered layer 6b together with the sacrificial oxide film 7. However, at this time, the surface of the p-type ion implantation layer 3 is also removed.

  In this way, the altered layer 4 is removed by dry etching, and then the altered layer 6b newly generated by dry etching is removed by formation of the sacrificial oxide film 7 and wet etching, whereby the surface of the epi layer 2 is altered. There is no state.

  Note that a damage layer (modified layer) (not shown) formed in the ion implantation layer 3 by activation annealing in the step of FIG. 1 may not be completely removed in the steps of FIGS. 5 to 6, but the removal results. The reason why it may be reduced is that the ion-implanted layer 3 has a low resistance, so that even if some damage remains, there is substantially no problem.

<A-3. Method for forming electrodes, etc.>
Next, as shown in FIG. 7, an ohmic electrode 8 made of, for example, Ni silicide is formed on the entire back surface of the silicon carbide (SiC) substrate 1, and, for example, Ti metal is formed on the surface of the epi layer 2 from which the altered layer 4 has been removed. The Schottky electrode 9 is selectively formed.

  If the process temperature during the formation of the ohmic electrode 8 is about 1000 ° C. that damages the Schottky junction (the junction between the Schottky electrode 9 and the epi layer 2), the ohmic electrode 8 is placed before the Schottky electrode 9. Need to be formed. In this case, the sacrificial oxide film 7 is preferably removed after the ohmic electrode 8 is formed.

  Further, although not shown in the drawing, a metal film for wire bonding is formed on the surface of the epi layer 2 with a metal such as Al, and a resin layer such as polyimide so as to have an opening for wire bonding on the metal film. Form. On the back surface of the epi layer 2, a metal film for die bonding is formed from a metal such as Ni or Au. In this way, a silicon carbide semiconductor device is manufactured.

  In the first embodiment, the formation of the p-type termination structure has been described. However, the present invention is not limited to the conductivity type.

<A-4. Effect>
According to the first embodiment of the present invention, in the method for manufacturing a silicon carbide semiconductor device, (a) a step of selectively annealing the epitaxial layer (silicon carbide layer) 2 and then activating annealing the epi layer 2 (B) a step of forming a photoresist 5 on the p-type ion implantation layer 3 which is on the ion-implanted region; and (c) a surface layer of the epi layer 2 is dried using the photoresist 5 as a mask. An etching step; (d) a step of removing the photoresist 5; (e) a step of forming a sacrificial oxide film 7 over the entire surface of the epilayer 2 after the step (d); And a step of removing the sacrificial oxide film 7 by wet etching, thereby forming a pattern on the p-type ion implantation layer 3 by photolithography and protecting the p-type ion implantation layer 3. Therefore, when the altered layer 4 on the surface layer of the epi layer (silicon carbide layer) 2 altered by the activation annealing is removed by dry etching, the surface of the p-type ion implanted layer 3 is not etched, and the p-type ion implanted layer 3 There is an effect that the thickness of the film does not decrease.

  However, when the new altered layer 6b on the surface generated by the dry etching is sacrificed and removed by wet etching, the surface of the p-type ion implantation layer 3 is also removed. At this time, the thickness of the sacrificial oxide film 7 is about 20 nm, and the surface of the p-type ion implantation layer 3 and the removal amount are about 20 nm. The thickness of the p-type ion implantation layer 3 is 0.8 μm, and therefore the reduction rate is 3% or less, so that the substantial thickness is not changed. Therefore, it is not necessary to increase or deeply implant the p-type ion implantation in anticipation of a decrease in the thickness of the p-type ion implantation layer 3 in advance, avoiding the problem of increasing the time and energy required for implantation, and etching. Limits on quantity can also be reduced.

<B. Second Embodiment>
<B-1. Removal method of altered layer>
In Embodiment 1, the sacrificial oxide film 7 is formed and removed in FIG. 5 in order to remove the surface alteration layer 6b newly generated by dry etching. The method for removing the new surface-affected layer 6b is not limited to the method shown in the first embodiment.

  After removing the photoresist 5 through the steps as shown in FIGS. 1 to 4, the entire surface of the epi layer 2 may be polished as shown in FIG. 8 to remove the new surface-modified layer 6b.

  The steps in FIGS. 1 to 4 are the same as those described in the first embodiment, and a description thereof will be omitted.

<B-2. Effect>
According to the second embodiment of the present invention, in the method for manufacturing a silicon carbide semiconductor device, (a) after selectively implanting ions into epitaxial layer (silicon carbide layer) 2, epi layer 2 is activated and annealed. A step, (b) a step of forming a photoresist 5 on the p-type ion implantation layer 3 that is on the ion-implanted region, and (c) a surface layer of the epilayer 2 using the photoresist 5 as a mask. Embodiments comprising: a step of dry etching; (d) a step of removing the photoresist 5; and (e) a step of polishing the entire surface layer of the epilayer 2 after the step (d). 1, a pattern is formed with a photoresist 5 on the p-type ion implantation layer 3 by photoengraving, and the p-type ion implantation layer 3 is protected. Therefore, an epitaxial layer (silicon carbide) altered by activation annealing is used. When the altered layer 4 of the surface layer 2 is removed by dry etching, the surface of the p-type ion implantation layer 3 is not etched, and in the second embodiment, polishing is performed instead of forming the sacrificial oxide film 7. However, at this time, the decrease in the thickness of the p-type ion implantation layer 3 is small, and there is an effect that the p-type ion implantation layer 3 does not substantially occur as in the first embodiment.

FIG. 6 is a diagram for describing a process for manufacturing a silicon carbide semiconductor device according to the first embodiment (a process for performing activation annealing on silicon carbide layer 2). It is a figure explaining the manufacturing process (The process of protecting the surface layer of the p-type ion implantation layer 3 with the photoresist 5) of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. It is a figure explaining the manufacturing process (process which removes the altered layer of the silicon carbide layer 2 by dry etching) of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. It is a figure explaining the manufacturing process (process of removing photoresist 5) of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. FIG. 6 is a diagram illustrating a manufacturing process of the silicon carbide semiconductor device according to the first embodiment (a process of forming sacrificial oxide film 7 by performing sacrificial oxidation on the surface layer of silicon carbide layer 2). It is a figure explaining the manufacturing process (The process of removing the sacrificial oxide film 7 by wet etching) of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. It is a figure explaining the manufacturing process (process which forms the Schottky electrode 9) of the silicon carbide semiconductor device which concerns on Embodiment 1. FIG. It is a figure explaining the manufacturing process (The process of removing the new alteration layer 6b by surface polishing) of the silicon carbide semiconductor device which concerns on Embodiment 2. FIG.

Explanation of symbols

  1 silicon carbide (SiC) substrate, 2 n-type epitaxial layer (silicon carbide layer), 3 p-type ion implantation layer, 4 altered layer by activation annealing, 5 photoresist, 6a removed portion by dry etching, 6b new by dry etching Altered layer, 7 sacrificial oxide film, 8 ohmic electrode, 9 Schottky electrode.

Claims (1)

(A) after selectively implanting ions into the silicon carbide layer, activation annealing the silicon carbide layer;
(B) forming a photoresist on the ion-implanted region;
(C) the photoresist as a mask, removing the surface layer of 100nm or more dry etching of the silicon carbide layer after the activation annealing,
(D) removing the photoresist;
(E) after the step (d), forming a sacrificial oxide film over the entire surface layer of the silicon carbide layer;
(F) removing the sacrificial oxide film by wet etching;
A method for manufacturing a silicon carbide semiconductor device comprising:

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