JP5211866B2 - Current control circuit - Google Patents

Description

  The present invention relates to a current control circuit that includes a current detection circuit and performs control according to a detection current, and relates to a technique that is effective when used in, for example, a charge control IC (semiconductor integrated circuit) equipped with a charge control circuit.

  Secondary battery chargers include MOSFETs (insulated gate field effect transistors; hereinafter referred to as MOS) provided between an input terminal to which a DC voltage from an AC adapter or the like is input and an output terminal to which a secondary battery is connected. An IC equipped with a charge control circuit for controlling a charge current by a current control transistor composed of a transistor) is used.

  Conventionally, in such a charge control IC, a current flowing through a current control transistor is detected during preliminary charge or quick charge, and control is performed so that the charge current is constant. Further, as a charging current detection method in the constant current control mode, a method is known in which a current detection sense resistor is connected in series with a current control transistor, and a current is detected from a voltage drop amount in the resistor. Although this method can detect current with relatively high accuracy, there is a problem that power loss in the sense resistor is large and power efficiency is lowered because a large current flows through the sense resistor.

  Therefore, a transistor having a smaller size is provided in parallel with the current control transistor, and the same gate voltage as that of the current control transistor is applied to generate a current proportionally reduced to the charging current by a current mirror circuit. A method has been proposed in which a current is detected from the amount of voltage drop across the resistor through a sense resistor. Although this method has the advantage of improving power efficiency because the current flowing through the sense resistor is small, the bias condition of the current detection transistor differs from that of the current control transistor due to load fluctuations, etc., so that the proportional reduction is achieved accurately. However, there is a problem in that the detection accuracy is lowered because it is not possible to flow the current.

On the other hand, in the drive control of the power transistor, a current detection transistor connected in current mirror with the power transistor and a bias control transistor in series with the power transistor are provided, and each drain voltage of the power transistor and the current detection transistor is input. A differential amplifier having an output terminal connected to the gate terminal of the bias control transistor is provided, and the bias condition of the current detection transistor is made the same as that of the output transistor by the imaginary short action of the differential amplifier. Thus, an invention has been proposed in which the current detection accuracy is improved (Patent Document 1).
JP 2004-259902 A

  The present inventors examined the application of a current mirror type current detection technique using an operational amplifier to a charge control circuit. As a result, in the drive control of a multi-cell type power MOSFET, when one of a plurality of cells is used for current detection, current detection with relatively high accuracy is possible. In a charge control semiconductor integrated circuit formed by forming a current control transistor and its control circuit on a single semiconductor chip, the current detection accuracy is reduced due to the influence of the wiring resistance of the output current path. It became clear that there was a problem.

  More specifically, when a current mirror type current detection technique is applied to a charge control semiconductor integrated circuit used in a charging device for charging a secondary battery, the input DC voltage VDD is constant. Since the output voltage (battery voltage) Vout becomes higher as the charging time elapses, the potential difference (Vout−VDD) decreases. Then, although the conversion voltage by the current detection resistor does not depend on the output voltage Vout as shown in FIG. 3B, the output current Iout decreases as the output voltage Vout increases as shown in FIG. End up. This is particularly noticeable when the current control MOS transistor and the current detection MOS transistor have different voltage drop amounts due to the parasitic resistance of the drain-side wiring, and thereby the bias conditions of the two transistors differ and the output voltage increases. This is because the current detection accuracy decreases.

  The present invention has been made paying attention to the problems as described above. The object of the present invention is to provide a current control circuit that detects and controls the current flowing in the current control MOS transistor by a current mirror method, and the output voltage is This is to prevent the current detection accuracy from being lowered even when the value becomes high.

  In order to achieve the above object, the present invention provides a current control MOS transistor connected between a voltage input terminal and an output terminal for controlling a current flowing from the voltage input terminal to the output terminal, and a source terminal for the current control. A current detection circuit having a current detection MOS transistor connected to the source terminal of the MOS transistor and having a size of 1 / N and having the same gate voltage applied to the gate terminal; and a current value detected by the current detection circuit And a gate voltage control circuit for controlling a gate voltage of the current control MOS transistor according to the current control circuit, wherein the current detection circuit includes a drain voltage of the current control MOS transistor and the current detection MOS transistor. And an operational amplifier circuit having the drain voltage as an input, and based on the output of the operational amplifier circuit, The bias state of the detection MOS transistor is configured to be the same as the bias state of the current control MOS transistor, and the operational amplifier circuit is configured to correspond to each drain of the current control MOS transistor and the current detection MOS transistor. The voltage drop of the resistance including the parasitic resistance of the wiring to the input point is set to be the same.

  Here, the current detection circuit includes a bias state control transistor connected between the current detection MOS transistor and a current-voltage conversion unit connected to a ground point, and the output of the operational amplifier circuit is the output of the operational amplifier circuit By being applied to the control terminal of the bias state control transistor, the drain voltage of the current control MOS transistor and the current detection MOS transistor can be configured to have the same potential. According to the above means, the bias conditions of the current control MOS transistor and the current detection MOS transistor are the same, and it is possible to improve the current detection accuracy by flowing a current with a high accuracy current ratio.

  Preferably, the wiring from the drain of the current control MOS transistor to the corresponding input point of the operational amplifier circuit and the wiring from the drain of the current detection MOS transistor to the corresponding input point of the operational amplifier circuit are as follows: By setting the cross-sectional areas to be the same and the length ratio to be 1: N, each drain of the current control MOS transistor and the current detection MOS transistor can be connected to the corresponding input point of the operational amplifier circuit. The voltage drop of the resistance including the parasitic resistance of the wiring is made the same.

  This makes it possible to improve the current detection accuracy by making the bias conditions of the current control MOS transistor and the current detection MOS transistor the same by a simple method of setting the wiring length to 1: N. In addition, since the wiring is formed on the insulating film, it can be arranged using a vacant space. Therefore, even if one of the wirings becomes redundant in order to make 1: N, the chip area is not increased.

  According to the present invention, in the current control circuit that detects and controls the current flowing through the current control MOS transistor by the current mirror method, it is possible to prevent the current detection accuracy from being lowered even when the output voltage becomes high. There is.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the drawings.

  FIG. 1 shows a schematic configuration of an embodiment of a charging control IC for a secondary battery to which a current control circuit according to the present invention is applied and a charging device using the same.

  As shown in FIG. 1, the charging device of this embodiment includes an AC-DC converter 20 that converts an AC voltage AC into a DC voltage such as 5 V, and a DC that is converted by the AC-DC converter 20. And a charging control IC 10 that charges a secondary battery 30 such as a lithium ion battery with a voltage VDD. The AC-DC converter 20 includes a rectifier diode bridge circuit and a DC that generates a desired DC voltage by switching and driving a switching element connected to the primary coil of the transformer by PWM or PFM. -It consists of a DC converter.

  The charging control IC 10 includes a voltage input terminal VIN to which the DC voltage VDD from the AC-DC converter 20 is input, a battery terminal BAT as an output terminal to which the secondary battery 30 to be charged is connected, and the voltage input terminal A current control MOS transistor Q1 formed of a P-channel MOSFET provided between VIN and the battery terminal BAT, and a gate voltage control circuit 11 that generates a gate control voltage of Q1 are provided.

  The charge control IC 10 generates a voltage corresponding to the potential difference between the voltage VBAT of the battery terminal BAT and the reference voltage Vref1 to perform constant voltage control, and outputs a voltage to the gate voltage control circuit 11 to detect the voltage. The gate width of the circuit 12 is 1 / N of the current control MOS transistor Q1, the source terminal is connected to the voltage input terminal VIN, and the same voltage as Q1 is the control terminal (gate terminal). Current detection MOS transistor Q2 that forms a current mirror circuit together with Q1, and a current detection circuit 13 having an error amplifier AMP2 that outputs a voltage corresponding to the detection current. In this embodiment, since the size ratio N between Q1 and Q2 is set to a value of about several hundreds to several thousands as will be described later, the current flowing through the current detection MOS transistor Q2 becomes very small. The loss in the current detection resistor (Rp) can be reduced.

  The gate voltage control circuit 11 is not particularly limited, but in the precharge mode immediately after the start of charging and the subsequent quick charge mode, the current control MOS transistor Q1 is set in response to the detection signal from the current detection circuit 13. Control is performed so that a predetermined constant current flows. Further, the gate voltage control circuit 11 is a current control MOS transistor according to the detection signal from the voltage detection circuit 12 until the secondary battery reaches about 4.2 V by, for example, rapid charging and then enters a fully charged state. The battery is charged by controlling Q1 with constant voltage control.

  Specifically, in the precharge mode, the gate voltage of Q1 is controlled so that the current control MOS transistor Q1 passes a relatively small charging current (constant current) such as 70 mA. This preliminary charging is performed in order to restore the battery voltage to about 3V in the lithium ion battery. Since the battery is likely to deteriorate when the charging current is large, the battery voltage is reduced to about 3V by suppressing the current. Exit this mode when recovered. The preliminary charging is usually performed for about 20 minutes in a lithium ion battery. Therefore, a timer can be built in and controlled by time. In the quick charge mode, the gate voltage of Q1 is controlled so that the current control MOS transistor Q1 passes a relatively large charge current (constant current) such as 700 mA.

  Furthermore, in the present embodiment, the current detection circuit 13 is devised to improve the current detection accuracy. Hereinafter, the current detection circuit 13 will be described in detail.

  As shown in FIG. 1, the current detection circuit 13 in this embodiment includes a bias state control MOS transistor between the drain terminal of the current detection MOS transistor Q2 and the external terminal RIO for connecting an external resistor. Q3 is connected in series with Q2. In addition, an operational amplifier (operational amplifier circuit) AMP1 composed of a MOS transistor is provided by inputting the drain voltage of the current control MOS transistor Q1 and the drain voltage of Q2, and the output of the operational amplifier AMP1 is applied to the gate terminal of the MOS transistor Q3. ing.

  Therefore, feedback is applied so that the drain voltage of Q1 and the drain voltage of Q2 become the same by the imaginary short action of the operational amplifier AMP1, thereby making the bias conditions, that is, the operating state of Q1 and Q2 the same, and Q2 A reduction current that is exactly proportional to the size ratio of This current is passed through an external resistor Rp connected between the external terminal RIO and the ground point, thereby improving current detection accuracy.

  The potential V1 of the connection node N1 subjected to current-voltage conversion by the resistor Rp is amplified to a voltage proportional to the potential difference from the predetermined reference voltage Vref2 by the error amplifier AMP2, supplied to the gate voltage control circuit 11, and the current value is The gate control of the current control MOS transistor Q1 is performed so as to have a predetermined value. Note that the reference voltage Vref2 supplied to the error amplifier AMP2 is switched between the precharge and the quick charge so that the current value at the precharge and the current value at the quick charge can be changed.

  Furthermore, in the present embodiment, the wiring L1 from the drain terminal (electrode) of the current control MOS transistor Q1 to the node N3 to which the non-inverting input terminal of the operational amplifier AMP1 is connected, and the drain terminal (electrode) of the current detection MOS transistor Q2 ) To the node N2 to which the inverting input terminal of the operational amplifier AMP1 is connected, the cross-sectional area is the same and the length ratio is set to 1: N, so that the voltage drop due to the parasitic resistance of the drain wiring is Q1. Q2 is the same. As a result, the bias conditions of Q1 and Q2 are further approximated, and the accuracy of the current mirror ratio can be further improved.

  In a charging device for a lithium-ion battery using a semiconductor integrated circuit for charge control in which this embodiment is not applied, that is, the ratio of L1 and L2 is not 1: N, the output voltage (battery When the voltage (Vout) increases as the charging time elapses and the potential difference (Vout−VDD) decreases, the output current Iout decreases in a region where the output voltage Vout is high as shown in FIG. On the other hand, in the lithium-ion battery charger using the charge control semiconductor integrated circuit to which the present embodiment is applied, even if the output voltage (battery voltage) Vout becomes higher as the charging time elapses, the output current Iout Has the advantage that it does not decrease as shown in FIG. Also, the conversion voltage V1 generated by the current detection resistor is constant regardless of the output voltage Vout as shown in FIG.

  Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment, and various modifications can be made based on the technical idea of the present invention. For example, in the embodiment, the wiring L1 from the drain terminal (electrode) of the current control MOS transistor Q1 to the input node of the non-inverting input terminal of the operational amplifier AMP1, and the drain terminal (electrode) of the current detection MOS transistor Q2 to the operational amplifier. The wiring L2 to the input node of the inverting input terminal of the AMP1 has the same cross-sectional area and the length ratio is set to 1: N, but the ratio of the cross-sectional area of the wiring L1 to the cross-sectional area of the wiring L2 is N: It may be set to 1, or both the lengths and the cross-sectional areas of the wirings L1 and L2 may be adjusted so that the voltage drop due to the parasitic resistance of the drain wiring is the same in Q1 and Q2.

  In the above embodiment, the common connection side (input terminal VIN side) of the current control MOS transistor Q1 and the current detection MOS transistor Q2 is defined as the source terminal, and the opposite side is defined as the drain terminal. The connection side (input terminal VIN side) can be regarded as a drain terminal, and the opposite side as a source terminal. The present invention includes such a case.

  In the current detection circuit 13 of the embodiment of FIG. 1, an external resistor is used as the current-voltage conversion resistor Rp connected in series with the MOS transistor Q3, but an on-chip resistor formed in the chip. May be used.

  Furthermore, although the MOSFET is used as the bias state control transistor Q3 in the above embodiment, a bipolar transistor may be used. In that case, the bipolar transistor to be used can be a lateral transistor that can be formed by a CMOS process, instead of a vertical transistor.

  In the above description, the example in which the present invention is applied to the current control circuit of the charging control IC for the secondary battery has been described. However, the present invention is not limited to the present invention. It can also be used for a current control circuit of a control IC.

1 is a schematic configuration diagram illustrating an example of a charging control IC to which a current control circuit of the present invention is applied and a charging device using the same. FIG. (A) is a graph showing the relationship between the output current Iout and the output voltage Vout in the charging device to which the embodiment of the present invention is applied, and (B) shows the relationship between the conversion voltage by the current detection resistor of the device and the output voltage Vout. It is a graph to show. (A) is a graph showing the relationship between the output current Iout and the output voltage Vout in a charging device using a current mirror type current detection circuit that does not adjust the resistance ratio of the drain wiring, and (B) is based on the current detection resistance of the device. It is a graph which shows the relationship between conversion voltage and output voltage Vout.

Explanation of symbols

10 Charge control IC
DESCRIPTION OF SYMBOLS 11 Gate voltage control circuit 12 Voltage detection circuit 13 Current detection circuit 14 Voltage comparison circuit 20 DC power supply 30 Secondary battery Q1 Current control MOS transistor Q2 Current detection MOS transistor Q3 Bias state control transistor

Claims (2)

A current control MOS transistor connected between the voltage input terminal and the output terminal for controlling a current flowing from the voltage input terminal to the output terminal;
A current detection circuit having a current detection MOS transistor having a source terminal connected to the source terminal of the current control MOS transistor and having a size of 1 / N and the same gate voltage applied to the gate terminal;
A gate voltage control circuit that controls a gate voltage of the current control MOS transistor according to a current value detected by the current detection circuit, and a current control circuit comprising:
The current detection circuit includes an operational amplifier circuit that inputs the drain voltage of the current control MOS transistor and the drain voltage of the current detection MOS transistor, and based on the output of the operational amplifier circuit, the current detection MOS transistor Is configured to be the same as the bias state of the current control MOS transistor,
The wiring from the drain of the current control MOS transistor to the corresponding input point of the operational amplifier circuit and the wiring from the drain of the current detection MOS transistor to the corresponding input point of the operational amplifier circuit have the same cross-sectional area. And a length ratio is set to 1: N. The current detection circuit includes a bias state control transistor connected between the current detection MOS transistor and a current-voltage conversion unit connected to a ground point,
By applying the output of the operational amplifier circuit to the control terminal of the bias state control transistor, the drain voltages of the current control MOS transistor and the current detection MOS transistor are configured to have the same potential. The current control circuit according to claim 1.

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