JP5222046B2 - Flyback converter - Google Patents

Description

  The present invention relates to a flyback converter that raises and lowers a DC voltage in a flyback manner.

  As a DC-DC converter that converts a direct current voltage into a direct current voltage, switching regulators such as a step-up type and a step-down type are known. As this type of switching regulator, for example, a flyback switching regulator using a flyback transformer in which the phases of the primary coil and the secondary coil are reversed has been proposed (see Patent Document 1).

JP 2004-127724 A (refer to pages 4 to 5 and FIG. 1)

  The flyback switching regulator (flyback converter) accumulates energy from the power source in the primary coil when the switch element connected in series to the primary coil of the transformer is on, and accumulates in the primary coil when the switch element is off. By repeating the operation of releasing energy from the secondary coil through the diode and the capacitor, the voltage from the power source can be boosted or lowered to be supplied to the load.

  However, in a conventional flyback switching regulator (flyback converter), large ringing occurs between the output terminals of the switch elements when the switch elements shift from on to off. This is due to resonance between the leakage inductance of the transformer and the parasitic capacitance, and the voltage due to ringing becomes a switching loss when the switch element is off. This switching loss accounts for a large proportion of the loss of the entire switching regulator, and this contributes to heat generation due to power loss.

  The present invention has been made in view of the above-described prior art, and an object thereof is to provide a flyback converter capable of reducing a switching loss accompanying a switching operation of a switch element.

  In order to achieve the above object, a flyback converter according to claim 1 forms a primary coil that receives a DC voltage from a power source, a switch element connected in series to the primary coil, and a transformer with the primary coil. In a flyback converter including a provided secondary coil and a rectifying element connected in series to the secondary coil, the flyback converter includes a capacitive element, and one end of the capacitive element is connected to the primary coil and the switch element. The other end of the capacitive element is connected to the cathode of the rectifying element.

  (Operation) When one end of the capacitive element is connected to the connection point between the primary coil and the switch element, and the other end of the capacitive element is connected to the cathode of the rectifier element, the capacitance is changed during a transition in which the switch element shifts from on to off. The elements are equivalently connected in parallel between both ends of the switch element, and the voltage generated at both ends of the switch element due to ringing can be absorbed by the capacitor element.

  On the other hand, when the switching element transitions from OFF to ON, a capacitive element is equivalently connected in parallel to both ends of the rectifying element, and the voltage generated at both ends of the rectifying element due to the delay in the reverse recovery time of the rectifying element It can be absorbed by the element.

  Therefore, the switching loss accompanying the switching operation of the switch element can be reduced.

  In the flyback converter according to claim 2, in the flyback converter according to claim 1, the rectifying element has a cathode connected to the other end of the capacitive element and one end of the secondary coil, and an anode grounded. The other end of the secondary coil is connected to a positive output terminal and grounded via a smoothing capacitor, and a positive DC voltage is output from the positive output terminal with respect to a reference potential at a ground point. It was set as the structure made.

  (Operation) The cathode of the rectifying element is connected to the other end of the capacitive element and one end of the secondary coil, the anode of the rectifying element is grounded, the other end of the secondary coil is connected to the positive output terminal, and a smoothing capacitor is used. Thus, every time the switch element is turned on and off, a positive DC voltage can be output from the positive output terminal with respect to the reference potential (ground potential) at the ground point.

  At this time, the capacitor element is equivalently connected in parallel between both ends of the switch element during a transition in which the switch element shifts from on to off, and the voltage generated at both ends of the switch element due to ringing can be absorbed by the capacitor element. it can.

  On the other hand, when the switching element transitions from OFF to ON, a capacitive element is equivalently connected in parallel to both ends of the rectifying element, and the voltage generated at both ends of the rectifying element due to the delay in the reverse recovery time of the rectifying element It can be absorbed by the element.

  Therefore, in a configuration in which a positive DC voltage is output from the positive output terminal with respect to the reference potential (ground potential) at the ground point, switching loss associated with the switching operation of the switch element can be reduced.

  The flyback converter according to claim 3, wherein the rectifying element has a cathode connected to the other end of the capacitive element and one end of the secondary coil, and an anode having a negative output. The other end of the secondary coil is grounded, and a negative DC voltage is output from the negative output terminal with respect to the reference potential at the ground point. It was set as the structure made.

  (Operation) Connect the cathode of the rectifier element to the other end of the capacitive element and one end of the secondary coil, connect the anode of the rectifier element to the negative output terminal, and connect a smoothing capacitor between the other end of the secondary coil and the anode of the rectifier element. By connecting to the other end of the secondary coil, a negative DC voltage is output from the negative output terminal to the reference potential (ground potential) at the ground point every time the switch element is turned on / off. be able to.

  At this time, the capacitor element is equivalently connected in parallel between both ends of the switch element during a transition in which the switch element shifts from on to off, and the voltage generated at both ends of the switch element due to ringing can be absorbed by the capacitor element. it can.

  On the other hand, when the switching element transitions from OFF to ON, a capacitive element is equivalently connected in parallel to both ends of the rectifying element, and the voltage generated at both ends of the rectifying element due to the delay in the reverse recovery time of the rectifying element It can be absorbed by the element.

  Therefore, in a configuration in which a negative DC voltage is output from the negative output terminal with respect to the reference potential (ground potential) at the ground point, switching loss associated with the switching operation of the switch element can be reduced.

In the flyback converter according to claim 4, in the flyback converter according to claim 1, one end of the secondary coil is connected to one of a pair of floating terminals, and the other end of the secondary coil is grounded. The rectifying element has a cathode connected to the other end of the capacitive element and the other of the floating terminals , an anode is grounded, a smoothing capacitor is connected between the floating terminals, and between the floating terminals, The floating voltage independent of the reference potential is output.

(Operation) One end of the secondary coil is connected to one of the pair of floating terminals, the other end of the secondary coil is grounded, and the cathode of the rectifying element is connected to the other end of the capacitive element and the other of the floating terminals. By connecting a smoothing capacitor between the floating terminals, a floating voltage independent of the reference potential (ground potential) at the ground point can be output between the floating terminals each time the switch element is turned on / off. it can.

  At this time, the capacitor element is equivalently connected in parallel between both ends of the switch element during a transition in which the switch element shifts from on to off, and the voltage generated at both ends of the switch element due to ringing can be absorbed by the capacitor element. it can.

  On the other hand, when the switching element transitions from OFF to ON, a capacitive element is equivalently connected in parallel to both ends of the rectifying element, and the voltage generated at both ends of the rectifying element due to the delay in the reverse recovery time of the rectifying element It can be absorbed by the element.

  Therefore, in a configuration in which a floating voltage independent of the reference potential (ground potential) at the ground point is output from the pair of floating terminals, switching loss associated with the switching operation of the switch element can be reduced.

  According to the flyback converter of the first aspect, the switching loss accompanying the switching operation of the switch element can be reduced.

  According to the flyback converter of the second aspect, in the configuration in which a positive DC voltage is output from the positive output terminal with respect to the reference potential at the ground point, switching loss associated with the switching operation of the switch element can be reduced. it can.

  According to the flyback converter of the third aspect, in the configuration in which a negative DC voltage is output from the negative output terminal to the reference potential at the ground point, the switching loss associated with the switching operation of the switch element can be reduced. it can.

  According to the flyback converter of the fourth aspect, in the configuration in which the floating voltage independent from the reference potential at the ground point is output from the pair of floating terminals, the switching loss accompanying the switching operation of the switch element can be reduced.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit configuration diagram of a flyback converter showing a first embodiment of the present invention, FIGS. 2A to 2C are on / off states of switch elements, voltage waveforms of switch elements and diodes, and FIG. FIGS. 4A to 4C are diagrams for explaining a path of a current flowing through a transformer when the switch element shifts from on to off, and FIG. 4 illustrates a flyback converter according to a second embodiment of the present invention. FIG. 5 is a circuit configuration diagram of a flyback converter showing a third embodiment of the present invention.

  In FIG. 1, the flyback converter 10 includes a transformer T1, an NMOS transistor 12, a diode D1 as a rectifying element, and a capacitor C1 as a capacitive element.

  The transformer T1 is configured as a flyback transformer including a primary coil L1 and a secondary coil L2. The primary coil L1 and the secondary coil L2 are coils of a flyback transformer, and each coil winding is wound around the core so that the input / output phases of the transformer T1 are opposite to each other.

  The primary coil L1 has one end (winding start side) connected to the input terminal 14 via the coil L3 and the other end (winding end side) grounded via the NMOS transistor 12, and the input terminal. 16 is connected. The coil L3 forms a line filter together with the capacitors C2 and C3, and the capacitors C2 and C3 are connected to both ends of the coil L3. The capacitor C2 is connected in parallel to the input terminals 14 and 16, and a DC voltage is applied between the input terminals 14 and 16 from a DC power source.

  One end (winding start side) of the secondary coil L2 is grounded via the diode D1, and the other end (winding end side) is connected to the output terminal 18. The output terminal 18 is connected to the output terminal 20 via the smoothing capacitor C4, and the output terminal 20 is grounded together with one end of the smoothing capacitor C4. The output terminals 18 and 20 to which the smoothing capacitor C4 is connected in parallel are configured as terminals to which a load such as a light source (lamp) is connected.

The NMOS transistor 12 is connected in series to the primary coil L1, the drain is connected to one end of the primary coil L1, the source is grounded, and the gate is connected to a pulse generation circuit (not shown). The NMOS transistor 12 is configured as a switch element that performs a switching operation in response to a pulse signal (on / off signal) from a pulse generation circuit.

  One end of the capacitor C1 is connected to the connection point 22 between the primary coil L1 and the NMOS transistor 12, and the other end is connected to the cathode of the diode D1. A connection point 24 between the other end of the capacitor C1 and the cathode of the diode D1 is connected to one end (winding start side) of the secondary coil L2. That is, the capacitor C <b> 1 is configured as a capacitive element that connects the connection point 22 and the connection point 24.

  The diode D1 has a cathode connected to the other end (connection point 24) of the capacitor C1 and one end (winding start side) of the secondary coil L2, and an anode grounded. The diode D1 is a rectifying element that functions to prevent a secondary current from flowing through the secondary coil L2 when the NMOS transistor 12 is on, and to function as a secondary current flows through the secondary coil L2 when the NMOS transistor 12 is off. It is configured.

  At this time, the output terminal 18 functions as a positive output terminal, the output terminal 20 functions as a ground point, and the output terminal 18 positively boosts or lowers the voltage from the reference potential (ground potential) at the ground point. DC voltage is output.

  In the flyback converter 10 having the above configuration, when the NMOS transistor 12 is turned on in response to the pulse signal from the pulse generation circuit when a DC voltage is applied to the input terminals 14 and 16, a primary current is supplied to the primary coil L1. The energy is accumulated in the primary coil L1. At this time, the diode D1 prevents the secondary current from flowing through the secondary coil L2.

  After the energy is stored in the primary coil L1, when the NMOS transistor 12 shifts from on to off, the phase of the voltage across the secondary coil L2 is reversed, and the energy stored in the primary coil L1 is transferred from the secondary coil L2. The secondary current is discharged, and a secondary current flows through the secondary coil L2 via the diode D1. When the secondary current is smoothed by the smoothing capacitor C4, the output terminal 18 outputs a positive DC voltage that is stepped up and down with respect to the reference potential (ground potential) at the ground point.

Here, when the NMOS transistor 12 is turned on after the NMOS transistor 12 is turned on with the capacitor C1 removed, the voltage between the drain and source of the NMOS transistor 12 is turned on as shown in FIG. against V _DS, a voltage V1 by the ringing is superimposed.

When the NMOS transistor 12 is turned on after turning off the NMOS transistor 12, as shown in FIG. 2B, the reverse of the diode D1 with respect to the voltage V _KA between the cathode and the anode of the diode D1. A voltage V2 is generated with a delay in the recovery time. The voltages V1 and V2 are switching losses associated with the switching operation of the NMOS transistor 12.

  Therefore, in this embodiment, in order to reduce the voltages V1 and V2, one end of the capacitor C1 is connected to the connection point 22 between the primary coil L1 and the NMOS transistor 12, and the cathode of the diode D1 and one end of the secondary coil L2 ( A configuration is adopted in which the other end of the capacitor C1 is connected to the connection point 24 to the winding start side).

  Hereinafter, the reason why the voltage V1 can be reduced by connecting the connection point 22 and the connection point 24 via the capacitor C1 will be described with reference to FIG.

  First, when the NMOS transistor 12 is turned on, as shown in FIG. 3A, a primary current I1 flows through the primary coil L1. At this time, since a voltage is applied to the diode D1 in the reverse direction, the diode D1 is in an OFF state and no secondary current flows through the secondary coil L2. In this case, the polarity of the charging voltage of the capacitor C1 is positive on the diode D1 side (connection point 24 side) and negative on the NMOS transistor 12 side (connection point 22 side).

  Thereafter, as shown in FIG. 3B, during the transition of the NMOS transistor 12 from on to off, as the phase of the voltage across the secondary coil L2 is inverted, the diode side (connection point) of the capacitor C1 is reversed. 24), the potential of the capacitor C1 on the NMOS transistor 12 side (connection point 22 side) also decreases, and the ringing current Ir accompanying the generation of the voltage V1 is secondary through the capacitor C1. It flows to the coil L2.

  At this time, the secondary coil L <b> 2 acts so that the current Ir from the capacitor C <b> 1 flows in the direction of the output terminal 18. For this reason, the current Ir flowing through the secondary coil L2 is supplied from the capacitor C1 until the potential on the diode D1 side (connection point 24 side) of the capacitor C1 drops to the ground potential. That is, the ringing current Ir flows to the secondary side (secondary coil L2) of the transformer T1 via the capacitor C1.

  Next, as shown in FIG. 3C, the voltage across the secondary coil L2 increases and the forward voltage applied to the diode D1 increases in the process in which the NMOS transistor 12 transitions from on to off. The potential on the diode D1 side (connection point 24 side) of the capacitor C1 is almost the ground potential (actually the forward potential of the diode D1, but is sufficiently smaller than the output potential, so the connection point 24 when the diode D1 is on is When the diode D1 is turned on, the current for discharging the energy stored in the primary coil L1 from the secondary coil L2 is the secondary current I2. It flows to the secondary coil L2 via the diode D1.

  In this way, even when the voltage V1 due to ringing is generated during the transition in which the NMOS transistor 12 transitions from on to off, the current Ir corresponding to the ringing accompanying the generation of the voltage V1 is equal to that of the transformer T1 via the capacitor C1. Since it flows to the secondary side, generation of the voltage V1 can be suppressed.

  At this time, the capacitor C1 is equivalently connected in parallel between the drain and source of the NMOS transistor 12 during a transition in which the NMOS transistor 12 transitions from on to off, and a ringing current Ir associated with the generation of the voltage V1. , Function to bypass to ground potential.

  Next, the reason why the voltage V2 can be reduced by connecting the connection point 22 and the connection point 24 via the capacitor C1 will be described.

  When the NMOS transistor 12 transitions from off to on, when the NMOS transistor 12 is turned on, the drain of the NMOS transistor 12 becomes substantially ground potential, and equivalently, a capacitor C1 is connected in parallel across the diode D1.

  For this reason, even if a negative voltage V2 is generated due to a delay in the reverse recovery time of the diode D1 during the transition of the NMOS transistor 12 from OFF to ON, the voltage V2 is absorbed by the capacitor C1.

  According to this embodiment, the capacitor C1 is equivalently connected in parallel between the drain and source of the NMOS transistor 12 when the NMOS transistor 12 transitions from on to off, and the NMOS transistor 12 transitions from off to on. In some cases, the capacitor C1 is equivalently connected in parallel to both ends of the diode D1, so that a positive DC voltage is output from the output terminal 18 to the reference potential (ground potential) at the ground point (output terminal 20). The switching loss accompanying the switching operation of the NMOS transistor 12 can be reduced.

  Next, a second embodiment of the present invention will be described with reference to FIG. In this embodiment, instead of grounding the anode of the diode D1, the output terminal 20 is connected, the output terminal 18 is grounded, and the output terminal 20 is connected to the reference potential (ground potential) of the ground point (output terminal 18). On the other hand, a negative DC voltage is output, and the other configuration is the same as that of the first embodiment.

  Specifically, the diode D1 has a cathode connected to the other end (connection point 24) of the capacitor C1 and one end (winding start side) of the secondary coil L2, and an anode connected to the output terminal 20. The other end (winding end side) of the secondary coil L2 is connected to the output terminal 18, is grounded, and is connected to the anode of the diode D1 through the smoothing capacitor C4. The output terminal 20 is configured as a negative output terminal. The output terminal 20 is stepped up / down with respect to the reference potential (ground potential) at the ground point (output terminal 18) every time the NMOS transistor 12 is turned on / off. Negative DC voltage is output.

  According to this embodiment, the capacitor C1 is equivalently connected in parallel between the drain and source of the NMOS transistor 12 when the NMOS transistor 12 transitions from on to off, and the NMOS transistor 12 transitions from off to on. In some cases, since the capacitor C1 is equivalently connected in parallel to both ends of the diode D1, a negative DC voltage is output from the output terminal 20 to the reference potential (ground potential) at the ground point (output terminal 18). The switching loss accompanying the switching operation of the NMOS transistor 12 can be reduced.

  Next, a third embodiment of the present invention will be described with reference to FIG. In this embodiment, the output terminals 18 and 20 are used as floating terminals, and a floating voltage independent of the reference potential (ground potential) at the ground point is output from the output terminals 18 and 20. The same as in the first embodiment.

  Specifically, the secondary coil L2 has one end (winding start side) connected to the output terminal 20, the other end (winding end side) grounded, and is connected to the anode of the diode D1. The diode D1 has a cathode connected to the output terminal 18 and is connected to the other end (connection point 24) of the capacitor C1.

  That is, the connection point 24 between the other end of the capacitor C1 and the cathode of the diode D1 is connected to the output terminal 18 instead of one end (winding start side) of the secondary coil L2. A smoothing capacitor C4 is connected to the output terminals 18 and 20 in parallel.

  The output terminals 18 and 20 are not directly grounded but are in a floating state from the reference potential (ground potential) at the ground point. For this reason, each time the NMOS transistor 12 is turned on / off, a floating voltage independent of the reference potential (ground potential) at the ground point is output from the output terminals 18 and 20 with the anode of the diode D1 as the ground point.

  According to this embodiment, the capacitor C1 is equivalently connected in parallel between the drain and source of the NMOS transistor 12 when the NMOS transistor 12 transitions from on to off, and the NMOS transistor 12 transitions from off to on. In some cases, the capacitor C1 is equivalently connected in parallel to both ends of the diode D1, so that the switching operation of the NMOS transistor 12 is performed in a configuration in which the floating voltage independent of the reference potential (ground potential) at the ground point is output from the output terminals 18 and 20. The switching loss accompanying this can be reduced.

It is a circuit block diagram of the flyback converter which shows 1st Example of this invention. (A)-(c) is an on-off state of a switch element, and the voltage waveform figure of a switch element and a diode. (A)-(c) is a figure for demonstrating the path | route of the electric current which flows into a trans | transformer, when a switch element changes from ON to OFF. It is a circuit block diagram of the flyback converter which shows 2nd Example of this invention. It is a circuit block diagram of the flyback converter which shows 3rd Example of this invention.

DESCRIPTION OF SYMBOLS 10 Flyback converter 12 NMOS transistor 14, 16 Input terminal 18, 20 Output terminal 22, 24 Connection point C1-C4 Capacitor D1 Diode

Claims (4)

A primary coil that receives a DC voltage from a power source;
A switch element connected in series to the primary coil;
A secondary coil provided to form a transformer with the primary coil;
In a flyback converter including a rectifying element connected in series to the secondary coil,
A capacitor element, wherein one end of the capacitor element is connected to a connection point between the primary coil and the switch element, and the other end of the capacitor element is connected to a cathode of the rectifier element. Flyback converter. The flyback converter according to claim 1,
The rectifying element has a cathode connected to the other end of the capacitive element and one end of the secondary coil, and an anode grounded,
The other end of the secondary coil is connected to the positive output terminal and grounded through a smoothing capacitor.
A flyback converter, wherein a positive DC voltage is output from the positive output terminal with respect to a reference potential at a ground point. The flyback converter according to claim 1,
The rectifying element has a cathode connected to the other end of the capacitive element and one end of the secondary coil, an anode connected to a negative output terminal, and is grounded via a smoothing capacitor,
The other end of the secondary coil is grounded,
The flyback converter, wherein a negative DC voltage is output from the negative output terminal with respect to a reference potential at a ground point. The flyback converter according to claim 1,
One end of the secondary coil is connected to one of a pair of floating terminals, the other end of the secondary coil is grounded,
In the rectifying element, the cathode is connected to the other end of the capacitive element and the other of the floating terminals , the anode is grounded,
A smoothing capacitor is connected between the floating terminals,
A flyback converter, wherein a floating voltage independent of a reference potential at a ground point is output from between the floating terminals.

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