JP5229155B2 - IC chip, data processing method, data processing program, IC card, etc. - Google Patents

Description

  The present invention relates to a technical field such as an IC chip and a data processing method capable of quickly executing more processes.

  An IC card that communicates with an external device, for example, an IC card (UIM card) incorporated in a mobile phone is connected to the mobile phone according to an electrical signal and a transmission protocol defined in a predetermined standard (ISO7816, etc.). Communication between them.

  In recent years, with the increase in the volume of data handled in such communication, there is a movement to support USB standard communication in UIM cards (for example, Patent Document 1).

  The USB standard communication is defined to include a mode for shifting to a low power consumption state (suspend) in order to suppress power consumption of the entire UIM card.

  More specifically, when no signal is input to or output from the UIM card communication bus (no signal state) after 3 ms, and no signal state has elapsed for 7 ms (after 10 ms from the no signal state) Are defined to shift to the low power consumption state (for example, Non-Patent Document 1).

JP 2004-139207 A

Universal Bus Specification Revision 2.0 (April 27 2000)

  However, in the USB standard communication, a period for shifting to the low power consumption state is defined, but no specific operation of the UIM card in the period is defined.

  Therefore, when a processing command is newly input to the UIM card during the period of transition to the low power consumption state, the operation content performed by the IC card that has received the input is left to the setting of the UIM card developer. It was.

  For example, as an example of the processing instruction, there is writing to a nonvolatile memory. The writing process to the non-volatile memory consumes a lot of time in the UIM card.

  If such processing is input during the transition to the low power consumption state, and if the processing is set to be accepted and executed, writing cannot be performed normally and hinders normal operation thereafter. End up.

  On the other hand, when such a process is input in the period for shifting to the low power consumption, the process is not accepted, and it is set to shift to the low power consumption state after waiting for the period to shift to the low power consumption. In some cases, there is a risk that the timing for stopping the above processing will be advanced more than necessary.

  Therefore, the present invention has been made in view of the problems of the standards, and an example of the purpose is to provide an IC chip, a data processing method, and the like that can perform many processes quickly and reliably. .

  In order to solve the above-described problem, the IC chip according to claim 1 executes a plurality of processes based on a signal input from the outside, and the type of the process and a processing time required for the completion of the process And a monitoring unit that monitors the input state of the signal, and counts the elapsed time that the no-signal state continues from the no-signal state without the signal input. And a preparation period for transitioning to a low power consumption preparation period, which is a period for preparing the IC chip for transition to a low power consumption state when the elapsed time is measured to exceed a first threshold. Low power consumption that causes the IC chip to transition to a low power consumption state when the elapsed time exceeds the second threshold after the transition to the low power consumption preparation period by the transition means and the time counting means Electric When a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input during the low power consumption preparation period, the low power consumption from the time when the signal is input Execution means for executing one or a plurality of the processes that can be completed within the remaining time until the transition to the state.

  According to the present invention, the IC chip shifts to the low power consumption preparation period when the elapsed time in which the no-signal state continues from the no-signal state in which no signal is input exceeds the first threshold, When the time exceeds the second threshold, a signal indicating an instruction to execute a plurality of the processes in which the execution order is set in advance is input during the low power consumption preparation period. In this case, one or a plurality of the processes that can be completed can be executed within the remaining time from the time when the signal is input to the transition to the low power consumption state.

  Accordingly, since the IC chip executes one or a plurality of processes that can be completed within the low power consumption preparation period, many processes can be performed quickly and reliably.

  The IC chip according to claim 2 is the IC chip according to claim 1, wherein the execution unit associates the remaining time with the process set as a plurality of processes to be executed according to the order. When each processing time is longer than the maximum processing time, one or a plurality of the processes are executed according to the order.

  Therefore, the IC chip compares the processing time of one of the stored processing times with the remaining time and determines the processing to be executed, so that the processing load is very light and can be easily mounted. In addition, many processes can be executed quickly and reliably with a simple configuration.

  The IC chip according to claim 3 is the IC chip according to claim 1, wherein the execution unit associates the remaining time with the process set as a process to be executed next according to the order. When it is longer than the processing time, the processing is executed.

  Therefore, the IC chip compares the remaining processing time with the processing time associated with the processing to be executed next in the order among the stored processing times, and determines the processing to be executed. Can be executed quickly and reliably.

  The IC chip according to claim 4 is the IC chip according to claim 1, wherein the execution unit associates the remaining time with the process set as a process to be executed next according to the order. If the processing time is smaller than the processing time, the processing time smaller than the remaining time is selected from the processing times associated with the other processing set as the processing to be executed according to the order, and the processing time is associated. Execute the specified process.

  Therefore, since the IC chip executes all the processes that can be completed within the remaining time, more processes can be performed quickly and reliably.

  An IC chip according to a fifth aspect is the IC chip according to any one of the first to fourth aspects, wherein the IC chip corresponds to data communication conforming to a USB communication standard.

  An IC card according to a sixth aspect includes the IC chip according to any one of the first to fifth aspects, and an IC card base.

  The data processing method according to claim 7, wherein a plurality of processes are executed based on a signal input from the outside, and the type of the process and a processing time required to complete the process are stored in association with each other A data processing method in an IC chip having a section, a monitoring step of monitoring the input state of the signal, and a timing step of measuring an elapsed time from the no-signal state where no signal is input to the no-signal state continues A preparation period transition step of transitioning to the low power consumption preparation period, which is a period of preparing to transition the IC chip to the low power consumption state when the elapsed time is measured to exceed the first threshold; Low power consumption that causes the IC chip to transition to a low power consumption state when the elapsed time is measured by the timing means to have exceeded a second threshold after transition to the low power consumption preparation period When a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input during a row process and the low power consumption preparation period, the low power consumption from the time when the signal is input An execution step of executing one or a plurality of the processes that can be completed within the remaining time until the transition to the state.

  A data processing program according to claim 8, wherein the data processing program executes a plurality of processes based on a signal input from the outside, and stores the type of the process and the processing time required to complete the process in association with each other A monitoring means for monitoring the input state of the signal, a timing means for measuring an elapsed time in which the no-signal state continues from a no-signal state where no signal is input, and the elapsed time. When it is timed that the first threshold value has been exceeded, the preparation period transition means for transitioning to the low power consumption preparation period, which is a period for preparing the IC chip to transition to the low power consumption state, the timing means, Low power consumption transition means for transitioning the IC chip to a low power consumption state when it is timed that the elapsed time has exceeded the second threshold after the transition to the low power consumption preparation period In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input, the state shifts to the low power consumption state from the time when the signal is input. In the remaining time up to, it is made to function as an execution means for executing one or a plurality of the processes that can be completed.

  As described above, according to the present invention, the IC chip enters the low power consumption preparation period when the elapsed time in which the no-signal state continues from the no-signal state in which no signal is input exceeds the first threshold value. When the elapsed time exceeds a second threshold value, the process shifts to a low power consumption state, and in the low power consumption preparation period, an instruction to execute a plurality of processes whose execution order is set in advance is executed. In order to execute one or a plurality of the processes that can be completed within the remaining time from the time when the signal is input to the transition to the low power consumption state when the signal shown in FIG. It can be executed quickly and reliably.

It is a block diagram which shows the structure and function outline | summary of IC card 8 concerning embodiment of this application. It is a figure which shows the operation | movement outline | summary of CPU6. It is a figure which shows the outline | summary of the process flow (processing example) which is an example of the judgment of the said table and the said completion completion. It is a flowchart which shows operation | movement of CPU6 in embodiment (I). It is a flowchart which shows operation | movement of CPU6 in embodiment (II). It is a flowchart which shows operation | movement of CPU6 in embodiment (III).

  Hereinafter, the best embodiment of the present application will be described with reference to the accompanying drawings. The embodiment described below is an embodiment when the present application is applied to an IC card that realizes transmission / reception of data to / from an external device, execution of operations, and the like.

  First, the configuration and functional outline of an IC card that realizes transmission / reception of data to / from an external device and execution of operations according to the embodiment of the present application will be described with reference to FIG.

  FIG. 1 is a block diagram showing an outline of the configuration and functions of an IC card according to an embodiment of the present application.

  The IC card according to the present embodiment has a process (for example, processing indicated by the signal) according to power and signals necessary for an operation input from an external device (not shown) as an external device via a reader / writer device (not shown). Data read processing etc.) are executed.

  Specifically, as shown in FIG. 1, the IC card 8 includes the IC chip 1 on the IC card base 7. The IC chip 1 includes an interface 2, a ROM (Read Only Memory) 3, a RAM (Random Access Memory) 4, an EEPROM 5, a CPU (Central Processing Unit) 6, and the like.

  The interface 2 is an input / output port (port) for transmitting and receiving the above-described data and the like, and the CPU 6 communicates with the external device and the like via the interface 2.

  More specifically, the interface 2 has eight terminals C1 to C8 defined by ISO / IEC7816 or the like.

  In such ISO / IEC7816, C1 is a power supply terminal VCC, C2 is a reset terminal RST, C3 is a clock terminal CLK, C5 is a ground terminal GND, C6 is a program variable voltage supply terminal VPP, and C7 is an input / output terminal I / O. It is stipulated to be used.

  Furthermore, the IC card 8 of the present embodiment supports a USB communication (transmission) protocol (based on the USB communication standard) so as to enable high-capacity and high-speed communication with the outside.

  The USB communication standard is a well-known technique and will not be described in detail, but has been standardized by Universal Bus Specification Revision 2.0 (April 27 2000). It is like that.

  The IC card 8 compliant with the USB communication standard can transmit and receive data based on the USB protocol using C4 as IC_DP and C8 as IC_DM among the terminals of the interface 2.

  Further, the USB communication standard is defined to include a mode (suspend mode) for shifting to a low power consumption state (suspend) in order to suppress power consumption of the entire IC card 8.

  Specifically, after 3 ms have passed from when no signal is input to or output from the interface 2 (no signal state), and after 7 ms of no signal state (after 10 ms from the no signal state), It is defined that the IC card 8 is shifted to the low power consumption state.

  On the other hand, in the USB standard communication, the period for shifting to the low power consumption state is defined, but the specific operation of the IC card 8 in the period is not defined at all.

  The ROM 3 stores a program to be executed by the CPU 6, and the CPU 6 controls the IC chip 1 based on the program and executes an operation indicated by the command.

  The RAM 4 is a memory used as a work area for the CPU 6 to control the IC chip 1 in an integrated manner.

  The EEPROM 5 as an example of the storage unit of the present application is a kind of nonvolatile semiconductor memory, and is a PROM (Programmable Rom) that can erase data stored in the storage area and re-store it any number of times.

  Further, the EEPROM 5 stores in advance a table in which the type of processing (for example, the type of data storage, reading, etc.) and the processing time required to complete the processing are stored in association with each other. Although details of the table will be described later, the table may be stored not only in the EEPROM 5 but also in the ROM 3.

  The contents of the table can be additionally changed and updated.

  The CPU 6 controls the overall operation of the IC chip 1 based on the program as described above, and also functions as a monitoring unit, a timing unit, a preparation period transition unit, a low power consumption transition unit, and an execution unit of the present application.

  Next, the operation of the CPU 6 will be described with reference to FIGS.

  In the present embodiment, the CPU 6 shifts to a low power consumption preparation period, which will be described later, when an elapsed time from the no-signal state in which no signal is input exceeds 3 ms as an example of the first threshold value. When the elapsed time exceeds 7 ms as an example of the second threshold value, the low power consumption state is entered.

  Then, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input during the low power consumption preparation period, the CPU 6 starts the low power consumption from the time when the signal is input. One or more of the processes that can be completed are executed within the remaining time until the power state is entered.

  Hereinafter, the above operation will be described in detail.

  First, an outline of the operation of the CPU 6 of the present application will be described with reference to FIG.

  FIG. 2 is a diagram showing an outline of the operation of the CPU 6 of the present application.

  As described above, the CPU 6 monitors the input state of the signal at the terminal of each interface 2, and the state of the signal monitored by the CPU 6 is shown in the graph shown in FIG.

  Specifically, the graph shows that the state of the signal of IC_DP (C4) is the High state and the state of the signal of IC_DM (C8) is the Low state.

  Here, in the above-described USB communication standard, the details of the above-described no-signal state are defined. Specifically, the no-signal state is defined as “a state in which the signal state of the IC_DP is a high state and the state of the signal of the IC_DM (C8) is a low state”.

  In view of the above definition, it is understood that the signal input state shown in FIG. 2 is a no-signal state.

  If a signal indicating an instruction to execute some processing is input before 3 ms elapses from the no-signal state (FIG. 2A), the CPU 6 executes the processing indicated by the signal. ing.

  Conventionally, after the elapse of 3 ms, until 10 ms elapses from the no-signal state (until the shift to the low power consumption state) (period of FIGS. 2A to 2C), there is no operation. It was not defined.

  In the present embodiment, the CPU 6 measures the time for which the no-signal state continues, for example, by a timer or the like.

  Further, in the present embodiment, after the elapse of 3 ms, the low power consumption preparation period (FIG. 2A) is taken until the transition to the low power consumption state (after the elapse of 3 ms and further elapse of 7 ms). ~ (C) period).

  In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is preset is input, the CPU 6 starts the low power consumption from the time when the signal is input. One or a plurality of the processes that can be completed are executed within the remaining time (the period shown in FIGS. 2B to 2C) until the power state is shifted.

  Specifically, the CPU 6 refers to the table stored in the EPPROM 5 and compares the remaining time with the processing time required for completing the processing indicated by the signal to be executed.

  Here, an example of determining whether or not the completion can be performed by the CPU 6 will be described in detail with reference to FIG.

  FIG. 3 is a diagram showing an outline of the processing flow (processing example) as an example of the determination of the table and whether or not the completion is possible.

  In FIG. 3, Table A shows the above table, and Table B shows a processing flow (processing example) that is an example of determining whether or not the above completion is possible.

  Table A shows that process A is stored as a table in association with process A and 3 ms as the time required to complete process A (process time). Similarly, the processing time of processing B and processing B is 3 ms, the processing time of processing C and processing C is 5 ms, the processing time of processing D and processing D is 4 ms, and the processing time of processing E and processing E is 1 ms. Are stored in association with each other.

  Table B shows a processing flow as an example of determining whether or not the completion is possible immediately after shifting to the low power consumption preparation period (FIG. 2A).

  In the processing flow that is an example of the determination as to whether or not the completion can be performed as shown in Table B, a signal indicating an instruction to execute a plurality of the processes in which the input execution order is set in advance in the processing order and processing content Accordingly, the processes to be executed are listed in order from the earliest.

  Specifically, as a result of inputting the signals set to be executed in the order of process A, process E, process C, process B, and then process D, Table B performs processes according to the order. Listed in descending order of execution (processing A).

  The elapsed time indicates the elapsed time when processing is executed in accordance with the order from the time when the signal is input (FIG. 2A). In other words, the elapsed time indicates the cumulative sum of the processing times of the completed processing.

  In Table B, with respect to the time when the signal is input, the elapsed time is 3 ms when the process A is completed according to the above order, the elapsed time is 4 ms when the process E is completed, the elapsed time is 9 ms when the process C is completed, and the process B When the process is completed, the elapsed time is 12 ms, and when the process D is completed, the elapsed time is 16 ms.

  The remaining time indicates a period from the completion of the processing according to the order to the transition to the low power consumption state.

  In Table B, the period until the transition to the low power consumption state after completion of the process A is 4 ms, and the period until the transition to the low power consumption state after the completion of the process E is 3 ms. Are shown respectively.

  Further, when the CPU 6 completes the process C, the period until the transition to the low power consumption state is already exceeded. Accordingly, in the remaining time, 2 ms which is the time exceeding the time is indicated as -2 ms.

  Similarly, when the CPU 6 completes the process B, 5 ms elapses after shifting to the low power consumption state, so that −5 ms elapses, and when the CPU 6 completes the process B, 9 ms elapses after shifting to the low power consumption state. Therefore, -9 ms is indicated.

  As described above, the CPU 6 executes one or a plurality of the processes that can be completed within the remaining time from when the signal is input until the transition to the low power consumption state. As an example, various embodiments, such as executing only the process A or executing only the process A and the process E, are envisaged.

  Hereinafter, examples of various execution modes will be described in detail.

(1) Embodiment (I)
In the embodiment (I), the CPU 6 determines that the remaining time until shifting to the low power consumption state is the maximum processing time among the processing times associated with the processing set as a plurality of processing to be executed according to the order. When the time is larger than the time, one or a plurality of the processes are executed according to the order.

  Such an embodiment will be described in detail with reference to FIGS.

  FIG. 4 is a flowchart showing the operation of the CPU 6 in the embodiment (I).

  First, when there is a completed process, the CPU 6 resets the timer (step S1), and monitors the input state of the signal at the terminal of each interface 2 (step S2).

  When a signal indicating an instruction to execute the process is input (step S2: YES), the CPU 6 executes the process.

  On the other hand, when the CPU 6 monitors a state in which no signal is input (that is, no signal state) (step S2: NO), it is timed (for example, by the timer) that the no signal state has elapsed for 3 ms. In the case (step S3: YES), the CPU 6 refers to the table shown in FIG. 3A and the remaining time until shifting to the low power consumption state is the maximum of the processing time required for the completion of the processing. (The maximum processing time. In Table A in FIG. 3, 5 ms of the processing time of the processing C is the maximum processing time) is determined (step S4).

  Then, when the CPU 6 determines that the remaining time is longer than the maximum time (step S4: YES), a signal indicating an instruction to execute a plurality of processes in which the execution order is set in advance is input. If it has been performed (step S5: YES), the CPU 6 executes such processing (step S6) and proceeds to step S4.

  On the other hand, when the CPU 6 determines that the remaining time is shorter than the maximum time (step S4: NO), the CPU 6 shifts to a low power consumption state.

  In the embodiment (I), the CPU 6 compares the “remaining time until shifting to the low power consumption state” with the “maximum processing time” stored in the table, and shifts to the low power consumption state. Therefore, the processing performed by the CPU 6 is light and can be easily mounted on the IC chip 1.

(2) Embodiment (II)
In the embodiment (II), when the remaining time until the CPU 6 shifts to the low power consumption state is longer than the processing time associated with the processing set as the processing to be executed next according to the order In addition, the processing is executed.

  Such an embodiment will be described in detail with reference to FIGS.

  FIG. 5 is a flowchart showing the operation of the CPU 6 in the embodiment (II).

  First, when there is a completed process, the CPU 6 resets the timer (step S11), and monitors the input state of the signal at the terminal of each interface 2 (step S12).

  When a signal indicating an instruction to execute the process is input (step S12: YES), the CPU 6 executes the process.

  On the other hand, when the CPU 6 monitors the no-signal state (step S12: NO) and counts that the no-signal state has elapsed for 3 ms (step S13: YES), the CPU 6 reduces the power consumption. Transition to the power preparation period.

  In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input (step S14: YES), the CPU 6 is in a low power consumption state. It is determined whether or not the remaining time until shifting to is longer than the processing time associated with the processing set as the processing to be executed next according to the above order (step S15).

  Specifically, for example, when the signal shown in Table B in FIG. 3 is input, first, the CPU 6 has the remaining time longer than the processing time of the processing A that is the processing to be executed first. Determine whether or not.

  When the CPU 6 determines that the remaining time is longer than the processing time (step S15: YES), the CPU 6 executes the processing (processing A in the case of FIG. 3B). (Step S16).

  Then, the CPU 6 determines whether or not there is further processing to be executed (shift to step S14).

  Specifically, when the signal shown in Table B in FIG. 3 is input, the remaining time after execution of the process A is 4 ms. Therefore, the CPU 6 determines whether or not the remaining time is longer than the processing time of the process E that is the process to be executed next.

  In the case of FIG. 3B, since the processing time of the processing E is 1 ms, it is shown that the remaining time is longer.

  Therefore, the CPU 6 executes the process E, and further proceeds to step S14.

  On the other hand, when the signal is not input (step S14: NO), the CPU 6 determines whether or not the remaining time becomes 0 (in other words, whether or not the 7 ms has passed) ( Step S17).

  When the CPU 6 determines that the remaining time is 0 (step S17: YES), the CPU 6 shifts to a low power consumption state.

  Even when the CPU 6 determines that the remaining time is short (step S15: NO), the CPU 6 shifts to a low power consumption state.

  In the embodiment (II), the CPU 6 compares the “remaining time until shifting to the low power consumption state” with the processing time associated with the processing set as the next processing to be executed according to the order. However, as long as the process to be executed next can be executed within the remaining time, the process is additionally executed, so that more processes can be executed.

(3) Embodiment (III)
In the embodiment (III), when the remaining time until the transition to the low power consumption state is smaller than the processing time associated with the processing set as the processing to be executed next according to the order, the CPU 6 The processing time that is smaller than the remaining time is selected from the processing times associated with other processes that are set as processes that should be executed in accordance with the order, and the processing associated with the processing time is executed. It has become.

  Such an embodiment will be described in detail with reference to FIGS.

  FIG. 6 is a flowchart showing the operation of the CPU 6 in the embodiment (III).

  First, when there is a completed process, the CPU 6 resets the timer (step S21) and monitors the input state of the signal at the terminal of each interface 2 (step S22).

  When a signal indicating an instruction to execute the process is input (step S22: YES), the CPU 6 executes the process.

  On the other hand, when the CPU 6 monitors the no-signal state (step S22: NO) and counts that the no-signal state has elapsed for 3 ms (step S23: YES), the CPU 6 reduces the power consumption. Transition to the power preparation period.

  In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input (step S24: YES), the CPU 6 is in a low power consumption state. It is determined whether or not the remaining time until shifting to is longer than the processing time of the process to be executed next (step S25).

  Specifically, for example, when the signal shown in Table B in FIG. 3 is input, first, the CPU 6 has the remaining time longer than the processing time of the processing A that is the processing to be executed first. Determine whether or not.

  If the CPU 6 determines that the remaining time is longer than the processing time (step S25: YES), the CPU 6 performs this processing (processing A in the case of Table B in FIG. 3). Execute (step S26).

  Then, the CPU 6 determines whether or not there is further processing to be executed (shift to step S24).

  On the other hand, when the CPU 6 determines that the remaining time is smaller than the processing time (step S25: NO), the CPU 6 associates it with another process set as a process to be executed according to the order. It is determined whether or not there is a process that can be completed in a process time that is smaller than the remaining time among the given process times (step S27).

  When the CPU 6 determines that there is a process that can be completed (step S27: YES), the CPU 6 selects and executes the process (step S26).

  Specifically, for example, a case is assumed where the signals shown in Table B in FIG. 3 are input and processing A and processing E have been completed.

  In such a case, the process to be executed next is the process C, but the process time of the process C is 5 ms, which is longer than the current remaining time (3 ms). Accordingly, the CPU 6 selects and executes the process C that can be completed within the remaining time of 3 ms.

  Then, the CPU 6 proceeds to step S24.

  On the other hand, when the CPU 6 determines that there is no process that can be completed (step S27: NO), the CPU 6 shifts to a low power consumption state.

  If a signal indicating an instruction to execute a plurality of processes whose execution order is preset is not input (step S24: NO), the CPU 6 determines whether or not the remaining time is zero. Judgment is made (step S28).

  When the CPU 6 determines that the remaining time is 0 (step 28: YES), the CPU 6 shifts to a low power consumption state.

  In the embodiment (III), since the CPU 6 selects and executes one or a plurality of the processes that can be completed within the remaining time among the processes to be executed, the CPU 6 can perform the process within the remaining time. As many processes as possible can be executed.

  As described above, the CPU 6 in the present embodiment receives the signal indicating an instruction to execute a plurality of the processes in which the execution order is set in advance during the low power consumption preparation period. One or a plurality of the processes that can be completed are executed within the remaining time from the input time to the transition to the low power consumption state.

  Therefore, since the CPU 6 executes one or a plurality of processes that can be completed within the low power consumption preparation period, many processes can be performed quickly and reliably.

  In addition, when the remaining time is larger than the maximum processing time among the processing times associated with the processing set as a plurality of processings to be executed according to the order, the CPU 6 determines whether the remaining time is 1 or according to the order. A plurality of the processes are executed.

  Therefore, the processing performed by the CPU 6 is light and can be easily mounted on the IC chip 1. In addition, many processes can be executed quickly and reliably with a simple configuration.

  The CPU 6 executes the process when the remaining time is longer than the processing time associated with the process set as the process to be executed next in the order.

  Therefore, as long as the process to be executed next can be executed within the remaining time, the process is additionally executed, so that more processes can be executed.

  In addition, when the remaining time is smaller than the processing time associated with the process set as the next process to be executed according to the order, the CPU 6 sets the process to be executed according to the order. A processing time smaller than the remaining time is selected from the processing times associated with the process, and the processing associated with the processing time is executed.

  Therefore, as many processes as possible can be executed within the remaining time.

  In the present embodiment, the first threshold value is set to 3 ms and the second threshold value is set to 7 ms so that the IC chip 1 can support data communication conforming to the USB communication standard. However, the present invention is not limited to this. Instead, the first threshold value and the second threshold value can be arbitrarily selected and set.

  In the above-described embodiment, an example in which the present invention is applied to the IC card 8 provided with the IC chip 1 of the present application has been shown. However, for example, a PDA, a mini-note type personal computer, a notebook type personal computer, or the like The present invention is applicable to portable information processing apparatuses, personal computers, and other in-vehicle and household electronic devices.

1 IC chip 2 Interface 3 ROM
4 RAM
5 EEPROM
6 CPU
7 Card base 8 IC card

Claims (8)

Perform multiple processes based on externally input signals,
An IC chip having a storage unit that stores the type of processing and processing time required for completion of the processing in association with each other,
Monitoring means for monitoring the input state of the signal;
Clocking means for timing the elapsed time that the no-signal state continues from the no-signal state without the input of the signal;
A preparation period transition means for transitioning to a low power consumption preparation period that is a period for preparing the IC chip to transition to a low power consumption state when the elapsed time is measured to exceed a first threshold;
Low power consumption transition means for causing the IC chip to transition to a low power consumption state when the elapsed time is measured by the time counting means to have exceeded a second threshold after transition to the low power consumption preparation period; ,
In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input, the state shifts to the low power consumption state from the time when the signal is input. Execution means for executing one or more of the processes that can be completed within the remaining time until
An IC chip comprising: The IC chip according to claim 1,
When the remaining time is larger than the maximum processing time among the processing times associated with the processes set as a plurality of processes to be executed according to the order, An IC chip that performs a plurality of the processes. The IC chip according to claim 1,
The execution means executes the process when the remaining time is longer than a process time associated with the process set as a process to be executed next according to the order. . The IC chip according to claim 1,
The execution means, when the remaining time is smaller than the processing time associated with the process set as the next process to be executed according to the order, is set as the process to be executed according to the order An IC chip, wherein a processing time smaller than the remaining time is selected from the processing times associated with the processing, and the processing associated with the processing time is executed. An IC chip according to any one of claims 1 to 4, wherein
The IC chip corresponds to data communication conforming to a USB communication standard.   An IC card comprising the IC chip according to any one of claims 1 to 5 and an IC card base. Perform multiple processes based on externally input signals,
A data processing method in an IC chip having a storage unit that stores the type of processing and processing time required for completion of the processing in association with each other,
A monitoring step of monitoring the input state of the signal;
A time measuring step for measuring an elapsed time from the no signal state where the signal is not input to the no signal state;
A preparation period transition step for transitioning to a low power consumption preparation period, which is a period for preparing the IC chip to transition to a low power consumption state when the elapsed time is measured to exceed a first threshold;
A low power consumption transition step for causing the IC chip to transition to a low power consumption state when the elapsed time is measured by the timing means to have exceeded a second threshold after transitioning to the low power consumption preparation period; ,
In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input, the state shifts to the low power consumption state from the time when the signal is input. An execution step of executing one or more of the processes that can be completed within the remaining time until
A data processing method characterized by comprising: Perform multiple processes based on externally input signals,
A computer having an IC chip having a storage unit that stores the type of the process and the processing time required to complete the process in association with each other;
Monitoring means for monitoring the input state of the signal;
Clocking means for timing the elapsed time that the no-signal state continues from the no-signal state without the input of the signal;
A preparation period transition means for transitioning to a low power consumption preparation period, which is a period for preparing the IC chip for transition to a low power consumption state when the elapsed time is measured to exceed a first threshold;
Low power consumption transition means for transitioning the IC chip to a low power consumption state when the elapsed time is measured by the time counting means to have exceeded a second threshold after transitioning to the low power consumption preparation period;
In the low power consumption preparation period, when a signal indicating an instruction to execute a plurality of processes whose execution order is set in advance is input, the state shifts to the low power consumption state from the time when the signal is input. Execution means for executing one or more of the processes that can be completed within the remaining time until
A data processing program characterized by functioning as

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