JP5239460B2 - Silicon single crystal wafer for semiconductor device and method for producing the same - Google Patents

Description

  The present invention relates to a gettering method that is a technique for removing heavy metal impurities that adversely affect device operation, and relates to a silicon single crystal wafer for semiconductor devices having high gettering capability and a method for manufacturing the same.

  As semiconductor devices such as semiconductor integrated circuits have higher density and higher integration, stabilization of device operation has been desired more and more. In particular, improvement of characteristic values such as leakage current and oxide film breakdown voltage is an important issue.

  However, the possibility of contamination with impurities such as undesired heavy metals such as Cu, Fe, and Ni in the manufacturing process of semiconductor integrated circuits cannot be denied. It is widely known that these heavy metal impurities are significantly dissolved in the silicon single crystal and the above-described leakage current and oxide film breakdown voltage characteristics are remarkably deteriorated.

  Therefore, various gettering techniques have been developed as a method for removing these heavy metal impurities out of the device operating region. For example, an oxygen atom contained in a silicon single crystal produced by the CZ method is precipitated, and an IG (Internal Gettering) method in which heavy metals are captured in the strain around the precipitate, or an ion implantation ( (Ion-Implantation), a method of gettering to a strain or defect layer intentionally generated, a method of forming a polycrystalline silicon film on the back surface of a silicon single crystal wafer, and trapping impurities in the strain of the polycrystalline grain boundary ( Poly-Si Back Seal, PBS).

  However, the recent device fabrication process has progressed at lower temperatures and shorter times, and the location of the undesired heavy metal impurity trapping position in the depth direction of the silicon single crystal wafer has a significant effect on the gettering capability and thus the device performance. To do. It is clear that long-distance diffusion cannot be expected in low-temperature, short-time processes, such as PBS with a gettering layer on the back side, backside damage, and other methods such as the IG method that allows a gettering layer to exist directly under the device, It is recognized by the public that it is disadvantageous compared with the method using a high-concentration boron substrate. Therefore, a method that can install a gettering layer near the surface layer, that is, directly under the device layer, such as the ion implantation method, has come into the spotlight.

  In general, light elements are generally widely used because the ion species used in the ion implantation method have a low possibility of harming the device. For example, carbon, oxygen, nitrogen, argon and the like. However, the gettering mechanism of these light element ion implantation layers is a so-called relaxed gettering mechanism in which lattice defects are secondarily generated and the defects and surrounding distortions are used as gettering sites.

  Here, the classification of gettering mechanisms will be briefly described. The relaxation type uses the phenomenon that the heavy metal to be removed, which is dissolved in supersaturation, precipitates at the gettering site at high speed to the solid solubility, and the concentration at the removal limit is the solid solubility at the temperature at which gettering actually proceeds. In principle, it is impossible to reduce the concentration to a lower concentration.

  There is a segregation type as a gettering mechanism compared with the relaxation type. This is a mechanism in which a layer to be removed, that is, a layer having a high solid solubility of the target impurity with respect to the device layer is provided as a gettering layer, and the target impurity in the gettering layer is distributed at a high rate. With this mechanism, it is not governed by solid solubility, and more target impurities can be distributed in the gettering layer at a constant ratio with respect to the contamination concentration, which is the current state of recent device fabrication processes. It is possible to reduce the slightly contaminated target impurity to a solid solubility or less in some cases (Patent Document 1).

In the gettering layer manufactured by the ion implantation method of the light element described above, since this segregation type effect is hardly observed, there is a possibility that it cannot be used when further reducing the impurity concentration due to the advancement of the semiconductor device manufacturing technology.
JP 2002-313795

  The present invention has been made in view of the above-mentioned problems of the prior art, and has improved a gettering method that is a technique for removing heavy metal impurities that adversely affect device operation, and has high gettering capability. An object is to provide a single crystal wafer and a manufacturing method thereof.

  In order to achieve the above object, the technical idea of the present invention is that the gettering ability is improved by using a heavy metal layer for the gettering layer in the silicon single crystal wafer for semiconductor devices. Here, the heavy metal is a metal having a specific gravity of 4 or more.

Semiconductor device for silicon single crystal wafer of the present invention, a heavy metal element by ion implantation and a gettering layer of the heavy metal present layer to form a heavy metal presence layer from the surface or back surface in the semiconductor silicon single crystal wafer, wherein the heavy metal A silicon single crystal wafer for a semiconductor device in which an epitaxial layer is further grown on the surface of a semiconductor silicon single crystal wafer having an existing layer as a gettering layer , wherein the diffusion coefficient of the heavy metal element in silicon is 10 ^{−7 at} 1000 ° C. It is characterized by being cm ² / sec or less .

The method for producing a silicon single crystal wafer for a semiconductor device according to the present invention includes a step of ion-implanting a heavy metal element from a front surface or a back surface of the semiconductor silicon single crystal wafer to form a heavy metal existence layer, A method for producing a silicon single crystal wafer for a semiconductor device, in which an epitaxial layer is further grown on the surface of a semiconductor silicon single crystal wafer formed as a ring layer and the heavy metal existence layer as a gettering layer , wherein the heavy metal element in silicon The diffusion coefficient is 10 ⁻⁷ cm ² / sec or less at 1000 ° C.

The thickness of the heavy metal presence layer is preferably 10 nm or more. The heavy metal element preferably has a melting point of 1000 ° C. or higher. As the heavy metal element, one having a diffusion coefficient in silicon of 10 ⁻⁷ cm ² / sec or less, preferably 10 ⁻⁹ cm ² / sec or less at 1000 ° C. is suitably used. As the heavy metal element, one or more heavy metal elements selected from the group consisting of tungsten, molybdenum and tantalum can be used. It is preferable that an epitaxial layer is further grown on the surface of the semiconductor silicon single crystal wafer in which the heavy metal presence layer is formed as a gettering layer.

  Many heavy metal layers have higher solid solubility in other heavy metals to be removed than silicon, and segregation-type mechanisms are expected to work. Further, if secondary defects are generated in the same manner as or more than light elements, it is expected to have a conventional relaxation type mechanism, which is more effective. When the ion implantation method is used, impurities can be introduced more than the equilibrium concentration, that is, the solid solubility, in which the heavy metal normally exists in silicon, and the position of the impurity layer can be arbitrarily determined.

It is suggested that the high-concentration heavy metal layer introduced in this way may diffuse in the subsequent heat treatment for device fabrication and enter the surface device layer, but in that respect, the high-concentration heavy metal layer introduced by the ion implantation method proposed in the present invention The concentrated heavy metal layer reacts with the parent phase silicon by heat treatment and changes its structure to silicide. Silicide usually does not diffuse during high temperature heat treatment and remains in that position. Therefore, the device layer on the surface layer is not adversely affected. Further, by using a heavy metal species having a diffusion coefficient in silicon of 10 ⁻⁷ cm ² / sec or less, preferably 10 ⁻⁹ cm ² / sec or less as an implanted element, the implanted heavy metal species may enter the surface device layer. Is further reduced.

  The heavy metal silicide layer thus formed has a higher solid solubility with respect to other metal species than silicon, and gettering proceeds as a segregation type, so that it is more than the gettering layer formed by ion implantation of light elements. A high-performance gettering layer can be formed.

  As described above, according to the silicon single crystal wafer for a semiconductor device of the present invention, it is possible to exhibit a particularly effective gettering capability in a device process that can be performed at a low temperature for a short time. Moreover, according to the method of the present invention, the silicon single crystal wafer for semiconductor devices having the high gettering ability of the present invention can be effectively produced.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a cross-sectional explanatory view showing one embodiment of a silicon single crystal wafer for a semiconductor device of the present invention.

  In FIG. 1, reference numeral 10 denotes a silicon single crystal wafer for semiconductor devices according to the present invention. The silicon single crystal wafer 10 for a semiconductor device is formed by ion-implanting a heavy metal element from the front surface or the back surface of a semiconductor silicon single crystal wafer 12 to form a heavy metal presence layer 14 and using the heavy metal presence layer 14 as a gettering layer It is.

  The method for producing a silicon single crystal wafer for a semiconductor device of the present invention includes a step of ion-implanting a heavy metal element from the front surface or the back surface of the semiconductor silicon single crystal wafer to form a heavy metal presence layer, and the formed heavy metal presence The layer is present even after the semiconductor device is fabricated without changing the depth position, and the heavy metal existence layer is a gettering layer.

The thickness of the heavy metal presence layer 14 is preferably 10 nm or more. As the heavy metal element, one having a melting point of 1000 ° C. or more and a diffusion coefficient in silicon of 10 ⁻⁷ cm ² / sec or less, preferably 10 ⁻⁹ cm ² / sec or less at 1000 ° C. is suitable. Used for. By using a heavy metal species having a diffusion coefficient in silicon of 10 ⁻⁷ cm ² / sec or less, preferably 10 ⁻⁹ cm ² / sec or less as the heavy metal element to be implanted, the implanted heavy metal species may enter the surface device layer There is an advantage that is further reduced. As the heavy metal element, one or more heavy metal elements selected from the group consisting of tungsten, molybdenum and tantalum can be used. The silicon single crystal wafer 10 for a semiconductor device having a structure in which an epitaxial layer is further grown on the surface of the semiconductor silicon single crystal wafer 12 in which the heavy metal existence layer 14 is formed as a gettering layer can be produced.

In addition, the diffusion coefficient in the silicon | silicone of each above-mentioned heavy metal element is as follows.
Tungsten: 1.8 × 10 ⁻¹⁴ cm ² / sec
Molybdenum: 2.4 × 10 ⁻¹⁰ cm ² / sec
Tantalum: 1 × 10 ⁻¹² to 1 × 10 ⁻¹³ cm ² / sec.

The melting point of each heavy metal element is as follows.
Tungsten: 3400 ° C
Molybdenum: 2620 ° C
Tantalum: 3027 ° C.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated further in detail, it cannot be overemphasized that this invention is not limited to these Examples.

Example 1
A crystal rod of a p-type silicon single crystal having a diameter of 6 inches, an initial oxygen concentration of 14 ppma (JEIDA), an orientation <100>, and a p-type silicon single crystal was pulled up. This crystal rod was processed into a silicon single crystal wafer, and tungsten was implanted from the surface by ion implantation. The implantation condition is an acceleration energy of 150 keV and a dose of 10 ¹⁵ cm ⁻² . In this step, a tungsten layer having a peak with a concentration of 10 ²⁰ cm ⁻³ at a depth of about 80 nm from the surface can be formed. A 10 Ωcm, 10 μm, p-type epi layer was deposited on this silicon single crystal wafer to obtain a sample silicon single crystal wafer.

Fe was applied to the surface of the sample silicon single crystal wafer at a concentration of 1 × 10 ¹² cm ⁻² , an Fe diffusion process was performed at 1000 ° C. for 1 hour, and immediately after that, an Fe capture heat treatment was performed at 600 ° C. for 20 minutes. Later, when the Fe concentration in the vicinity of the surface of the sample silicon single crystal wafer was measured by a DLTS (Deep Level Transient Spectroscopy) method, it was below the lower limit of detection of DL 10 of ^{10 10} cm ⁻³ . This is because the intentionally contaminated Fe quickly moved to the high-concentration tungsten layer, indicating that almost no Fe remained in the vicinity of the surface layer.

(Example 2)
A sample silicon single crystal wafer was obtained in the same manner as in Example 1 except that molybdenum was used instead of tungsten. When the Fe concentration in the vicinity of the surface of this sample silicon single crystal wafer was measured by the DLTS method, it was below the lower limit of detection of DLTS of 10 ¹⁰ cm ⁻³ . This is because deliberately contaminated Fe quickly moved to the high-concentration molybdenum layer, indicating that almost no Fe remained in the vicinity of the surface layer.

(Example 3)
A sample silicon single crystal wafer was obtained in the same manner as in Example 1 except that tantalum was used instead of tungsten. When the Fe concentration in the vicinity of the surface of this sample silicon single crystal wafer was measured by the DLTS method, it was below the lower limit of detection of DLTS of 10 ¹⁰ cm ⁻³ . This is because deliberately contaminated Fe quickly migrated to the high-concentration tantalum layer, indicating that almost no Fe remained in the vicinity of the surface layer.

(Comparative Example 1)
A crystal rod of a p-type silicon single crystal having a diameter of 6 inches, an initial oxygen concentration of 14 ppma (JEIDA), an orientation <100>, and a p-type silicon single crystal was pulled up. This crystal rod was processed into a silicon single crystal wafer.

A 10 Ωcm, 10 μm, p-type epi layer was deposited on this silicon single crystal wafer to obtain a sample silicon single crystal wafer. Similar to Example 1, Fe was applied to the surface of the sample silicon single crystal wafer at a concentration of 1 × 10 ¹² cm ⁻² , an Fe diffusion step was performed at 1000 ° C. for 1 hour, and immediately after that, 600 ° C. for 20 minutes. After the Fe capture heat treatment, the Fe concentration in the vicinity of the surface of the sample silicon single crystal wafer was measured by the DLTS method, and Fe having a concentration of 1 × 10 ¹³ cm ⁻³ was detected by DLTS. This is because the specific gettering layer does not exist in the silicon single crystal wafer, and as a result of the intentionally contaminated Fe being uniformly distributed in the depth direction of the silicon single crystal wafer, the concentration of Fe in the vicinity of the surface layer is high. Indicates that it was detected.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

  For example, in the above embodiment, ion implantation is performed using tungsten, molybdenum, and tantalum as heavy metal elements, but a high-melting-point heavy metal species that diffuses slowly in silicon can also be used as other heavy metal elements. In addition, even if the conditions used for ion implantation are appropriately changed, a gettering layer having the same ability can be formed and included in the scope of the present invention. Furthermore, a silicon single crystal wafer for a semiconductor device having a structure in which an epitaxial layer is further grown on the surface of the semiconductor silicon single crystal wafer in which the heavy metal existence layer is formed as a gettering layer can be produced.

It is sectional explanatory drawing which shows one Embodiment of the silicon single crystal wafer for semiconductor devices of this invention.

  10: Silicon single crystal wafer for semiconductor device of the present invention, 12: Semiconductor silicon single crystal wafer, 14: Heavy metal existing layer.

Claims (4)

A semiconductor silicon single crystal wafer is formed by ion-implanting a heavy metal element from a front surface or a back surface of a semiconductor silicon single crystal wafer to form a heavy metal existence layer, the heavy metal existence layer as a gettering layer, and the heavy metal existence layer as a gettering layer. A silicon single crystal wafer for semiconductor devices, in which an epitaxial layer is further grown on the surface of the crystal wafer , wherein the diffusion coefficient of the heavy metal element in silicon is 10 ⁻⁷ cm ² / sec or less at 1000 ° C. Silicon single crystal wafer for semiconductor devices.   2. The silicon single crystal wafer for a semiconductor device according to claim 1, wherein the heavy metal element is one or more selected from the group consisting of tungsten, molybdenum and tantalum. A step of forming a heavy metal existence layer by ion implantation of a heavy metal element from the front surface or the back surface of a semiconductor silicon single crystal wafer to form the heavy metal existence layer as a gettering layer and forming the heavy metal existence layer as a gettering layer A method for producing a silicon single crystal wafer for a semiconductor device in which an epitaxial layer is further grown on the surface of the semiconductor silicon single crystal wafer , wherein the diffusion coefficient of the heavy metal element in silicon is 10 ⁻⁷ cm ² / sec or less at 1000 ° C. A method for producing a silicon single crystal wafer for a semiconductor device. 4. The method for producing a silicon single crystal wafer for a semiconductor device according to claim 3 , wherein the heavy metal element is one or more selected from the group consisting of tungsten, molybdenum and tantalum.

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