JP5245243B2 - Multilayer wiring board - Google Patents

Description

  The present invention provides a multilayer wiring used as an interposer of a semiconductor package on which one or a plurality of semiconductor elements (hereinafter referred to as “semiconductor chips”) such as a semiconductor integrated circuit are mounted and connected to a printed wiring board. The present invention relates to a board (hereinafter referred to as “multilayer wiring board for interposer”). In particular, the present invention relates to a multilayer wiring board for an interposer in which a laminated body in which a plurality of conductor layers and insulating layers arranged therebetween are laminated and a reinforcing member for reinforcing the laminated body is attached.

  In recent years, electronic devices have been increasingly reduced in size, multifunction, and functionality. The electronic components mounted on these electronic devices are also becoming smaller and higher in performance (that is, more multifunctional and more functional). With this, interposers for connecting and mounting these electronic components to the board However, miniaturization and higher wiring density are required.

  As a method for reducing the size of the interposer and achieving high density wiring, there is a method of including a plurality of conductor layers (also referred to as “wiring layers”) in which wiring is formed in the interposer. As a method of creating an interposer having a plurality of conductor layers, there is a build-up method in which a plurality of conductor layers are stacked and the conductor layers are connected in the stacking direction (ie, the vertical direction). In the build-up method, an insulating layer is usually provided between the conductor layers so that there is no short circuit between the conductor layers, and the connection between the conductor layers is usually performed via via holes arranged at predetermined positions.

  An example of a method for producing a multilayer wiring board for an interposer by such a build-up method is a method of laminating a core material and a backing material. Specifically, for example, a plate-like member having a structure in which a conductor layer is laminated on both surfaces of an insulating layer is used as a core material. Via holes are formed in the core material by laser processing, punching, etc., and then the conductor layer is patterned by photolithography or the like. Thus, a wiring pattern is formed. Next, for example, by using a plate-like member in which a conductor layer is laminated on one side of an insulating layer as a backing material, by laminating the backing material on the wiring pattern of the core material, forming a via hole and forming a wiring pattern, A multilayer wiring board for an interposer is obtained. In this specification, the “backing material” means a material that is attached to the core material (center material). Specific examples of the material used as the backing material include an insulating material having a metal foil on one side.

  Here, as the insulating layer, a thin plate, tape, film, or the like whose main constituent material is an insulating resin is used. Examples thereof include a BT (bismaleide triazine) resin-based resin film, a glass epoxy substrate in which a glass cloth is impregnated with an epoxy resin, a polyimide film, an acrylic film, and a liquid crystal polymer film.

  The hardness of these resin-based insulating layers (hereinafter referred to as “insulating resin layers”) can be adjusted. For example, when the insulating resin layer needs to be a solid support, it is sufficient. Configured to have thickness and stiffness. On the other hand, when the insulating resin layer is required to be small, light, or flexible, the insulating resin layer is set thin so as to obtain these properties.

When the insulating resin layer is configured so as to be soft and flexible , the laminated body in which such an insulating layer and a conductor layer are laminated (hereinafter sometimes referred to as “wiring board body”) itself. Low rigidity. For this reason, when an external force is applied to the interposer multilayer wiring board or when it is heated, the wiring board may be easily deformed. In order to avoid this problem, conventionally, a technique has been proposed in which a reinforcing member made of a highly rigid material such as metal is attached to a wiring board body (Patent Document 1).

JP-A-8-316300

  Since the multilayer wiring board described above is configured by laminating a plurality of materials, due to differences in the coefficient of thermal expansion between different materials, wiring breakage, etc. in the test process for checking the presence or absence of defects in the multilayer wiring board May be caused. Hereinafter, this point will be described in detail.

  In general, since a multilayer wiring board is required to have high reliability, various tests are performed on the multilayer wiring board before shipment as an accelerated test for actual use. For example, what is called a thermal shock test in which a multilayer wiring board is exposed to low temperature and high temperature conditions in the gas phase or liquid phase is repeated a specified number of times to check for performance deterioration, in a high temperature and high humidity chamber In some cases, a multilayer wiring board is stored for a specified time to check for performance deterioration. Among these, in the thermal shock test, in the process of repeatedly exposing the multilayer wiring board to low and high temperature conditions, minute deformation or accumulation of stress occurs in each part of the multilayer wiring board due to the difference in thermal expansion coefficient between different materials. Arise. Such deformation and accumulation of stress may cause damage to wiring formed in the conductor layer and via holes connecting the plurality of conductor layers.

  In particular, when a reinforcing member such as a metal frame is affixed to the wiring board body to reinforce the multilayer wiring board, the wiring is damaged at the portion where the inner frame (or inner line) of the reinforcing member and the wiring intersect. It is easy to be caused. FIG. 5 is a schematic cross-sectional view of a part of a multilayer wiring board 5 according to a conventional example (corresponding to FIG. 6 to be described later). A solder resist layer 17 is laminated on an insulating resin layer 15. A portion where a metal frame (stiffener) 20 is attached as a reinforcing member is shown.

  The stiffener 20 has a frame shape surrounding the periphery of one main surface (hereinafter referred to as the upper surface) of the multilayer wiring board 5, and the inside of the frame is a chip mounting portion 13 on which a chip is mounted. On the insulating resin layer 15, the wiring 21 formed in the conductor layer 16 is disposed. The wiring 21 extends from the middle of the outer line 20B and the inner edge line 20A of the stiffener 20 to the inside of the frame of the stiffener 20, that is, to the chip mounting portion 13. Thus, since the wiring 21 passes under the inner line 20A of the stiffener 20, when the multilayer wiring board 5 is bent in the vertical direction, the wiring 21 is bent and damaged, and the tendency is It has been confirmed that the line width of 21 increases as the line width decreases.

  The present invention has been made in view of the above problems, and an object thereof is to provide a multilayer wiring board in which wiring breakage in the multilayer wiring board having a reinforcing member is prevented. More specifically, even when a wiring with a small line width passes under a reinforcing member such as a metal frame, the width of the bent portion is increased when the wiring is bent due to thermal shock applied to the multilayer wiring board. An object of the present invention is to provide a multilayer wiring board that prevents damage to wiring and has higher reliability.

The invention according to claim 1 of the present invention includes at least a plurality of conductor layers, an insulating layer disposed between the plurality of conductor layers, and a wiring formed in any of the plurality of conductor layers. At least a flexible wiring board main body and a frame-shaped reinforcing member affixed on one main surface of the wiring board main body, wherein the wiring extends along the main surface of the wiring board main body. A plurality of radial wirings extending from the frame of the reinforcing member toward the outer edge of the wiring board main body, each of the plurality of wirings passing under the rectangular inner line of the reinforcing member, In the wiring, the extending direction when the first portion, which is the wiring main body of the radial portion from the center of the main surface , extends to the outer edge of the wiring board main body intersects the inner line at 90 degrees. wiring is connected to the first portion the La A multilayer wiring board which comprises said second portion having a shape bent from the extending direction of the first portion so as to intersect at 60 degrees or less angle relative to emissions.

The invention according to claim 2 of the present invention is the multilayer wiring board according to claim 1 , wherein a chip is mounted at the center of the main surface of the multilayer wiring plate, and the wiring is more radial than the chip. It is.

  In the invention according to claim 3 of the present invention, the wiring has a line width of 30 μm or less, and extends along the main surface of the wiring board main body over a length of 1000 μm or more from the intersection with the inner line. The multilayer wiring board according to claim 1 or 2, wherein the multilayer wiring board is a straight line.

  The invention according to claim 4 of the present invention is the multilayer wiring board according to any one of claims 1 to 3, wherein the reinforcing member is a metal frame.

  ADVANTAGE OF THE INVENTION According to this invention, it is the wiring extended in parallel with the main surface of a wiring board main body, Comprising: Breakage of the wiring which passes under a reinforcement member can be prevented. For this reason, according to the present invention, a highly reliable multilayer wiring board with low risk of wiring breakage can be obtained.

  Hereinafter, the present invention will be described in detail with reference to the drawings. Hereinafter, the same reference numerals and the same patterns are assigned to the same members, and the description thereof is omitted or simplified. The drawings are schematic, and the ratio of length, width, thickness, and the like are different from actual ones. The pattern of the member does not represent the material.

  FIG. 1 is an overall perspective view of the multilayer wiring board 1 according to the first embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view when the multilayer wiring board 1 of FIG. 1 is cut in the direction of arrows XX. . Each part of the multilayer wiring board 1 can be roughly divided into a wiring board body 10 and a stiffener 20 as a reinforcing member.

  The wiring board body 10 is configured by laminating a plate-like core material 11 and a backing material 12. In the present embodiment, the core material 11 is sandwiched between the two backing materials 12, but the backing material 12 may be laminated only on one main surface side of the core material 11.

  In this embodiment, as the core material 11, a resin substrate with a double-sided copper foil in which copper foil is attached to both main surfaces of a thin plate-like member of an insulating resin is used. The thin plate-like member made of insulating resin of the core material 11 is an insulating resin layer 15, and the copper foil attached on both main surfaces is a conductor layer (or also called “wiring layer”) 16. The multilayer wiring board 1 according to the present embodiment includes three insulating resin layers 15. When these insulating resin layers 15 are distinguished from each other, the “second insulating resin layer 15 </ b> B” of the core material 11 is used. Called. Similarly, when distinguishing a plurality of, specifically four, conductor layers 16 included in the multilayer wiring board 1, the conductor layers on one main surface of the core material 11 are referred to as “second conductor layers 16B”, The conductor layer on the other main surface is referred to as “third conductor layer 16C”.

  The insulating resin layer must have insulating properties, and has sufficient rigidity as a support for the multilayer wiring board, but at the same time has sufficient flexibility for the wiring board body to be flexible. There is a need. Furthermore, it is configured to have other properties required for the interposer, such as dimensional stability. Here, reducing the thickness of the insulating resin layer contributes to reducing the thickness and thickness of the multilayer wiring board. Specifically, in the case of polyimide, for example, 50 μm or less is preferable, but if it is thinner than 10 μm, the rigidity becomes insufficient.

  Examples of the resin constituting the insulating resin layer 15 include various resins such as polyethylene, polypropylene, polyethylene terephthalate, polyimide, epoxy, acrylamide, phenol, and BT. The insulating resin layer 15 can be composed of these resins alone or in combination. Specific examples include polymer films such as polyethylene, polypropylene, polyethylene terephthalate, and polyimide, and prepregs such as a glass epoxy substrate in which a glass cloth is impregnated with an epoxy resin.

  The conductor layer 16 is formed by laminating a conductive substance such as a metal on the insulating resin layer 15, and is formed of, for example, a metal thin film. Although it does not specifically limit as a metal thin film, For example, copper foil is used. The copper foil may be formed on the main surface of the member made of a thin plate such as a sheet or a tape by a method appropriately selected from an adhesive method, a thermal fusion method, a casting method, a sputtering method, and the like. . Examples of the core material 11 having the insulating resin layer 15 and the conductor layer 16 include a glass cloth base epoxy resin copper clad laminate, a paper base phenol resin copper clad laminate, and a BT resin copper clad laminate. .

  The multilayer wiring board 1 according to the present invention includes two or more conductor layers 16, and it is sufficient that at least one conductor layer 16 is provided for each of the core material 11 and the backing material 12. The conductor layer 16 may be provided on the surface on which the backing material 12 is laminated. However, when the conductor layers 16 are provided on both surfaces of the core material 11 as in this embodiment, via holes 26 penetrating the insulating resin layer 15 are formed at predetermined positions so as to establish conduction between the conductor layers 16 on both surfaces. As a method for forming the via hole 26, laser processing is preferably used from the viewpoint of accuracy in position and size, but the present invention is not particularly limited to this method. After the via hole 26 is formed, the inside of the hole is filled with a conductive material. However, the method of filling the conductive material is not particularly limited, and a direct plating method, a plating method, a conductive paste filling method, etc. You can choose freely.

  The conductor layers 16 on both main surfaces of the core material 11 are patterned to form a circuit pattern including one or more wirings 21 parallel to the main surface (that is, extending in the horizontal direction). Hereinafter, when it is necessary to distinguish between the conductor layer before the circuit pattern is formed and the conductor layer after the circuit pattern is formed, the former is referred to as a “metal conductor layer” and the latter is referred to as a “conductor wiring layer”. The method for forming the circuit pattern on the metal conductor layer is not particularly limited, and may be freely selected from methods such as a combination of lithography and etching, and laser processing. In the present invention, the circuit pattern is set in consideration of the arrangement of the stiffener 20, which will be described in detail later.

  After patterning the metal conductor layer of the core material 11 to form a conductor wiring layer on which a circuit pattern is formed, the backing material 12 is laminated on at least one main surface of the core material 11. The backing material 12 is configured by laminating a conductor such as copper foil on at least one main surface of an insulating resin thin plate, the thin plate portion of the insulating resin is an insulating resin layer 15, and the conductor layer is a conductor. Layer 16. The material and structure of the insulating resin layer 15 and the conductor layer 16 of the backing material 12 and the method of laminating the insulating resin layer 15 and the conductor layer 16 are the same as in the case of the core material 11 described above, and thus the description thereof is omitted.

  In this embodiment, the backing material 12 is laminated on each of the main surfaces of the core material 11. Hereinafter, when the two backing materials 12 are distinguished, the backing material laminated on the side on which the second conductor layer 16B is formed on one main surface of the core material 11 is referred to as “first backing material 12A. The backing material laminated on the other main surface of the core material 11 and on the side where the third conductor layer 16C is formed is referred to as a “second backing material 12B”.

  In addition, the insulating resin layer of the first backing material 12A is referred to as “first insulating resin layer 15A”, the conductive layer is referred to as “first conductive layer 16A”, and the insulating resin layer of the second backing material 12B is referred to. Is referred to as “third insulating resin layer 15C”, and the conductor layer is referred to as “fourth conductor layer 16D”.

  The two backing materials 12 </ b> A and 12 </ b> B are both laminated with the core material 11 in such a direction that the conductor layers 16 </ b> A and 16 </ b> D are on the outside, that is, opposite to the core material 11. The core material 11 and the backing material 12 are bonded together with an adhesive. Thereby, the adhesive layers 19 are formed between the second conductor layer 16B and the first insulating resin layer 15A, and between the third conductor layer 16C and the third insulating resin layer 15C, respectively. The material of the adhesive is preferably an insulating material, and can be freely selected from epoxy, butadiene, polyethylene, polypropylene, or a mixed system thereof.

  About the lamination | stacking method of the core material 11 and the backing material 12, a roll laminator is used suitably, However, It is not limited to this. In addition, conditions such as temperature and pressure when laminating can be freely selected.

  After the lamination of the core material 11 and the backing material 12 is completed, the process of forming patterns such as the via hole 26 and the pad pattern 24 on the backing material 12 is repeated as in the case of the core material 11. When the conductor layer 16 is still necessary for the wiring board body 10, another backing material is further laminated on the backing material 12, and the same process is repeated. In this case, it is desirable in terms of preventing warpage of the wiring board body 10 that the surface on which the backing material is laminated should be kept symmetrical about the core material 11 as much as possible.

  After the required processing of the conductor layer is finished, the solder resist layer 17 is formed on both main surfaces which are the outermost layers of the wiring board body 10. In the present embodiment, the outermost layers of the wiring board body 10 are the first conductor layer 16 </ b> A and the fourth conductor layer 16 </ b> D, and these conductor layers 16 serve as a pair of main surfaces of the wiring board body 10. Therefore, the first solder resist layer 17A is formed on the first conductor layer 16A, and the second solder resist layer 17B is formed on the fourth conductor layer 16D. There is no restriction | limiting in particular in the kind of soldering resist layer, You may select freely from an epoxy type, a phenol resin type, a xylene type, an acrylic type, a polyimide type, etc. according to a use.

  After the solder resist layer 17 is disposed, an electrode portion 25 is provided by disposing a conductive material on the pad pattern 24. Specifically, in the first solder resist layer 17A, the solder resist is removed only in the vicinity of a portion where an electrode portion (in particular, it may be referred to as “first electrode portion 25A”) is provided. Similarly, with respect to the second solder resist layer 17B, the solder resist is removed only in the vicinity of a portion where an electrode portion (in particular, it may be referred to as “second electrode portion 25B”) is provided. There is no restriction | limiting in particular about the method of removing a soldering resist, You may use a suitable thing from photoresist methods etc. There is no restriction | limiting in particular also about the constituent material of the electrode part 25, You may select freely from solder, an electrically conductive paste, etc. according to a use.

  The wiring board main body 10 configured by the above-described procedure includes a laminated structure portion in which a plurality of conductor layers are laminated with an insulating resin layer interposed therebetween, and electrode portions formed on both main surfaces of the laminated structure portion. The laminated structure portion includes a first solder resist layer 17A, a first conductor layer 16A, a first insulating resin layer 15A, a second conductor layer 16B, a second insulating resin layer 15B, a third conductor layer 16C, The third insulating resin layer 15C, the fourth conductor layer 16D, and the second solder resist layer 17B are laminated in this order. As described above, the adhesive layer 19 is formed between the second conductor layer 16B and the second insulating resin layer 15B and between the third conductor layer 16B and the third insulating resin layer 15C. Yes.

Since the insulating resin layer 15 constituting the wiring board main body 10 according to the present embodiment is thin, the wiring board main body 10 has flexibility and may be deformed unintentionally. Therefore, the stiffener 20 is affixed. The stiffener 20 may be affixed on one or both of the first solder resist layer 17A and the second solder resist layer 17B.

  There is no restriction | limiting in particular as a material of the stiffener 20, You may select freely from various metals, for example, copper, aluminum, an alloy containing them. However, it is preferable to set the material, thickness, etc. so as to have the rigidity necessary to prevent inadvertent deformation of the multilayer wiring board 1. Further, the shape of the stiffener 20 is not particularly limited as long as it is a frame shape in plan view, and the width and shape of the frame may be freely selected. As a method for attaching the stiffener 20, a method using an adhesive film is preferably used, but is not particularly limited thereto.

  The stiffener 20 of the present embodiment is configured such that the plate-like member has a quadrangular frame shape, and the outer line 20 </ b> B of the frame body has a quadrangular shape that is approximately the same size as the outer periphery of the wiring board body 10. On the other hand, the inner line 20A of the frame body is drawn in parallel to the outer line 20B with a predetermined interval from the outer line 20B, and has a rectangular shape like the outer line 20B, and the space inside the inner line 20A is a chip. The mounting unit 13 is obtained. The frame of the stiffener 20 has a width equal to the distance between the inner line 20A and the outer line 20B, and the stiffener 20 is wired so that the outer line 20B is positioned on the outer periphery of the wiring board body 10. It is bonded on the plate body 10.

  A part of the plurality of wirings 21 formed on the conductor layer 16 of the wiring board body 10 has one end outside the inner line 20A of the stiffener 20 (that is, between the inner line 20A and the outer line 20B), and the other end is It extends from the inner line 20A to the inner side (that is, in the chip mounting portion 13). In the multilayer wiring board 1 according to the present invention, the following characteristics are given to the wiring passing under the inner line 20A of the stiffener 20 as described above. Hereinafter, a conventional example will be described first.

  FIG. 4 is a plan view showing a state in which the chip 2 is mounted on the chip mounting portion 13 of the multilayer wiring board 5 according to the conventional example. When the chip 2 smaller than the area of the upper surface of the multilayer wiring board 5 is mounted on the chip mounting portion 13 formed near the center of one main surface (upper surface) of the multilayer wiring board 5, as shown in FIG. In many cases, the plurality of wirings 21 are drawn radially from the outer periphery toward the outer periphery of the multilayer wiring board 5. In this case, the angle at which the inner line 20A of the stiffener 20 and the wiring 21 intersect is vertical or close to 90 degrees at several locations (locations surrounded by a one-dot broken line in the figure).

  FIG. 6 is a partial enlarged view in which one of the portions surrounded by the broken line in FIG. 4 is enlarged. When the inner line 20A of the stiffener 20 and the wiring 21 are orthogonal to each other, when the multilayer wiring board 5 is bent in the vertical direction, The width of the wiring to withstand that is minimized, and the possibility of disconnection is increased. That is, since the stiffener 20 has higher rigidity than the wiring board body 10, the multilayer wiring board 5 is bent in the vertical direction and the wiring board body 10 is laminated in the stacking direction (vertical direction). ), The stiffener 20 does not bend and maintains a relatively horizontal plate shape. For this reason, the wiring 21 is bent at a point B intersecting the inner line 20A with the inner edge of the frame indicated by the inner line 20A of the stiffener 20 as the fulcrum of the insulator (see FIG. 5). It has been experimentally known that this tendency appears remarkably when the line width of the wiring 21 is 30 μm or less.

  Therefore, in the present invention, the angle at which the inner line 20A intersects the wiring 21 is perpendicular to the extending direction of the inner line 20, particularly when the line width of the wiring 21 intersects with the inner line 20A is 30 μm or less. Set to be diagonal. As shown in FIG. 3, the wiring set to obliquely intersect the inner line 20 </ b> A (particularly referred to as “oblique wiring 21 </ b> A”) has an intersection angle θ of 60 on the same plane with the inner line 20 in particular. It is preferable to design so as to be less than or equal to the degree.

  The diagonal wiring 21A may have a length of at least 1,000 μm or more and a total length of 2,000 μm or more on substantially the same plane in both the front and rear directions from the intersection B with the inner line 20A. Accordingly, the diagonal wiring 21A may be a part of the wiring 21 connecting the outer edge of the chip mounting position to the outside of the inner line 20A of the stiffener 20 as shown in FIG. Alternatively, for example, as indicated by reference numeral 21 </ b> S in FIG. 1, it may be a wiring that connects the vicinity of the outer edge of the chip mounting position to the outside of the inner line 20 </ b> A of the stiffener 20 with a straight line.

  FIG. 3 is a partial enlarged view of the multilayer wiring board 1 of FIG. 1 in which a portion where the wiring 21 connecting the outer periphery of the chip 2 to the outside of the inner line 20A of the stiffener 20 is an oblique wiring 21A is enlarged. As shown in this figure, an oblique wiring 21A whose direction is locally changed in the vicinity of the intersection B between the wiring 21 and the inner line 20A is provided, and a portion where the wiring 21 intersects the inner line 20A is made larger than the line width of the wiring 21. Enlarge. Thus, it is preferable that the portion whose direction has been locally changed is at least 1,000 μm or more in the front-rear direction from the intersection B because the force to bend the wiring 21 can cope with a slight deviation from directly below the intersection B.

  Note that part of the wiring 21 crossing under the stiffener 20 (that is, the portion under the diagonal wiring 21A and the stiffener 20) does not originally appear in the cross-sectional view taken along the line XX in FIG. However, in FIG. 2, since the wiring 21 passes under the stiffener 20, portions that do not originally appear in the cross-sectional view are also shown by hatching.

  In this way, by setting the inner line 20A of the stiffener 20 and the wiring 21 to cross obliquely, the strength of the wiring is increased and disconnection is avoided. Further, when the crossing angle between the wiring 21 and the inner line 20A is set to be oblique, particularly 60 degrees or less, the end of the single wiring 21 connecting the outer periphery of the chip to the outer side of the inner line 20A of the stiffener 20 is terminated. The effect of increasing the degree of freedom of the position as the base end is also obtained.

  Hereinafter, the present invention will be specifically described by way of examples. In the example, a multilayer wiring board having the same configuration as that of the multilayer wiring board 1 according to the first embodiment described above was prepared.

[Example 1]
First, a polyimide resin double-sided copper-clad laminate tape (trade name: Microlux HP, manufactured by DuPont Co., Ltd.) made by a laminating method as a core material was made to have a width of 105 mm and a length of 100 m, and this tape was wound around a reel having a diameter of 300 mm. The polyimide resin double-sided copper-clad laminate tape is obtained by laminating a 12 μm thick electrolytic copper foil as a conductor layer on both sides of a 25 μm thick polyimide film which is an insulating resin layer. Hereinafter, all processes were performed by a reel-to-reel method using a reel of this size.

  Next, a hole having a diameter of 50 μmφ was formed at a predetermined position of the core material by a laser processing machine. The hole is formed so as to penetrate the copper foil (conductor) layer and the polyimide (insulating resin) layer on the upper surface of the core material and not to penetrate the copper foil (conductor) layer on the lower surface, and subjected to electroless plating and electrolytic plating. A via hole was formed to conduct the copper foil layers on both sides.

  Furthermore, a photoresist (trade name PMER, manufactured by Tokyo Ohka Kogyo Co., Ltd.) was coated on the copper foil layers on both sides of the core material, and dried at a temperature of 80 ° C. for 30 minutes.

  Next, exposure and development were performed through a photomask having a predetermined pattern to form photomask patterns on both copper foil layers. In the circuit design for manufacturing this photomask, when the stiffener is attached to the main body of the wiring board in a later step, among the wiring intersecting with the inner line of the stiffener, the wiring width of 30 μm or less If necessary, the angle formed at the intersection of the inner line and the wiring is changed to 60 degrees or less by changing the extending direction of the wiring over a length of 2,000 μm before and after the intersection. The part which becomes becomes.

  Further, a portion of the copper foil exposed from the photomask pattern is dissolved and removed with a ferric chloride solution at 50 ° C. and 40 ° Be (degree Baume) to form a circuit pattern including a plurality of wirings. All the photoresist was stripped off with an aqueous sodium hydroxide solution.

  Next, a cast copper-clad plate (trade name: Neoprex NEX, manufactured by Mitsui Chemicals, Inc.) is interposed on one layer of the conductor wiring layer on which the circuit pattern of the core material is formed, with a film adhesive having a thickness of 15 μm. ) Laminated backing material. The cast copper-clad plate is obtained by laminating an electrolytic copper foil having a thickness of 12 μm on one side of a polyimide film having a thickness of 13 μm by a casting method.

  Lamination was performed using a reel-to-reel type roll laminator, and the hardness of the roll used was 70 degrees in both upper and lower directions, and the roll temperature was 180 ° C. in both upper and lower directions. The roll pressure was 3 kg / cm as linear pressure. Lamination of the backing material was sequentially performed on both sides of the core material.

  Subsequently, a via hole is formed in the metal conductor layer of one backing material in the same manner as the core material to establish conduction with the conductor wiring layer of the core material, and then a wiring pattern is formed on the metal conductor layer of the core material. A pad pattern for connecting to the chip was formed by the same method as that for forming the chip. Furthermore, a via hole and a pad pattern for connecting to a printed wiring board were similarly formed on the metal conductor layer of the other backing material.

  A solder resist layer having a thickness of about 20 μm was formed on each of the conductor layers of the two backing materials in the outermost layer of the laminated structure thus formed by screen printing, and post-baked. Next, an opening was formed by a photoetching method so that a predetermined portion of the pad pattern under the solder resist layer was exposed.

  The tape-like laminate was cut into a predetermined size by punching to obtain a flexible wiring board body having a thickness of 200 μm. Next, a stiffener was affixed on one main surface of the wiring board main body and connected to the chip. The material of the stiffener is copper, and the surface thereof is plated with nickel. The stiffener has a rectangular frame shape whose outer periphery is the same size as the multilayer wiring board. The width of the frame, that is, the distance from the outer periphery (outer line) to the inner periphery (inner line) is 5 mm and the thickness is 700 μm. For attaching the stiffener, a film adhesive (trade name TSA-5110, manufactured by Toray Industries, Inc., thickness 100 μm) was used.

  A desired multilayer wiring board was obtained as described above.

[Example 2]
As Example 2, in the conductor wiring layers of the core material and the backing material, the wiring direction was adjusted in the vicinity of the intersection with the stiffener inner line in the same manner as in Example 1. However, the portion in which the direction of the target wiring is adjusted has a length of 500 μm before and after the intersection. Other than that, a multilayer wiring board was obtained by the same manufacturing process as in Example 1.

[Comparative example]
In the conductor wiring layer of the core material and the backing material, except for performing a wiring pattern design that does not adjust the direction of the wiring near the intersection with the stiffener inner frame, the manufacturing process is exactly the same as in Example 1. A multilayer wiring board was obtained. As a result, the wiring having a wiring width of 30 μm that intersects the inner line of the stiffener at an angle of 60 ° or more exists only in the uppermost layer of the metal conductor layer (that is, the portion corresponding to the conductor layer of the first backing material). Of these, 48 were designed with a wiring width of 20 μm.

[Reliability evaluation by temperature cycle (TCT) test]
About the multilayer wiring board obtained by Example 1, 2, and the comparative example, the wiring inspection was done about all the semiconductor chip connection terminals and the printed circuit board connection terminals. The capacity method was used as the inspection method. When measuring the semiconductor chip connection terminal, the printed circuit board connection terminal mounting surface was grounded, the measurement probe was brought into contact with each of the semiconductor chip connection terminals, and the electric capacitance of the wiring net to which the semiconductor chip connection terminal belongs was measured. The reverse was done when measuring the printed circuit board connection terminals.

  Subsequently, all samples were pre-processed according to the procedure specified in JEDEC (Joint Electron Device Engineering Council) standard, JESD22-A113D. Specifically, it is first passed through a temperature cycle from -40 ° C to 60 ° C for 5 cycles, then placed in an oven at 125 ° C for 24 hours, and then stored in a thermostatic chamber at 30 ° C-60% RH for 192 hours. Immediately after taking it out, it was passed through a reflow process of 3 cycles with a reflow profile assuming use of lead-free solder.

  Next, a TCT test was performed. Specifically, a cycle of exposing in the gas phase to a temperature condition of −55 ° C. for 30 minutes and to a temperature condition of 125 ° C. for 30 minutes was repeated 1,000 times. The switching time of each temperature was performed as quickly as the capacity of the apparatus allowed.

  Thereafter, the wiring inspection was performed again. If there was a change in electric capacity of 20% or more at the same measurement location, it was considered that there was a high possibility that the wiring and the like were deteriorated, and it was determined as defective. The results are shown in Table 1.

  As is clear from Table 1, as in the comparative example, in a sample having a width of 30 μm or less that does not cross obliquely with the inner line of the stiffener, in particular, a wiring that intersects at an angle exceeding 60 degrees, a rapid temperature change Due to the local deformation of the multilayer wiring board due to the above, the wiring is damaged and the reliability is lowered.

  On the other hand, in the example, in the sample in which the wiring pattern is arranged so that the wiring with a width of 30 μm or less intersects with the inner line of the stiffener at an angle of 60 degrees or less, the wiring damage can be reduced as compared with the comparative example. In particular, in Example 1, the wiring pattern is designed so that even a fine wiring having a line width of 20 μm does not intersect the stiffener inner line at an angle exceeding 60 degrees. It was shown to maintain sex. On the other hand, in Example 2, since the length of the portion subjected to the wiring direction adjustment was short, the wiring was more easily damaged than in Example 1, and the reliability was lowered.

  The present invention can be used for an interposer for a package on which a semiconductor chip is mounted.

1 is an overall perspective view of a multilayer wiring board according to a first embodiment of the present invention. Sectional drawing which cut | disconnected the multilayer wiring board of FIG. 1 by XX. The elements on larger scale of the multilayer wiring board of FIG. The top view of the multilayer wiring board which concerns on a prior art example. The partial cross section figure of the multilayer wiring board of FIG. The elements on larger scale of the multilayer wiring board of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Multilayer wiring board 2 ... Semiconductor chip 10 ... Wiring board main body 11 ... Core material 12 ... Backing material 15 ... Insulating resin layer 16 ... .... Conductor layer 17 ... Solder resist layer 19 ... Adhesive layer 20 ... Stiffener (reinforcing member)
20A ... Inner line 20B ... Outer line 24 ... Pad pattern 25 ... Electrode part 26 ... Via hole

Claims (4)

A flexible wiring board main body including at least a plurality of conductor layers, an insulating layer disposed between the plurality of conductor layers, and a wiring formed in any of the plurality of conductor layers;
A frame-shaped reinforcing member affixed on one main surface of the wiring board main body,
The wiring is a plurality of radial wirings extending from the inside of the reinforcing member frame toward the outer edge of the wiring board body along the main surface of the wiring board body,
Each of the plurality of wirings passes under a rectangular inner line of the reinforcing member,
Among the plurality of wirings, the extending direction when the first portion which is the wiring main body of the radial portion from the center of the main surface is extended to the outer edge of the wiring board main body is 90 degrees with respect to the inner line. The wiring intersecting with the second portion is connected to the first portion, and the second portion having a shape bent from the extending direction of the first portion so as to intersect with the line at an angle of 60 degrees or less. A multilayer wiring board comprising: A chip is mounted at the center of the main surface of the multilayer wiring plate,
The multilayer wiring board according to claim 1, wherein the wiring is more radial than the chip. The shape of the first part of the wiring is a straight line having a line width of 30 μm or less and extending along the main surface of the wiring board main body over a length of 1000 μm or more from the intersection with the inner line. The multilayer wiring board according to claim 1 or 2.   The multilayer wiring board according to claim 1, wherein the reinforcing member is a metal frame.