JP5258706B2 - Gate drive circuit for semiconductor power converter - Google Patents

Description

  The present invention relates to a gate drive circuit of a semiconductor power conversion device using a power semiconductor element such as a turn-off thyristor as a main circuit element.

  A gate drive circuit of a power conversion device using a turn-off thyristor as a main circuit element is usually composed of a turn-off circuit and a turn-on circuit. Each of these circuits is configured so that, for example, the electric charge stored in the capacitor is discharged by a switch, and current is injected between the gate and cathode of the turn-off thyristor to achieve turn-off or turn-on. The direction of current is reversed between turn-off and turn-on.

  Along with the turn-on circuit, a holding circuit for holding the turn-on current over the entire period during which the turn-off thyristor is to be turned on is usually provided separately from the turn-on circuit (for example, Patent Documents). See 1.)

  By the way, the turn-off thyristor may have a negative gate-cathode voltage even when a turn-on command is being issued. This is because of the internal structure of the turn-off thyristor, and specifically, due to a parasitic diode that exists equivalently between the gate and the anode. That is, when a gate current is given by an ON command, the main current flows from the anode to the cathode of the turn-off thyristor, and the anode-cathode voltage is generated on the positive side, but the flywheel diode connected in reverse parallel to the turn-off thyristor When a current flows, the forward voltage is generated, so the anode / cathode voltage becomes a negative voltage. At this time, if the forward voltage of the parasitic diode is smaller than the forward voltage of the flywheel diode, the gate-cathode voltage becomes a negative voltage.

Japanese Patent No. 4083299 (Overall)

  In the circuit example disclosed in Patent Document 1, there is a description of a circuit that prevents the holding current from increasing as much as possible when the gate-cathode voltage of the turn-off thyristor becomes negative. Since the time is shorter than that of the current period, no protection was provided to prevent the turn-on current from increasing.

  However, an increase in turn-on current causes an increase in diode or switch losses in the circuit. Therefore, in the case of a device that increases the carrier frequency to make the inverter output current waveform closer to a sine wave for the purpose of reducing harmonics and torque ripple, the gate drive circuit is large for heat countermeasures. There has been a problem of conversion.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor power conversion device that can prevent an increase in turn-on current even when the gate-cathode voltage of a turn-off thyristor becomes negative. It is to provide a gate driving circuit.

  In order to achieve the above object, a gate drive circuit of a semiconductor power conversion device according to the present invention includes a turn-off circuit including an energy storage unit supplied with power from a control power source and an energy storage unit in order to turn on and off the turn-off thyristor. A turn-on circuit including a reactor connected to a gate of the turn-off thyristor via a first switch from a positive electrode of the energy storage means; and a turn-on circuit. A second switch connected between a cathode of the thyristor and a negative electrode of the energy storage means; a first flywheel provided between a connection point of the negative electrode of the energy storage means; the first switch and the reactor; A diode, a negative electrode of the energy storage means and the energy A second flywheel diode provided between the negative electrodes of the storage means; and a turn-on control means for turning on and off the first and second switches. The turn-on control means includes the second switch When the gate-cathode voltage of the turn-off thyristor becomes negative, the first and second switches are turned off.

  According to the present invention, it is possible to provide a gate drive circuit of a semiconductor power conversion device that can prevent an increase in turn-on current even when the gate-cathode voltage of the turn-off thyristor becomes negative.

The circuit block diagram of the gate drive circuit of the semiconductor power converter device which concerns on Example 1 of this invention, and the internal block diagram of a turn-on logic circuit. The time chart at the time of turn-on of the gate circuit of the semiconductor power converter device concerning Example 1 of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Current route | root explanatory drawing of the gate circuit of the semiconductor power converter device which concerns on Example 1 of this invention. The internal block diagram of the turn-on logic circuit of the gate circuit of the semiconductor power converter device which concerns on Example 2 of this invention. The time chart at the time of turn-on of the gate circuit of the semiconductor power converter device concerning Example 1 of the present invention (VG is negative). Current route explanatory diagram of the gate circuit of the semiconductor power conversion device according to the second embodiment of the present invention. The time chart at the time of turn-on of the gate circuit of the semiconductor power converter device concerning Example 1 of the present invention (VG is from negative to positive).

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1A is a circuit configuration diagram of a gate drive circuit of the semiconductor power conversion device according to the first embodiment of the present invention. In the circuit configuration diagram, the holding circuit for holding the turn-on current described above is not shown.

  The turn-off thyristor 14 is an element to be gate-driven. A flywheel diode 15 is connected in antiparallel with the turn-off thyristor 14. The parasitic diode 16 between the gate and the anode of the turn-off thyristor 14 is the above-described equivalent diode.

  In order to drive the turn-off thyristor 14 with gate, control energy is supplied from a control power source having a positive terminal +20 and a negative terminal −20 to charge the energy storage means 3. The energy storage means 3 belonging to the turn-off circuit can be designed by a capacitor bank such as an electrolytic capacitor. The turn-off circuit includes a turn-off logic circuit 1, energy storage means 3, and a switch 4. The switch 4 is connected between the gate of the turn-off thyristor 14 and the energy storage means 3 and is driven by the turn-off logic circuit 1. The turn-off logic circuit 1 is powered by a series controller 2 (eg, a commercially available low voltage circuit) connected in series with the turn-off logic circuit 1.

  The turn-off logic circuit 1 receives a required control signal from an optical fiber indicated by an arrow, for example, via a transistor shown at the left end of the block of the turn-off logic circuit 1. The control signal transmitted through the optical fiber to turn off the turn-off thyristor 14 is amplified in the turn-off logic circuit 1 and a voltage is formed and applied to the switch 4 so that the switch 4 is turned on. When the switch 4 is turned on, current is drawn from the gate of the turn-off thyristor 14 due to the polarity of the energy storage means 3. As a result, the gate of the turn-off thyristor 14 becomes negative with respect to the cathode, and the turn-off thyristor 14 is turned off.

  Next, the turn-on circuit includes a turn-on logic circuit 5 which is a turn-on control means fed from the energy storage means 3 in the same manner as the turn-off logic circuit 1. The turn-on logic circuit 5 is powered through a serial controller 6 also connected in series. The turn-on logic circuit 5 is supplied with the gate-cathode voltage VG of the turn-off thyristor 14 as a feedback signal.

  The energy for the turn-on circuit is obtained by storing the energy given from the energy conversion means 11 in the energy storage means 12. As the energy conversion means 11, for example, a series connection body of a switching element that switches at high frequency in parallel with the control power source and the primary winding of the current transformer is connected. As the energy storage means 12, for example, the secondary winding of the current transformer is rectified and the output charge is stored in the capacitor. The energy for the turn-on circuit does not necessarily have to be obtained from the control power source or the energy storage means 3, and may be configured to be obtained from another insulated power source.

  The energy stored in the energy storage means 12 is applied to the gate of the turn-off thyristor 14 via the switch 10 and the reactor 13, and a current loop is formed from the cathode of the turn-off thyristor 14 to the energy storage means 12 via the switch 8. To do. The flywheel diodes 7 and 9 are connected to the switch 8 and the switch 10 so that recirculation is possible. That is, the flywheel diode 7 is connected from the negative electrode of the energy storage means 3 toward the negative electrode of the energy storage means 12, and the flywheel diode 9 is connected from the negative electrode of the energy storage means 12 toward the connection point of the reactor 13 and the switch 10. Has been.

  The two logic circuits of the turn-off logic circuit 1 and the turn-on logic circuit 5 are connected to each other in terms of signals. If the turn-off logic circuit 1 receives a command to turn off the turn-off thyristor 14, the operation of the turn-on logic circuit 5 is prevented. It is the composition which becomes.

  FIG. 1B shows an internal configuration diagram of the turn-on logic circuit 5.

  When the turn-on command is input, the one-shot circuits 51 and 52 start the one-shot operation. The switch 8 and the switch 10 are turned on by the one-shot operation, and a turn-on current starts to flow. Here, the one-shot time of the one-shot circuit 51 is relatively short, for example, 3 us, and the one-shot time of the one-shot circuit 52 is relatively long, for example, 70 us. The one-shot time of the one-shot circuit refers to a pulse width that continuously outputs 1 unless a reset signal is given.

  The gate voltage of the turn-off thyristor 14 is given to the positive / negative judgment circuit 53. The NAND logic 54 calculates the NAND logic of the output of the positive / negative determination circuit 53 and the output of the one-shot circuit 52, and this output is applied to the reset terminals of the one-shot circuits 51 and 52 via the falling delay circuit 55. The falling delay circuit 55 outputs 0 after a delay time T1 when 0 is input, but immediately outputs 1 when 1 is input.

  If the output of the positive / negative judgment circuit 53 is 1 when the gate-cathode voltage VG is negative, and the output of the one-shot circuits 51, 52 is 1 by the gate-on command, the one-shot circuit 52 outputs 1 while the gate-cathode voltage VG is being output. When becomes negative, the output of the NAND circuit 54 becomes 0, so that the one-shot circuits 51 and 52 are reset after the delay time T1 of the falling delay circuit 55.

  Here, even in the case of the main current mode flowing to the turn-off thyristor 14 side, the turn-on logic circuit 5 issues a turn-on command, and the switches 8 and 10 cause the turn-on current to flow, so that the gate-cathode voltage VG becomes positive only. Therefore, the falling delay circuit 55 is provided so as not to turn off the switch 8 for the time T1 after the switches 8 and 10 are turned on. This delay time T1 is about 0.5 us.

  Next, the turn-on operation when the turn-on logic circuit 5 receives a turn-on command will be described with reference to the time chart of FIG. 2 and the current route diagram of FIG.

  In FIG. 2, when the turn-on logic circuit 5 receives a turn-on command at time t = 0, the turn-on logic circuit 5 simultaneously drives the switches 8 and 10 by the operation of the one-shot circuits 51 and 52, respectively. A turn-on current IG of the turn-off thyristor 14 is given from the energy storage means 12 to the gate of the turn-off thyristor 14 via the switch 10 and the reactor 13 as shown by a solid line in FIG. It follows a loop returning to the energy storage means 12 via the switch 8 and increases with time.

  Next, as shown in FIG. 2, since the gate-cathode voltage VG is already negative at time t = 0, the one-shot circuits 51 and 52 are both reset at time t = T1 by the output of the falling delay circuit 55. Then, the switches 8 and 10 are turned off. At this time, the turn-on current IG continues to flow due to the action of the reactor 13, but the route flows from the reactor 13 to the gate of the turn-off thyristor 14 as indicated by the broken line as the route B in FIG. , And then returns to the reactor 13 through the energy storage means 3, the flywheel diode 7, and the flywheel diode 9. As a result, the turn-on current IG has a triangular waveform as shown in the figure, and can be attenuated while circulating through the route B from time t = T1.

  When the turn-off thyristor 14 is a GTO thyristor rated at 3 kA and 4.5 kV, the turn-on current for turning on requires about 200 A to 400 A, and is normally maintained for about 5 to 15 us. This is a numerical example when the reactor 13 is about 100 nH.

  In FIG. 2, the waveform of the turn-on current IG is shown by two broken lines. One of them is a comparative waveform when the one-shot circuits 51 and 52 are not reset even when the gate-cathode voltage VG becomes negative. In this case, IG increases according to the route A until t = 3 us, and after the switch 10 is turned off, it is attenuated according to the return loop of the route C in FIG. 6 to be described later. To do. Thus, a considerably large turn-on current is allowed to flow for a long time.

  The other broken line is the waveform of the turn-on current IG when the gate-cathode voltage VG is not negative in this embodiment. In this case, as shown in the figure, VG> 0 causes a rise with a gentler slope than the route A shown in the figure, and after the switch 10 is turned off at t = 3 us, it attenuates with a steeper slope than the route C shown. Thus, when VG> 0, the gate current IG does not increase so much and the duration time is short.

  As described above, according to the first embodiment, it is possible to prevent the turn-on current IG from increasing even when the gate-cathode voltage VG becomes negative.

  FIG. 4 is an internal configuration diagram of a turn-on logic circuit of the gate drive circuit of the semiconductor power conversion device according to the second embodiment of the present invention.

  In the second embodiment, the same parts as those in the turn-on logic circuit of the gate drive circuit of the semiconductor power conversion device according to the first embodiment of the present invention shown in FIG. . The second embodiment is different from the first embodiment in that a falling delay circuit 55A is provided instead of the falling delay circuit 55, and the one-shot circuits 51 and 52 are reset by the output thereof. The point where the falling delay circuit 56 for inputting the output is provided, and the AND circuit 57 is provided, and the logical product of the output of the falling delay circuit 56 and the output of the one-shot circuit 51 finally becomes the ON command of the switch 10. In this way, the turn-on logic circuit 5A is configured.

  In the following, the operation and effect of the present embodiment are shown in the time chart when the gate-cathode voltage VG shown in FIG. 5 is negative, the current route shown in FIG. 6, and the gate-cathode voltage VG shown in FIG. This will be described with reference to the time chart.

  In FIG. 5, when the turn-on logic circuit 5A receives a turn-on command at time t = 0, the turn-on logic circuit 5A drives the switches 8 and 10 simultaneously by the operations of the one-shot circuits 51 and 52, respectively. The turn-on current IG of the turn-off thyristor 14 increases according to the route A until t = T1, as in the case of the first embodiment shown in FIG. At time t = T1, since VG is negative at t = 0, the output of the falling delay circuit 56 is inverted to zero. Therefore, the output of the AND circuit 57 becomes 0 and the switch 10 is turned off. On the other hand, since the switch 8 remains on at this stage, the current route of the current IG flowing to the reactor 13 flows from the reactor 13 to the gate of the turn-off thyristor 14 as shown as route C in FIG. , A recirculation loop that flows out from the cathode of the turn-off thyristor 14, returns to the reactor 13 through the switch 8 and the flywheel diode 9.

  Then, when further time elapses and time t = T2, the one-shot circuits 51 and 52 are reset by the operation of the falling delay circuit 55A, and the switch 8 is turned off. When the switch 8 is turned off, the gate current IG attenuates while circulating along the route B as described in the first embodiment.

  FIG. 7 is a time chart when the gate-cathode voltage VG changes from negative to positive after turn-on. Since the gate-cathode voltage VG is negative at the time of t = 0, the transition of the turn-on current IG by the route A up to t = T1, and the transition of the reflux operation by the route C thereafter are the same as in FIG. Become. However, when the gate-cathode voltage VG changes from negative to positive at t = TP as shown in the figure, the output of the falling delay circuit 56 is immediately inverted and becomes 1. Accordingly, the output of the AND circuit 57 becomes 1, and the switch 10 is turned on again. When the switch 10 is turned on, the turn-on current IG increases again by the route A. At this time, the turn-on current IG increases with a gentler slope than the initial route A shown in the figure due to the influence of VG> 0. When t = 3 us, the one-shot time of the one-shot circuit 51 is reached, and the output of the one-shot circuit 51 becomes zero. As a result, the output of the AND circuit 57 is also zero, and the switch 10 is turned off. When the switch 10 is turned off, it attenuates with a slope at VG> 0 according to the return loop of route C as shown. As for the switch 8, when VG <0 is detected at t = 0, the falling delay circuit 55A operates to reset the one-shot circuit 52 after the delay time T2 and start to turn off, but t = Since VG> 0 at the time of TP, this movement is cancelled.

  In this way, when the gate-cathode voltage VG becomes positive within T1 time, the switch 10 can be turned on again. In a high voltage circuit, noise to the gate voltage detection means may be a problem. Therefore, the turn-on current is increased again within the time T1 range rather than immediately stopping the turn-on, and the turn-off thyristor is uniformly turned on. It is safe for the turn-on operation to stop after the time T2 has elapsed.

  Therefore, according to the second embodiment, during the turn-on period, the gate-cathode voltage VG is initially negative, and if it becomes positive thereafter, sufficient current can flow even if turn-on current is required. It becomes.

  In the above description, the delay time of the falling delay circuit 55 and the delay time of the falling delay circuit 56 are set to the same T1, but it is not necessarily required to be the same.

DESCRIPTION OF SYMBOLS 1 Turn-off logic circuit 2, 6 Series controller 3 Energy storage means 4, 8, 10 Switch 5, 5A Turn-on logic circuit 7, 9 Flywheel diode 11 Energy conversion means 12 Energy storage means 13 Reactor 14 Turn-off thyristor 15 Flywheel diode 16 Parasitic Diode 51, 52 One-shot circuit 53 Positive / negative judgment circuit 54 NAND circuit 55, 55A, 56 Fall delay circuit 57 AND circuit

Claims (5)

A gate drive circuit for a semiconductor power conversion device having a turn-off circuit having an energy storage means fed from a control power source and a turn-on circuit having an energy storage means for turning on and off the turn-off thyristor,
The turn-on circuit is
A reactor connected from the positive electrode of the energy storage means to the gate of the turn-off thyristor via a first switch;
A second switch connected between the cathode of the turn-off thyristor and the negative electrode of the energy storage means;
A negative electrode of the energy storage means, a first flywheel diode provided between connection points of the first switch and the reactor;
A second flywheel diode provided between the negative electrode of the energy storage means and the negative electrode of the energy storage means;
Turn-on control means for turning on and off the first and second switches;
The turn-on control means includes
The gate drive of the semiconductor power conversion device, wherein the first switch and the second switch are turned off when the second switch is on and the gate-cathode voltage of the turn-off thyristor becomes negative. circuit. The energy storage means includes
2. The gate drive circuit for a semiconductor power conversion device according to claim 1, wherein the energy supplied from the energy conversion means connected to the energy storage means is insulated and received. The turn-on control means includes
The first and second switches are not turned off for a predetermined time even when the second switch is on and the gate-cathode voltage of the turn-off thyristor becomes negative. A gate drive circuit for a semiconductor power conversion device according to claim 1 or 2. The turn-on control means includes
A first one-shot circuit and a second one-shot circuit which receive an on command from the apparatus and give an on / off command to the first and second switches, respectively;
A positive / negative judgment circuit that outputs 1 when the gate-cathode voltage becomes negative;
A NAND circuit having inputs of the output of the second one-shot circuit and the output of the positive / negative determination circuit;
A first falling delay circuit for delaying the output of the NAND circuit for a predetermined time;
4. The gate drive circuit for a semiconductor power conversion device according to claim 3, wherein the output of the first falling delay circuit is used as a reset signal for the first and second one-shot circuits. The turn-on control means includes
A first one-shot circuit and a second one-shot circuit which receive an on command from the device and give an on command to the first and second switches, respectively;
A positive / negative judgment circuit that outputs 1 when the gate-cathode voltage becomes negative;
A NAND circuit having inputs of the output of the second one-shot circuit and the output of the positive / negative determination circuit;
A second falling delay circuit that delays T1 time and outputs 0 when the output of the NAND circuit becomes 0;
A third falling delay circuit that outputs 0 with a delay of T2 longer than T1 when the output of the NAND circuit becomes 0;
An AND circuit having the output of the second falling delay circuit and the first one-shot circuit as inputs;
The output of the third falling delay circuit is used as a reset signal for the first and second one-shot circuits, and the output of the AND circuit is used as a final on / off command for the first switch. A gate drive circuit for a semiconductor power conversion device according to claim 3.

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