JP5297761B2 - Write prevention adapter device for USB memory - Google Patents

Description

  The present invention relates to an adapter device that prevents data writing to a USB memory. In particular, for example, a host PC that operates on an OS equipped with a standard USB mass storage driver such as Windows (registered trademark) Vista, XP, 2000, etc., and a USB flash memory or USB memory card reader conforming to the USB mass storage standard The present invention relates to a write-protection adapter device connected in between.

  In recent years, portable external memory devices that can read and write information by connecting directly to a USB port of a host PC, called a USB flash memory, a USB flash memory key, etc., have become widespread. In a host PC operating on an OS having a plug and play function, for example, an OS equipped with a standard USB mass storage driver such as Windows (registered trademark) Vista, XP, 2000, etc., a USB flash memory key is connected to the USB port. The OS standard driver software can read and write.

  When photo data or the like is read from the USB flash memory key and printed by a printer via the host PC, writing to the USB flash memory key is not necessary. However, depending on the OS, even if a data file read operation is performed, the last access date / time is written to the data file of the USB flash memory key, so that data due to an erroneous operation may be destroyed or erased. There is danger.

  In order to avoid such a situation, a product in which a USB flash memory key is provided with a write-protect switch is commercially available. However, these products are only a part of the entire market, and those without a write-protect switch are common.

  In addition, in such a USB memory with a write-protect switch, the write-protect function cannot be exhibited unless the user turns on the write-protect switch in advance. Therefore, if the user forgets to turn on the switch, the data may be erased by mistake. In particular, elderly people who are unfamiliar with the handling of a USB memory have a problem that it is difficult to operate a small switch and understand its function, and the write prevention function cannot be effectively used.

  In view of such circumstances, the present invention intends to provide a write prevention adapter device for a USB mass storage device having a write prevention function.

  The above object can be achieved by the following means based on the earnest research of the present inventors.

  (1) The present invention engages with a USB connector included in a USB memory and is electrically connected to the USB connector of the external device and a USB connector of an external device. A device-side USB connector connected to the device, and first communication control means for transmitting and receiving signals to and from the external device via the device-side USB connector and enabling data communication with the external device And a second communication control means for transmitting / receiving a signal based on the USB standard to / from the USB memory via the memory-side USB connector and enabling data communication with the USB memory, and controlling the USB memory In addition, a write prohibition flag for adding a write prohibition flag to a signal transmitted from the USB memory to the external device. And adding means, it is for USB memory write protection adapter device comprising a.

  (2) According to the present invention, in the USB memory write prevention adapter device according to (1), the write prohibition flag adding means detects a mode sense command transmitted from the external device, and the mode sense command. Is transferred to the USB memory, and the write prohibit flag is added to the mode parameter list transmitted from the USB memory in response to the mode sense command, and then the mode parameter list is transferred to the external device. It is characterized by that.

  (3) According to the present invention, in the USB memory write prevention adapter device according to the above (1) or (2), the write command to the USB memory received from the external device is blocked and the write to the external device is performed. Write detection means for transmitting an error signal is provided.

  According to the present invention, it is possible to provide an excellent effect that it is possible to provide a USB memory write prevention adapter device that can prevent writing from an external device to a USB memory and prevent destruction or loss of data due to malfunction.

  Embodiments of the present invention will be described below with reference to the accompanying drawings.

  <Basic configuration>

  First, the USB memory write prevention adapter device 1 according to the first embodiment of the present invention will be described with reference to FIG. FIG. 2 is a block diagram showing the configuration of the USB memory write-protection adapter device 1, an external device 100 such as a personal computer (hereinafter referred to as a host PC), and the USB memory 200.

  The USB memory write prevention adapter 1 includes a CPU 10, a USB host controller 20 (sometimes referred to as second communication control means), a USB device controller 30 (sometimes referred to as first communication control means), The ROM 40, the RAM 50, the memory-side USB connector 60, and the device-side USB connector 70 are provided. The CPU 10, the USB host controller 20, the USB device controller 30, the ROM 40, the RAM 50, the memory side USB connector 60, and the device side USB connector 70 are connected to an address bus (not shown) and a data bus (also not shown), respectively. The memory address and data are transmitted and received between the devices.

  The CPU 10 is a central processing unit, and performs overall control of the USB memory write prevention adapter 1. Specifically, in response to a request signal from the host PC 100, data is read from the USB memory 200, and the USB host controller 20 and the USB device controller 30 are controlled.

  Further, the CPU 10 determines a write signal (command) to the USB memory 200 received from the host PC 100, and if it is a write (write) command, sets and transmits a write prohibit flag or receives it from the host PC 100. The write command is deleted, and an error command is transmitted to the host PC 100 (details will be described later).

  The USB host controller 20 is an IC chip for a controller that performs communication control between the CPU 10 and the USB memory 200. Specifically, in order for the CPU 10 to perform data communication with the USB memory 200, the USB host controller 20 performs transmission and reception of the USB protocol based on the USB standard with the USB memory 200 and performs control for communication.

  The USB device controller 30 is an IC chip for a controller that performs communication control between the CPU 10 and the host PC 100. Specifically, in order to communicate with the PC 100, the USB device controller 30 performs transmission / reception of the USB protocol based on the USB standard with the host PC 100, and performs control for communication.

  In the present embodiment, the USB standard described above is preferably used as a standard based on USB 2.0, but of course it is not limited to this. For example, USB 1.1 or USB 3.0 and other USB standards are also preferable.

  The ROM 40 is a read only memory (READ ONLY MEMORY). The ROM 40 stores firmware (program) for performing the basic operation of the USB memory write prevention adapter 1, initial setting values of the USB host controller 20 and the USB device controller 30, and the like. As a result, the CPU 10 can read and execute a necessary program from the ROM 40 at an arbitrary timing.

  The RAM 50 is a memory (Random Access Memory) that can be accessed at any time. The RAM 50 functions as a work area for the CPU 10 and is used to temporarily store data read from the USB memory 200 in accordance with instructions from the CPU 10. In addition, the RAM 50 temporarily stores commands received from the host PC 100 or the USB memory 200 (for example, a write prohibit command or a read command).

  The memory-side USB connector 60 is a USB receptacle connector that can be engaged with a USB plug connector 220 provided in the USB memory 200. Note that the memory-side USB connector 60 is an A-type terminal USB receptacle connector, but is not limited to an A-type terminal. For example, a mini-USB terminal or other terminal shape is preferable.

  The device-side USB connector 70 is a USB plug connector that can be engaged with a USB receptacle connector 120 provided in the host PC 100. The device-side USB connector 70 is an A-type terminal USB plug connector, but is not limited to an A-type terminal. For example, a mini-USB terminal or other terminal shape is preferable.

  The USB memory 200 is a flash memory including a USB plug connector 220.

  <Operation flowchart>

  Next, the basic operation of the USB memory write prevention adapter 1 will be described with reference to the flowchart shown in FIG.

  First, in step S101, the CPU 10 determines whether or not the USB memory write prevention adapter 1 has been inserted into the host PC 100. If it is determined that the USB memory write prevention adapter 1 has been inserted, the process proceeds to step S102. If it is determined that the USB memory write prevention adapter 1 has not been inserted, the process ends. When the USB memory write prevention adapter 1 is inserted into the host PC 100, the USB memory write prevention adapter 1 is supplied with power from the host PC 100.

  In step S102, the CPU 10 performs initial settings for various devices. Specifically, the CPU 10 reads and executes firmware from the ROM 40, reads various initial data from the ROM 40, and performs initial settings of the USB host controller 20 and the USB device controller 30. At this stage, the CPU 10 only performs various initial settings and does not perform USB communication with the host PC 100 or the USB memory 200. As a result, the host PC 100 does not perform any special control, and the USB receptacle connector 120 of the host PC 110 is simply extended to the memory-side USB connector 60.

  In step S103A, the CPU 10 determines whether or not the USB memory 200 is inserted. In step S103A, if the CPU 10 determines that the USB memory 200 is inserted into the USB memory write prevention adapter 1, the CPU 10 proceeds to step S103B and determines between the host PC 100 and the USB memory 200 based on the firmware. Control for establishing USB communication is performed.

  Specifically, in step S103B, the CPU 10 activates the USB device controller 30, and transmits the descriptor transmission request received from the host PC 100 to the USB memory 200 via the USB host controller 20. Here, the descriptor is data included in each USB device for the host PC 100 to correctly recognize the USB memory 200. Further, the CPU 10 receives the descriptor information transmitted from the USB memory 200 via the USB host controller 20 and transmits it to the host PC 100 via the USB device controller 30. In step S103A, if the CPU 10 determines that the USB memory 200 is not inserted, the CPU 10 waits until the USB memory 200 is inserted.

  Next, in step S104A, the CPU 10 receives the mass storage command and data received from the host PC 100 or the data received from the USB memory 200, and what type of mass storage command has been sent from the host PC 100. Or what kind of response is received from the USB memory 200. It is determined whether or not a special signal passes through these signals. In the present embodiment, the type of mass storage command transmitted from the host PC 100 is determined, and it is monitored whether or not a special command is included therein. That is, except for the special response described below, the response signal from the USB memory 200 is not constantly monitored.

  If the CPU 10 determines in step S104A that the mass storage command determined in step S103 is a specific command, specifically, a mode sense (MODE SENSE) command in the present embodiment, the process proceeds to step S104B. The command is transmitted as it is to the USB memory 200 and a response monitoring flag is set, and the process proceeds to step 104C to wait for the next response signal to be transmitted from the USB memory 200.

  In step 104C, when the CPU 10 receives a mode parameter list (MODE PARAMETER LIST), which is information transmitted from the USB memory 200, the device specific parameter (DEVICE SPECIFIC PARAMETER) in the mode parameter header (MODE PARAMETER HEADER) therein. ) Write protect bit (Write Protect Bit) is forcibly set to 1.

  Specifically, there are two mode sense commands: a mode sense (6) command and a mode sense (10) command. When the CPU 10 receives the mode parameter header (6) corresponding to the mode sense (6) command from the USB memory 200, the bit-7 (Bit-2) of byte-2 (Byte-2) of the mode parameter header (6) -7) is set to 1. When the CPU 10 receives the mode parameter header (10) corresponding to the mode sense (10) command from the USB memory 200, the bit-7 (Bit-3) of byte-3 (Byte-3) of the mode parameter header (10) -7) is set to 1.

  As described above, the CPU 10 forcibly rewrites the mode parameter header and sets the write prohibition flag. Thereafter, the process proceeds to step 105, and this mode parameter header is transmitted to the host PC 100 as a response signal of the USB memory 200. As a result, the host PC 100 recognizes (misidentifies) that the USB memory 200 is a write-protected memory.

  In step S104A, if the mass storage command transmitted from the host PC 100 is a normal command (a signal that is not monitored), the process proceeds to step S104D, and the response signal of the USB memory 200 is transferred to the host PC 100 as it is. In step S104E, the response signal of the USB memory 200 is received, and the process further proceeds to step S105, and this response signal is transferred to the host PC 100 as it is. Thereby, it is possible to suppress a decrease in processing speed in a normal command as much as possible. For example, in step S104A, if the command received from the host PC 100 is a data read command, the CPU 10 proceeds to step S104D and transmits the data read command to the USB memory 200. In step S104E, the CPU 10 receives the corresponding data from the USB memory 200, transfers the data to the host PC 100 in step S105, and ends the process.

  Further, in step S104A, if the CPU 10 determines that the mass storage command determined in step S103 is a specific command, specifically, a data write command in the present embodiment, the process proceeds to step S104F. In step S104F, the CPU 10 deletes the data write command without transmitting the data write command to the USB memory 200. That is, the CPU 10 does not write to the USB memory 200 based on the data write command. Further, in step S104G, the CPU 10 generates a write error command for transmission to the host PC 100. Specifically, in the CPU 10, the command transmitted from the host PC 100 and temporarily stored in the RAM 50 is a data write command such as a write command (Write Command) or a format unit command (Format Unit Command) based on the USB standard. In this case, these mass storage commands are not transmitted to the USB memory 200. Note that the USB standard write commands include a write (6) command, a write (10) command, and a write (12) command, all of which are data write commands to the USB memory 200 from the host PC 100. I mean.

  While deleting (stopping) the data write command in this manner, the CPU 10 generates a write protect error (Write Protect Error) status signal to be transmitted to the host PC 100. Thereafter, the process proceeds to step S105, and this write protect error status signal is transmitted to the host PC 100.

  With the above configuration, the host PC 100 can recognize that data writing to the USB memory 200 is not performed. Further, even if the host PC 100 attempts to write data, a write error is forcibly made, and the information in the USB memory 200 can be protected.

  The functional block that performs the control process in steps S104A and S104B may be referred to as a write prohibition flag setting unit. The control processing block in steps S104E and S104F may be referred to as write detection means. In addition, the control block in steps 104C and S104D may be referred to as signal passing means.

  In the present embodiment, the CPU 10 rewrites only the flag in the received signal (protocol) from the USB memory 200 in step S104C. However, the CPU 10 generates a response signal from itself to the host PC 100. The host PC 100 may be misidentified that the USB memory 200 is in a write-protected state.

  The above processing is repeated until the USB memory write prevention adapter 1 is removed from the host PC 100.

  Therefore, when the USB memory 200 is inserted through the USB memory write prevention adapter 1, the host PC 100 receives the write prevention flag from the USB memory write prevention adapter 1, and the USB memory 200 is a write prohibited memory. Recognize that As a result, the host PC 100 does not write data to the USB memory 200. With the above configuration, the (normal) USB memory 200 having no write prevention means is inserted into the host PC 100 via the USB memory write prevention adapter 1 so that the data stored in the internal memory malfunctions. Can be prevented from being destroyed or lost.

  In other words, the USB memory write prevention adapter 1 causes the host PC 100 to mistakenly recognize that the USB memory 200 is write-protected by sending a write prohibition flag to the host PC 100, thereby preventing data writing to the USB memory 200. Can

  Further, the USB memory write prevention adapter 1 eliminates the data write signal (command) sent from the host PC 100 to the USB memory 200, so that data is not written to the USB memory 200, and data due to malfunctions is not written. Destruction and disappearance can be prevented.

  Further, the USB memory write prevention adapter 1 transmits a write error command indicating that no data has been written to the host PC 100. Therefore, the host PC 100 can recognize that data is not written in the USB memory 200. In other words, the USB memory write prevention adapter 1 can block the write command of the host PC 100 and cause the host PC 100 to mistakenly recognize that the USB memory 200 is a write-protected USB memory.

  In the present embodiment, it is preferable to use a storage device such as a flash ROM, MASK-ROM, or EPROM as the ROM 40 for storing firmware.

  The device-side USB connector 70 is not limited to an A-type terminal. For example, a USB receptacle connector having a B-type terminal is used, and an A-type terminal USB receptacle connector provided in the host PC 100 and an A-type terminal are used. It is also preferable to connect with a -B conversion USB cable.

  Further, in the present embodiment, a device-side USB plug connector 70 of the A type terminal provided in the USB memory write prevention adapter 1 is directly plugged into the USB receptacle connector 120 of the A type terminal provided in the host PC 100. Yes. Of course, it is not limited to this, For example, it is preferable to connect the USB device controller 30 and the device-side USB connector 70 with a USB extension cable. Similarly, it is preferable to connect the USB host controller 20 and the memory-side USB connector 60 by extending with a USB cable.

  In the present embodiment, the host PC 100 is a personal computer or the like provided with the USB receptacle connector 120, but it is of course not limited thereto. For example, it is also suitable for use in a KIOSK terminal capable of bidirectional information communication (sometimes referred to as a multimedia station). Further, when the USB memory write prevention adapter 1 for connecting the USB memory 200 to the front panel provided in the KIOSK terminal is used, the USB memory write prevention adapter 1 is provided with a cable having a USB plug connector, and the KIOSK terminal. It is also preferable to connect it by inserting it into a USB receptacle connector provided in the connector.

  Furthermore, in the present embodiment, a case where a signal of the host PC 100 is detected and a USB write prohibition flag is set or a write error signal is generated using this as a trigger has been shown, but the present invention is not limited to this. For example, when a response signal on the USB memory 200 side is detected and this is a header indicating write permission / prohibition, a write prohibition flag may be added to the header.

  Note that the USB memory write-protection adapter of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.

  The USB memory write prevention adapter device of the present invention can be used in the technical field of data protection of a USB memory, particularly in the field of preventing data writing to a USB memory.

1 is a block diagram showing the overall structure of a USB memory write prevention adapter 1, a host PC 100, and a USB memory 200 according to a first embodiment. It is a flowchart which shows the basic operation | movement of the write-protect adapter 1 for USB memories which concerns on 1st Embodiment.

Explanation of symbols

1 USB memory write protection adapter 10 CPU
20 USB host controller 30 USB device controller 40 ROM
50 RAM
60 Memory side USB connector 70 Device side USB connector 100 Host PC
200 USB memory

Claims (2)

A memory-side USB connector that engages with a USB connector included in the USB memory and is electrically connected to the USB connector;
A device-side USB connector that engages with a USB connector of an external device and is electrically connected to the USB connector;
First communication control means for performing transmission and reception of signals based on the USB standard with the external device via the device-side USB connector and enabling data communication with the external device;
A second communication control means for performing transmission / reception of signals based on the USB standard with the USB memory via the memory-side USB connector, and enabling data communication with the USB memory;
Write prohibition flag adding means for controlling the USB memory and adding a write prohibition flag to a signal transmitted from the USB memory to the external device regardless of whether the USB memory can be written.
The write prohibition flag adding means detects a mode sense command transmitted from the external device, transfers the mode sense command to the USB memory, and further transmits from the USB memory in response to the mode sense command. After writing the write prohibition flag in a part of the mode parameter list to be executed, the mode parameter list is transferred to the external device, and the external device is made aware that the USB memory is write prohibition. To
Write prevention adapter device for USB memory. A write detection means for blocking a write command to the USB memory received from the external device and transmitting a write error signal to the external device is provided.
The USB memory write prevention adapter device according to claim 1 .

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