JP5299062B2 - Method for simulating transient characteristics of IGBT - Google Patents
Method for simulating transient characteristics of IGBT Download PDFInfo
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Abstract
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本発明は、MOSFET(Metal Oxide Semiconductor Field Effect Transistor:MOS型電界効果トランジスタ)及びIGBT(Insulated Gate Bipolar Transistor:絶縁ゲートバイポーラトランジスタ)等の半導体素子のSPICE(Simulation Program with Integrated Circuit Emphasis)などのシミュレータによるシミュレーションにおいて、好適な過渡特性をシミュレーションできる簡便なIGBTの過渡特性シミュレーション回路(IGBTモデル)に関する。 The present invention is based on a simulator such as a SPICE (Simulation Program with Integrated Circuit Emphasis) of a semiconductor element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and an IGBT (Insulated Gate Bipolar Transistor). The present invention relates to a simple IGBT transient characteristic simulation circuit (IGBT model) that can simulate suitable transient characteristics in simulation.
図4は、IGBTの基本構造を示す図である。また図5は、一般的に用いられるIGBT等価回路の回路構成を示す図である。IGBTは図4に示すように、Nch型MOSFET41とPNP型BJT(Bipolar Junction Transistor:バイポーラトランジスタ)42の複合素子である。Nch型MOSFET41では、ドレインはN-層でPNP型BJT42のベースに、ソースはN+層でIGBTのエミッタ端子Eに、ゲートはIGBTのゲート端子Gにそれぞれ接続され、PNP型BJT42では、エミッタはP+層でIGBTのコレクタ端子Cに、コレクタはP層でIGBTのエミッタ端子Eに、ベースはN-層でNch型MOSFETのドレインにそれぞれ接続されている。これを等価回路で示すと図5となる。 FIG. 4 is a diagram showing a basic structure of the IGBT. FIG. 5 is a diagram showing a circuit configuration of a commonly used IGBT equivalent circuit. As shown in FIG. 4, the IGBT is a composite element of an Nch type MOSFET 41 and a PNP type BJT (Bipolar Junction Transistor) 42. In the Nch-type MOSFET 41, the drain is connected to the base of the PNP-type BJT42 in the N-layer, the source is connected to the emitter terminal E of the IGBT in the N + layer, and the gate is connected to the gate terminal G of the IGBT. The layer is connected to the collector terminal C of the IGBT, the collector is connected to the emitter terminal E of the IGBT in the P layer, and the base is connected to the drain of the Nch-type MOSFET in the N− layer. This is shown by an equivalent circuit in FIG.
図5に示す等価回路の回路構成において、IGBTの過渡特性をシミュレーションすると、ターンON特性は表現できるが、ターンOFF特性は表現できない。この理由は、IGBT特有の特性であるテイル電流が表現できないからである。 In the circuit configuration of the equivalent circuit shown in FIG. 5, when the transient characteristics of the IGBT are simulated, the turn-on characteristics can be expressed, but the turn-off characteristics cannot be expressed. This is because the tail current, which is a characteristic unique to IGBTs, cannot be expressed.
図6は、IGBTのターンOFF波形を示す図である。図6に示すように、IGBTの実測の波形(図6に示す実線)に対し、図5に示すMOSFET+BJTからなるモデルのシミュレーション波形(図6に示す破線)は、テイル電流が考慮されていない分だけ波形が異なっている。 FIG. 6 is a diagram showing an IGBT turn-off waveform. As shown in FIG. 6, the simulation waveform (broken line shown in FIG. 6) of the model consisting of MOSFET + BJT shown in FIG. 5 does not take into account the tail current in contrast to the actually measured waveform of IGBT (solid line shown in FIG. 6). Only the waveforms are different.
図7でも説明するが、これは、IGBTのターンON時にN-層は過剰キャリアに満たされ(高注入状態)蓄積した少数キャリアである正孔が、ターンOFF時にN-層から掃きだされ、もしくは電子対と再結合し消滅するためと考えられている。図7は、ターンON、OFF時のIGBT内部のキャリアの動作を示す図である。すなわち図7(a)は、ターンON状態を示しており、図7(b)は、ターンOFF直後の状態を示している。そのターンOFF過程において正孔の処理のために流れる電流をテイル電流と呼ぶようにしている。 As will be described in FIG. 7, the N-layer is filled with excess carriers when the IGBT is turned on (high injection state), and the accumulated minority carriers are swept away from the N-layer when the turn is turned off. Or it is thought to recombine with the electron pair and disappear. FIG. 7 is a diagram showing the operation of the carriers inside the IGBT when the turn is ON and OFF. That is, FIG. 7 (a) shows a turn-on state, and FIG. 7 (b) shows a state immediately after the turn-off. In the turn-off process, the current that flows for hole processing is called tail current.
図5に示すMOSFET+BJTモデルのテイル電流を表現できない問題を解決するため、従来から各種モデルが提案されている。これまでに提案されたモデルのなかで、下記特許文献1に示されたモデルは、図8に示すようにIGBT内のBJT42のベースとコレクタ間にテイル電流発生回路80を付加することで、ターンOFF波形を表現する。このテイル電流発生回路80は、電流検出回路(ブロックA)81、経時変化検出回路(ブロックB)82、時間幅制御回路(ブロックC)83および増幅回路(ブロックD)84の4つのブロックで構成される。電流検出回路(ブロックA)81は電流検出用電圧源V1および電流制御型電圧源E1で、また経時変化検出回路(ブロックB)82はコンデンサC3、抵抗R1および検波用ダイオードD1で、また時間幅制御回路(ブロックC)83は抵抗R2およびコンデンサC4で、また増幅回路(ブロックD)84は電圧制御型電圧源E2、抵抗R3,R4およびNPN型BJT Q1で、それぞれ構成される。これら各回路ブロック内の素子のパラメータを調整することで、実測を模擬したテイル電流を発生させ、IGBTのターンOFF波形を表現する。 In order to solve the problem that the tail current of the MOSFET + BJT model shown in FIG. 5 cannot be expressed, various models have been proposed. Among the models proposed so far, the model disclosed in the following Patent Document 1 is obtained by adding a tail current generating circuit 80 between the base and collector of the BJT 42 in the IGBT as shown in FIG. Express an OFF waveform. This tail current generation circuit 80 is composed of four blocks: a current detection circuit (block A) 81, a temporal change detection circuit (block B) 82, a time width control circuit (block C) 83, and an amplification circuit (block D) 84. Is done. The current detection circuit (block A) 81 is the current detection voltage source V1 and the current control type voltage source E1, and the aging detection circuit (block B) 82 is the capacitor C3, the resistor R1, the detection diode D1, and the time width. The control circuit (block C) 83 includes a resistor R2 and a capacitor C4, and the amplifier circuit (block D) 84 includes a voltage control type voltage source E2, resistors R3 and R4, and an NPN type BJT Q1. By adjusting the parameters of the elements in each of these circuit blocks, a tail current that simulates actual measurement is generated, and an IGBT turn-off waveform is expressed.
図5に示す一般的なIGBTモデル(IGBTの過渡特性シミュレーション回路)では、過渡特性をシミュレーションすると、ターンON特性は表現できるが、ターンOFF特性はIGBT特有の特性であるテイル電流が再現できないために実際の特性を表現できないという課題があった。 In the general IGBT model (IGBT transient characteristics simulation circuit) shown in FIG. 5, when the transient characteristics are simulated, the turn-on characteristics can be expressed, but the turn-off characteristics cannot reproduce the tail current, which is a characteristic peculiar to IGBTs. There was a problem that actual characteristics could not be expressed.
この課題を解決するために特許文献1に開示された図8に示すIGBTモデル(IGBTの過渡特性シミュレーション回路)は、IGBT内PNP型BJT42のベースとコレクタ間にテイル電流発生回路80を付加することで、ターンOFF時のテイル電流を表現している。このテイル電流発生回路80は電流検出回路81、経時変化検出回路82、時間幅制御回路83および増幅回路84の4つのブロックで構成している。実際にIGBTモデルを作成する場合、IGBTの実測結果からテイル電流発生回路80内の各回路ブロックにおける素子のパラメータを決める。この素子数が多いため、テイル電流発生回路内の各回路ブロックにおける素子のパラメータを決定するのに、多くの時間がかかる。つまりテイル電流発生回路が複雑で、回路内の素子の数が多いため、従来のIGBTモデルではターンOFF時のテイル電流は表現できるが、各パラメータを決定して実用的なモデルを作成するために多くの時間がかかるという課題があった。 In order to solve this problem, the IGBT model (IGBT transient characteristics simulation circuit) shown in FIG. 8 disclosed in Patent Document 1 adds a tail current generation circuit 80 between the base and collector of the PNP type BJT 42 in the IGBT. The tail current at turn-off is expressed. The tail current generating circuit 80 is composed of four blocks: a current detecting circuit 81, a time-dependent change detecting circuit 82, a time width control circuit 83, and an amplifier circuit 84. When an IGBT model is actually created, element parameters in each circuit block in the tail current generation circuit 80 are determined from the IGBT measurement results. Since the number of elements is large, it takes a lot of time to determine the parameters of the elements in each circuit block in the tail current generating circuit. In other words, because the tail current generation circuit is complex and the number of elements in the circuit is large, the conventional IGBT model can represent the tail current at turn-off, but in order to determine each parameter and create a practical model There was a problem that it took a lot of time.
そこで本発明は、IGBTの過渡特性を精度良くシミュレーションできる簡便なIGBTの過渡特性シミュレーション回路を提供することを目的とする。 Therefore, an object of the present invention is to provide a simple IGBT transient characteristic simulation circuit capable of accurately simulating the transient characteristic of an IGBT.
請求項1記載の発明は、ゲート端子、エミッタ端子、コレクタ端子を有するIGBTの過渡特性をシミュレーションする方法において、ソース電極及びバルク電極が前記エミッタ端子に、ゲート電極が前記ゲート端子に、ドレイン電極がPNP型BJTモデルのベース電極に接続されるNch型MOSFETモデルと、コレクタ電極が前記エミッタ端子に、エミッタ電極が前記コレクタ端子に接続されるPNP型BJTモデルと、前記PNP型BJTモデルのコレクタ端子に流れる電流を入力として、所定の電流を前記Nch型MOSFETモデルのドレイン電極−ソース電極間に出力してテイル電流を模擬する電流制御型電流源と、を備え、前記電流制御型電流源は、抵抗、コンデンサ、前記PNP型BJTモデルのコレクタ電極に流れる電流と同じ電流を前記抵抗の両端に流す第1の電流制御型電流源、および、前記コンデンサに流れる電流と同じ電流を前記Nch型MOSFETモデルのドレイン電極−ソース電極間に流す第2の電流制御型電流源を有し、前記第1の電流制御型電流源と、前記抵抗と、前記コンデンサとを並列に接続した、IGBTの過渡特性シミュレーション回路を用いてIGBTの過渡特性をシミュレーションすることを特徴としている。 The invention according to claim 1 is a method of simulating the transient characteristics of an IGBT having a gate terminal, an emitter terminal, and a collector terminal, wherein the source electrode and the bulk electrode are the emitter terminal, the gate electrode is the gate terminal, and the drain electrode is Nch type MOSFET model connected to base electrode of PNP type BJT model, PNP type BJT model with collector electrode connected to the emitter terminal, emitter electrode connected to the collector terminal, and collector terminal of PNP type BJT model A current-controlled current source that simulates a tail current by outputting a predetermined current between the drain electrode and the source electrode of the Nch-type MOSFET model, and the current-controlled current source has a resistance , A capacitor, a first current-controlled current source that causes the same current as that flowing through the collector electrode of the PNP-type BJT model to flow across the resistor, And a second current control type current source for passing the same current as the current flowing through the capacitor between the drain electrode and the source electrode of the Nch type MOSFET model, the first current control type current source, and the resistor In addition, the transient characteristics of the IGBT are simulated using an IGBT transient characteristics simulation circuit in which the capacitor is connected in parallel .
請求項2記載の発明は、請求項1に記載のIGBTの過渡特性をシミュレーションする方法において、前記IGBTの過渡特性シミュレーション回路は、更に、前記Nch型MOSFETモデルのゲート電極−ドレイン電極間の電圧を入力とする電圧制御型電流源を前記Nch型MOSFETモデルのゲート電極−ドレイン電極間に備え、前記Nch型MOSFETモデルのゲート電極−ドレイン電極間容量を制御することを特徴としている。 The invention according to claim 2 is the method of simulating the transient characteristics of the IGBT according to claim 1, wherein the transient characteristics simulation circuit of the IGBT further calculates a voltage between the gate electrode and the drain electrode of the Nch MOSFET model. the gate electrode of the voltage-controlled current source the Nch-type MOSFET model as input - Bei example between the drain electrode, a gate electrode of the Nch-type MOSFET model - is characterized that you control the drain electrode capacitance.
本発明によれば、IGBTモデルにおいてNch型MOSFETモデルのドレイン電極−ソース電極間に電流制御型電流源を付加することでテイル電流を表現でき、ターンOFF時の動作をシミュレーションで実現できる。 According to the present invention, the tail current can be expressed by adding a current control type current source between the drain electrode and the source electrode of the Nch type MOSFET model in the IGBT model, and the operation at the time of turn-off can be realized by simulation.
さらに、抵抗、コンデンサ、PNP型BJTモデルのコレクタ電極に流れる電流と同じ電流を前記抵抗の両端に流す第1の電流制御型電流源、および、前記コンデンサに流れる電流と同じ電流をNch型MOSFETモデルのドレイン電極−ソース電極間に流す第2の電流制御型電流源を有し、前記第1の電流制御型電流源と、前記抵抗と、前記コンデンサとを並列に接続したことにより、前記容量に蓄積される電荷の充放電電流でテイル電流を模擬でき、且つ短時間で簡便にIGBTモデルのパラメータを決定することが可能である。 In addition, a first current-controlled current source that causes the same current as the current flowing through the resistor, the capacitor, and the collector electrode of the PNP-type BJT model to flow across the resistor, and the same current as the current that flows through the capacitor as the Nch-type MOSFET model A second current-controlled current source that flows between the drain electrode and the source electrode of the first current-controlled current source, the resistor, and the capacitor connected in parallel , can simulate the tail current in charging and discharging Denden flow of charge stored, it is possible in a short time by determining the parameters of easily IGBT model.
またNch型MOSFETモデルのゲート電極−ドレイン電極間に電圧制御型電流源を付加することで、MOSFETやIGBTのスイッチング時に大きな影響を与えるゲート電極−ドレイン電極間容量を調節することができ、さらに実測結果との差を低減することが可能である。 In addition, by adding a voltage-controlled current source between the gate electrode and drain electrode of the Nch MOSFET model, it is possible to adjust the capacitance between the gate electrode and drain electrode, which has a large effect when switching MOSFETs and IGBTs. It is possible to reduce the difference from the result.
以下、本発明の実施の形態について、詳細に説明する。
[実施形態1]
図1は、本発明の第1の実施形態に係るIGBTモデル(IGBTの過渡特性シミュレーション回路)の回路構成を示す図である。図1(a)に示すIGBTモデルは、IGBTとしての動作模擬を行うため、ゲート端子G、エミッタ端子E、コレクタ端子Cを有している。
Hereinafter, embodiments of the present invention will be described in detail.
[Embodiment 1]
FIG. 1 is a diagram showing a circuit configuration of an IGBT model (an IGBT transient characteristic simulation circuit) according to the first embodiment of the present invention. The IGBT model shown in FIG. 1A has a gate terminal G, an emitter terminal E, and a collector terminal C in order to simulate operation as an IGBT.
そしてNch型MOSFETモデル11はソース電極S1及びバルク電極B1がエミッタ端子Eに接続され、ドレイン電極D1がPNP型BJTモデル12のベース電極B2に接続され、ゲート電極G1がゲート端子Gと接続されている。 In the Nch MOSFET model 11, the source electrode S1 and the bulk electrode B1 are connected to the emitter terminal E, the drain electrode D1 is connected to the base electrode B2 of the PNP BJT model 12, and the gate electrode G1 is connected to the gate terminal G. Yes.
PNP型BJTモデル12はコレクタ電極C2がエミッタ端子Eに接続され、エミッタ電極E2がコレクタ端子Cに接続され、ベース電極B2はNch型MOSFETモデル11のドレイン電極D1に接続されている。 In the PNP type BJT model 12, the collector electrode C2 is connected to the emitter terminal E, the emitter electrode E2 is connected to the collector terminal C, and the base electrode B2 is connected to the drain electrode D1 of the Nch type MOSFET model 11.
電流制御型電流源F1(13)はNch型MOSFETモデル11のドレイン電極D1−ソース電極S1間に接続されている。電流制御型電流源F1(13)は、PNP型BJTモデル12のコレクタ電極C2に流れる電流を入力とすることで、IGBTのターンON、ターンOFF状態を検知し、それを受けてNch型MOSFETモデル11のドレイン電極D1−ソース電極S1間に所定の電流を出力することでテイル電流を模擬でき、図1(b)に示すようにシミュレーション結果を精度良く実測と一致させることが可能となる。図1(b)においては、IGBTの実測の波形を太実線で示し、本発明の第1の実施形態に係るIGBTモデルのシミュレーション波形を細実線で示し、また、本発明の第1の実施形態に係るIGBTモデルから上述の電流制御型電流源F1(13)を省いたIGBTモデルのシミュレーション波形を細破線で示している。 The current control type current source F1 (13) is connected between the drain electrode D1 and the source electrode S1 of the Nch type MOSFET model 11. The current-controlled current source F1 (13) receives the current flowing through the collector electrode C2 of the PNP-type BJT model 12 as input, detects the turn-on / turn-off state of the IGBT, and receives it, the Nch-type MOSFET model The tail current can be simulated by outputting a predetermined current between the eleven drain electrodes D1 and the source electrode S1, and the simulation result can be matched with the actual measurement with high accuracy as shown in FIG. In FIG. 1 (b), the measured waveform of the IGBT is shown by a thick solid line, the simulation waveform of the IGBT model according to the first embodiment of the present invention is shown by a thin solid line, and the first embodiment of the present invention The simulation waveform of the IGBT model in which the above-described current control type current source F1 (13) is omitted from the IGBT model according to FIG.
このように本発明の第1の実施形態に係るIGBTモデルでは、Nch型MOSFETモデル11のドレイン電極−ソース電極間にテイル電流を模擬するための所定の電流を出力する電流制御型電流源13の入力電流をIGBT内BJTモデル12のコレクタ端子に流れる電流値とすることで、IGBTのターンON状態とターンOFF状態を正確に判断し、N-層に蓄積される過剰キャリアの状態を表現できるようにしたものである。
[実施形態2]
図2は、本発明の第2の実施形態に係るIGBTモデル(IGBTの過渡特性シミュレーション回路)の回路構成を示す図である。このIGBTモデルは同図に示すように、ゲート端子G、エミッタ端子E、コレクタ端子Cを有している。
As described above, in the IGBT model according to the first embodiment of the present invention, the current control type current source 13 that outputs a predetermined current for simulating the tail current between the drain electrode and the source electrode of the Nch type MOSFET model 11 is used. By making the input current the current value that flows through the collector terminal of the BJT model 12 in the IGBT, it is possible to accurately determine the turn-on and turn-off states of the IGBT and express the state of excess carriers accumulated in the N-layer It is a thing.
[Embodiment 2]
FIG. 2 is a diagram showing a circuit configuration of an IGBT model (an IGBT transient characteristic simulation circuit) according to the second embodiment of the present invention. This IGBT model has a gate terminal G, an emitter terminal E, and a collector terminal C as shown in FIG.
Nch型MOSFETモデル11はソース電極S1及びバルク電極B1がエミッタ端子Eに接続され、ドレイン電極D1がPNP型BJTモデル12のベース電極B2に接続され、ゲート電極G1がゲート端子Gと接続されている。 In the Nch MOSFET model 11, the source electrode S1 and the bulk electrode B1 are connected to the emitter terminal E, the drain electrode D1 is connected to the base electrode B2 of the PNP BJT model 12, and the gate electrode G1 is connected to the gate terminal G. .
PNP型BJTモデル12はコレクタ電極C2がエミッタ端子Eに接続され、エミッタ電極E2がコレクタ端子Cに接続され、ベース電極B2はNch型MOSFETモデル11のドレイン電極D1に接続されている。 In the PNP type BJT model 12, the collector electrode C2 is connected to the emitter terminal E, the emitter electrode E2 is connected to the collector terminal C, and the base electrode B2 is connected to the drain electrode D1 of the Nch type MOSFET model 11.
そして図1に示した電流制御型電流源F1の具体的な構成として、第1の電流制御型電流源F2(14)及び第2の電流制御型電流源F3(17)、並びに、第1の電流制御型電流源F2(14)と抵抗R5(15)と容量C5(16)が並列に接続された回路を設けている。第1の電流制御型電流源F2(14)の入力電流は、PNP型BJTモデル12のコレクタ電極C2に流れる電流である。第1の電流制御型電流源F2(14)から電流が流れることで、容量C5(16)に電荷が蓄積され、その充放電の電流を第2の電流制御型電流源F3(17)により、Nch型MOSFETモデル11のドレイン電極D1−ソース電極S1間に流すことでテイル電流を模擬する。この抵抗R5(15)と容量C5(16)のパラメータを調整することで短時間にテイル電流を模擬でき、シミュレーション結果を精度良く実測と一致させることが可能となる。
[実施形態3]
図3は、本発明の第3の実施形態に係るIGBTモデル(IGBTの過渡特性シミュレーション回路)の回路構成を示す図である。本発明の第3の実施形態に係るIGBTモデルは、図2に示した第2の実施形態に係るIGBTモデルの回路構成で、Nch型MOSFETモデル11のゲート電極G1−ドレイン電極D1間に電圧制御型電流源GV1(18)を付加したモデルである。本発明の第3の実施形態に係るIGBTモデルは、図2に示した第2の実施形態に係るIGBTモデルの回路構成と基本的には同じであるため、回路構成として付加された構成部分についてのみ説明する。
As a specific configuration of the current control type current source F1 shown in FIG. 1, the first current control type current source F2 (14), the second current control type current source F3 (17), and the first A circuit is provided in which a current-controlled current source F2 (14), a resistor R5 (15), and a capacitor C5 (16) are connected in parallel. The input current of the first current control type current source F2 (14) is a current flowing through the collector electrode C2 of the PNP type BJT model 12. As current flows from the first current control type current source F2 (14), electric charge is accumulated in the capacitor C5 (16), and the charge / discharge current is supplied by the second current control type current source F3 (17). The tail current is simulated by flowing between the drain electrode D1 and the source electrode S1 of the Nch MOSFET model 11. By adjusting the parameters of the resistor R5 (15) and the capacitor C5 (16), the tail current can be simulated in a short time, and the simulation result can be matched with the actual measurement with high accuracy.
[Embodiment 3]
FIG. 3 is a diagram showing a circuit configuration of an IGBT model (an IGBT transient characteristic simulation circuit) according to the third embodiment of the present invention. The IGBT model according to the third embodiment of the present invention has the circuit configuration of the IGBT model according to the second embodiment shown in FIG. 2, and controls the voltage between the gate electrode G1 and the drain electrode D1 of the Nch type MOSFET model 11. This is a model to which a current source GV1 (18) is added. The IGBT model according to the third embodiment of the present invention is basically the same as the circuit configuration of the IGBT model according to the second embodiment shown in FIG. Only explained.
本発明の第3の実施形態に係るIGBTモデルは、図2に示した第2の実施形態に係るIGBTモデルの回路構成に付加した電圧制御型電流源GV1(18)で、ゲート電極G1−ドレイン電極D1に流れる電流を制御することで、過渡特性に大きく影響するゲート電極G1−ドレイン電極D1間容量を制御するようにしたものである。これにより、テイル電流を模擬する際に更に実測結果との差を低減させる、つまりフィッティング精度を向上させることが可能となる。 The IGBT model according to the third embodiment of the present invention is a voltage control type current source GV1 (18) added to the circuit configuration of the IGBT model according to the second embodiment shown in FIG. By controlling the current flowing through the electrode D1, the capacitance between the gate electrode G1 and the drain electrode D1, which greatly affects the transient characteristics, is controlled. As a result, when the tail current is simulated, the difference from the actual measurement result can be further reduced, that is, the fitting accuracy can be improved.
11 Nch型MOSFETモデル
12 PNP型BJT(Bipolar Junction Transistor)モデル
13 電流制御型電流源(F1)
14 第1の電流制御型電流源(F2)
15 抵抗(R5)
16 容量(C5)
17 第2の電流制御型電流源(F3)
18 電圧制御型電流源(GV1)
G ゲート端子
C コレクタ端子
E エミッタ端子
G1 ゲート電極
D1 ドレイン電極
S1 ソース電極
B1 バルク電極
B2 ベース電極
C2 コレクタ電極
E2 エミッタ電極
11 Nch type MOSFET model
12 PNP BJT (Bipolar Junction Transistor) model
13 Current-controlled current source (F1)
14 First current-controlled current source (F2)
15 Resistance (R5)
16 capacity (C5)
17 Second current-controlled current source (F3)
18 Voltage controlled current source (GV1)
G Gate terminal
C Collector terminal
E Emitter terminal
G1 gate electrode
D1 Drain electrode
S1 Source electrode
B1 Bulk electrode
B2 Base electrode
C2 collector electrode
E2 Emitter electrode
Claims (2)
ソース電極及びバルク電極が前記エミッタ端子に、ゲート電極が前記ゲート端子に、ドレイン電極がPNP型BJTモデルのベース電極に接続されるNch型MOSFETモデルと、
コレクタ電極が前記エミッタ端子に、エミッタ電極が前記コレクタ端子に接続されるPNP型BJTモデルと、
前記PNP型BJTモデルのコレクタ電極に流れる電流を入力として、所定の電流を前記Nch型MOSFETモデルのドレイン電極−ソース電極間に出力してテイル電流を模擬する電流制御型電流源と、を備え、
前記電流制御型電流源は、
抵抗、コンデンサ、前記PNP型BJTモデルのコレクタ電極に流れる電流と同じ電流を前記抵抗の両端に流す第1の電流制御型電流源、および、前記コンデンサに流れる電流と同じ電流を前記Nch型MOSFETモデルのドレイン電極−ソース電極間に流す第2の電流制御型電流源を有し、前記第1の電流制御型電流源と、前記抵抗と、前記コンデンサとを並列に接続した、IGBTの過渡特性シミュレーション回路を用いてIGBTの過渡特性をシミュレーションする方法。 In a method of simulating the transient characteristics of an IGBT having a gate terminal, an emitter terminal, and a collector terminal,
An Nch type MOSFET model in which a source electrode and a bulk electrode are connected to the emitter terminal, a gate electrode is connected to the gate terminal, and a drain electrode is connected to a base electrode of a PNP type BJT model;
PNP type BJT model in which a collector electrode is connected to the emitter terminal, and an emitter electrode is connected to the collector terminal;
As an input the current flowing through the collector electrode of the PNP-type BJT model, the drain electrode of the Nch-type MOSFET model a predetermined current - e Bei and a current-controlled current source which simulates the tail current and output between the source electrode ,
The current-controlled current source is
A resistor, a capacitor, a first current-controlled current source that causes the same current as the current flowing through the collector electrode of the PNP-type BJT model to flow across the resistor, and the same current as the current that flows through the capacitor are the Nch-type MOSFET model A transient current simulation of an IGBT having a second current control type current source that flows between the drain electrode and the source electrode of the first current control type current source, the resistor, and the capacitor connected in parallel A method of simulating the transient characteristics of an IGBT using a circuit .
前記IGBTの過渡特性シミュレーション回路は、更に
前記Nch型MOSFETモデルのゲート電極−ドレイン電極間の電圧を入力とする電圧制御型電流源を前記Nch型MOSFETモデルのゲート電極−ドレイン電極間に備え、前記Nch型MOSFETモデルのゲート電極−ドレイン電極間容量を制御することを特徴とするIGBTの過渡特性をシミュレーションする方法。 The method of simulating the transient characteristics of the IGBT according to claim 1,
The IGBT transient characteristics simulation circuit further includes:
A voltage-controlled current source having a voltage between a gate electrode and a drain electrode of the Nch type MOSFET model as an input is provided between the gate electrode and the drain electrode of the Nch type MOSFET model, and the gate electrode and the drain electrode of the Nch type MOSFET model A method for simulating the transient characteristics of an IGBT, characterized by controlling the capacitance between the electrodes.
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