JP5300944B2 - Power converter, refrigeration air conditioner, and control method for power converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an electric power conversion device capable of preventing degradation in current detection performance in a phase current detection method using a DC bus current and largely corresponding to various motors and systems. <P>SOLUTION: An electric power conversion device comprises: a duty distribution part 305 which distributes duty to at least one type of real vector and at least one type of zero vector on the basis of a voltage command vector; a duty redistribution part 306 in one carrier period 306 which redistributes PWM duty to three types of real vectors and at least one type of zero vector in one carrier period on the basis of the duty allocated by the duty distribution part; and a duty redistribution part 307 in multiple carrier period which redistributes the duty redistributed by the duty redistribution part 306 in one carrier period so that the duty is changed for each carrier period in one change period regarding the multi carrier periods as the one change period. <P>COPYRIGHT: (C)2013,JPO&amp;INPIT

Description

  The present invention relates to a power converter, a refrigeration air conditioner, and a method for controlling the power converter.

  Conventionally, the following two methods have been mainly used as a switching method of an inverter used for driving an electric motor of a refrigeration air conditioner. The first method is a sum of two kinds of basic voltage vectors having a phase difference of 60 degrees and two kinds of zero vectors having no magnitude obtained by switching only one phase of the switching state of these basic voltage vectors. This is a switching method (hereinafter referred to as a three-phase modulation method) that generates PWM using four types of basic voltage vectors. The second method is a switching method using only one of two types of basic voltage vectors having a phase difference of 60 degrees and two types of zero vectors having no magnitude (hereinafter referred to as a two-phase modulation method). is there.

  In the three-phase modulation method or the two-phase modulation method as described above, when the modulation factor (hereinafter, the ratio of the output voltage to the bus voltage is referred to as the modulation factor) is low, there are two types having a phase difference of 60 degrees. The generation time ratio of the basic voltage vector is reduced for both vectors, and the holding time width of the switching mode is narrowed. Even if the modulation rate is high to some extent, if the phase angle is close to one basic voltage vector, the generation time ratio of the other basic voltage vector with the far phase angle is reduced, and the holding time width of the switching mode is reduced. Narrow. In the above two cases, sufficient DC current detection time cannot be ensured in the basic voltage vector generation section where the holding time width of the switching mode is short, and the DC bus current cannot be detected correctly, so that the controllability is remarkably deteriorated. There was a problem.

  In recent years, in order to secure a switching mode holding time width in the above-described case, a method and apparatus for generating a PWM signal with a switching pattern different from the three-phase modulation method and the two-phase modulation method have been proposed. For example, in the following Patent Document 1, two types of basic voltage vectors having a phase difference of 120 degrees, and a zero vector having no magnitude obtained by switching only one phase of the switching state of these basic voltage vectors, A three-phase PWM voltage generating circuit characterized by generating a three-phase PWM voltage using a total of three types of basic voltage vectors, or a three-phase PWM using three types of basic voltage vectors each having a phase difference of 60 degrees A three-phase PWM voltage generation circuit characterized by generating a voltage is disclosed.

  Patent Document 2 listed below discloses a three-phase PWM voltage generation method or apparatus that generates a three-phase PWM voltage using three types of basic voltage vectors having a phase difference of 60 degrees.

Japanese Patent Laid-Open No. 7-298631 Japanese Patent No. 4675902

  According to the conventional technique, it is possible to extend the holding time of the switching mode by using three basic voltage vectors. However, it is not sufficient to secure the holding time in order to widely support various motors and systems, and it is necessary to further extend the holding time in order to prevent current detection performance deterioration in the phase current detection by the DC bus current. There was a problem.

  The present invention has been made in view of the above, and prevents power detection performance deterioration in a phase current detection method using a DC bus current, and can be widely applied to various motors and systems. An object is to obtain a control method of a conversion device.

  In order to solve the above-described problems and achieve the object, the present invention provides a main inverter circuit including a switching element, a current detection unit that detects a DC current of the main inverter circuit, and a DC voltage of the main inverter circuit. Voltage detection means for detecting; a voltage command vector computing unit for obtaining a voltage command vector based on the DC current and the DC voltage; at least one type of real vector and at least one type of zero vector based on the voltage command vector; A duty distribution unit that distributes the PWM duty to each other, and a PWM duty that is divided into three types of real vectors and at least one type of zero vector within one carrier period based on the PWM duty distributed by the duty distribution unit. A first redistribution unit for redistribution, and a PWM duty redistributed by the first redistribution unit. The tee, characterized in that it comprises a second redistribution unit redistributes to PWM duty for each carrier cycle multiple carrier cycle in one modification period and 1 change period is changed, the.

  According to the present invention, it is possible to prevent current detection performance deterioration in a phase current detection method using a DC bus current, and to be widely applicable to various motors and systems. Moreover, since it implement | achieves by a comparatively simple method, cost increase can be suppressed and current detection performance degradation can be prevented.

FIG. 1 is a diagram illustrating a configuration example of the power conversion device according to the first embodiment. FIG. 2 is a diagram illustrating a functional configuration example of the inverter control unit according to the first embodiment. FIG. 3 is a diagram showing the relationship between the on / off state of each phase-side switching element and the observable phase current for each voltage vector. FIG. 4 is a diagram showing an example in which each voltage vector is shown as a vector diagram. FIG. 5 is a diagram showing a duty creation example (within one carrier cycle) of each vector. FIG. 6 is a diagram illustrating an example of the duty of each voltage vector in the process of duty redistribution within a plurality of carrier periods. FIG. 7 is a diagram illustrating an example of a PWM signal when the duty is periodically changed every two carrier periods and the duty setting of the first carrier period is larger than the other. FIG. 8 is a diagram illustrating an example of a waveform of a U-phase upper / lower switching element. FIG. 9 is a diagram illustrating a functional configuration example of the inverter control unit according to the second embodiment. FIG. 10 is a diagram illustrating an on-duty setting example of the upper switching element corresponding to FIG. FIG. 11 is a diagram illustrating an example of PWM duty after duty reassignment, current detection timing, and PWM signal generation execution timing. FIG. 12 is a diagram illustrating another example of the PWM duty after duty reassignment, current detection timing, and PWM signal generation execution timing. FIG. 13 is a diagram illustrating an example of a PWM signal waveform, a current detection interval, and a calculation processing interval corresponding to the example of FIG. FIG. 14 is a diagram illustrating an example of a PWM signal waveform, a current detection interval, and a calculation processing interval corresponding to the example of FIG.

  DESCRIPTION OF EMBODIMENTS Embodiments of a power conversion device, a refrigeration air conditioner, and a control method for a power conversion device according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a first embodiment of a power conversion device according to the present invention. As shown in FIG. 1, the power conversion device according to the present embodiment includes a voltage detection unit 11 that detects a DC voltage, a current detection unit 12 that detects a DC current, a drive signal output unit 13, a DC current and a DC. An inverter control unit 14 that performs an operation using voltage and generates a PWM signal, and an inverter main circuit 2 that drives an electric motor 1 (for example, a three-phase brushless motor having a permanent magnet) by turning ON / OFF a switching element by the PWM signal. And. Although the power converter of this embodiment is used for a refrigeration air conditioner, for example, the application of the power converter of this embodiment is not limited to this.

  The inverter main circuit 2 includes a DC power source 3, switching elements 4a to 4f, diodes 5a to 5f, and a DC current detection element (current detection unit) 6. The DC current detection element 6 is a detection element (for example, a resistor, a current transformer, etc.) for detecting a DC bus current, and is inserted into the DC bus path.

  The current detection unit 12 detects the voltage across the DC current detection element 6 or the output voltage via an amplifier / buffer, if necessary, and passes the detected voltage value to the inverter control unit 14. The inverter control unit 14 converts the voltage value detected by the current detection unit 12 into a current to obtain a direct current.

  The voltage detection unit 11 includes a voltage dividing resistor and a noise removal filter for level shifting the value of the DC voltage (high voltage) of the DC power supply 3 to a range that can be processed by the inverter control unit 14. The inverter control unit 14 obtains a DC voltage by multiplying the voltage level-shifted by the voltage detection unit 11 by a predetermined gain determined by the configuration of the voltage detection unit 11 and converting the voltage.

  As the inverter control unit 14, a microcomputer or a digital signal processor is usually used. FIG. 2 is a diagram illustrating a functional configuration example of the inverter control unit 14. Note that the configuration in FIG. 2 is an example, and any configuration capable of realizing the same function may be used, and the configuration is not limited to the configuration example in FIG.

  As shown in FIG. 2, the inverter control unit 14 includes a PWM signal generation unit 301 and a PWM signal generation unit 201. The PWM signal generation unit 301 includes a phase current determination unit 302 that determines a phase current based on the current value Idc obtained by the current detection unit 12, and an excitation current and torque current calculation that calculates an excitation current and a torque current from the phase current. Unit 303, voltage command vector calculation unit 304 for calculating a voltage command vector by performing various vector controls such as speed control and current control based on excitation current and torque current, and distributing a PWM duty (duty) from the voltage command vector Duty distribution unit 305, duty redistribution unit (first redistribution unit) 306 that redistributes the obtained duty within one carrier cycle, and within a multiple carrier cycle that changes the duty for each of a plurality of carriers A duty redistribution unit (second redistribution unit) 307.

  The drive signal output unit 13 is configured with a known circuit (gate drive circuit) for securing power (voltage, current) necessary for driving the switching elements 4a to 4f and driving each switch. A PWM signal corresponding to each switching element to be output is input to each switching element as a drive signal.

Next, the operation of the PWM signal generation unit 301 will be described in detail. In general, there are eight types (2 ³ = 8) of switching patterns of the switching elements of the three-phase inverter. In this text, the output state of the switching pattern (hereinafter referred to as voltage vector) is defined as follows.

  A voltage vector having a vector length (hereinafter referred to as a real vector) is determined as follows corresponding to the on / off state (1 is on and 0 is off) of each phase upper switching element of the DC bus. (W-phase upper switching element state (ON / OFF state), V-phase upper switching element state, U-phase upper switching element state) = V0 when (0, 0, 1), V2 when (0, 1, 0) , (0, 1, 1) is V3, (1, 0, 0) is V4, (1, 0, 1) is V5, and (1, 1, 0) is V6. . For a voltage vector having no vector length (hereinafter referred to as a zero vector), the DC bus (W-phase upper switching element state, V-phase upper switching element state, U-phase upper switching element state) = (0, 0, The case of 0) is V0, and the case of (1, 1, 1) is V7.

  Here, during real vector generation, the current flowing through the winding of the electric motor 1 can be observed as a direct current. That is, it can be detected as a direct current Idc by the inverter control unit 14 via the direct current detection element 6 and the current detection unit 12. Further, when the zero vector is generated, the direct current Idc cannot be observed.

  FIG. 3 is a diagram illustrating a relationship between an on / off state (1 is turned on and 0 is turned off) of each phase upper switching element for each voltage vector and an observable phase current.

  FIG. 4 is a diagram showing an example in which each voltage vector is shown as a vector diagram. By appropriately combining the above-described eight types of voltage vectors, a magnetic flux corresponding to a desired voltage and frequency can be obtained, and the electric motor 1 can be smoothly rotated.

FIG. 4 shows the relationship between the inverter rotation angle θ and the voltage command vector V ^* with reference to the V1 direction (U-phase direction), and the generation ratio of each voltage vector is determined by θ and V ^* . Here, each basic voltage vector has a phase difference of 60 degrees. Here, the phase angle between the actual vector and V ^* is referred to as a space vector rotation angle theta ^* (0 ° ≦ θ * <60 degrees). The generation time of each voltage vector is determined by V ^* and θ ^* , and the phase current discriminating unit 302 obtains the phase currents Iu to Iw based on the direct current Idc according to the correspondence of FIG. Minute current is detected, and the remaining one phase is calculated by the principle of three-phase equilibrium).

The phase currents Iu to Iw are further converted into an excitation current (γ-axis current Iγ) and a torque current (δ-axis current Iδ) by the excitation current and torque current calculation unit 303. Specifically, the phase currents Iu to Iw are expressed by using a three-phase two-phase transformation matrix [C ₁ ] as shown in the following formula (1) and a rotation matrix [C ₂ ] as shown in the following formula (2). To convert. However, θ in [C ₂ ] is the inverter rotation angle, and shows the case where the rotation direction is clockwise. Although an example is shown in the present embodiment, the rotation direction and the reference phase may be appropriately changed according to the system to be used.

  In the present embodiment, a case where position sensorless control without detecting the position of the electric motor 1 is described. The control coordinate system at the time of carrying out this control will be referred to as γ-δ coordinates according to convention.

Next, the voltage command vector calculation unit 304 performs various vector controls including speed control based on the excitation current and the torque current to calculate the voltage command vector V ^* .

  Next, the PWM signal generation unit 301 creates a generation time ratio (duty) of the PWM signal of each phase. FIG. 5 is a diagram showing a duty creation example (within one carrier cycle) of each vector.

  As the creation of the PWM signal of each phase, first, the duty distribution unit 305 generates (distributes) the duty of the PWM signal of each phase by the same method as the conventional three-phase / two-phase modulation.

As an example, when the inverter rotation angle θ is around 60 degrees on the phase plane with the V1 direction as the initial phase (when the voltage command vector V ^* is near the V3 direction), the duty creation of each vector is shown in FIG. Shown in a). FIG. 5A shows an example in which the voltage command vector V ^* is between V1 and V3.

In the conventional three-phase / two-phase modulation, the duty of each real vector is created by vector decomposition of the voltage command vector V ^* in two directions of V1 and V3. Here, d1 and d3 in FIG. 5A indicate the duties of V1 and V3. In this case, a PWM signal is generated using two types of real vectors (V1, V3) and one or two types of zero vectors (V0, V7) (normally, when two-phase modulation is performed, 1 of V0 or V7). A zero vector of seeds is used).

  Although not shown, when the inverter rotation angle θ is an integral multiple of 60 degrees (including 0 degrees), a PWM signal is generated with one kind of real vector and one or two kinds of zero vectors (V0, V7).

  In the case of FIG. 5A, since d1 is short, it is difficult to detect current when V1 is generated. Therefore, in this embodiment, in such a case, the duty redistribution unit 306 within one carrier period redistributes (redistributes) the duty by the following method (method using three real vectors within one carrier). Distribution) to create three real vectors.

  The zero vector is originally a vector having no length, but may be virtually replaced with the sum of three basic voltage vectors having an equal vector length (equal duty) and having a phase difference of 120 degrees (hereinafter referred to as 3). The two vectors are referred to as virtual voltage vectors for explanation).

  Therefore, in order to correct the duty of the real vector whose vector length is short and current detection is difficult, the three virtual voltage vectors are added in the direction of the basic voltage vector having a phase difference of 120 degrees. For the virtual voltage vector, the vector type and the magnitude of the vector may be set to predetermined values as necessary.

FIG. 5B shows an example of the virtual voltage vector, and FIG. 5C shows an example of the result of adding the virtual voltage vector to the voltage command vector V ^* shown in FIG. In the example of FIG. 5, in order to correct the vector length of V1, virtual voltage vectors with equal duty are added in three directions including V1 (directions having a phase difference of 120 degrees from each other). If the obtained duty in the V2, V2, and V3 directions is d ₁ ′, d ₂ ′, and d ₃ ′ after adding the virtual voltage vectors, d ₁ ′, d ₂ ′, and d ₃ ′ are expressed by the following formula (3 ) (The duty of the three virtual voltage vectors is vd).

d ₁ '= d ₁ + vd
d ₂ '= d ₂
d ₃ '= d ₃ -vd (3)

  Although current detection is facilitated by the above method, there is a need for a method that enables further ultra-low speed operation in order to cope with various motors and system environments. Therefore, in the present embodiment, the duty redistribution section is further expanded from one carrier to a plurality of carriers as described below.

  If a sufficient vector length cannot be obtained even after the redistribution by the duty redistribution unit 306 within one carrier period as described above, the duty redistribution unit 307 within a plurality of carrier periods performs further PWM correction. Specifically, the duty is periodically changed every n carrier cycles (n ≧ 2).

FIG. 6 is a diagram illustrating an example of the duty of each voltage vector in the process of duty redistribution within a plurality of carrier periods. First, the duty redistribution unit 307 within the multiple carrier period first sets the duties d ₁ ″, d ₂ ″, d ₃ ″ for n carriers of V 1, V 2, V ₃ as shown in the following formula (4). Set.

d ₁ ″ = n · d ₁ ′
d ₂ ″ = n · d ₂ ′
d ₃ ″ = n · d ₃ ′ (4)

Thereafter, the duty in each carrier cycle is set as in the following formula (5). Here, V1, V2, V3 respectively d ₁ _1 each vector duty of 1 carrier th cycle corresponding to, d ₂ _1, and d ₃ _1. However, 0 ≦ k ≦ 1.

d ₁ _1 = k · d ₁ ″
d ₂ _1 = k · d ₂ ″
d ₃ _1 = k · d ₃ ″ (5)

  Further, each vector duty of the m carrier period (n ≧ m ≧ 2) in n carriers is set to d1_m, d2_m, and d3_m, and d1_m, d2_m, and d3_m are set as the following formula (6).

d ₁ _m = (1-k) · (1 / (n−1)) · d ₁ ″
d ₂ _m = (1-k) · (1 / (n−1)) · d ₂ ″
_{d 3 _m = (1-k} ) · (1 / (n-1)) · d 3 '' ... (6)

6A shows an example of d ₁ ″, d ₂ ″, and d ₃ ″. FIG. 6B shows an example of d ₁ _1, d ₂ _1, and d ₃ _1, and FIG. c) shows an example of d ₁ _2, d ₂ _2, and d ₃ _2.

  As described above, in the present embodiment, the duty redistribution unit 307 within the multiple carrier period changes the duty for each carrier period within one period, with the multiple carrier period (n carrier period) as one period. Thereby, a carrier cycle having a longer duty than other carrier cycles can be provided within one cycle. Thus, the accuracy of current detection can be improved by performing current detection in a carrier cycle with a longer (enlarged) duty. In the examples of the above formulas (5) and (6), if k> 0.5, the duty of the first carrier cycle can be increased. Note that the same method can be used to increase the duty of another carrier period, such as the second carrier period, as well as the first carrier period.

  Here, each duty within a plurality of carrier periods is redistributed by the above formulas (5) and (6), but the redistribution method is not limited to this, and other carrier periods within one period. Any redistribution method can be used as long as it can provide a carrier cycle with a longer duty than the above.

  FIG. 7 shows the PWM signal when the duty is periodically changed every two carrier periods and the duty setting of the first carrier period is larger than the other (n = 2, 0.5 <k ≦ 1). It is a figure which shows an example. FIG. 7 shows an example of a PWM signal waveform (Up, Vp, Wp), current detection (current detection section), and calculation processing (calculation processing section) of each phase upper switching element. In the current detection and calculation processing stages, hatched portions indicate current detection intervals and calculation processing intervals, respectively.

  Since the carrier cycle Ts is generally known, after setting the duty to be periodically changed for every n carriers, the duty of each phase in each carrier cycle is multiplied by Ts, so that one carrier cycle of each upper switching element. Medium energization time Tup, Tvp, Twp is determined.

  FIG. 8 is a diagram illustrating an example of a waveform of a U-phase upper / lower switching element. As shown in FIG. 8, the dead time time Td for preventing arm short-circuiting is considered with respect to Tup (both sides of the Tup are extended by Td), and the energization time Tun during one carrier period of the lower switching element can be determined. it can. Similarly, Tvn and Twn can be determined based on Tvp and Twp.

  Thereafter, the PWM signal generation unit 201 generates PWM signals Up to Wn for driving the switching elements for the switching elements 4a to 4f based on Tup, Tvp, Twp, Tun, Tvn, and Twn. The signals are input to the switching elements 4 a to 4 f via the drive signal output unit 13. Thereby, the electric motor 1 can be driven.

  In FIG. 7, the current detection interval is also shown together with the PWM signal waveform. As shown in FIG. 7, the current detection may be performed every other carrier period (every two carrier periods). In the example of FIG. 7, an example is shown in which the voltage vector pattern is switched in the order of V0 → V2 → V3 → V7 → V3 → V1 → V0. Since (K> 0.5) is set, it is possible to increase each phase duty on the upper side of the first carrier period as compared with the case where the duty is not changed periodically. Therefore, since current detection becomes easy in the first carrier cycle, current detection may be performed at a timing at which current detection within one carrier cycle becomes easy.

  In the example of FIG. 7, K> 0.5 is set, but K <0.5 may be set in consideration of the convenience of the system and control. In that case, on the contrary, the upper phase duty of the second carrier cycle can be increased, so that the current detection may be performed in the second carrier cycle.

  Moreover, vector calculation is performed every other carrier period. However, the duty in each carrier cycle may be calculated for n carrier cycles in one vector calculation, and the duty may be updated for each carrier cycle.

  However, in the system, there is a case where it is desired to detect the current at every carrier period for the purpose of preventing the complicated software change. In this case, the same control as described above can be realized by performing current detection for each carrier cycle and not using the current value obtained in the second carrier cycle (carrier cycle in which the duty is not increased) in the vector calculation.

  In the same manner, even when n ≧ 3, it may be performed every n carrier periods of current detection and vector calculation. n carrier cycle is one change cycle, current detection is performed at least once in the part where the duty is expanded within one change cycle (for example, in the carrier cycle where PWM duty is set to the highest), and the same change is made after current detection What is necessary is just to perform a vector calculation in one of the carrier periods in a period. Even in this case, the duty in each carrier period may be calculated for n carrier periods at the time of vector calculation, and the duty may be updated for each carrier period.

  As described above, the current detection performance deterioration in the low duty region can be further suppressed by changing the duty of the three real vectors in units of n carrier periods. As a result, various systems and various motors can be handled by a relatively simple method. Further, it is possible to improve the operation stability at the time of starting the motor. Note that the duty redistribution may be performed so that the same duty distribution is periodically repeated every cycle, with the n carrier period being one period, or the duty distribution may be different in each period.

  This embodiment enables extremely low speed operation of a motor or the like by suppressing current detection performance deterioration in the low duty region as described above. Depending on the operating conditions, conventional modulation may be used in the operating region where current detection is possible even with conventional PWM modulation (two-phase / three-phase modulation). That is, a PWM modulation unit that performs conventional PWM modulation (generates a PWM signal), a switching unit that switches between an operation using the PWM signal generation unit 301 of the present embodiment and an operation using the PWM modulation unit, And switching between the conventional modulation and the method of the present embodiment in accordance with the driving situation. Further, according to the inverter rotation angle, the ratio of the DC voltage to the output voltage, etc., the conventional modulation and the method of this embodiment may be combined as necessary to generate the PWM signal as necessary. By switching between the conventional method and the method of the present embodiment as necessary (for example, according to the operation status such as the rotation speed), it is possible to prevent the inverter efficiency from being deteriorated more than necessary.

  By switching between the conventional method and the method of the present embodiment as necessary, it is possible to cope with various systems and various motors by a relatively simple method. Further, it is possible to improve the operation stability at the time of starting the motor.

Embodiment 2. FIG.
FIG. 9 is a diagram illustrating a functional configuration example of the inverter control unit 14a of the power conversion device according to the second embodiment of the present invention. The power conversion device according to the present embodiment is the same as the power conversion device according to the first embodiment except that the inverter control unit 14 is replaced with an inverter control unit 14a. Components having the same functions as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment, and redundant description is omitted.

In the first embodiment, the voltage vector output order of the PWM waveform under the condition that the voltage command vector V ^* is between any two real vectors (for example, the condition that V ^* is between V3 and V2 in FIG. 4). Shows the case of not changing every carrier period. For example, in the case of FIG. 7, the output order of the voltage vector is V0 → V2 → V3 → V7 → V3 → V1 → V0 in any carrier cycle.

  FIG. 10 is a diagram illustrating an on-duty setting example of the upper switching element corresponding to FIG. In FIG. 10, “A1” is the first half duty of the first carrier signal cycle of the U-phase upper switching element, “B1” is the second half duty of the carrier signal first period of the U-phase upper switching element, and “A2” is the U-phase upper switching element. The first half duty of the second cycle of the second carrier signal (second carrier cycle), and “B2” represents the second half duty of the carrier signal second cycle of the U-phase upper switching element. The other phases are indicated by the same rule using C1, D1, C2, D2 (V phase) and E1, F1, E2, F2 (W layer).

  In FIG. 10, since the duty of the first carrier cycle is increased as described above, current detection is performed in the first carrier cycle. In addition, after current acquisition, processing such as vector calculation is performed in the second carrier cycle, and the PWM duty setting value to be output for each phase is updated in the next half cycle or one cycle.

  In actual use, considering the usage environment and various system conditions (such as the performance of the processing device used for the inverter control unit 14), or the influence on noise, etc. In some cases, it is desired to change the output order of the PWM waveforms. In the present embodiment, a method is described in which the output order of voltage vectors is variable for each of the first and second half of the PWM waveform or for a plurality of carriers.

  As shown in FIG. 9, the inverter control unit 14a is the same as the inverter control unit 14 of the first embodiment, except that the PWM signal generation unit 301 is replaced with a PWM signal generation unit 301a. In addition, the PWM signal generation unit 301a has a duty recombination unit 308 added to the PWM signal generation unit 301 of the first embodiment.

  Duty rearrangement unit 308 rearranges the duty of the first half and the second half of one carrier cycle. For example, duty recombination is performed as shown in FIG. 11 based on the duty shown in FIG. FIG. 11 is a diagram illustrating an example of PWM duty after duty reassignment, current detection timing, and PWM signal generation execution timing. For the U-phase upper switching element set in FIG. 10, the latter half duty B1 of the first carrier cycle and the second half duty B2 of the second carrier cycle are switched. As a result, as shown in FIG. 11, the latter half duty of the first carrier cycle is B2, and the second half duty of the second carrier cycle is B1. Recombination is performed in the same manner for the remaining phases. In addition, the third and fourth periods are rearranged in the same manner as the first and second carrier periods. That is, in the example of FIG. 11, the duty in the second half of one carrier cycle is replaced with the duty in the second half of another carrier cycle.

  In this case, for each phase, for example, the duty of the second half of the second carrier period and the first half of the third period of the carrier are increased, so that the current detection may be performed in this section. After the current detection is performed, processing such as vector calculation is performed in the second half of the third carrier period or the first half of the fourth period, and the PWM duty setting value to be output for each phase is updated after the calculated half carrier period or one carrier period.

  FIG. 12 is a diagram illustrating another example of the PWM duty after duty reassignment, current detection timing, and PWM signal generation execution timing. The duty re-arranging unit 308 is not limited to the above example, and may further perform rear-end duty recombination of the second carrier period after re-arrangement in FIG. For example, the first-half duty A2 of the two-carrier cycle and the second-half duty B1 of the second carrier cycle are switched with respect to the U-phase upper switching element. As a result, as shown in FIG. 12, the first half duty of the 2-carrier cycle is B1, and the second half duty of the carrier cycle is A2. Recombination is performed in the same manner for the remaining phases. In addition, the third and fourth periods are rearranged in the same manner as the first and second carrier periods.

  In this case, the duty of the first half of the carrier is increased regardless of the carrier period for each phase, and the current detection may be performed in this section. For example, when current detection is performed in the first half of the first period and the first half of the second carrier period, processing such as vector calculation is performed in the second half of the second carrier period or the first half of the third period, and the half carrier period or one carrier after the calculation is performed. The PWM duty setting value for each phase output after the cycle is updated.

  FIG. 13 is a diagram illustrating an example of a PWM signal waveform, a current detection interval, and a calculation processing interval corresponding to the example of FIG. FIG. 14 is a diagram illustrating an example of a PWM signal waveform, a current detection interval, and a calculation processing interval corresponding to the example of FIG.

  Thus, by rearranging the duty within the carrier period, the same effect as in the first embodiment can be obtained, and the sound spectrum generated from the inverter / motor can be changed. Therefore, it is effective for noise countermeasures and hearing improvement.

  The duty recombination method is not limited to the duty recombination method shown in FIGS. 11 and 12, and one carrier cycle can be divided into two or more, and recombination can be performed in any order in the divided units. Similarly, in the case of n ≧ 3, one carrier cycle can be divided into two or more (for example, first and second half), and rearrangement can be performed in an arbitrary order in the divided units.

  The method described in this embodiment is an effective method for extremely low speed operation and noise countermeasures, but in an operation region where current can be detected even with the conventional modulation (two-phase / three-phase modulation) method. May use conventional modulation. Further, according to the inverter rotation angle, the ratio of the DC voltage to the output voltage, etc., the conventional modulation and the method of this embodiment may be combined as necessary to generate the PWM signal as necessary. By switching between the conventional method and the method of the present embodiment as necessary (for example, according to the operation status such as the rotation speed), it is possible to prevent the inverter efficiency from being deteriorated more than necessary.

  In this embodiment, PWM can be changed between the same carrier cycle or a plurality of carrier cycles by a relatively simple method, so that the computation load is not increased significantly and the computation device is not much costly. Without being improved, it can be widely applied to various motors and systems to prevent current detection performance deterioration and implement noise prevention measures.

  As described above, the power conversion device, the refrigeration and air conditioning device, and the power conversion device control method according to the present invention are useful for power conversion systems that are widely compatible with various motors and systems, and in particular, power that performs extremely low speed operation. Suitable for conversion system.

DESCRIPTION OF SYMBOLS 1 Electric motor 2 Inverter main circuit 3 DC power supply 4a-4f Switching element 5a-5f Diode 6 DC current detection element 11 Voltage detection part 12 Current detection part 13 Drive signal output part 14, 14a Inverter control part 201 PWM signal generation part 301, 301a PWM signal generation unit 302 Phase current determination unit 303 Excitation current and torque current calculation unit 304 Voltage command vector calculation unit 305 Duty distribution unit 306 Duty redistribution unit within one carrier cycle 307 Duty redistribution unit within multiple carrier cycle 308 Duty recombination unit

Claims (16)

A main inverter circuit comprising a switching element;
A current detector for detecting a direct current of the main inverter circuit;
Voltage detection means for detecting a DC voltage of the main inverter circuit;
A voltage command vector calculation unit for obtaining a voltage command vector based on the DC current and the DC voltage;
A duty distribution unit that distributes PWM duty to at least one type of real vector and at least one type of zero vector based on the voltage command vector;
A first redistribution unit that redistributes PWM duty into three types of real vectors and at least one type of zero vector within one carrier period based on the PWM duty distributed by the duty distribution unit;
A second redistribution unit that redistributes the PWM duty redistributed by the first redistribution unit so that a plurality of carrier periods is one change period and the PWM duty is changed for each carrier period within one change period; ,
A power conversion device comprising: A PWM modulator that performs PWM modulation by three-phase modulation or two-phase modulation;
A PWM signal generation unit configured by the duty distribution unit, the first redistribution unit, and the second redistribution unit, and a switching unit that switches between the PWM modulation unit,
The power converter according to claim 1, further comprising:   The power converter according to claim 1, wherein the current detection unit is a resistor or a current transformer.   The power converter according to claim 1, further comprising: a phase current determining unit that determines a phase current based on the direct current.   The power conversion device according to claim 4, further comprising an excitation current and torque current calculation unit that obtains an excitation current and a torque current based on the phase current.   The power converter according to any one of claims 1 to 5, wherein the PWM duty is periodically changed for each of the plurality of carrier periods.   The PWM duty average value in the plurality of carrier periods after redistribution by the second redistribution unit and the PWM duty average value in the plurality of carrier periods before redistribution by the second redistribution unit are approximately It is equal, The power converter device as described in any one of Claims 1-6 characterized by the above-mentioned.   The power converter according to claim 1, wherein the current detection unit detects the DC current in a carrier cycle having the highest PWM duty within the plurality of carrier cycles.   The power conversion device according to claim 1, wherein the current detection unit performs current detection at least for each of a plurality of carrier periods.   The power conversion device according to claim 1, further comprising a duty recombination unit that divides the carrier cycle into two or more and recombines the PWM duty in divided units.   11. The duty reassigning unit divides the carrier cycle into two parts, the first half and the second half, and replaces the latter half with the latter half of another carrier period within one change period as necessary. The power converter described.   The said duty rearrangement part divides | segments a carrier period into 2 parts into the first half and the second half, and if necessary, replaces the first half duty and the second half duty within one carrier period. Power conversion device.   13. The PWM duty generation process by the duty distribution unit, the first redistribution unit, and the second redistribution unit is performed within the plurality of carrier periods after the detection of the direct current. The power converter device as described in any one of these.   After the PWM duty generation processing by the duty distribution unit, the first redistribution unit, and the second redistribution unit within the multiple carrier period, the duty that is actually output as a PWM signal is updated within the multiple carrier period. The power conversion device according to claim 1, wherein the power conversion device is a power conversion device.   A refrigerating and air-conditioning apparatus comprising the power conversion apparatus according to claim 1. A main inverter circuit comprising a switching element; a current detector for detecting a DC current of the main inverter circuit; a voltage detection means for detecting a DC voltage of the main inverter circuit; and a voltage based on the DC current and the DC voltage. A voltage command vector calculation unit for obtaining a command vector, and a control method for a power converter,
A duty distribution step of distributing PWM duty to at least one type of real vector and at least one type of zero vector based on the voltage command vector;
A first redistribution step of redistributing the PWM duty into three types of real vectors and at least one type of zero vector within one carrier period based on the PWM duty distributed in the duty distribution step;
A second redistribution step of redistributing the PWM duty redistributed in the first redistribution step so that a plurality of carrier periods is one change period and the PWM duty is changed for each carrier period within one change period; ,
The control method of the power converter device characterized by including.

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