JP5304136B2 - Surface emitting laser and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a surface-emitting laser having a high yield and high reliability and capable of a high-speed modulating operation. <P>SOLUTION: A surface-emitting laser is equipped with a substrate; a first multilayer-film Bragg reflection mirror formed on the substrate; an oxidized current blocking layer which is formed on the first multilayer-film Bragg reflection mirror and has a p-type conductivity; a first semiconductor spacer layer which is formed on the oxidized current blocking layer and has at least part thereof having a p-type conductivity; an active layer formed on the first semiconductor spacer layer; a second semiconductor spacer layer which is formed on the active layer and has at least part thereof having an n-type conductivity; a step structure formed in the surface of the second semiconductor spacer layer; and a second multilayer-film Bragg reflection mirror which is formed on the second semiconductor spacer layer and consists of a low refractive index layer and a high refractive index layer in which a difference in refractive index between these two layers is 1 or above. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a surface emitting laser, for example, a surface emitting laser used in the fields of optical communication and optical interconnection and a method for manufacturing the same.

  A surface emitting laser (VCSEL) is widely used as a light source for data communication such as Ethernet (registered trademark) and fiber channel because of its low cost and low power consumption. With respect to the modulation speed of these VCSELs, high-speed modulation operation such as 10 Gbps (gigabit per second) has been required in accordance with the recent increase in data communication capacity. The VCSEL is also expected as a light source for optical interconnection, where an element having parallel / ultra-high speed (20 Gbps / channel) is required.

  In general, the modulation speed of a VCSEL is limited mainly by parasitic electric circuit characteristics that are external factors of the element and relaxation oscillation frequency (fr) that is an intrinsic factor. In the parasitic electric circuit characteristics, the electrical response is controlled through the CR time constant of the element. Therefore, an electrical response exceeding 20 Gbps has become possible by reducing the element resistance, reducing the capacity by ion implantation, insulator embedding, and the like.

  On the other hand, fr can be increased in principle by increasing the injection current to increase the photon density. In the case of a VCSEL, the volume of the light emitting part is smaller than that of the edge emitting laser, and the temperature of the light emitting part becomes very high when the injection current to the active layer is increased. Therefore, when a current of a certain level or more is passed, fr does not increase (saturated at about 16 GHz), which is one of the factors that determine the upper limit of the modulation speed of the VCSEL.

  In order to realize a VCSEL capable of high-speed modulation operation, it is necessary to increase fr, and various methods have been tried. As one of the methods, there is narrowing of the constriction diameter in the oxidation current confinement structure, and the technique is disclosed in Non-Patent Document 1. The oxidation current confinement structure is obtained by oxidizing an AlGaAs layer having a high Al composition from the side surface of the mesa with water vapor and changing a part of the AlGaAs layer into an AlOx insulator.

  In this structure, not only the current can be confined, but also a light confinement effect due to the difference in refractive index between the semiconductor and the insulator, so that it is possible to confine both carrier (current) and light simultaneously. Therefore, when the oxidized constriction diameter is narrowed, a high photon density can be obtained even at a small current value, and a high fr can be obtained (fr is proportional to the square root of the photon density).

  Thus, the narrowing of the oxidized constriction diameter makes the rate of increase of fr with respect to the current (current modulation efficiency) very high, and high fr can be obtained before the influence of heat generation due to current injection becomes significant. In Non-Patent Document 1, a modulation band of 15 GHz is obtained at only 0.9 mA in a VCSEL having an oxidized constriction diameter of 3 μm.

  The technique of Non-Patent Document 1 attempts to increase the photon density by reducing the area where light exists in the VCSEL surface direction (direction perpendicular to the light emission direction). Furthermore, the current modulation efficiency of fr can be increased by reducing the area where light exists in the stacking direction (light emission direction).

  The technique is disclosed in the buried tunnel junction type VCSEL of Non-Patent Document 2. The structure of the VCSEL in the stacking direction is composed of upper and lower distributed Bragg reflectors (DBRs) and an optical resonator sandwiched between them. The light forms a standing wave in the vertical direction (stacking direction). The light intensity is designed to be strongest in the active layer. The light intensity in the DBR attenuates exponentially as the distance from the optical resonator increases. The method of attenuation depends on the refractive index difference of the multilayer film forming the DBR. The larger the refractive index difference, the faster the attenuation, and the light is strongly confined within the penetration depth of the DBR.

  The optical resonator has a constant standing wave distribution. Thus, the light distribution range in the stacking direction is determined by the light penetration length in the upper and lower DBRs and the layer thickness of the optical resonator. In order to increase the current modulation efficiency of fr, it is effective to make the sum of the light penetration length in the DBR and the layer thickness of the optical resonator as small as possible.

In Non-Patent Document 2, by using a dielectric multilayer film made of SiO ₂ and a-Si having a large refractive index difference as the upper DBR, the light penetration length into the upper DBR is reduced, and the current modulation efficiency of fr is increased. It is increasing. As a specific value, in a VCSEL having a current confinement diameter of 4 μm, the characteristics are significantly improved compared to the conventional fr saturation value of fr = 27 GHz (about 16 GHz).

  As the methods for improving fr, the above-described two methods are techniques for improving the current modulation efficiency of fr by confining light in a spatially narrow region, and obtaining a high fr before the influence of heat generation due to current injection becomes significant. . In addition, there is a technique for preventing fr from being thermally saturated by suppressing the temperature rise of the element during current injection.

  For example, in Non-Patent Document 2, a tunnel junction structure converts current carriers (carriers) from holes to electrons, thereby replacing p-type DBR (holes as carriers), which causes high resistance, with low resistance. An n-type spacer layer (electrons are carriers) can be used. As a result, the heat generation of the element is suppressed and high fr is obtained.

  In addition, this tunnel junction has a so-called buried tunnel junction structure in which the periphery of the tunnel junction is etched into a mesa shape and is buried by buried growth, and also plays a role of current confinement so that a current flows only in this mesa portion. Yes.

  Furthermore, the mesa step formed by etching is also transferred to the dielectric multilayer film laminated thereon, and this step structure generates an in-plane light confinement effect. Similarly, light can be confined in a spatially narrow area.

  Here, as in Non-Patent Document 1, when narrowing the constriction diameter using the oxidation current confinement structure, the confinement of carriers and the optical confinement are performed by the same oxide layer. Therefore, the region where carriers are confined and the region where light is confined cannot be controlled independently. In particular, the inside of the oxidized constriction portion has a small degree of design freedom for optimizing optical confinement. That is, as the stenosis diameter is reduced, the carrier spread and the light spread are displaced, making it difficult to improve fr significantly.

  Further, as the current confinement diameter is narrowed, the reliability of the element is greatly lowered. This is due to an increase in current density, a decrease in mechanical strength of the element due to an increase in the ratio of the oxidized region in the constricted structure, and an accelerated deterioration during energization due to stress concentration in the non-oxidized region.

  On the other hand, in the buried tunnel junction type VCSEL as in Non-Patent Document 2, a large capacity exists because the bottom surface (p-type layer) of the buried mesa and the n-type buried layer are in contact with each other in a wide region. In order to reduce this capacity, the resistance of the bottom surface of the mesa is increased by oxygen ion implantation or the like before the buried growth. However, the implanted oxygen ions are diffused through a buried growth step after ion implantation and subsequent processes. Therefore, it is difficult to precisely control the distribution, and the manufacturing yield is poor.

  In addition, there is a concern about adverse effects from the viewpoint of reliability, such as oxygen ion implantation may be a non-luminescent center. Further, in the buried tunnel junction type VCSEL, the tunnel junction portion is patterned into a circular shape, a mesa having a depth of several tens of nm is formed by wet etching, and this is buried in a buried growth step. In general, when a circular mesa is formed, an inverted mesa-shaped portion is generated in a part of the mesa, and crystal defects are likely to occur when the portion is embedded. Since current concentrates in the vicinity of the buried current confinement layer, if a crystal defect exists, the defect easily grows from that portion and the device deteriorates.

Y. -C. Chang, two others, Electronics Letters, 2007, Vol. 43, no. 7, p. 396-397 K. Yashiki, 5 others, IEEE Photonic Technology Letters, 2007, Vol. 19, no. 23, p. 1883-1885

  As described above, the techniques described in Non-Patent Documents 1 and 2 are insufficient in speeding up and have problems in yield and reliability. An object of the present invention is to provide a surface emitting laser having high yield and reliability and capable of high-speed modulation operation.

The surface emitting laser according to the present invention is
A substrate,
A first multilayer Bragg reflector formed on the substrate;
An oxidation current confinement layer formed on the first multilayer Bragg reflector and having p-type conductivity;
A first semiconductor spacer layer formed on the oxidation current confinement portion and having p-type conductivity at least in part;
An active layer formed on the first semiconductor spacer layer;
A second semiconductor spacer layer formed on the active layer and having an n-type conductivity at least in part;
A step structure formed on the surface of the second semiconductor spacer;
And a second multilayer Bragg reflector formed on the second semiconductor spacer and composed of a low refractive index layer having a refractive index difference of 1 or more and a high refractive index layer.

A method for manufacturing a surface emitting laser according to the present invention includes:
Forming a first multilayer Bragg reflector on the substrate;
Forming an oxide current confinement layer having p-type conductivity on the first multilayer Bragg reflector;
Forming a first semiconductor spacer layer having p-type conductivity on at least a part of the oxidation current confinement layer;
Forming an active layer on the first semiconductor spacer layer;
Forming a second semiconductor spacer layer having an n-type conductivity at least partially on the active layer;
Forming a step structure on the surface of the second semiconductor spacer;
A second multilayer Bragg reflector comprising a low refractive index layer and a high refractive index layer having a refractive index difference of 1 or more is formed on the second semiconductor spacer.

  According to the present invention, it is possible to provide a surface emitting laser having high yield and high reliability and capable of high-speed modulation operation.

  In the VCSEL according to the present invention, the carrier confinement structure and the optical confinement structure are separated in order to satisfy both high-speed modulation operation and high reliability. Moreover, it arrange | positions effectively so that both structures can fully exhibit a function. Thereby, since each structure can be designed relatively freely, a VCSEL satisfying both high speed and high reliability can be realized. For example, an oxide confinement structure can be used for carrier confinement, and a step structure can be used for optical confinement.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. However, the present invention is not limited to the following embodiment. In addition, for clarity of explanation, the following description and drawings are simplified as appropriate.

Embodiment 1
A surface-emitting laser according to the first embodiment will be described with reference to FIG. In the surface emitting laser according to the first embodiment, on the substrate 101, the first DBR 102, the current confinement layer 103, the first semiconductor spacer layer 104, the active layer 105, the second semiconductor spacer layer 106, the second The DBRs 107 are stacked in this order.

The first DBR 102 is a p-type multilayer DBR in which p-type low refractive index layers 102a and p-type high refractive index layers 102b are alternately stacked.
The current confinement layer 103 includes a current passage region 103a made of an unoxidized p-type semiconductor layer and a current block region 103b made of an oxidized p-type semiconductor layer.
Further, an optical resonator is constituted by at least a part of the first semiconductor spacer layer 104 of p-type and the active layer 105 and at least a part of the second semiconductor spacer layer 106 of n-type.
This surface-emitting laser has a mesa diameter that makes up the resonator reduced so that it can respond at high speed, the mesa side is filled with a resin layer 111, and an n-type electrode 110 is provided thereon.
The p-type electrode 109 is taken from a part of the first DBR 102.

  A step structure 108 is formed on the outermost surface layer of the second semiconductor spacer layer 106 in contact with the second DBR 107. Here, assuming that the step thickness of the step structure is D and the refractive index of the outermost surface layer of the second semiconductor spacer layer 106 is n, 0.06λ ≦ D × n ≦ 0.25λ. As a result, an effective refractive index difference is generated in the surface, and the intensity of light confinement in the surface can be controlled. Here, the lower limit value 0.06λ is the oxide layer thickness of the oxide confinement type VCSEL composed of the semiconductor DBR when all λ / 4 layers are formed as oxide layers (the maximum optical confinement practically obtained with this structure). ) Corresponds to the lower limit step thickness when the same optical confinement is realized by the step structure of the present invention. In other words, the present invention targets light confinement that cannot be obtained with a conventional oxidation confinement structure. Further, the upper limit value 0.25λ is an upper limit value at which light is confined in the step protrusion.

Further, the resonator optical length of the optical resonator is the laser oscillation wavelength λ or 1.5λ. This not only reduces the mode volume in the stacking direction, but also increases the in-plane light confinement due to the step structure. This is because the in-plane effective refractive index difference (difference between the effective refractive index of the stepped portion and the non-stepped portion) Δn _eff is Δn _eff = n _eff × ΔL _opt / L _opt , where ΔL _opt = D × This is because Δn _eff can be increased by reducing L _opt and increasing ΔL _opt . Here, n _eff is the effective refractive index of the convex portion in the step structure, L _opt is the effective resonator optical length, and the optical length of the optical resonator and the optical length that has penetrated into the upper and lower DBR layers. It is an addition.

  When the in-plane optical confinement is increased in the conventional oxide confinement structure, it is necessary to increase the thickness of the oxide layer, which causes a large distortion in the oxide layer portion and the semiconductor layer portion. A large strain applied to the oxidized constriction portion through which current flows leads to a decrease in reliability. In this embodiment, since the in-plane light confinement is assigned to the step structure in which no current flows, high reliability is maintained even if the in-plane light confinement is strengthened.

  Further, the refractive index difference between the low refractive index layer 107a and the high refractive index layer 107b constituting the second DBR 107 is set to 1 or more. As a result, light confinement in the stacking direction is strengthened, the mode volume is reduced, and the device can respond at high speed. In the case of a multilayer DBR made of a semiconductor, the refractive index difference between the low refractive index layer and the high refractive index layer is about 0.5. In the second DBR 107 according to the present embodiment, by setting the difference in refractive index to 1 or more, it is possible to reduce the light penetration length of the multilayer DBR made of a semiconductor to about ½ or less.

  As described above, the refractive index difference between the low refractive index layer 107a and the high refractive index layer 107b constituting the second DBR 107 is 1 or more. In a combination of materials having such a large refractive index difference, the low refractive index layer 107a is often an insulating material. Therefore, no current flows through the second DBR 107, and a current flows in the surface direction through the second semiconductor spacer layer 106 below. Therefore, it is important to reduce the resistance of the second semiconductor spacer layer 106, and it is essential to configure the n-type layer with high mobility.

  In the first embodiment, electrons flow from the n-type electrode 110 to the active layer 105 through the second semiconductor spacer layer 106, at least part of which is n-type. On the other hand, holes pass from the p-type electrode 109 through the p-type first DBR 102, and the current confinement layer 103 narrows the passage region to the current passage region 103a having p-type conductivity. Thereafter, at least a portion of the p-type first semiconductor spacer layer 104 does not spread so much and is implanted into the active layer 105. Therefore, the carrier confinement region can be freely changed by changing the narrowing diameter of the current passage region 103a. As described above, when a forward voltage is applied between the p-type electrode 109 and the n-type electrode 110, electrons and holes are injected into the active layer 105 from the reverse direction, and light is emitted from a region substantially the same as the current passage region 103a.

  On the other hand, light confinement is confined in two directions, the stacking direction and the surface direction, and light generated in the active layer 105 is confined by the first DBR 102 and the second DBR 107 in the stacking direction. In particular, in this embodiment, in order to realize high-speed operation of the element, the refractive index difference between the low refractive index layer 107a and the high refractive index layer 107b constituting the second DBR 107 is set to 1 or more. The mode volume in the stacking direction is reduced. Further, the surface direction is confined by the step structure 108 of the surface layer of the second semiconductor spacer layer 106 in contact with the second DBR 107.

  In the first embodiment, the above-described conditions are applied to the effective resonator length and the step thickness in order to sufficiently strengthen the optical confinement in this plane. As a result, the mode volume of light can be reduced, and high-speed operation is possible. The in-plane light confinement region is mainly determined by the step structure 108, and the structure can be designed independently of the carrier confinement. For this reason, it is possible to construct a strong optical confinement structure that ensures the high speed of the element while making the current confinement structure around the carrier confinement, which is largely related to the reliability of the element, a structure that can withstand deterioration. And high reliability can be satisfied at the same time.

  The in-plane optical confinement effect using the step structure is a known technique, but we have found that very strong optical confinement contributes to the speeding up of the device. In general, strong in-plane light confinement induces in-plane higher-order modes, which is not preferable in terms of static characteristics such as a complicated beam shape and a very large radiation angle. For this reason, the design is usually made to weaken the in-plane light confinement. Also, from the viewpoint of high speed, there is a report that when the current mode shifts from the fundamental mode to the higher order mode, the band elongation is saturated.

  However, we find that in a very strong in-plane optical confinement structure, the in-plane mode changes to higher order modes one after another by current injection, and the optical mode volume decreases each time, and the photon density of the device increases. I found it. That is, it has been found that fr does not saturate as reported conventionally, but grows. Such a very strong in-plane optical confinement can be realized only by separating the confinement of carriers and light as described above and adding the conditions as described above to the structure.

  Also, the conventional tunnel junction type VCSEL has a step structure, but also serves as a current confinement structure by buried growth, which causes a problem in element reliability. However, in the VCSEL according to the present embodiment, current confinement is realized by an oxide constriction structure. Therefore, if only carriers are confined, the oxidized constricting layer may be disposed with a thin layer thickness at the node portion of the standing wave of light. Therefore, it is possible to make the current confinement structure small enough to ignore the influence on the reliability.

  Furthermore, since the oxide layer that does not flow current contributes to the reduction of the capacitance of the element as an insulator spacer layer, it is not necessary to perform ion implantation for reducing the capacitance required in the conventional tunnel junction type VCSEL, and the yield by the process. The decrease can be suppressed.

Embodiment 2
In the second embodiment, the convex pattern of the step structure 108 is configured so as to become dense from the periphery of the current confinement portion toward the center in the first embodiment. Since other configurations are the same, description thereof is omitted.

  An example is shown in FIG. FIG. 2 shows the step structure 108 viewed from the top surface of the element. The convex pattern is composed of a number of circular step structures. In FIG. 2, a boundary line 202 between the current passage region 103a and the current block region 103b is also shown in order to represent the arrangement of the current confinement portion. The ratio of the convex part 200 and the concave part 201 increases as the ratio from the boundary line 202 toward the center increases. FIG. 3 shows an example in which the step structure is composed of a plurality of concentric circular structures. Here, the ratio of the convex portion 300 and the concave portion 301 is increased as the ratio from the boundary line 302 toward the center increases.

  With such a structure, the distribution of the equivalent refractive index inside the current confinement structure can be freely designed, and light can be confined most in the center of the element. Therefore, it is possible to improve the static characteristics and modulation characteristics of the element such as threshold current and slope efficiency. Such a design could not be achieved when the light confinement was controlled only by the oxidation current confinement structure. In FIG. 2 and FIG. 3, the current confinement diameter is drawn wider than the region of the convex pattern, but the region of the convex pattern may be larger than the current constriction diameter.

Embodiment 3
In the third embodiment, a tunnel junction is provided in part of the first DBR 102 in the first embodiment. Since other configurations are the same, description thereof is omitted.

  FIG. 4 shows a schematic sectional view thereof. An n-type multilayer DBR in which n-type low refractive index layers 102c and n-type high refractive index layers 102d are alternately laminated is laminated on a substrate 101. A high-concentration n-type tunnel junction layer 102e and a high-concentration p-type tunnel junction layer 102f are stacked thereon. Furthermore, a p-type multilayer film DBR in which p-type low refractive index layers 102a and p-type high refractive index layers 102b are alternately laminated is laminated thereon. By providing the tunnel junction, a part of the p-type multilayer film DBR of the first DBR 102 in Embodiment 1 is replaced with the n-type multilayer film DBR, and the element resistance is reduced. As a result, fr saturation due to heat generation is alleviated, and the high-speed response is further improved.

Embodiment 4
In the fourth embodiment, the semiconductor layer constituting the step structure 108 in the third embodiment is made of a material that can be selectively etched with the second semiconductor spacer layer 106. Since other configurations are the same, description thereof is omitted.

  The semiconductor layer that forms the step structure 108 and the second semiconductor spacer layer 106 that forms the bottom of the step are formed from different materials to enable selective etching. Since selective etching is possible, the step thickness of the step 108 can be accurately determined by the layer thickness of the semiconductor layer. This step thickness is an extremely important parameter in the controllability of the light confinement strength, and the yield of the device is improved by increasing the controllability of the thickness.

Embodiment 5
In the fifth embodiment, the second DBR 107 in the third embodiment is composed of a semiconductor and a semiconductor oxide layer. Since other configurations are the same, description thereof is omitted.

  The second DBR 107 is composed of a multilayer film in which low refractive index layers 107a made of semiconductor oxide layers and low refractive index layers 107b made of semiconductor layers are alternately stacked. When the multilayer film DBR having a large refractive index difference is formed of a dielectric film, there is a case where there is no suitable dielectric material to be a high refractive index layer. Since the high refractive index layer can be formed of a semiconductor epitaxial layer, the degree of freedom in material selection is increased.

Next, the manufacturing method of Example 1 is demonstrated according to FIG. 1 using a specific Example. On the substrate 101 made of Zn-doped (2 × 10 ¹⁸ cm ⁻³ ) p-type GaAs, C-doped (2 × 10 ¹⁸ cm ⁻³ ) Al _0.9 Ga _0.1 As as the p-type low refractive index layer 102a The first DBR 102, which is a 35-pair p-type multilayer DBR, is formed of an organic metal layer with a pair of a layer and a C-doped (2 × 10 ¹⁸ cm ⁻³ ) GaAs layer as the p-type high refractive index layer 102b as a basic unit. Lamination is performed by a phase growth (MOCVD: Metal Organic Chemical Vapor Deposition) method. Of course, a molecular beam epitaxy (MBE) method may be used. A C-doped AlGaAs graded layer (not shown) is inserted between the low refractive index layer and the high refractive index layer in order to reduce electric resistance. The thickness of each layer constituting the first DBR 102 is designed to be a so-called λ / 4 multilayer reflective film.

Next, the oxidation current confinement layer 103 is laminated. In the case of this example, the oscillation wavelength was designed at 1050 nm. The oxidation current confinement layer 103 is composed of two low refractive index layers (C-doped Al _0.9 Ga _0.1 As layer and 30-nm thick C-doped Al _0.98 Ga _0.02 As layer) stacked from the substrate side. It is configured. The total optical length of the two layers is designed to be λ / 4. By setting the layer thickness to such a value, the oxidation current confinement layer 103 can also function as a DBR that reflects light from the active layer 105.

Next, the resonator is stacked. Specifically, in order from the substrate side, the first semiconductor spacer layer 104 made of C-doped GaAs, an undoped GaAs layer (not shown), an undoped In _0.3 Ga _0.7 As well layer having a thickness of 5 nm, and a 10 nm thickness A triple quantum well active layer 105 made of an undoped GaAs barrier layer, an undoped GaAs layer (not shown), and a second semiconductor spacer layer 106 made of Si doped GaAs are stacked. The resonator length is 3 / 2λ, the optical length to the oxidation current confinement layer 103 is λ / 2 so that the center of the active layer 105 is at the antinode position of the electric field strength created by the VCSEL, and the second semiconductor spacer The optical length to the outermost surface of the layer 106 was λ.

Here, the growth wafer is once taken out of the growth furnace, and a circular mesa mask resist is applied, and etching is performed by dry etching until the high refractive index layer 102b of the first DBR 102 which is a p-type DBR is exposed, and the diameter is about 20 μm. The cylindrical mesa structure is formed. By this step, the side surface of the current confinement layer 103 of Al _0.98 Ga _0.02 As is exposed. Then, heating is performed at a temperature of about 400 ° C. for about 10 minutes in a furnace in a steam atmosphere. The current confinement layer 103 has a large Al composition of 0.98, which is different from the Al composition 0.9 of the AlGaAsp type low-refractive index layer 102a in the first DBR 102, so that the oxidation rate is fast and is selected by the current confinement layer 103. Oxidation progresses. As a result, a donut-shaped current block portion 103b is formed, and a current passage portion 103a having a diameter of about 6 μm is formed at the center.

After that, in order to form the step structure 108, a pattern is formed by applying a mask resist to a portion to be left as a projecting portion, and an unmasked region is removed by wet etching to form the step structure 108. The diameter of the step structure 108 was about 6 μm, which was the same as the oxidation current confinement diameter. Since the formed step is about 50 nm and the refractive index of the second semiconductor spacer layer 106 made of Si-doped GaAs is about 3.5, the optical length due to the step is 175 nm, which corresponds to 0.167λ. Thereafter, a _second DBR 107, which is a pair of dielectric DBRs, is stacked with a pair of a low refractive index layer 107a made of SiO ₂ and a high refractive index layer 107b made of amorphous Si as a basic unit, and one layer around the mesa is stacked. The part is embedded with polyimide. Then, a p-type electrode 109 made of titanium (Ti) / gold (Au) is formed on the p-type high refractive index layer 102b made of a C-doped GaAs layer. An n-type electrode 110 made of an AuGe alloy is formed on the second spacer layer 106 made of Si-doped GaAs. The difference in refractive index at the oscillation wavelength between the low refractive index layer 107a made of SiO ₂ and the high refractive index layer 107b made of amorphous Si is about 2.5, and has a very strong light confinement effect in the stacking direction. .

  When a voltage is applied to the VCSEL element, a current flows, and laser oscillation occurs when the current value exceeds a threshold current. A voltage is applied between the electrode 109 and the electrode 110 so that the electrode 109 has a higher voltage than the electrode 110. The VCSEL device having a current confinement diameter of 6 μm has a good static characteristic with an oscillation threshold current of 0.5 mA and a differential resistance of 80Ω. In this VCSEL element, since strong optical confinement occurs in the plane and in the stacking direction, the rate of increase of the modulation band with respect to the current is large, and a high modulation band can be obtained before fr is thermally saturated. In fact, from the small signal modulation experiments, the maximum fr of this device was about 24 GHz, which was much higher than the 16 GHz of the conventional λ resonator oxidized constriction VCSEL. In addition, since the reliability of the device is such that the thickness of the oxidation current confinement layer is as thin as 30 nm, the stress applied to the semiconductor portion in contact with the oxide layer is reduced, and the average life at room temperature is about 1 million. Got time. As described above, by using the present invention, a VCSEL satisfying both high speed and high reliability can be realized.

  In the first embodiment, the step pattern of the step structure 108 is made as shown in FIG. The convex pattern 300 includes a circular convex portion 300a having an outer diameter of 3 μm from the center, and three annular convex portions having outer diameters of 5, 7.5, and 10 μm and widths of 0.5, 0.25, and 0.25 μm, respectively. 300b, 300c, and 300d are formed concentrically. The current oxidation constriction diameter is 6 μm, and the boundary line 302 is also shown in the figure. By using this step pattern, the oscillation threshold current was improved to 0.4 mA, and the radiation angle could be narrowed by about 5 ° compared to Example 1.

In Example 3, similarly to the third embodiment, a tunnel junction is provided in a part of the first DBR 102 in Example 1. An n-type low refractive index layer 102c made of Si-doped (2 × 10 ¹⁸ cm ⁻³ ) Al _0.9 Ga _0.1 As and an n-type made of Si-doped (2 × 10 ¹⁸ cm ⁻³ ) GaAs on the substrate 101. An n-type multilayer film DBR in which 33 pairs of high refractive index layers 102d are alternately stacked is stacked. Subsequently, the n-type tunnel junction layer 102e made of high-concentration Si-doped (1 × 10 ¹⁹ cm ⁻³ ) In _0.15 Ga _0.85 As and high-concentration C-doped (2 × 10 ¹⁹ cm ⁻³ ) GaAs _0.85 A p-type tunnel junction layer 102f made of Sb _0.15 is laminated. Furthermore, thereon consisting of C-doped _{^{(2 × 10 18 cm -3)}} Al 0.9 Ga 0.1 consisting As p-type low-refractive index layer 102a and the C-doped ^{(2 × 10 18 cm -3)} GaAs A p-type multilayer film DBR in which p-type low refractive index layers 102b are alternately laminated is laminated. The tunnel junction is provided at the node of the standing wave in order to suppress the influence of absorption due to high concentration doping. By providing the tunnel junction, a part of the p-type multilayer film DBR can be replaced with the n-type multilayer film DBR, and the element resistance is reduced by about 10Ω. As a result, fr saturation due to heat generation is relaxed, and a high-speed response of 26 GHz is obtained as fr.

  In Example 4, similarly to the fourth embodiment, the semiconductor layer constituting the step structure 108 in Example 3 is formed of a material system that can be selectively etched with the underlying semiconductor layer. In this case, an InGaP layer lattice-matched to the GaAs substrate is used as the step structure 108. The thickness of the InGaP layer is accurately determined at the time of crystal growth, and the second spacer layer 106 made of GaAs underneath and selective etching with hydrochloric acid are possible. Therefore, precise control of the step thickness can be performed over the entire wafer surface. It becomes possible, and the manufacturing yield of the device is greatly improved.

In Example 5, as in the fifth embodiment, the second DBR 107 in Example 3 can be formed of a semiconductor and a layer obtained by oxidizing the semiconductor. For example, an Al _0.98 Ga _0.02 As oxide layer is used as the low refractive index layer 107a, and an Al _0.9 Ga _0.1 As layer is used as the high refractive index layer 107b. By changing the Al _0.98 Ga _0.02 As layer to an oxide layer by steam oxidation, a DBR having a refractive index difference of 1.5 or more with little light absorption even at 850 nm is formed. For example, in the three pairs of dielectric DBRs composed of SiO ₂ layer / amorphous Si layer used in Examples 1 to 4, when the wavelength is smaller than 1 μm, the light absorption of the amorphous Si layer becomes remarkable and cannot be used as DBR. . With the configuration as in this embodiment, the range of material selection is widened, and the degree of freedom in design is improved.

  In the present embodiment, an example where the oscillation wavelength of the surface emitting laser is 1050 nm is given, but the same effect can be expected in different wavelength bands using other material systems. In this embodiment, the number of wells in the quantum well structure is set to 3. However, the present invention is not limited to this as long as a gain necessary for oscillation can be obtained.

1 is a schematic cross-sectional view of first, fourth, and fifth embodiments of the present invention and a surface emitting laser according to Example 1. FIG. It is an example of the level | step difference pattern which concerns on the 2nd Embodiment of this invention. It is an example of the level | step difference pattern which concerns on the 2nd Embodiment of this invention. It is a schematic cross section of a surface emitting laser according to a third embodiment and Example 3 of the present invention. It is an example of the level | step difference pattern which concerns on Example 2 of this invention.

Explanation of symbols

101 Substrate 102 First DBR
102a p-type low refractive index layer 102b p-type high refractive index layer 102c n-type low refractive index layer 102d n-type high refractive index layer 102e high-concentration n-type tunnel junction layer 102f high-concentration p-type tunnel junction layer 103 current confinement layer 103a current Passing portion 103b Current blocking portion 104 First semiconductor spacer layer 105 Active layer 106 Second semiconductor spacer layer 107 Second DBR
107a Low refractive index layer 107b High refractive index layer 108 Step structure 109 Electrode 110 Electrode 111 Resin layer 200, 300 Convex part 201, 301 Concave part 202, 302 Boundary line

Claims (7)

A substrate,
A first multilayer Bragg reflector formed on the substrate;
An oxidation current confinement layer formed on the first multilayer Bragg reflector and having p-type conductivity;
A first semiconductor spacer layer formed on the oxidation current confinement layer and having p-type conductivity at least partially;
An active layer formed on the first semiconductor spacer layer;
A second semiconductor spacer layer formed on the active layer and having an n-type conductivity at least in part;
A step structure formed on the surface of the second semiconductor spacer;
A second multilayer Bragg reflector formed on the second semiconductor spacer and composed of a low refractive index layer having a refractive index difference of 1 or more and a high refractive index layer;
A surface-emitting laser in which the step structure is composed of a plurality of convex portions, and the density of the convex portions increases from the periphery of the current confinement portion toward the center .   2. The surface emitting laser according to claim 1, wherein the resonator optical length is 1 or 1.5 times the oscillation wavelength λ.   3. The step thickness D of the step structure satisfies 0.06λ ≦ D × n ≦ 0.25λ, where n is the refractive index of the surface layer of the second semiconductor spacer layer. Surface emitting laser. The surface emitting laser according to any one of claims 1 to 3 , wherein a tunnel junction is provided in a part of the first multilayer Bragg reflector. The semiconductor layers forming a step structure, a surface emitting laser according to any one of claims 1 to 4, characterized in that it consists of selectively etching are possible material as the semiconductor layer underneath. It said second multilayer Bragg reflector, a surface emitting laser according to any one of claims 1 to 5, characterized in that they are composed of a semiconductor and a semiconductor oxide layer. Forming a first multilayer Bragg reflector on the substrate;
Forming an oxide current confinement layer having p-type conductivity on the first multilayer Bragg reflector;
Forming a first semiconductor spacer layer having p-type conductivity on at least a part of the oxidation current confinement layer;
Forming an active layer on the first semiconductor spacer layer;
Forming a second semiconductor spacer layer having an n-type conductivity at least partially on the active layer;
Forming a step structure on the surface of the second semiconductor spacer;
Forming a second multilayer Bragg reflector composed of a low refractive index layer having a refractive index difference of 1 or more and a high refractive index layer on the second semiconductor spacer;
When forming the step structure,
A method of manufacturing a surface-emitting laser, wherein the step structure includes a plurality of convex portions, and the density of the convex portions is increased from the periphery of the current confinement portion toward the center .

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