JP5327092B2 - Temperature sensor and method of manufacturing temperature sensor - Google Patents

Description

  The present invention relates to a temperature sensor and a method for manufacturing the temperature sensor.

  Conventionally, there is a temperature sensor structure disclosed in Patent Document 1 as an example of a sensor that detects a physical quantity based on temperature.

  A temperature sensor structure shown in Patent Document 1 includes a base, a thermistor layer supported by the base and having a temperature-dependent resistance, a first electric contact layer on a first surface of the thermistor layer, and And a second electrical contact layer on the second side of the thermistor layer. The thermistor layer includes a quantum well structure composed of alternately provided well layers and barrier layers (GaAs / AlGaAs).

Japanese Patent No. 3573754

  Incidentally, in order to improve the sensitivity of the temperature sensor using the quantum well structure, it is necessary to increase the value of the temperature coefficient of resistance (TCR) of the quantum well structure.

The TCR of this quantum well structure is expressed by the following equation.
TCR = −1 / k _B T ² × (3 k _B T / 2 + V−E _f )
k _B : Boltzmann constant, T [K]: Absolute temperature, V (= E _B −E _W ): Barrier energy, E _B : Energy at the bottom of the valence band (or bottom of the conduction band) of the barrier layer, E _W : Energy at the bottom of the valence band of the well layer (or the bottom of the conduction band), E _f : Fermi energy Here, when the well layer is doped p-type, E _B and E _W are the valence band When the well layer is doped n-type, E _B and E _W each mean the bottom of the conduction band.

As shown in this equation, the only way to increase the value of | TCR | is to increase the barrier height (V) or decrease the Fermi energy (E _f ). However, the barrier height (V) cannot be freely controlled because it is determined by the combination of the material of the well layer and the barrier layer. On the other hand, the only way to reduce Fermi energy (E _f ) is to make the well layer thinner or lower the carrier density. Therefore, | TCR | has a limit value determined by the material.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a temperature sensor that can improve sensitivity in a temperature sensor including a quantum well structure and a method for manufacturing the temperature sensor.

In order to achieve the above object, the temperature sensor according to claim 1 is a temperature sensor that detects a current change due to a temperature change of a detection unit formed on a substrate, and
The detector
A quantum well structure formed on a substrate and including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers;
The quantum well structure is formed on at least one of a facing surface facing the substrate and a surface opposite to the facing surface, and is sandwiched between a plurality of second well layers and a plurality of second well layers. A quantum barrier structure having two barrier layers.

Thus, by providing the quantum barrier structure portion on at least one surface side of the quantum well structure portion, the barrier height of the first barrier layer can be virtually increased (ΔV). When the barrier height increases virtually, as shown by TCR = −1 / k _B T ² × (× 3 k _B T / 2 + V−E _f + ΔV), the case where there is no quantum barrier structure | The value of TCR | can be increased. Therefore, the sensitivity of the temperature sensor can be improved.

K _B : Boltzmann constant, T [K]: absolute temperature, V (= E _B −E _W ): barrier energy, E _B : energy at the bottom of the valence band (or bottom of the conduction band) of the barrier layer, E _W : energy at the bottom of the valence band (or the bottom of the conduction band) of the well layer, E _f : Fermi energy, ΔV: virtual barrier height. When the well layer is doped p-type, E _B and E _W mean the bottom of the valence band, respectively, and when the well layer is doped n-type, E _B and E _W are conducted respectively. It means the bottom of the belt.

In order to achieve the above object, the temperature sensor according to claim 2 is a temperature sensor for detecting a current change due to a temperature change of a detection unit formed on the substrate,
The detector
A quantum well structure formed on a substrate and including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers;
On the second well layer and the second well layer provided on the first barrier layer and formed on at least one of the opposing surface side facing the substrate of the quantum well structure portion and the opposite surface side of the opposing surface A quantum barrier structure having a second barrier layer provided on
It is characterized by providing.

  Also by doing this, the sensitivity of the temperature sensor can be improved as in the first aspect.

  According to a third aspect of the present invention, the quantum barrier structure may have a structure in which a plurality of second well layers and a plurality of second barrier layers are overlapped.

  In this way, a single quantum barrier structure in which the second barrier layer is sandwiched between the plurality of second well layers, or includes the second well layer and the second barrier layer provided on the second well layer. Compared to the part, the height of the virtual barrier can be increased. Therefore, the value of | TCR | can be increased, which is preferable.

  According to a fourth aspect of the present invention, the quantum barrier structure may be provided with three or more pairs of the second well layer and the second barrier layer.

  By doing so, the virtually increased barrier height can be saturated, which is preferable. In other words, if the number of repetitions when repeatedly laminating one second well layer and one second barrier layer is 3 or more, the virtually increased barrier height can be saturated. Therefore, it is preferable. This has been confirmed by the inventors of the present invention.

  The thickness of the first barrier layer disposed between the first well layer and the quantum barrier structure may be as follows: the first well layer, the second well layer, and the second barrier layer. It may be formed thicker than the film thickness.

  By doing so, tunneling of electrons from the first well layer to the quantum barrier structure can be prevented.

  According to a sixth aspect of the present invention, the quantum well structure portion and the quantum barrier structure portion may be formed on a membrane formed on the substrate.

  By doing so, the thermal conductance can be reduced, so that the sensitivity can be improved.

  According to a seventh aspect of the present invention, a vacuum cavity portion sealed with an epitaxial layer may be provided between the membrane and the substrate.

  By doing so, since the lower part of the membrane is evacuated, the thermal conductance can be lowered and the sensitivity can be improved.

  The first well layer and the second well layer may be made of SiGe, and the first barrier layer and the second barrier layer may be made of Si.

  Si and SiGe are materials compatible with CMOS (Complementary Metal Oxide Semiconductor). Therefore, when manufacturing a CMOS, the manufacturing cost can be kept low.

  The first well layer and the second well layer may be made of GaAs, and the first barrier layer and the second barrier layer may be made of AlGaAs.

  Thus, it is preferable to use GaAs or AlGaAs since the value of | TCR | can be further increased.

  Further, as shown in claim 10, it may be applied to detection of infrared rays.

  Since | TCR | is large, it is preferable to apply infrared detection to detect infrared with very high sensitivity.

  As described above, the quantum barrier including the second well layer sandwiched between the plurality of second barrier layers and the plurality of second barrier layers, or the second barrier layer provided on the second well layer and the second well layer. By providing the structure portion, the barrier height can be virtually increased. On the other hand, the rate at which the virtual barrier height (the barrier height virtually increased by the quantum well structure) increases with respect to the barrier height when the quantum barrier structure is not provided, It was found that even when the film thickness was 100 mm or more, it was less likely to be higher than when the film thickness of the second barrier layer was 100 mm. Therefore, as shown in claim 11, the thickness of the second barrier layer is preferably greater than 0 mm and 100 mm or less.

  In addition, the rate at which the virtual barrier height increases with respect to the barrier height when the quantum barrier structure is not provided tends to increase particularly when the thickness of the second barrier layer is 60 mm or less. . Therefore, more preferably, the thickness of the second barrier layer is greater than 0 mm and 60 mm or less as shown in claim 12.

  Furthermore, when the film thickness of the second barrier layer is 25 mm or less, the virtual barrier height tends to increase by 50% or more with respect to the barrier height when the quantum barrier structure is not provided. Therefore, more preferably, the thickness of the second barrier layer is greater than 0 mm and not more than 25 mm as shown in claim 13.

  Further, when the thickness of the second barrier layer is 9 mm or more and 25 mm or less, the virtual barrier height is likely to increase by 50% or more regardless of the composition ratio of the material constituting the second barrier layer. Therefore, the thickness of the second barrier layer is more preferably set to be thicker than 9 mm and 25 mm or smaller, as shown in claim 14.

  Further, according to the present invention, the film thickness of the second barrier layer is set to a film thickness at which the virtually increased barrier height of the first barrier layer becomes the primary peak, whereby the quantum barrier structure This is preferable because the virtual barrier height tends to increase by 50% or more with respect to the barrier height when no portion is provided.

  Further, the rate of increase in the virtual barrier height (barrier height virtually increased by the quantum well structure portion) with respect to the barrier height in the case where the quantum barrier structure portion is not provided is as follows. It was found that even when the film thickness was 200 mm or more, it was less likely to be higher than when the thickness of the second well layer was 200 mm or more. Therefore, as shown in claim 16, it is preferable that the thickness of the second well layer is larger than 0 mm and not more than 200 mm.

  In addition, the rate at which the virtual barrier height increases with respect to the barrier height when the quantum barrier structure portion is not provided tends to increase particularly when the thickness of the second well layer is 100 mm or less. . Therefore, more preferably, the thickness of the second well layer is greater than 0 mm and 100 mm or less as shown in claim 17.

  Furthermore, when the thickness of the second well layer is 36 mm or less, the virtual barrier height is likely to increase by 50% or more with respect to the barrier height when the quantum barrier structure is not provided. Therefore, the thickness of the second well layer is more preferably set to be larger than 0 mm and not more than 36 mm as shown in claim 18.

  Further, when the thickness of the second well layer is 6 mm or more and 36 mm or less, the virtual barrier height is likely to increase by 50% or more regardless of the composition ratio of the material constituting the second well layer. Therefore, more preferably, the thickness of the second well layer is greater than 6 mm and not more than 36 mm as shown in claim 19.

  In addition, as shown in claim 20, the second well layer has a quantum barrier structure by setting the film thickness of the first barrier layer to the primary peak when the virtually increased barrier height of the first barrier layer is reached. This is preferable because the virtual barrier height tends to increase by 50% or more with respect to the barrier height when no portion is provided.

  In addition, as shown in claim 21, the film thickness of the second well layer is also set to a film thickness when the barrier height of the virtually increased first barrier layer becomes a secondary peak, so that the quantum barrier is also obtained. The virtual barrier height is preferably increased by 50% or more with respect to the barrier height when the structure portion is not provided, which is preferable.

  Further, as shown in claim 22, it is preferable that the thickness of the first barrier layer is 300 mm or more. By doing so, the reflectivity (hole reflectivity) at the interface between the first well layer and the first barrier layer can be 95% or more in a wide energy range (for example, up to about 340 meV). The tunneling from the first well layer to the quantum barrier structure in can be stopped almost completely. Thus, it is preferable that the tunneling can be stopped almost completely, since the decrease in TCR can be suppressed.

In order to achieve the above object, the method of manufacturing a temperature sensor according to claim 23,
An SOI substrate having an active layer made of Si via an insulating film on a support substrate;
A quantum well structure including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers, and facing the SOI substrate of the quantum well structure. A quantum barrier structure formed on at least one of the opposing surface side and the opposite surface side of the opposing surface and having a plurality of second well layers and a second barrier layer sandwiched between the plurality of second well layers A temperature sensor for detecting a current change due to a temperature change of the detection unit,
A mask forming step of forming a mask having an opening reaching the active layer corresponding to the detection unit;
A film forming step of selectively forming each layer constituting the detection unit with respect to the opening;
It is characterized by providing.

  By doing so, it is possible to manufacture a temperature sensor that has a large value of | TCR | and can improve the sensitivity in a simple process as compared with the case where there is no quantum barrier structure.

In order to achieve the above object, a manufacturing method of a temperature sensor according to claim 24,
An SOI substrate having an active layer made of Si via an insulating film on a support substrate;
A quantum well structure including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers, and facing the SOI substrate of the quantum well structure. A quantum barrier structure formed on at least one of the opposing surface side and the opposite surface side of the opposing surface and having a plurality of second well layers and a second barrier layer sandwiched between the plurality of second well layers A temperature sensor for detecting a current change due to a temperature change of the detection unit,
An opening forming step of forming an opening reaching the insulating film in the active layer;
An etching step of etching a region corresponding to the detection portion in the insulating film from the opening;
A sealing step of sealing the etched region by forming an epitaxial layer on the active layer and closing the opening after completion of the etching step;
A film forming step of forming each layer constituting the detection unit on the epitaxial layer;
It is characterized by providing.

  By doing so, the detection part can be formed on the epitaxial layer, and a space (cavity part) that becomes a vacuum can be formed below the detection part, so that the thermal conductance can be lowered, and the temperature sensor Sensitivity can be improved.

It is sectional drawing which shows schematic structure of the temperature sensor 100 in the 1st Embodiment of this invention. It is sectional drawing which shows schematic structure of the detection part 50 of the temperature sensor 100 in the 1st Embodiment of this invention. It is a graph which shows the temperature dependence of TCR of a quantum well at the time of using SiGe / Si (Ge = 35%) for a MQB structure part and a QW structure part. It is a graph which shows the temperature dependence of TCR of a quantum well at the time of using GaAs / AlGaAs (Al = 43%) for a MQB structure part and a QW structure part. It is drawing which shows the energy band of the detection part (MQB structure part, QW structure part) 50 of the temperature sensor 100 in the 1st Embodiment of this invention. It is drawing which shows the energy band of the detection part (QW structure part) of the temperature sensor in a comparative example. It is a graph which shows the relationship between the barrier height and Si film thickness in each SiGe film thickness at the time of using SiGe / Si (Ge = 30%) for a MQB structure part and a QW structure part. It is a graph which shows the relationship between the barrier height and Si film thickness in each SiGe film thickness at the time of using SiGe / Si (Ge = 50%) for a MQB structure part and a QW structure part. It is a graph which shows the relationship between the barrier height and Si film thickness in each SiGe film thickness at the time of using SiGe / Si (Ge = 100%) for a MQB structure part and a QW structure part. FIG. 10 is a graph showing an envelope in each graph of FIG. 7 to FIG. 9 and showing a relationship between an increase rate of the virtual barrier height with respect to the barrier height and the Si film thickness when the MQB structure portion is not provided. . It is a graph which shows the relationship between the barrier height and SiGe film thickness in each Si film thickness at the time of using SiGe / Si (Ge = 30%) for a MQB structure part and a QW structure part. It is a graph which shows the relationship between the barrier height and SiGe film thickness in each Si film thickness at the time of using SiGe / Si (Ge = 50%) for a MQB structure part and a QW structure part. It is a graph which shows the relationship between the barrier height and SiGe film thickness in each Si film thickness at the time of using SiGe / Si (Ge = 100%) for a MQB structure part and a QW structure part. FIG. 14 is a graph showing envelopes in the respective graphs of FIGS. 11 to 13 and showing a relationship between an increase rate of the virtual barrier height with respect to the barrier height and the SiGe film thickness when the MQB structure portion is not provided. . It is a graph which shows the relationship between the reflectance and energy for every repetition number in a MQB structure part. It is a graph which shows the relationship between the repetition number in an MQB structure part, and barrier height. It is a graph which shows the relationship between the reflectance for every film thickness of the barrier layer of a QW structure part, and energy. It is the graph which expanded FIG. 17 partially. FIG. 5 is a cross-sectional view illustrating a manufacturing process of the temperature sensor 100 according to the first embodiment of the present invention and illustrating a preparation process of an SOI substrate. It is a sectional view showing a manufacturing process of temperature sensor 100 in a 1st embodiment of the present invention, and showing a patterning process of a thermal oxide film. It is sectional drawing which shows the manufacturing process of the temperature sensor 100 in the 1st Embodiment of this invention, and shows the manufacturing process of a detection part. It is a sectional view showing a manufacturing process of temperature sensor 100 in the 1st embodiment of the present invention, and showing a silicon layer formation process. It is a sectional view showing the manufacturing process of temperature sensor 100 in the first embodiment of the present invention and showing the oxide film forming process. It is a sectional view showing the manufacturing process of temperature sensor 100 in the 1st embodiment of the present invention, and showing an electrode formation process. It is sectional drawing which shows schematic structure of the temperature sensor 200 in the 2nd Embodiment of this invention. It is a sectional view showing the manufacturing process of the temperature sensor 200 in the second embodiment of the present invention and showing the preparation process of the SOI substrate. It is a sectional view showing a manufacturing process of temperature sensor 200 in a 2nd embodiment of the present invention, and showing a sacrifice layer etching process. It is a sectional view showing a manufacturing process of temperature sensor 200 in a 2nd embodiment of the present invention, and showing a sealing process. It is a sectional view showing a manufacturing process of temperature sensor 200 in a 2nd embodiment of the present invention, and showing a thermal oxide film formation process. It is sectional drawing which shows the manufacturing process of the temperature sensor 200 in the 2nd Embodiment of this invention, and shows a detection part formation process. It is a sectional view showing a manufacturing process of temperature sensor 200 in a 2nd embodiment of the present invention, and showing an electrode formation process.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
First, the first embodiment will be described. The temperature sensor 100 in the present embodiment detects a change in current due to a change in temperature of the detection unit 50, and is particularly suitable for application to an infrared sensor. In other words, the temperature sensor includes the detection unit 50 whose resistance value changes with changes in temperature. That is, the temperature sensor 100 in the present embodiment is preferable because it has a large | TCR | and can detect infrared rays with extremely high sensitivity when applied to infrared detection.

  As shown in FIG. 1, temperature sensor 100 in the present embodiment is formed based on a substrate 10 (for example, a silicon substrate, hereinafter also referred to as a silicon substrate). An opening 11 is formed in the silicon substrate 10, and a membrane is formed at a portion where the opening 11 is formed.

  The opening 11 is formed so as to penetrate the front surface and the back surface of the silicon substrate 10. Specifically, the opening 11 is configured such that the opening area becomes narrower from the back surface side of the silicon substrate 10 toward the front surface.

An insulating film (for example, an oxide film such as SiO ₂ , hereinafter also referred to as an oxide film) 20 is formed on the surface of the silicon substrate 10. On the surface of the oxide film 20, for example, a silicon layer 31 (for example, Si (P ⁺ )) formed by thermally diffusing impurities in the silicon layer is formed by patterning. That is, the above-described membrane is a portion of the insulating film 20 formed on the opening 11.

  The silicon substrate 10, the oxide film 20, and the silicon layer 31 thus configured have the silicon substrate 10 as a supporting substrate, the oxide film 20 as a buried layer, and the silicon layer 31 as an SOI (silicon on insulator) layer (active layer). It is formed using an SOI substrate. A high-concentration SOI substrate may be purchased and used, or a silicon substrate having a low active layer concentration as described above may be purchased and the active layer may be doped with impurities (such as boron) to increase the concentration. good. The doping method includes, for example, activation annealing after ion implantation.

Further, the silicon layer 31 is covered with a thermal oxide film 40, and an electrode 72 made of, for example, aluminum is electrically connected through an opening (contact opening) formed at a predetermined portion of the thermal oxide film 40. Connected. In the silicon layer 31, a detection unit 50 is formed through an opening (opening for detection unit) 41 formed in a predetermined portion of the thermal oxide film 40. In addition, a silicon layer 32 (for example, Si (P ⁺ )) similar to the above-described silicon layer 31 is formed on the surface of the detection unit 50 (the surface opposite to the surface in contact with the silicon layer 31). The silicon layer 32 is electrically connected to an electrode 71 made of, for example, aluminum. The detection unit 50 will be described in detail later.

An oxide film (for example, SiO ₂ ) 60 is formed so as to cover the oxide film 20, the silicon layer 32, the thermal oxide film 40, and the detection unit 50, thereby protecting the detection unit 50. The oxide film 60 is formed to be thicker than the stacked thickness of the silicon layer 31, the detection unit 50, and the silicon layer 32, and the electrodes 71 and 72 are provided at portions corresponding to the openings formed in the thermal oxide film 40. Openings 61 and 62 to be disposed are formed (see FIG. 23). The electrodes 71 and 72 are opposite to the openings from the silicon layers 32 and 31 to the thermal oxide film 40 (in the case of the electrode 72), the opening of the oxide film 60, and the surface of the oxide film 60 (the surface in contact with the oxide film 20). Surface).

  A nitride film (SiN) 81 is formed on the surfaces of the electrodes 71 and 72 formed on the oxide film 60. In the nitride film 81, openings 81a and 81b for forming pad portions in the electrodes 71 and 72 are formed. The temperature sensor 100 is electrically connected to a processing circuit (not shown) provided outside by wire bonding or the like to the pad portion through the openings 81a and 81b. An infrared absorption film 90 made of carbon paste or the like is formed at a position corresponding to the detection unit 50 in the nitride film 81.

  A nitride film (PE-SiN) 82 is formed on the back side of the silicon substrate 10. An opening 82a is formed in the nitride film 82, and the opening 11 of the silicon substrate 10 is formed through the opening.

  Next, the structure of the detection unit 50 which is a characteristic part of the present invention will be described. As shown in FIG. 2, the detection unit 50 of the temperature sensor 100 in the present embodiment includes a QW structure unit (Quantum well structure unit, quantum well structure unit) 53 and an MQB provided so as to sandwich the QW structure unit 53. Structure parts (Multi Quantum Barrier structure part, quantum barrier structure part) 51, 52. The detection unit 50 is formed on the membrane formed on the SOI substrate by providing the opening 11 in the silicon substrate 10. Thus, by providing the detection unit 50 on the membrane, the thermal conductance can be reduced, so that the sensitivity can be improved.

  The QW structure portion 53 is sandwiched between a plurality (two in this embodiment) of barrier layers (first barrier layers) 53a and barrier layers (first barrier layers) 53c, and a plurality of barrier layers 53a and barrier layers 53c. Well layer 53b (first well layer). In other words, the barrier layers 53a and 53c and the well layer 53b are stacked in the order of the barrier layer 53a, the well layer 53b, and the barrier layer 53c in a direction perpendicular to the surface of the silicon substrate 10.

  The barrier layers 53a and 53c are made of a material having a larger band gap than that of the material constituting the well layer 53b. Therefore, the well layer 53b is made of a material having a band gap smaller than that of the material constituting the barrier layers 53a and 53c. For example, the barrier layers 53a and 53c can be made of Si, and the well layer 53b can be made of SiGe.

  The MQB structure portion 52 formed on the silicon layer 31 includes a plurality of well layers (second well layers) 52a and a plurality of barrier layers (second barrier layers) 52b sandwiched between the plurality of well layers 52a. In other words, the well layer 52a and the barrier layer 52b are repeatedly stacked in the order of the well layer 52a and the barrier layer 52b in the direction perpendicular to the surface of the silicon substrate 10. That is, a plurality of well layers 52a and a plurality of barrier layers 52b are stacked. In other words, it has a structure in which the well layers 52a and the barrier layers 52b are alternately stacked a plurality of times. In other words, a single-layer QB structure (Quantum Barrier structure) composed of one well layer 52a and one barrier layer 52b sandwiched between one well layer 52a is repeatedly stacked a plurality of times. At this time, the well layer sandwiched between the two barrier layers is shared by two single-layer QB structures. For example, in this embodiment, the well layer 52a, the barrier layer 52b, the well layer 52a, the barrier layer 52b, the well layer 52a, the barrier layer 52b, and the well layer 52a are stacked in this order from the silicon substrate 10 side. . Therefore, the well layer 52a and the barrier layer 52b in the MQB structure 52, and the barrier layer 53a, the well layer 53b, and the barrier layer 53c in the QW structure 53 are stacked in the same stacking direction. By doing so, the height of the virtual barrier can be increased as compared with a single QB structure (Quantum Barrier structure) in which the barrier layer 52b is sandwiched between the plurality of well layers 52a. Therefore, the value of | TCR | can be increased, which is preferable.

  The barrier layer 52b is made of a material having a larger band gap than that of the material constituting the well layer 52a. Therefore, the well layer 52a is made of a material having a band gap smaller than that of the material constituting the barrier layer 52b. For example, the barrier layer 52b can be made of Si, and the well layer 52a can be made of SiGe.

  The MQB structure unit 51 has the same configuration as that of the MQB structure unit 52, and thus the description thereof is omitted. That is, the barrier layer 51 b in the MQB structure portion 51 corresponds to the barrier layer 52 b in the MQB structure portion 52, and the well layer 51 a in the MQB structure portion 51 corresponds to the well layer 52 a in the MQB structure portion 52. Further, the barrier layer 51b and the well layer 51a in the MQB structure part 51 are formed in the same stacking direction as the well layer 52a and the barrier layer 52b in the MQB structure part 52 and the barrier layer 53a, the well layer 53b, and the barrier layer 53c in the QW structure part 53. Is laminated.

As described above, the MQB structure portions 51 and 52 are provided on at least one surface side of the QW structure portion 53 (that is, only the MQB structure portion 51 is provided in the QW structure portion 53 or only the MQB structure portion 52 is provided in the QW structure portion 53. As shown in FIG. 5, when there is no MQB structure 51, 52 (see FIG. 6), the QW structure 53 is provided with both the MQB structure 51 and the MQB structure 52). The barrier heights of the barrier layers 53a and 53c of the QW structure portion 53 can be virtually increased (ΔV). When the barrier height increases virtually, as shown by TCR = −1 / k _B T ² × (3 k _B T / 2 + V−E _f + ΔV), the case where there is no MQB structure 51, 52 The value of | TCR | can be increased. Therefore, the sensitivity of the temperature sensor 100 can be improved. K _B : Boltzmann constant, T [K]: absolute temperature, V (= E _B −E _W ): barrier energy, E _B : energy at the bottom of the valence band (or bottom of the conduction band) of the barrier layer, E _W : energy at the bottom of the valence band (or the bottom of the conduction band) of the well layer, E _f : Fermi energy, ΔV: virtual barrier height.

  Here, the thicknesses of the barrier layer 51b and the barrier layer 52b in the MQB structure 51 and the MQB structure 52 will be described with reference to FIGS. Here, as an example, the barrier layer 51b, the barrier layer 52b, the barrier layer 53a, and the barrier layer 53c in the MQB structure 51, the MQB structure 52, and the QW structure 53 are Si, the well layer 51a, the well layer 52a, the well SiGe was used for the layer 53b. 7 to 9 show the barrier height and the thicknesses of the barrier layers 51b and 52b (Si thickness (Si layer thickness) in the thicknesses (SiGe thickness) of the well layers 51a and 52a when the composition ratio of SiGe is changed. It is a graph which shows the relationship with)). 7 is a graph when Ge = 30%, FIG. 8 is a graph when Ge = 50%, and FIG. 9 is a graph when Ge = 100%. FIGS. 11 to 13 are graphs when the thicknesses of the well layers 51a and 52a are 5 mm, 10 mm, 20 mm, 30 mm, 40 mm, and 50 mm. FIG. 10 shows envelopes in the graphs of FIGS. 7 to 9, and the increase rate of the virtual barrier height with respect to the barrier height and the barrier when the MQB structure portion 51 and the MQB structure portion 52 are not provided. It is a graph which shows the relationship with the film thickness (Si film thickness (Si layer thickness)) of layers 52b and 52b. Note that the classical barrier height described in FIG. 10 indicates the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided (the barrier heights of the barrier layers 53a and 53c of the QW structure portion 53). Is. FIG. 10 is normalized by this classical barrier height.

  As described above, by providing the MQB structure portion 51 and the MQB structure portion 52 in the QW structure portion 53, the barrier height can be virtually increased. On the other hand, as shown in FIG. 10, the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided is virtually increased by the virtual barrier height (the MQB structure portion 51 and the MQB structure portion 52). The rate of increase of the increased barrier height) is higher than the case where the thickness of the barrier layers 51b and 52b is 100 mm even when the thickness of the barrier layers 51b and 52b in the MQB structure 51 and the MQB structure 52 is 100 mm or more. It was found that it was difficult to get higher. Therefore, it is preferable that the thickness of the barrier layers 51b and 52b is greater than 0 mm and less than 100 mm because the value of | TCR | is increased and the sensitivity as the temperature sensor is increased. Moreover, by doing in this way, it can suppress forming the barrier layer 52b thickly more than necessary, and can also suppress a cost increase.

  Further, as can be seen from the graph of FIG. 10, the rate of increase in the virtual barrier height with respect to the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided is, in particular, the barrier layer 51b, When the film thickness of 52b is 60 mm or less, it tends to be high. Therefore, the film thickness of the barrier layers 51b and 52b is more preferably set to be thicker than 0 mm and 60 mm or smaller.

  Further, as can be seen from the graph of FIG. 10, when the barrier layers 51b and 52b have a film thickness of 25 mm or less, a virtual barrier is provided for the barrier height when the MQB structure 51 and the MQB structure 52 are not provided. The height tends to increase by 50% (that is, 1.5 times the barrier height when the MQB structure 51 and the MQB structure 52 are not provided) (that is, the MQB structure 51 and the MQB structure 52 are 1.5 times the barrier height when not provided). Therefore, the thicknesses of the barrier layers 51b and 52b are more preferably set to be greater than 0 mm and 25 mm or less.

  As can be seen from the graph of FIG. 10, when the film thickness of the barrier layers 51b and 52b is 9 mm or more and 25 mm or less, the virtual barrier height regardless of the composition ratio of the material constituting the barrier layers 51b and 52b. Tends to increase by more than 50%. Therefore, the thickness of the second barrier layer is more preferably greater than 9 mm and 25 mm or less.

  Moreover, the peak of the graph of FIGS. 7-9 is a primary peak in which the virtual barrier height tends to become the highest.

  Next, the film thicknesses of the well layer 51a and the well layer 52a in the MQB structure portion 51 and the MQB structure portion 52 will be described with reference to FIGS. Here, as an example, the barrier layer 51b, the barrier layer 52b, the barrier layer 53a, and the barrier layer 53c in the MQB structure 51, the MQB structure 52, and the QW structure 53 are Si, the well layer 51a, the well layer 52a, the well SiGe was used for the layer 53b. 11 to 13 show the barrier height and the thickness of the well layers 51a and 52a (SiGe thickness (SiGe layer thickness) in the thickness (Si thickness) of the barrier layers 51b and 52b when the composition ratio of SiGe is changed. It is a graph which shows the relationship with)). 11 is a graph when Ge = 30%, FIG. 12 is a graph when Ge = 50%, and FIG. 13 is a graph when Ge = 100%. 11 to 13 are graphs in the case where the thicknesses of the barrier layers 51b and 52b are 5 mm, 10 mm, 20 mm, 30 mm, 40 mm, and 50 mm. FIG. 14 shows envelopes in the respective graphs of FIGS. 11 to 13, and the increase rate of the virtual barrier height with respect to the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided and the wells. It is a graph which shows the relationship with the film thickness (SiGe film thickness (SiGe layer thickness)) of layers 51a and 52a. The classical barrier height described in FIG. 14 indicates the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided (the barrier heights of the barrier layers 53a and 53c of the QW structure portion 53). Is. Further, FIG. 14 is normalized by this classical barrier height.

  Regarding the well layer 51a and the well layer 52a, as shown in FIG. 14, the virtual barrier height (the MQB structure portion 51 and the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided) is provided. The rate of increase in the barrier height virtually increased by the MQB structure 52 is such that even if the film thickness of the well layers 51a and 52a in the MQB structure 51 and the MQB structure 52 is 200 mm or more, the well layers 51a and 52a It was found that the film thickness was less likely to be higher than when the film thickness was 200 mm. Therefore, it is preferable that the thickness of the well layers 51a and 52a is larger than 0 mm and less than 200 mm because the value of | TCR | is increased and the sensitivity as the temperature sensor is increased. Moreover, by doing in this way, it can suppress forming the barrier layer 52b thickly more than necessary, and can also suppress a cost increase.

  Further, as can be seen from the graph of FIG. 14, the ratio of the increase in the virtual barrier height to the barrier height in the case where the MQB structure portion 51 and the MQB structure portion 52 are not provided is, in particular, the well layer 51a, When the film thickness of 52a is 100 mm or less, it tends to be high. Therefore, the thickness of the well layers 51a and 52a is more preferably set to be thicker than 0 mm and 100 mm or smaller.

  Further, as can be seen from the graph of FIG. 14, when the film thickness of the well layers 51a and 52a is 36 mm or less, a virtual barrier with respect to the barrier height when the MQB structure portion 51 and the MQB structure portion 52 are not provided. The height tends to increase by 50% or more. Therefore, the thickness of the well layers 51a and 52a is more preferably set to be thicker than 0 mm and 36 mm or smaller.

  Further, as can be seen from the graph of FIG. 14, when the thickness of the well layers 51a and 52a is 6 mm or more and 36 mm or less, the virtual barrier height regardless of the composition ratio of the materials constituting the well layers 51a and 52a. Tends to increase by more than 50%. Therefore, the film thickness of the well layers 51a and 52a is more preferably thicker than 6 mm and not larger than 36 mm.

  Further, as can be seen from the graphs of FIGS. 11 to 14, the thickness of the well layers 51 a and 52 a is set to the thickness at which the virtually increased barrier height becomes the primary peak, so that the MQB structure portion is formed. Since the virtual barrier height tends to increase by 50% or more with respect to the barrier height when the 51 and the MQB structure portion 52 are not provided, it is preferable. Furthermore, the thickness of the well layers 51a and 52a is set to a thickness when the virtually increased barrier height becomes the secondary peak, and the MQB structure portion 51 and the MQB structure portion 52 are not provided. The virtual barrier height is preferably increased by 50% or more with respect to the barrier height, which is preferable.

  Next, the number of repetitions of the well layer 51a and the barrier layer 51b and the well layer 52a and the barrier layer 52b in the MQB structure portion 51 and the MQB structure portion 52 will be described with reference to FIGS. FIG. 15 has the structure shown in FIG. 2 (that is, both the MQW structure 51 and the MQB structure 52 are provided in both of the QW structure 53), and the MQB structure 51, MQB structure 52, and QW structure. 53, the number of repetitions (n) when simulation is performed using a model in which the barrier layer 51b, the barrier layer 52b, the barrier layer 53a, and the barrier layer 53c adopt Si and the well layer 51a, the well layer 52a, and the well layer 53b adopt SiGe. It is a graph which shows the relationship between the reflectance (The reflectance in the interface of the well layer 53b and the barrier layer 53a, and the well layer 53b and the barrier layer 53c) and energy for every. The structural parameters, physical properties, etc. of this model are as follows: Ge composition is 30%, barrier layer 51b and barrier layer 52b are 30 mm thick, well layer 51a and well layer 52a are 30 mm thick, barrier layer 51b and barrier layer The number of layers 52b is 5, the thicknesses of the barrier layer 53a and the barrier layer 53c are 300 mm, and the effective hole masses are 0.257 m0 (SiGe) and 0.291 m0 (Si). However, m0 is an electron mass. The definition of the barrier height is the energy at which the reflectance is less than 50% for the first time. FIG. 16 is a graph showing the relationship between the barrier height and the number of repetitions based on this simulation result.

  This number of repetitions indicates how many layers are stacked when the well layer 51a and the barrier layer 51b or the well layer 52a and the barrier layer 52b are combined. Here, the number of repetitions in MQB structure 51 and MQB structure 52 is the same. That is, in the case of one set (when the well layer 51a and the barrier layer 51b and only the well layer 52a and the barrier layer 52b are stacked), the number of repetitions is one. In the case of three sets (when the well layers 51a and the barrier layers 51b are alternately stacked three by three, and the well layers 52a and the barrier layers 52b are alternately stacked three by three), the number of repetitions is three. .

  As can be seen from the graphs of FIGS. 15 and 16, when the number of repetitions is 3 or more, the energy at which the reflectance becomes less than 50% for the first time is 350 meV. Therefore, it is preferable to set the number of repetitions to 3 or more because the virtually increasing barrier height can be saturated. In other words, in the MQB structure portion 51, there are three or more pairs of the well layers 51a and the barrier layers 51b, and in the MQB structure portion 52, the barriers increase virtually when the number of the pairs of the well layers 52a and the barrier layers 52b is three or more. It is preferable because the height can be saturated.

  Next, the thicknesses of the barrier layer 53a and the barrier layer 53c in the QW structure portion 53 will be described with reference to FIGS. 17 has a structure as shown in FIG. 2 (that is, both the QW structure part 53 includes the MQB structure part 51 and the MQB structure part 52), and the MQB structure part 51, the MQB structure part 52, and the QW structure part. 53, the number of repetitions (n) when simulation is performed using a model in which the barrier layer 51b, the barrier layer 52b, the barrier layer 53a, and the barrier layer 53c adopt Si and the well layer 51a, the well layer 52a, and the well layer 53b adopt SiGe. It is a graph which shows the relationship between the reflectance (The reflectance in the interface of the well layer 53b and the barrier layer 53a, and the well layer 53b and the barrier layer 53c) and energy for every. The structural parameters and physical properties of this model are as follows: Ge composition is 30%, barrier layer 51b and barrier layer 52b are 10 mm thick, well layer 51a and well layer 52a are 13 mm thick, barrier layer 51b and barrier The number of layers 52b is 5, the thickness of the barrier layer 53a and the barrier layer 53c is 0 to 400 mm (0 mm, 50 mm, 100 mm, 200 mm, 300 mm, 400 mm), the effective hole mass is 0.257 m0 (SiGe),. 291 m0 (Si). FIG. 18 is an enlarged view of a portion surrounded by the graph of FIG.

  As is apparent from FIGS. 17 and 18, when the thickness of the barrier layer 53a and the barrier layer 53c is 0 mm, 50 mm, 100 mm, 200 mm, etc., the reflectance may be smaller than 95% even at 260 meV or less, for example. On the other hand, when the thicknesses of the barrier layer 53a and the barrier layer 53c are 300 mm and 400 mm, the reflectance is 95% or more up to about 340 meV. Thus, by setting the film thickness of the barrier layer 53a and the barrier layer 53c to 300 mm or more, the well layer 53b and the barrier layer 53a, and the well layer 53b and the barrier layer 53c can be formed in a wide energy range (for example, up to about 340 meV). Therefore, the tunneling from the well layer 53b to the MQB structure 51 and the MQB structure 52 in the QW structure 53 can be almost completely stopped. Thus, it is preferable that the tunneling can be stopped almost completely, since the reduction of the barrier height due to the tunneling can be suppressed, and as a result, the decrease of | TCR | can be suppressed.

  The QW structure portion 53 in the present embodiment employs a single-layer QW structure including a single well layer 53b sandwiched between barrier layers 53a and 53c as an example, but the present invention is not limited to this. It is not something. For example, an MQW structure (Multi Quantum well structure) in which a plurality of barrier layers and well layers overlap each other may be employed.

  In the present embodiment, the MQB structure portions 51 and 52 in which a plurality of well layers 52a and a plurality of barrier layers 52b are overlapped are used as an example, but the present invention is not limited to this. is not. A single-layer QB structure (Quantum Barrier structure) composed of a plurality of barrier layers 52b and a single well layer 52a sandwiched between the plurality of barrier layers 52b may be employed.

  In the present embodiment, an example in which two MQB structure portions 51 and 52 are provided so as to sandwich the QW structure portion 53 is employed, but the present invention is not limited to this. The object of the present invention can be achieved if at least one of the two MQB structures 51 and 52 is provided. That is, the object of the present invention can be achieved if the MQB structure portion is formed on at least one of the opposite surface side of the QW structure portion 53 facing the SOI substrate and the opposite surface side of the opposite surface.

  The QB structure includes a single well layer 52a provided on the barrier layer (first barrier layer) 53a in the QW structure portion 53 and a single barrier layer 52b provided on the well layer 52a, or The QW structure portion 53 may include a single well layer 51a provided on the barrier layer (first barrier layer) 53c and a single barrier layer 51b provided on the well layer 51a. That is, the MQB structure portion 51 is a structure in which a single layer QB structure including a well layer 51a and a barrier layer 51b is repeatedly stacked a plurality of times, and the MQB structure portion 52 is a single layer including a well layer 52a and a barrier layer 52b. The object of the present invention can be achieved even when the QB structure is repeatedly laminated a plurality of times. Therefore, one layer of the well layer 52a (well layer 51a) and the well layer 52a (well layer 51a) are provided on at least one of the opposing surface side facing the SOI substrate of the QW structure portion 53 and the opposite surface side of the opposing surface. The object of the present invention can be achieved if a single barrier layer 52b (barrier layer 51b) is formed.

  Further, as described above, SiGe adopted as a material constituting the well layers 52a, 53b and Si adopted as a material constituting the barrier layers 52b, 53a, 53c are compatible with CMOS (Complementary Metal Oxide Semiconductor). Material. Therefore, when manufacturing a CMOS, the manufacturing cost can be kept low.

  However, the present invention is not limited to this. For example, GaAs may be adopted as the material constituting the well layers 52a and 53b, and AlGaAs may be adopted as the material constituting the barrier layers 52b, 53a and 53c. FIG. 3 is a graph showing the temperature dependence of the quantum well when SiGe / Si (Ge = 35%) is used for the MQB structure portions 51 and 52 and the QW structure portion 53. FIG. 4 is a graph showing the temperature dependence of the quantum well when GaAs / AlGaAs (Al = 43%) is used for the MQB structure portions 51 and 52 and the QW structure portion 53. As can be seen from FIGS. 3 and 4, it is preferable to use GaAs or AlGaAs because the value of | TCR | can be further increased.

  The film thickness of the barrier layers 53a and 53c disposed between the well layer 53b of the QW structure portion 53 and the MQB structure portions 51 and 52 is such that the well layer 53b, the well layers 51a and 52a, and the barrier layers 51b and 52b It may be formed thicker than the film thickness of each layer. By doing so, tunneling of electrons from the well layer 53b to the MQBs 51 and 52 can be prevented.

  In the temperature sensor 100 having such a configuration, infrared rays incident from above are absorbed by the infrared absorption film 90. This infrared absorption increases the temperature of the membrane. A DC voltage is applied to the two electrodes 71 and 72 to detect the temperature that has risen due to a change in the current flowing through the detection unit 50.

  Here, the manufacturing method of the temperature sensor 100 will be described with reference to FIGS.

  First, as shown in FIG. 19, an SOI substrate including a silicon substrate (support substrate) 10, an oxide film (insulating film) 20, and a silicon layer (active layer) 31 is prepared. As this SOI substrate, a high concentration SOI substrate may be purchased, or a silicon substrate having a low active layer concentration may be purchased, and the active layer may be doped with an impurity (such as boron) to increase the concentration. The doping method includes, for example, ion implantation → activation annealing.

  Next, as shown in FIG. 20, a thermal oxide film (mask) 40 having an opening 41 reaching the silicon layer 31 corresponding to the detection unit 50 is formed (mask formation step). In other words, the mask 40 that is formed on the surface of the silicon layer 31 and has the opening 41 reaching the silicon layer 31 is formed at a position where the detection unit 50 and the electrode 72 are formed. Specifically, the silicon layer 31 is patterned leaving at least a portion where the detection unit 50 and the electrode 72 are electrically connected. Thereafter, the silicon layer 31 is thermally oxidized to form a thermal oxide film 40. Then, the thermal oxide film 40 is patterned to form an opening 41 in a region where the detection unit 50 is to be formed.

  Next, as shown in FIG. 21, each layer constituting the detection unit 50 (QW structure unit 53, MQB structure unit 51, 52) is selectively deposited (selective epi growth) on the opening 41 (see FIG. 21). Film forming step). That is, each layer constituting the detection unit 50 is selectively formed on the surface of the silicon layer 31 exposed through the opening 41. Specifically, a plurality of well layers 52a and barrier layers 52b constituting the MQB structure 52 are grown on the silicon layer 31 exposed in the opening 41 in this order. That is, SiGe or GaAs constituting the well layer 52a, Si or AlGaAs constituting the barrier layer 52b, SiGe or GaAs constituting the well layer 52a, Si or AlGaAs constituting the barrier layer 52b, SiGe constituting the well layer 52a, GaAs, Si and AlGaAs constituting the barrier layer 52b, and SiGe and GaAs constituting the well layer 52a are grown in this order.

  Next, the barrier layer 53a, the well layer 53b, and the barrier layer 53c constituting the QW structure portion 53 are grown on the MQB structure portion 52 in this order from the MQB structure portion 52 side. That is, Si and AlGaAs constituting the barrier layer 53a, SiGe and GaAs constituting the well layer 53b, and Si and AlGaAs constituting the barrier layer 53c are grown in this order.

  Then, a plurality of well layers 51a and barrier layers 51b constituting the MQB structure portion 51 are grown on the QW structure portion 53 in this order. That is, SiGe or GaAs constituting the well layer 51a, Si or AlGaAs constituting the barrier layer 51b, SiGe or GaAs constituting the well layer 51a, Si or AlGaAs constituting the barrier layer 51b, SiGe constituting the well layer 51a, GaAs, Si and AlGaAs constituting the barrier layer 51b, and SiGe and GaAs constituting the well layer 51a are grown in this order.

  By doing in this way, the temperature sensor 100 which has a larger value of | TCR | and can improve the sensitivity compared with the case where there is no MQB structure 51, 52 can be manufactured by a simple process.

Next, as shown in FIG. 22, for example, a silicon layer 32 of Si (P ⁺ ) is formed on the surface of the detection unit 50 (the upper surface, the surface opposite to the surface facing the silicon layer 31). Then, as shown in FIG. 23, an oxide film 60 is formed. Then, the silicon film 31 and the silicon layer 32 are partially exposed by patterning the oxide film 60 and the thermal oxide film 40 to form openings 61 and 62 for forming the electrodes 71 and 72.

  Next, as shown in FIG. 24, for example, aluminum constituting the electrodes 71 and 72 is formed on the oxide film 60 in which the openings 61 and 62 formed in the above-described steps are formed. Then, the electrodes 71 and 72 are formed by patterning the material constituting the deposited electrodes 71 and 72. Accordingly, the electrodes 71 and 72 are formed on the openings 61 and 62 and the surface (upper surface) of the oxide film 60 and are electrically connected to the silicon layers 31 and 32. Thereafter, a nitride film (SiN) 81 is formed on the electrodes 71 and 72 formed on the surface (upper surface) of the oxide film 60, and the nitride film 81 is patterned to form pad portions in the electrodes 71 and 72. Openings 81a and 81b are formed. Further, the back surface of the silicon substrate 10 is ground and polished to form a nitride film (PE-SiN) 82.

  Thereafter, the opening 11 is formed in the silicon substrate 10 and the nitride film 82 so that the detection unit 50 is disposed on the membrane. Specifically, the nitride film 82 formed on the back surface of the silicon substrate 10 is patterned, and the silicon substrate 10 is wet-etched to form the opening 11. Then, an infrared absorption film 90 made of carbon paste or the like is formed at a position corresponding to the detection unit 50 in the nitride film 81.

(Second Embodiment)
Next, a second embodiment will be described. Since the temperature sensor 200 in the present embodiment has many parts that are equivalent to the temperature sensor 100 in the above-described embodiment, in the present embodiment, differences from the above-described embodiment will be mainly described. Further, portions equivalent to those in the above-described embodiment are denoted by the same reference numerals in the drawings, and detailed description thereof is omitted.

  As shown in FIG. 25, temperature sensor 100 in the present embodiment is formed based on a substrate 10a (for example, a silicon substrate, hereinafter also referred to as a silicon substrate). A vacuum cavity 60a1 is formed on the surface of the silicon substrate 10a. Further, on the silicon substrate 10a, a silicon layer 33 which constitutes a membrane and has etching openings 33a and 33b for forming the cavity 60a1 is formed via the oxide film 60a.

On the silicon layer 33, an epitaxial layer made of, for example, SiGe for sealing the cavity 60a1 is formed. That is, the cavity 60a1 is formed by an episeal technique. The epi-seal used here is a seal using an epitaxial reaction vessel, that is, sealing. The epitaxial layer includes a SiGe (N) layer 34a, a SiGe (P ⁺ ) layer 34b, and a SiGe (N) layer 34c. The SiGe (P ⁺ ) layer 34b is a portion to which the detection unit 50 and the electrode 72 are connected, and is formed by, for example, partially implanting boron ions into the SiGe (N) layer. And the detection part 50 is formed on the cavity part 60a1 through the silicon layer 33 and the SiGe (P ⁺ ) layer 34b.

As described above, the epitaxial layer (SiGe (N) layer 34a, SiGe (P ⁺ ) layer 34b, SiGe (N) layer 34c is provided between the silicon layer 33 (membrane) on which the detection unit 50 is formed and the silicon substrate 33. ), The lower part of the silicon layer 33 becomes a vacuum, so that the thermal conductance can be lowered and the sensitivity can be improved.

  Here, a manufacturing method of the temperature sensor 200 will be described with reference to FIGS.

First, as shown in FIG. 26, a silicon substrate (support substrate) 10a, an oxide film (insulating film) 60a, for example, an SOI substrate made of a silicon layer (active layer) 33 made of Si (P ⁺ ) is prepared. As this SOI substrate, a high concentration SOI substrate may be purchased, or a silicon substrate having a low active layer concentration may be purchased, and the active layer may be doped with an impurity (such as boron) to increase the concentration. The doping method includes, for example, ion implantation → activation annealing. Then, the silicon layer 33 is patterned to form openings 33a and 33b reaching the oxide film 60a for forming the cavity 60a1 by etching (opening forming step).

  Next, as shown in FIG. 27, sacrificial layer etching is performed from the openings 33 a and 33 b by partially using the hydrofluoric acid in the oxide film 60 (region corresponding to the detection unit 50) to form the cavity 60 a 1. A space is formed (etching process). That is, a space is formed in a region corresponding to a position where the detection unit 50 is formed so that the detection unit 50 is disposed on the vacuum cavity 60a1.

  Next, as shown in FIG. 28, after the etching process is completed, an epitaxial layer (here, SiGe (N) layer) 34 is formed on the silicon layer 33 to close the openings 33a and 33b. The region (space) is vacuum-sealed (sealing step). In this way, a vacuum cavity 60a1 is formed.

Next, as shown in FIG. 29, a SiGe (P ⁺ ) layer 34b is formed by ion-implanting boron into a portion where the detection unit 50 and the electrode 72 in the SiGe (N) layer that is an epitaxial layer are connected. To do. As a result, the epitaxial layers become the SiGe (N) layer 34a, the SiGe (P ⁺ ) layer 34b, and the SiGe (N) layer 34c. Then, the SiGe (N) layer 34a and the SiGe (N) layer 34c are patterned. For example, the SiGe (N) layer 34a, the SiGe (P ⁺ ) layer 34b, and the SiGe (N) layer 34c are disposed only on the cavity 60a1, and at least the detection unit 50 and the electrode 72 are electrically connected to each other. Leave the pattern.

Thereafter, the silicon layer 33, the SiGe (N) layer 34a, the SiGe (P ⁺ ) layer 34b, and the SiGe (N) layer 34c are thermally oxidized to form a thermal oxide film (mask) 40, and the detection unit 50 is formed. An opening 41 reaching the SiGe (P ⁺ ) layer 34b is formed in the region (mask formation process).

Next, as shown in FIG. 30, each layer constituting the detection unit 50 (QW structure unit 53, MQB structure unit 51, 52) is selectively deposited (selective epi growth) on the opening 41 (see FIG. 30). Film forming step). Then, a silicon layer 32 of, for example, Si (P ⁺ ) is formed on the surface of the detection unit 50 (upper surface, the surface opposite to the surface facing the silicon layer 31). Since this film forming step is the same as that in the above-described embodiment, detailed description is omitted.

Next, as shown in FIG. 31, an oxide film 60b is formed. Then, the oxide film 60 and the thermal oxide film 40 are patterned to form openings 61 and 62 for forming the electrodes 71 and 72, whereby the SiGe (P ⁺ ) layer 34b and the silicon layer 32 are partially formed. To expose. Next, for example, aluminum constituting the electrodes 71 and 72 is formed on the oxide film 60 in which the openings 61 and 62 formed in the above-described steps are formed. Then, the electrodes 71 and 72 are formed by patterning the material constituting the deposited electrodes 71 and 72. As a result, the electrodes 71 and 72 are formed on the openings 61 and 62 and the surface (upper surface) of the oxide film 60 and are electrically connected to the SiGe (P ⁺ ) layer 34 b and the silicon layer 32. Thereafter, a nitride film (SiN) 81 is formed on the electrodes 71 and 72 formed on the surface (upper surface) of the oxide film 60, and the nitride film 81 is patterned to form pad portions in the electrodes 71 and 72. Openings 81a and 81b are formed. Thereafter, an infrared absorption film 90 made of carbon paste or the like is formed at a position corresponding to the detection unit 50 in the nitride film 81.

  By doing so, the detection unit 50 can be formed on the epitaxial layer, and a space (cavity) that becomes a vacuum can be formed below the detection unit. Therefore, the thermal conductance can be lowered, and the temperature sensor The sensitivity can be improved.

10, 10a Silicon substrate, 11 opening, 20 oxide film, 31, 32, 33 silicon layer, 33a, 33b opening, 34 SiGe layer, 40 thermal oxide film, 41 opening, 50 detector, 51, 52 MQB structure Part, 53 QW structure part, 53a barrier layer, 53b well layer, 53c barrier layer, 60, 60a, 60 oxide film, 60a1 cavity part, 61, 62, 61a, 62a opening part, 71, 72 electrode, 81 nitride film, 81a, 81b opening, 82 nitride film, 90 infrared absorption film, 100, 200 temperature sensor

Claims (24)

A temperature sensor that detects a change in current due to a change in temperature of a detection unit formed on a substrate,
The detector is
A quantum well structure formed on the substrate and including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers;
The quantum well structure portion is formed on at least one of an opposing surface side facing the substrate and an opposite surface side of the opposing surface, and includes a plurality of second well layers and a plurality of second well layers. A quantum barrier structure having a sandwiched second barrier layer;
A temperature sensor comprising: A temperature sensor that detects a change in current due to a change in temperature of a detection unit formed on a substrate,
The detector is
A quantum well structure formed on the substrate and including a plurality of first barrier layers and a first well layer sandwiched between the plurality of first barrier layers;
A second well layer provided on the first barrier layer; and a second well layer formed on at least one of a facing surface side of the quantum well structure portion facing the substrate and a surface opposite to the facing surface. A quantum barrier structure having a second barrier layer provided on the second well layer;
A temperature sensor comprising:   3. The temperature sensor according to claim 1, wherein the quantum barrier structure has a structure in which a plurality of the second well layers and a plurality of the second barrier layers overlap each other.   4. The temperature sensor according to claim 1, wherein the quantum barrier structure portion includes three or more pairs of the second well layer and the second barrier layer. 5.   The film thickness of the first barrier layer disposed between the first well layer and the quantum barrier structure is larger than the film thicknesses of the first well layer, the second well layer, and the second barrier layer. 5. The temperature sensor according to claim 1, wherein the temperature sensor is formed thick.   The temperature sensor according to claim 1, wherein the quantum well structure portion and the quantum barrier structure portion are formed on a membrane formed on the substrate.   The temperature sensor according to claim 6, further comprising a vacuum cavity sealed by an epitaxial layer between the membrane and the substrate.   The first well layer and the second well layer are made of SiGe, and the first barrier layer and the second barrier layer are made of Si. The temperature sensor described.   The first well layer and the second well layer are made of GaAs, and the first barrier layer and the second barrier layer are made of AlGaAs. The temperature sensor described.   The temperature sensor according to claim 1, wherein the temperature sensor is applied to infrared detection.   11. The temperature sensor according to claim 1, wherein the thickness of the second barrier layer is greater than 0 mm and equal to or less than 100 mm.   The temperature sensor according to claim 11, wherein the thickness of the second barrier layer is 60 mm or less.   The temperature sensor according to claim 12, wherein the thickness of the second barrier layer is 25 mm or less.   The temperature sensor according to claim 13, wherein the thickness of the second barrier layer is 9 mm or more and 25 mm or less.   The temperature sensor according to claim 11, wherein the film thickness of the second barrier layer is a film thickness when the barrier height of the first barrier layer increased virtually reaches a primary peak.   The temperature sensor according to any one of claims 1 to 15, wherein the thickness of the second well layer is greater than 0 mm and equal to or less than 200 mm.   The temperature sensor according to claim 14, wherein the thickness of the second well layer is 100mm or less.   The temperature sensor according to claim 15, wherein the thickness of the second well layer is 36 mm or less.   The temperature sensor according to claim 18, wherein the thickness of the second well layer is 6 mm or more and 36 mm or less.   18. The temperature sensor according to claim 17, wherein the thickness of the second well layer is a thickness when the virtually increased barrier height of the first barrier layer becomes a primary peak.   18. The temperature sensor according to claim 17, wherein the thickness of the second well layer is a thickness at which the virtually increased barrier height of the first barrier layer becomes a secondary peak.   The temperature sensor according to any one of claims 1 to 21, wherein the film thickness of the first barrier layer is 300 mm or more. An SOI substrate having an active layer made of Si on an insulating film on a support substrate, and a first substrate sandwiched between a plurality of first barrier layers and a plurality of first barrier layers. A quantum well structure portion including one well layer, a facing surface side of the quantum well structure portion facing the SOI substrate, and at least one of a surface opposite to the facing surface, A temperature detection unit including a detection unit having a quantum barrier structure having a second well layer and a second barrier layer sandwiched between the plurality of second well layers, and detecting a current change due to a change in temperature of the detection unit. A method for manufacturing a sensor, comprising:
A mask forming step of forming a mask having an opening reaching the active layer corresponding to the detection unit;
A film forming step of selectively forming each layer constituting the detection unit with respect to the opening;
A method for manufacturing a temperature sensor, comprising: An SOI substrate having an active layer made of Si on an insulating film on a support substrate, and a first substrate sandwiched between a plurality of first barrier layers and a plurality of first barrier layers. A quantum well structure portion including one well layer, a facing surface side of the quantum well structure portion facing the SOI substrate, and at least one of a surface opposite to the facing surface, A temperature detection unit including a detection unit having a quantum barrier structure having a second well layer and a second barrier layer sandwiched between the plurality of second well layers, and detecting a current change due to a change in temperature of the detection unit. A method for manufacturing a sensor, comprising:
An opening forming step of forming an opening reaching the insulating film in the active layer;
An etching step of etching a region corresponding to the detection portion in the insulating film from the opening;
A sealing step of sealing the etched region by forming an epitaxial layer on the active layer and closing the opening after completion of the etching step;
A film forming step of forming each layer constituting the detection unit on the epitaxial layer;
A method for manufacturing a temperature sensor, comprising:

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