JP5350604B2 - 半導体装置及びその製造方法 - Google Patents
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
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- H10W72/072—Connecting or disconnecting of bump connectors
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- H10W72/07231—Techniques
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- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description
20 第2半導体チップ及び実装部
30 第1電極
32 第2電極
34 第3電極
40 第1半田バンプ
42 第2半田バンプ
50 半田バンプ接合部
60 X線撮影部
70 制御部
80 第1基準形状
82 第2基準形状
90 第1形状
92 第2形状
94 第3形状
100 半導体装置
110 半導体製造装置
Claims (13)
- 半導体チップと、
前記半導体チップに設けられた第1形状を有する第1電極と、
前記半導体チップが実装された実装部と、
前記実装部に設けられた、前記第1形状とは異なる第2形状を有する第2電極と、
前記第1電極及び前記第2電極を接合する、前記第1電極及び前記第2電極の表面全体を覆う第1半田バンプと、
前記実装部に設けられた、前記第2形状とは異なる第3形状を有する第3電極と、
前記第1電極及び前記第3電極を接合する第2半田バンプと、
を備え、
前記第2電極は、前記第3電極に囲まれている、ことを特徴とする半導体装置。 - 半導体チップと、
前記半導体チップに設けられた第1形状を有する第1電極と、
前記半導体チップが実装された実装部と、
前記実装部に設けられた、前記第1形状とは異なる第2形状を有する第2電極と、
前記第1電極及び前記第2電極を接合する、前記第1電極及び前記第2電極の表面全体を覆う第1半田バンプと、
前記実装部に設けられた、前記第2形状とは異なる第3形状を有する第3電極と、
前記第1電極及び前記第3電極を接合する第2半田バンプと、
を備え、
前記第2電極は、前記実装部の中心に設けられている、ことを特徴とする半導体装置。 - 前記第2形状は、前記第1形状と重ね合わせた場合に、前記第2形状の少なくとも一部が前記第1形状からはみ出す、ことを特徴とする請求項1又は2に記載の半導体装置。
- 前記第3形状は前記第1形状と同じである、ことを特徴とする請求項1から3のうちいずれか1項に記載の半導体装置。
- 前記第2電極の表面積と前記第3電極の表面積はほぼ同じである、ことを特徴とする請求項1から4のうちいずれか1項に記載の半導体装置。
- 第1形状を有する第1電極が設けられた半導体チップを、前記第1形状とは異なる第2形状を有する第2電極が設けられた実装部に、前記第1電極及び前記第2電極を、第1半田バンプを介して接合することで実装する第1半田バンプ接合工程と、
前記第1半田バンプをX線により撮影し、前記第1半田バンプ及び前記第2電極の接合状態の良否を判定するX線検査工程と、
前記実装部に設けられた、前記第2形状とは異なる第3形状を有する第3電極を、第2半田バンプを介して前記第1電極に接合する第2半田バンプ接合工程と、
を有し、
前記X線検査工程は、前記第1半田バンプの形状が、前記第2半田バンプの形状と異なる場合に良品と判定する、ことを特徴とする半導体装置の製造方法。 - 前記X線検査工程は、前記第1半田バンプが前記第2電極の表面全体を覆っている場合に良品と判定する、ことを特徴とする請求項6記載の半導体装置の製造方法。
- 前記X線検査工程は、前記第1半田バンプをX線により撮影した陰影が、前記第1形状と前記第2形状を重ねた形状に対応する第1基準形状と同じである場合に良品と判定する、ことを特徴とする請求項6記載の半導体装置の製造方法。
- 前記第1半田バンプ接合工程は、前記第1電極の表面に形成された半田ボールから前記第1半田バンプを形成する工程を含み、
前記X線検査工程は、前記第1半田バンプをX線により撮影した陰影が、前記半田ボールの形状に対応する第2基準形状と異なる場合に良品と判定する、ことを特徴とする請求項6記載の半導体装置の製造方法。 - 第1形状を有する第1電極が設けられた半導体チップ、及び前記第1形状とは異なる第2形状を有する第2電極が設けられた実装部を、第1半田バンプを介して接合する半田バンプ接合部と、
前記第1半田バンプをX線により撮影するX線撮影部と、
前記X線撮影部にて得られた撮影画像から、前記第1半田バンプ及び前記第2電極の接合状態の良否を判定する制御部と、を備え、
前記半田バンプ接合部は、前記実装部に設けられた、前記第2形状とは異なる第3形状を有する第3電極を、第2半田バンプを介して前記第1電極に接合し、
前記制御部は、前記第1半田バンプの形状が、前記第2半田バンプの形状と異なる場合に良品と判定する、ことを特徴とする半導体装置の製造装置。 - 前記制御部は、前記第1半田バンプが前記第2電極の表面全体を覆っている場合に、良品と判定する、ことを特徴とする請求項10記載の半導体装置の製造装置。
- 前記制御部は、前記第1半田バンプをX線により撮影した陰影が、前記第1形状と前記第2形状を重ねた形状に対応する第1基準形状と同じである場合に良品と判定する、ことを特徴とする請求項10記載の半導体装置の製造装置。
- 前記半田バンプ接合部は、前記第1電極の表面に形成された半田ボールから前記第1半田バンプを形成し、
前記制御部は、前記第1半田バンプをX線により撮影した陰影が、前記半田ボールに対応する第2基準形状と異なる場合に良品と判定する、ことを特徴とする請求項10記載の半導体装置の製造装置。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007130143A JP5350604B2 (ja) | 2007-05-16 | 2007-05-16 | 半導体装置及びその製造方法 |
| US12/122,556 US7816788B2 (en) | 2007-05-16 | 2008-05-16 | Structure, method and system for assessing bonding of electrodes in FCB packaging |
| US12/877,661 US8274158B2 (en) | 2007-05-16 | 2010-09-08 | Structure, method and system for assessing bonding of electrodes in FCB packaging |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007130143A JP5350604B2 (ja) | 2007-05-16 | 2007-05-16 | 半導体装置及びその製造方法 |
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| JP2008288297A JP2008288297A (ja) | 2008-11-27 |
| JP5350604B2 true JP5350604B2 (ja) | 2013-11-27 |
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| JP5263053B2 (ja) * | 2009-07-24 | 2013-08-14 | 株式会社村田製作所 | 半導体パッケージおよび半導体パッケージモジュール |
| JP5539077B2 (ja) | 2010-07-09 | 2014-07-02 | ローム株式会社 | 半導体装置 |
| JP6165411B2 (ja) | 2011-12-26 | 2017-07-19 | 富士通株式会社 | 電子部品及び電子機器 |
| US9553040B2 (en) | 2012-03-27 | 2017-01-24 | Mediatek Inc. | Semiconductor package |
| KR101993331B1 (ko) * | 2013-01-03 | 2019-06-27 | 삼성디스플레이 주식회사 | 유기발광표시장치 및 그 제조방법 |
| JP5842859B2 (ja) * | 2013-04-15 | 2016-01-13 | 株式会社村田製作所 | 多層配線基板およびこれを備えるモジュール |
| JP2019016678A (ja) * | 2017-07-06 | 2019-01-31 | 株式会社フジクラ | 基板モジュール及び基板モジュールの製造方法 |
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| JP2853261B2 (ja) * | 1989-05-16 | 1999-02-03 | 三菱マテリアル株式会社 | 金属分析方法および分析装置 |
| AU645283B2 (en) * | 1990-01-23 | 1994-01-13 | Sumitomo Electric Industries, Ltd. | Substrate for packaging a semiconductor device |
| EP0651937A4 (en) * | 1992-06-19 | 1995-08-30 | Motorola Inc | SELF-ALIGNING ELECTRICAL CONTACT BAR. |
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-
2007
- 2007-05-16 JP JP2007130143A patent/JP5350604B2/ja not_active Expired - Fee Related
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2008
- 2008-05-16 US US12/122,556 patent/US7816788B2/en not_active Expired - Fee Related
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- 2010-09-08 US US12/877,661 patent/US8274158B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US8274158B2 (en) | 2012-09-25 |
| US20110057309A1 (en) | 2011-03-10 |
| US7816788B2 (en) | 2010-10-19 |
| JP2008288297A (ja) | 2008-11-27 |
| US20080303144A1 (en) | 2008-12-11 |
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