JP5369966B2 - Mounting structure of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a structure for mounting a semiconductor device, which can inexpensively achieve high density mounting of a CSP or a BGA. <P>SOLUTION: The mounting structure includes: the semiconductor device 11 having a plurality of external electrodes 21; a multilayer substrate 13 having electrode pads 15 arranged oppositely to respective external electrodes 21; and a thin substrate 12 formed between the semiconductor device 11 and the multilayer substrate 13. The thin substrate 12 includes through-holes 16, the external electrodes 21 and the electrode pads 15 are bonded with each other by a bonding material 14 via the through-holes 16, and wires 17 (e.g. 17c, 17d) are drawn out from a part (e.g. 16c, 16d) of the through-holes 16. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device mounting structure, and more particularly to a low-cost semiconductor device mounting structure that enables high-density mounting.

  As electronic devices become smaller, thinner and lighter, and high-speed, highly functional, and multifunctional, the semiconductor devices are becoming smaller and thinner and the external electrode terminals have a smaller pitch and a larger number of pins. Examples of these semiconductor devices include semiconductor devices called BGA (Ball Grid Array) and CSP (Chip Size Package), and semiconductor manufacturers have proposed semiconductor devices having various structures.

  On the other hand, printed wiring boards on which electronic components such as these semiconductor devices are mounted use a multilayer substrate to accommodate complex circuit wiring, and circuit wiring is used in order to cope with the narrow pitch and multiple pins of semiconductor devices. There is a demand for miniaturization and multilayering of wiring boards.

  Such multilayer substrates include through-through-hole multilayer substrates that connect interlayer circuits with through-through holes, IVH multilayer substrates that connect layers with IVH (Interstitial Via Hole), and build-up substrates that are manufactured by a build-up method. Broadly divided. The IVH multilayer substrate and the build-up substrate are advantageous for miniaturization of circuit wiring and the multilayer of the wiring substrate. In particular, the build-up substrate is preferably used for a substrate on which CSP or BGA is mounted. However, IVH multilayer substrates and build-up substrates are expensive due to the complexity of the manufacturing process and the need for special equipment and processes.

  Here, the characteristics of each multi-layer substrate will be described by taking as an example the case where the external electrode is mounted with a CSP having a pitch of 0.8 mm.

  First, a case where a through-through-hole multilayer substrate is used as the multilayer substrate will be described. If the electrode pad diameter for mounting the CSP is 500 μm, the circuit width / circuit gap is 100 μm / 100 μm, and the electrode pad for mounting the CSP is formed as shown in FIG. The lead-out wiring 111 of the electrode pad 101 is drawn out as it is, and the lead-out wiring 112 of the second-row electrode pad 102 can be led out between the first-row electrode pads 101, 101. Note that reference numeral 104 in FIG. 4 denotes a through-hole provided in the multilayer substrate, which is connected to the lead-out line 111 of the electrode pad 101 in the first column in the example of FIG. In such a case, since the electrode pad diameter is 500 μm and the pitch is 800 μm, the gap between the electrode pads is 300 μm, and only one lead wiring with a circuit width of 100 μm passes between the electrode pads. Therefore, the electrode pads that can be drawn out are up to the second row. At this time, the number of electrode pads that can be drawn out by further narrowing the circuit width or forming a through hole 121 in the center of the diagonal line of the electrode pads arranged in a grid and drawing out the wiring through the through hole 121 Can be increased.

  However, the circuit width / circuit gap of the outer layer of a normal through-through multilayer board is usually 100 μm or more / 100 μm or more due to the relationship between the electrode pad and the conductor thickness of the wiring, and it is difficult to further reduce the circuit width. Only one wire can pass between the pads. In addition, the number of electrode pads that lead out the wiring can be increased by using the through hole 121 described above, but it is necessary to increase the number of layers in order to lead out the wiring. The price is also expensive. Further, as described above, when the electrode pad diameter is 500 μm, the pitch is 800 μm, and the circuit width / circuit gap is 100 μm / 100 μm, the through-hole 121 that can be formed in the central portion on the diagonal of the electrode pad has a drill diameter (hole Diameter) is about 300 μm. However, the drill diameter is limited by the drilling process and plating processability based on the relationship with the plate thickness, and the range that can be manufactured is limited. As the plate thickness increases, it becomes difficult to open a drill diameter of about 300 μm, and the layer can be increased. There is a limit to the number, that is, the number of electrode pads that can be extracted.

  Next, a case where a build-up substrate is used as the multilayer substrate will be described. Since the build-up substrate is thinner in conductor thickness and interlayer thickness than through-through-hole multilayer substrates and IVH multilayer substrates, the circuit width and via diameter can be reduced. Therefore, if the diameter of an electrode pad on which a CSP having an external electrode having a circuit width / circuit gap of 50 μm / 50 μm and a pitch of 800 μm is set to 500 μm as described above, two circuit wires are provided in 300 μm between the electrode pads. Can pass through. Therefore, the electrode pads that can be drawn out are up to the third row. Since the vias of the build-up board connect only the upper and lower layers adjacent to each other unlike the through-holes, there is no restriction based on the relation with the plate thickness, and the number of layers corresponding to the number of electrode pads of the CSP to be mounted. It is possible to pull out the wiring by increasing. Therefore, when adopting CSP or BGA, build-up substrates are often used especially when the pitch of external electrodes of a semiconductor device is reduced and the number of pins is increased. There is a problem that it is expensive because it requires an apparatus and a process.

  As described above, when using a CSP having a narrow pitch external electrode (referred to as a narrow pitch CSP), it is preferable to use a build-up substrate. ing. For example, Patent Document 1 below proposes a method for stably and inexpensively manufacturing a multilayer substrate on which a narrow pitch CSP is mounted. However, this Patent Document 1 is premised on the use of a build-up substrate, and is only proposed as a method for manufacturing such a build-up substrate at a low cost.

  Patent Document 2 below proposes a structure in which an interposer is interposed between a semiconductor chip to be mounted and a mounting substrate. However, the structure is not related to the present invention.

JP 2007-128970 A (FIG. 3) JP 2006-19368 A (FIG. 2)

  As described above, when the pitch of CSP or BGA external electrodes is reduced or the number of pins is increased, there is a problem that the cost of a printed wiring board to be mounted increases. This is because, as described above, when the number of external electrodes of CSP or BGA is small, it can be mounted on the through-through-hole multilayer substrate. However, as the pitch of external electrodes is reduced or the number of pins is increased, the through-through-hole multilayer substrate Then, it becomes difficult to route the wiring, and a build-up substrate that is advantageous in routing the wiring is used. However, the build-up substrate has a problem that the manufacturing process is complicated, and further, a special device and process are required, so that it becomes expensive.

  In the above Patent Document 1, a method for manufacturing a build-up substrate at low cost is proposed, but since the complexity of the manufacturing process and special devices / processes are already required when the build-up method is adopted, The through-hole multi-layer substrate is expensive.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a low-cost semiconductor device mounting structure capable of high-density mounting.

  A mounting structure of a semiconductor device of the present invention that solves the above problems includes a semiconductor device having a plurality of external electrodes, a multilayer substrate having an electrode pad disposed opposite to the external electrodes, and between the semiconductor device and the multilayer substrate. The thin substrate has a through-hole, and the external electrode and the electrode pad are bonded together with a bonding material through the through-through hole. The wiring is drawn out from a part.

  According to the present invention, the external electrode of the semiconductor device and the electrode pad of the multilayer substrate are bonded to each other with the bonding material via the through-through hole provided in the thin substrate, and one of the through-through holes of the thin substrate is further provided. Since the wiring is drawn out from the portion, the electrode pad, the through-hole, and the external electrode can be simultaneously bonded at the respective portions. And, in the multilayer substrate where the semiconductor device is mounted, the wiring is drawn out in order from the electrode pad on the outermost peripheral side of the part, but even if it has electrode pads that cannot be drawn out due to the circuit width or the like Since the wiring is drawn out from a part of the through-through hole of the thin substrate as described above, the electrode is formed by connecting the electrode pad not provided with the wiring and the through-through hole from which the wiring is drawn out. Wiring to the pad becomes possible. The “part of through-holes from which wiring is drawn” refers to through-holes at positions corresponding to electrode pads from which no wiring is drawn.

  As a preferable aspect of the mounting structure of the semiconductor device of the present invention, the bonding is configured such that the external electrode, the through-through hole, and the electrode pad are integrally solder-bonded.

  As a preferable aspect of the mounting structure of the semiconductor device of the present invention, the multilayer substrate is configured to have a first wiring structure in which wirings are drawn from some of the electrode pads arranged to face the external electrodes. .

  As a preferred aspect of the semiconductor device mounting structure of the present invention, the first wiring structure of the multilayer substrate is configured such that the drawn wiring is connected to a through hole or a via of the multilayer substrate.

  As a preferable aspect of the mounting structure of the semiconductor device of the present invention, the thin substrate has the through-holes formed in the same arrangement as the external electrodes, and the wiring is drawn from a part of the through-through holes. The second wiring structure is configured.

  As a preferable aspect of the semiconductor device mounting structure of the present invention, in the second wiring structure of the thin substrate, the drawn wiring is configured to be connected to a through hole or a via of the multilayer substrate.

  As a preferred aspect of the semiconductor device mounting structure of the present invention, the lead wiring included in the first wiring structure and the lead wiring included in the second wiring structure are connected to the external electrode.

  As a preferable aspect of the mounting structure of the semiconductor device of the present invention, the thin substrate is configured to be bonded to the multilayer substrate at a portion other than the through through hole and the electrode pad.

  As a preferred aspect of the semiconductor device mounting structure of the present invention, the bonding is performed with an adhesive of a thermoplastic resin.

  As a preferred aspect of the semiconductor device mounting structure of the present invention, the through-through hole has a diameter of ½ or more of the diameter of the external electrode and smaller than the diameter of the external electrode.

  According to the mounting structure of the semiconductor device of the present invention, the electrode pad of the multilayer substrate, the through-through hole of the thin substrate, and the external electrode of the semiconductor device can be simultaneously bonded at each location, so that the semiconductor device is mounted. In the multilayer substrate of the part, the wiring is drawn out in order from the electrode pad on the outermost peripheral side of the part, but even in the case of having the electrode pad that cannot draw out the wiring due to the circuit width or the like, By connecting the through-through hole and the electrode pad on which no wiring is provided, it is possible to wire the electrode pad. As a result, for example, an inexpensive through-through hole multilayer substrate can be used, and by providing a thin substrate having a through-through hole between the semiconductor device and the multilayer substrate, the lead-out wiring is distributed between the multilayer substrate and the thin substrate. Thus, the number of wires that can be drawn can be increased. Such a mounting structure according to the present invention can be applied even if the external electrode terminals of CSP and BGA have a narrow pitch or a large number of pins, and it is not necessary to use an expensive build-up board, and a special process is required. A semiconductor device can be mounted.

  Further, according to the mounting structure of the semiconductor device of the present invention, an electrode pad provided with no wiring can be provided if necessary wiring can be drawn on the multilayer substrate side in response to wiring drawing at a fine pitch. It is also possible to lead out the wiring to the outside by a thin substrate through the through-through hole. As a result, a thin substrate can be used as an alternative to the connector.

  That is, when installing a connector as an external connection terminal, in addition to the installation area for the number of connection points, a large area such as a mounting area is required, but unconnected wiring attached to the semiconductor device as in the present invention should be used. Thus, there is an advantage that it is not necessary to enlarge the area for connection. In addition, if the thickness of the thin substrate is thin and the diameter of the through-hole is large, it is possible to add a thin substrate almost unchanged from the height when mounting a normal semiconductor device, which greatly contributes to high-density mounting. To do.

It is typical sectional drawing which shows an example of the mounting structure of the semiconductor device which concerns on this invention. It is a typical top view which shows the lamination | stacking aspect of the multilayer substrate and thin substrate in the mounting structure shown in FIG. It is a process flow which shows an example of the manufacturing method of the mounting structure shown in FIG. It is a typical top view of the conventional penetration through hole multilayer substrate. It is typical sectional drawing which shows another example of the mounting structure of the semiconductor device which concerns on this invention.

  A semiconductor device mounting structure of the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing an example of a mounting structure of a semiconductor device according to the present invention, and FIG. 2 is a schematic view showing a lamination mode of a multilayer substrate and a thin substrate in the mounting structure shown in FIG. It is a top view. FIG. 3 is a process flow showing an example of a manufacturing method of the mounting structure shown in FIG. FIG. 5 is a schematic cross-sectional view showing another example of the mounting structure of the semiconductor device according to the present invention.

[Mounting structure of semiconductor device (Example 1)]
A semiconductor device mounting structure 1 (hereinafter referred to as a mounting structure 1) according to the present invention includes a semiconductor device 11 having a plurality of external electrodes 21 and electrodes disposed opposite to the external electrodes 21 as shown in FIGS. A multilayer substrate 13 having pads 15 and a thin substrate 12 provided between the semiconductor device 11 and the multilayer substrate 13 are provided. And the feature is that the thin substrate 12 has a through-through hole 16, and the external electrode 21 and the electrode pad 15 are joined by the bonding material 14 through the through-through hole 16, and a part of the through-through hole 16 ( For example, the wiring 17 (for example, 17c and 17d) is drawn from the 16c and 16d). In addition, the electrode pad 15 is a general term for each electrode pad indicated by reference numeral 15a in FIG. 1, the through through hole 16 is a general term for each through through hole indicated by reference numeral 16a in FIG. 1, and the wiring 17 is shown in FIG. 3 is a generic name of the wirings 17c and 17d led out from the through-through holes 16c and 16d, and the external electrode 21 is a generic name of the external electrodes indicated by reference numerals 21a to 21D in FIG.

  Hereinafter, each component of the mounting structure 1 of this invention is demonstrated.

  The multilayer substrate 13 is not particularly limited as long as it is called a general multilayer wiring substrate, and an IVH multilayer substrate or a build-up substrate can also be used. In the present invention, in particular, the through-hole 18a is used. An inexpensive through-hole multilayer substrate 13 for connecting interlayer circuits can be preferably used. Such a through-through-hole multi-layer substrate is low in cost, but conventionally it has been difficult to use it for a semiconductor device having a narrow pitch or multiple pins. However, in the mounting structure 1 of the present invention, by providing a thin substrate 12 described later between the multilayer substrate 13 and the semiconductor device 11, wiring can be routed to the semiconductor device 11 having a pitch or multiple pins. A low-cost mounting structure can be realized.

  On the surface of the multilayer substrate 13 on the semiconductor device mounting side, electrode pads 15 are provided so as to be opposed to the external electrodes 21 of the semiconductor device 11. The electrode pad 15 has a first wiring structure in which the wirings 25a and 25b are drawn from some of the electrode pads 15a and 15b. Specifically, the wirings are drawn in order from the outermost electrode pads. . As the first wiring structure, in the example of FIG. 2, the wiring 25a is drawn out from the electrode pad 15a in the first row, which is the outermost periphery, and the wiring 25b is drawn out from the electrode pad 15b in the next second row. . Whether or not the wiring is drawn from the electrode pad 15c in the third row on the inner side depends on the pitch and size of the electrode pad 15 and cannot be generally specified. However, in the example of FIG. Electrode pads 15c and 15d that are not drawn and have no lead wiring are provided. The mounting structure 1 of the present invention is characterized in that the lead-out wiring from the electrode pads 15c and 15d is carried by the thin substrate 12 described later.

  In such a first wiring structure, in the example of FIG. 2, the extracted wirings 25 a and 25 b are connected to the through through hole 18 a included in the multilayer substrate 13. Note that the connection destination of the wirings 25a and 25b may not be a through-hole, but may be a via or the like.

  Preferred examples of the semiconductor device 11 include CSP and BGA. In these CSPs and BGAs, the external electrodes 21 are formed of “solder balls”. However, the semiconductor device 11 applicable to the mounting structure 1 of the present invention is not limited to the form of the external electrodes, and external devices such as LGA and QFN are used. The present invention can also be applied to a semiconductor device whose electrodes are not solder balls. In particular, in the mounting structure 1 of the present invention, it is possible to preferably mount a semiconductor device 11 having a narrow pitch or multiple pins.

  The thin substrate 12 is provided between the multilayer substrate 13 and the semiconductor device 11 described above. Through-holes 16 are formed in the thin substrate 12, and the through-holes 16 are formed in the same arrangement as the arrangement of the electrode pads 15 of the multilayer substrate 13 and the arrangement of the external electrodes 21 of the semiconductor device 11. . That is, the through-through hole 16 of the thin substrate 12 is disposed on the electrode pad 15 of the multilayer substrate 13, and the external electrode 21 of the semiconductor device 11 is disposed on the through-through hole 16. The through-holes 16 thus arranged overlap at least all the electrode pads 15 of the multilayer substrate 13 and also overlap all the external electrodes 21 of the semiconductor device 11.

  Here, “at least” means that the through-holes 16 provided in the thin substrate 12 are connected to the through-holes and vias of the multilayer substrate 13 in addition to the same arrangement as the electrode pads 15 and the external electrodes 21. It means that you may further have what to do. Specifically, as shown in FIGS. 1 and 2, the through-holes 16e and 16f provided through the lead-out wirings 17c and 17d from the through-holes 16c and 16d provided in the thin substrate 12 are provided. May be. The through through holes 16e and 16f are connected to the through through holes 18e and 18f of the multilayer substrate 13.

  The thin substrate 12 has through through holes 16a to 16d formed in the same arrangement as the external electrodes 21a to 21d and the electrode pads 15a to 15d, and other through through holes 16e and 16f, but the through through holes 16a to 16f. Of these, the second wiring structure is such that the wirings 17c and 17d are led out from some through-holes 16c and 16d. In this second wiring structure, for example, as shown in FIG. 2, no lead-out wiring is provided in the through-through holes 16a and 16b arranged to face the electrode pads 15a and 15b from which the wirings 25a and 25b are drawn. On the other hand, lead-out wirings 17c and 17d are provided in the through-through holes 16c and 16d arranged to face the electrode pads 15c and 15d from which no wiring is drawn. In the example of FIG. 2, the through-holes 16c and 16d disposed opposite to the third and subsequent electrode pads 15c and 15d in which the multilayer substrate 13 has no wiring space and the wiring cannot be drawn out from the electrode pad 15 are drawn wirings 17c. , 17d. In the mounting structure 1 of the present invention, the lead-out wiring from the electrode pads 15c and 15d from which the wiring cannot be drawn is carried out by the thin substrate 12 having the through-through holes 16c and 16d and the lead-out wirings 17c and 17d. Since the substrate 13 and the thin substrate 12 can be dispersed, the number of wires that can be drawn can be increased.

  As described above, the lead-out wirings 25 a and 25 b included in the first wiring structure of the multilayer substrate 13 and the lead-out wirings 17 c and 17 d included in the second wiring structure of the thin substrate 12 are connected to the external electrode 21 of the semiconductor device 11. Therefore, it can be said that the wiring from the external electrode 21 is routed.

  As shown in FIG. 2, the lead-out wirings 17c and 17d from the through-through holes 16c and 16d are led out to the outside of the area where the semiconductor device 11 is mounted, and other through-holes provided on the same thin substrate 12 are provided. Connect to the through holes 16e and 16f. The through holes 16e and 16f are connected to the through holes and vias of the multilayer substrate 13. The connection here may be a solder joint or other connection means, and is not particularly limited. However, if it is a solder joint described later, it can be jointed simultaneously with the through-through holes 16c and 16d. More preferable from the viewpoint of reduction.

  The thin substrate 12 may have any size and shape capable of bonding the external electrode 21 of the semiconductor device 11 and the electrode pad 15 of the multilayer substrate 13 and providing the necessary lead wires 17c and 17d. Therefore, although it is slightly larger than the semiconductor device 11, a small substrate is used as a whole. The thin substrate 12 is thin, for example, a substrate having a thickness of about 0.03 mm to 0.1 mm can be used. As shown in FIG. 2, the thin through-hole 16 having a small diameter of about 0.05 mm or more and 0.2 mm or less can be formed in the thin substrate 12 as described above. A large number of lead-out wirings can be formed on the thin substrate 12 without interfering with 17d. As a result, in the example of FIG. 2, the third and fourth lead wires 17c and 17d are formed, but it is possible to form more lead wires.

  In addition, the thin substrate 12 enables drawing of wiring that cannot be drawn only by the multilayer substrate 13 when drawing wiring from the external electrode 21 such as CSP or BGA. The area of the part has a shape that is avoided.

  By using such a thin substrate 12, even if the external electrodes 21 of CSP or BGA have a narrow pitch or a large number of pins, wiring routing can be shared between the multilayer substrate 13 and the thin substrate 12, and an expensive build-up substrate or the like can be obtained. It does not have to be used, and it can be mounted at low cost and with high density.

  As the bonding material 14, various “solders” can be preferably used, but other conventionally known bonding materials capable of bonding the multilayer substrate 13 and the semiconductor device 11, such as a conductive paste, can be used. . With this bonding material 14, the multilayer substrate 13, the thin substrate 12, and the semiconductor device 11 are bonded together. Note that CSP and BGA with solder balls can use the solder balls as bonding materials, but LGA and QFN without solder balls use bonding materials such as solder as electrode pads 15 and through-through holes 16 in advance. It can be soldered together by providing it.

  As described above, according to the semiconductor device mounting structure 1 of the present invention, as shown in FIGS. 1 and 2, the electrode pads 15 of the multilayer substrate 13, the through-through holes 16 of the thin substrate 12, and the semiconductor device 11. Since the external electrode 21 can be joined simultaneously and integrally at each location, the wiring 25a is drawn in order from the electrode pad 15a on the outermost peripheral side of the portion of the multilayer substrate 13 where the semiconductor device 11 is mounted. However, even if it has electrode pads (for example, 15c and 15d) from which the wiring cannot be drawn due to the circuit width or the like, the through-through holes 16c and 16d of the thin substrate 12 from which the wirings 17c and 17d are drawn and the wiring 17c , 17d can be connected to the electrode pads 15c, 15d by connecting them to the electrode pads 15c, 15d. That. As a result, for example, an inexpensive through-through hole multilayer substrate can be used, and by providing the thin substrate 12 having the through-through hole 16 between the semiconductor device 11 and the multilayer substrate 13, the lead-out wiring is connected to the multilayer substrate 13. It is possible to increase the number of wirings that can be distributed and drawn with the thin substrate 12. The mounting structure 1 according to the present invention can cope with the CSP or BGA external electrode terminals having a narrow pitch or a large number of pins, and does not require an expensive build-up substrate, and requires a special process. A semiconductor device can be mounted without any problem.

[Mounting structure of semiconductor device (Example 2)]
FIG. 5 is a schematic cross-sectional view showing another example of a mounting structure of a semiconductor device according to the present invention.

  In the mounting structure 10, the thin substrate 24 is bonded to the multilayer substrate 26 at portions other than the through-through holes 16g, 16h, 16i, and 16j and the electrode pads 15e, 15f, 15g, and 15h. More specifically, the thin substrate 24 is applied to the multilayer substrate 26 by an adhesive 27 applied so as to avoid the through-through holes 16g, 16h, 16i, and 16j and the electrode pads 15e, 15f, 15g, and 15h. It is glued.

  Use of the adhesive 27 facilitates the advantage that the thin substrate 24 and the multilayer substrate 26 can be more firmly bonded. Further, in the mounting structure 10, the bonding is performed with a thermoplastic resin adhesive. That is, a thermoplastic resin adhesive is used as the adhesive 27. Thermoplastic resin adhesives are versatile and have the advantage of being easy to use in industrial production. Examples of the thermoplastic resin include a polyimide resin and an epoxy resin.

  In the mounting structure 10, the diameter of the through-holes 16g, 16h, 16i, 16j is not less than ½ of the diameter of the external electrodes 21f, 21g, 21h, 21i and less than the diameter of the external electrodes 21f, 21g, 21h, 21i. is there. That is, each through-hole 16g, 16h, 16i, 16j is designed to be smaller than the same diameter and larger than ½ with respect to each external electrode 21f, 21g, 21h, 21i. . Accordingly, when connecting the external electrodes 21f, 21g, 21h, and 21i formed of solder, the solder easily passes through the through-through holes 16g, 16h, 16i, and 16j, and the semiconductor device 11 and the multilayer substrate 26 are connected to each other. The advantage of easy connection is easily exhibited.

  A connection method of the mounting structure 10 will be described.

  First, the thin substrate 24 is previously bonded to the multilayer substrate 26 with the adhesive 27. Next, the semiconductor device 11 having the external electrodes 21f, 21g, 21h, and 21i coated with flux is surface-mounted. Then, the external electrodes 21f, 21g, 21h, and 21i are melted by the reflow process.

  During melting, the solder of the external electrodes 21f, 21g, 21h, and 21i reaches the electrode pads 15e, 15f, 15g, and 15h through the through-through holes 16g, 16h, 16i, and 16j. If the through-hole diameter is small, the solder does not reach the electrode pads 15e, 15f, 15g, and 15h sufficiently. However, in the mounting structure 10, the diameter of the through-through holes 16g, 16h, 16i, and 16j and the external electrodes 21f and 21g , 21h, 21i are controlled in the above-described relationship, so that the solder can easily reach the electrode pads 15e, 15f, 15g, 15h.

  Through the above steps, the external electrodes 21f, 21g, 21h, 21i, the through through holes 16g, 16h, 16i, 16j, and the electrode pads 15e, 15f, 15g, 15h are electrically connected to each other, and the adhesive 27 Thus, a physical connection is also made.

  Thus, all the external electrodes 21f, 21g, 21h, 21i, the electrode pads 15e, 15f, 15g, 15h, and the through-through holes 16g, 16h, 16i, 16j are connected. However, the external electrode 21 g is not electrically connected to the semiconductor device 11. For this reason, the external electrode 21g not electrically connected to the semiconductor device 11 is connected to the electrode pad 15f via the through-through hole 16h. As a result, the through through hole 16h and the electrode pad 15f are electrically connected, and the electrode pad 15f serves as a connection terminal for extracting an electrical signal to another system. Then, it is connected to another system through the through through hole 16 h and the wiring 22.

  In the mounting structure 10, when there is no thin substrate 24, that is, within the range of the heights of the external electrodes 21 f, 21 g, 21 h, 21 i necessary for mounting a semiconductor device that is normally performed, the thin substrate 24 can be connected. For this reason, it is possible to draw out the wiring toward another system without affecting the area on the multilayer substrate 26 and the space in the height direction. As a result, the connector area normally required can be reduced, which can greatly contribute to downsizing of the apparatus.

[Method of manufacturing mounting structure]
FIG. 3 is a process flow showing an example of a manufacturing method of the mounting structure shown in FIG. First, as shown in FIG. 3A, a multilayer substrate 13 having electrode pads 15a to 15d for mounting a semiconductor device 11 such as a CSP is prepared. Such a multilayer substrate 13 is manufactured by a normal printed wiring board manufacturing method.

  Next, as shown in FIG. 3B, a thin substrate 12 having through-through holes 16a to 16d and 16e is prepared, and the through-through holes 16a to 16d overlap the electrode pads 15a to 15d of the multilayer substrate 13. To place. Such a thin substrate 12 is also manufactured by a normal printed wiring board manufacturing method. The size of the thin substrate 12 needs to include at least a portion on which the semiconductor device 11 is mounted and a portion having a lead-out wiring 17c included in the thin substrate 12 and a through-through hole 16e connected to the lead-out wiring 17c. Any size is acceptable. And it is desirable to make it the shape and size which avoided the mounting part of the other electronic components mounted near the semiconductor device 11. As the material of the thin substrate 12, a normal glass epoxy substrate or a flexible substrate can be used. Further, in order to prevent displacement between the multilayer substrate 13 and the thin substrate 12, it may be temporarily fixed with an adhesive (not shown). In the example of FIG. 3B, there is a gap between the multilayer substrate 13 and the thin substrate 12, but such a gap may or may not exist.

  Next, as shown in FIG. 3C, a bonding material such as cream solder is supplied. The supply at this time is performed simultaneously to a portion where the thin substrate 12 is disposed (a portion of the through-through hole 16) and another electronic component mounting electrode pad (not shown) where the thin substrate 12 is not provided. preferable. Examples of such a supply method include a printing method and a method using a dispenser. When supplying by a printing method, a metal mask or the like is used. However, when performing simultaneously on the thin substrate 12 and the multilayer substrate 13, the portion of the thin substrate 12 is thinned by, for example, half-etching the metal mask. What is necessary is just to process and use so that the thickness of the board | substrate 12 may escape.

  Next, as shown in FIG. 3D, a CSP (semiconductor device 11) having solder balls as external electrodes 21a to 21d and other electronic components (not shown) are mounted. Thereafter, the solder as the bonding material is melted by heating at a predetermined temperature, and the semiconductor device 11, the thin substrate 12, and the multilayer substrate 13 are bonded simultaneously and integrally to obtain the mounting structure 1 shown in FIG. it can.

  The mounting structure 1 of the present invention described above does not require any special process, the conventional mounting process and mounting equipment can be used as they are, and the mounting of the semiconductor device 11 on the multilayer substrate 13 can be performed using the thin substrate 12. Therefore, it can be integrated at the same place at the same time by a single joining means, which is very efficient. In particular, since an inexpensive through-through multilayer board can be used as the multilayer board 13, a low-cost mounting structure 1 can be realized.

DESCRIPTION OF SYMBOLS 1,10 Mounting structure 11 Semiconductor device 12, 24 Thin substrate 13, 26 Multilayer substrate 14 Bonding material 15, 15a, 15b, 15c, 15d, 15e, 15f, 15g, 15h Electrode pad 16, 16a, 16b, 16c, 16d, 16e, 16f, 16g, 16h, 16i, 16j Through-through hole 17, 17c, 17d, 22 Thin substrate wiring 18, 18a, 18e, 18f Multi-layer substrate through-through hole 19 Wiring (other than multilayer substrate surface)
20, 20a, 20b, 20c, 20d, 20e Bonding material 21, 21a, 21b, 21c, 21d, 21e, 21f, 21g, 21h, 21i External electrode 25, 25a, 25b Wiring on the surface of the multilayer substrate 27 Adhesive

Claims (6)

A semiconductor device having a plurality of external electrodes, a multilayer substrate having an electrode pad disposed opposite to the external electrodes, and a thin substrate provided between the semiconductor device and the multilayer substrate,
The thin substrate has a through-hole, the external electrode and the electrode pad are bonded with a bonding material through the through-through hole, and a wiring is drawn from a part of the through-through hole ,
In the bonding, the external electrode, the through-through hole, and the electrode pad are integrally solder-bonded,
The multilayer substrate has a first wiring structure in which wiring is drawn from some of the electrode pads arranged to face the external electrode,
The thin substrate has a second wiring structure in which the through through holes are formed in the same arrangement as the external electrodes, and wiring is drawn out from a part of the through through holes.
The semiconductor device mounting structure according to the second wiring structure, wherein the drawn wiring is connected to a through hole or a via included in the multilayer substrate . 2. The semiconductor device mounting structure according to claim 1 , wherein in the first wiring structure of the multilayer substrate, the drawn wiring is connected to a through hole or a via of the multilayer substrate. Mounting structure of the lead-out wiring the first wiring structure having a lead wiring for the second interconnect structure has is the is connected to the external electrodes, the semiconductor device according to claim 1 or 2.   The mounting structure of a semiconductor device according to claim 1, wherein the thin substrate is bonded to the multilayer substrate at a portion other than the through-through hole and the electrode pad. The semiconductor device mounting structure according to claim 4 , wherein the adhesion is performed with an adhesive of a thermoplastic resin. The diameter of the through holes is, the external electrode having a diameter less than 1/2 of the diameter of less than the external electrode, the mounting structure of a semiconductor device according to any one of claims 1 to 5.

Images