JP5397973B2 - Power amplifier - Google Patents

Description

  The present invention relates to a power amplifier, and more particularly to a Doherty power amplifier used in communication equipment.

  For transmission power amplifiers for radio base stations in mobile communication systems, the demand for reduced power consumption (higher efficiency) has become very strict. The reason for this is that, due to the reduction in power consumption, not only is it effective in saving energy and saving electricity costs, but also the amount of heat generated is reduced, so the surface area of the heat sink required for heat dissipation is reduced. This is because the volume of the transmission power amplifier can be reduced.

  A Doherty amplifier is generally employed as one of the high efficiency transmission power amplifiers (see Patent Document 1). This Doherty amplifier is composed of a carrier amplifier that always performs signal amplification regardless of the magnitude of the input signal, and a peak amplifier that performs signal amplification only when the input signal is large and a high power output operation is performed. The input signal is distributed to the carrier amplifier side and the peak amplifier side, and the outputs of the carrier amplifier and the peak amplifier are combined and output.

  FIG. 3 shows a block diagram of an example of a power amplifier using such a Doherty amplifier configuration. Referring to FIG. 3, as described above, the Doherty amplifier is basically composed of the carrier amplifier 2 and the peak amplifier 3, and a field effect transistor (FET) or the like is used as the amplifying element. .

  The output synthesizing circuit 7 is composed of a transformer, and is usually composed of a transmission line 5 having a quarter wavelength. The input branch circuit 6 is a ¼ wavelength transmission line 4 or a 90 ° hybrid circuit for making the phase relationship of the output signals of the carrier amplifier 2 and the peak amplifier 3 in phase at the signal synthesis point of the output synthesis circuit 7. Etc. A common power supply voltage is supplied to the carrier amplifier 2 and the peak amplifier 3 from the DC power supply 10a through the RF choke coils 9b and 9c, respectively.

  Capacitors 8a to 8f are for DC decoupling, and those having a capacitance value that is sufficiently low impedance at the frequency of the RF signal to be used are selected. Usually, the carrier power amplifier 2 is biased to class AB or class B, and the peak amplifier 3 is biased to class C. By having the carrier amplifier 2 that operates while maintaining saturation in the vicinity of the saturated output power, a higher efficiency than that of a normal class A amplifier or class AB amplifier is realized even at the time of backoff from the saturated output power. be able to.

Further, in order to satisfy the gain requirement of the entire power amplifier, the driver amplifier 1 is arranged in front of the Doherty amplifier including the carrier amplifier 2 and the peak amplifier 3. When the driver amplifier 1, the carrier amplifier 2, and the peak amplifier 3 are composed of FETs of the same process (for example, LDMOS: Laterally Diffused MOS), the power supply voltage required for driving is common (for example, +28 V). Is also supplied from the DC power supply 10a through the RF choke coil 9a.

  By the way, a multi-carrier signal such as a W-CDMA modulation wave used in a mobile communication system such as a cellular phone changes depending on the chip rate of the amplitude envelope modulation wave and the difference frequency component of the multi-carrier. (See FIG. 4). When a modulated wave signal having a large difference between the average amplitude value and the peak amplitude value is amplified, it is necessary to supply a power supply voltage sufficiently higher than the peak amplitude value to the Doherty amplifier.

  Actually, it is the peak amplifier that requires a sufficiently high power supply voltage with respect to the peak amplitude value. However, in the configuration of FIG. 3, a common power supply voltage is supplied to the carrier amplifier 2 and the peak amplifier 3. In addition, an unnecessarily high power supply voltage is supplied to the carrier amplifier 2, and there is a problem that the power efficiency cannot be sufficiently increased.

  In order to solve this problem, a technique described in Patent Document 2 has been proposed, and this block diagram is shown in FIG. In FIG. 5, the same parts as those in FIG. 3 are denoted by the same reference numerals.

  A DC power supply 10a that supplies a common power supply voltage Vc to the carrier amplifier 2 and the peak amplifier 3 and a DC power supply that outputs a DC voltage Vp necessary to supply a power supply voltage higher than the peak amplitude of the input signal to the peak power amplifier 3. And a power supply 10b. A part of the signal input from the RF input terminal is supplied to the amplitude envelope detection circuit 13 by the directional coupler 11. The amplitude envelope detection circuit 13 outputs the amplitude envelope of the signal as a voltage signal, and the threshold voltage input from the threshold setting terminal 14 is compared with the comparator 15.

  A voltage signal exceeding the threshold is output to the voltage modulator 16. The voltage modulator 16 amplitude modulates the DC voltage Vp supplied from the DC power supply 10 b with the voltage signal output from the comparator 15, and supplies the voltage after amplitude modulation to the peak amplifier 3. The delay amount of the delay circuit 12a is the time until the main signal output from the directional coupler 11 is input to the carrier amplifier 2 and the peak amplifier 3 is processed by the amplitude envelope detection circuit 13, the comparator 15 and the voltage modulator 16. It is set to match the delay amount due to.

  FIG. 6 shows the relationship between the DC voltage Vc output from the DC power supply 10a, the DC voltage Vp output from the DC power supply 10b, the power supply voltage output from the voltage modulator 16 and supplied to the peak amplifier 3, and the signal amplitude envelope.

  The power supply voltage supplied to the peak amplifier 3 is a DC voltage Vp whose maximum value is higher than the peak amplitude value of the input signal, and a value that changes according to the value of the amplitude envelope of the input signal. Therefore, the power consumed by the peak amplifier 3 can be reduced.

JP 2004-289492 A JP 2007-053540 A

  Here, in the case of a power amplifier for a mobile phone base station or the like, a saturation output level of several hundred W class is required as a final stage amplifier (an amplifier mounted at a position closest to the antenna). As the final stage amplifier configuration, in order to improve the saturation output level, as described above, two or more amplifiers are generally operated in parallel. Therefore, it is easy to apply a Doherty amplifier configuration using two or more amplifiers.

  On the other hand, as the driver amplifier 1 (see FIG. 3), which is the previous stage of the final stage, since the required saturation output level is about several tens of watts, it is rare to operate two or more amplifiers in parallel. Therefore, the Doherty amplifier configuration cannot be applied to the driver amplifier 1, and it has been difficult to increase the efficiency of the driver amplifier 1.

  An object of the present invention is to provide an amplifier capable of improving the efficiency of the entire amplifier by improving the efficiency of the driver amplifier in the Doherty amplifier.

The power amplifier according to the present invention comprises:
A power amplifier including carrier amplification means, peak amplification means, and drive amplification means for driving these carrier amplification means and peak amplification means,
A first DC power supply for supplying a common power supply voltage to the carrier amplification means, the peak amplification means, and the drive amplification means;
A second DC power source that generates a DC voltage higher than the peak of the input signal;
Voltage modulation means for modulating and outputting the power supply voltage of the second DC power supply with a voltage corresponding to the amplitude envelope exceeding the predetermined threshold when the amplitude envelope of the input signal of the drive amplification means exceeds a predetermined threshold,
The output voltage of the voltage modulation means is supplied as the power supply voltage for both the peak amplification means and the drive amplification means.

  According to the present invention, when the amplitude envelope of the input signal exceeds a predetermined threshold, the DC voltage modulated by the exceeded amplitude envelope is supplied to the peak amplifier and also to the drive amplifier which is a driver amplifier. As a result, it is possible to reduce the power consumption of the drive amplifier, and as a result, it is possible to expect an improvement in the efficiency of the entire amplifier.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention, and parts equivalent to those in FIG. 5 are denoted by the same reference numerals.

  The amplifier according to the present embodiment includes a driver amplifier 1, a carrier amplifier 2, a peak amplifier 3, an output synthesis circuit 7 composed of a transmission line 5 having a normal quarter wavelength, and a phase relationship of output signals from the carrier amplifier 2 and the peak amplifier 3 Has an input branch circuit 6 composed of a quarter wavelength transmission line 4 or a 90 ° hybrid circuit for making the signal in-phase at the signal synthesis point of the output synthesis circuit 7.

  Furthermore, the amplifier according to the present embodiment includes an RF choke coil 9a-c, DC decoupling capacitors 8a-8f having sufficiently low impedance at the frequency of the RF signal to be used, a driver amplifier 1, a carrier amplifier 2, and a peak amplifier 3. A DC power supply 10a for supplying a common power supply voltage Vc and a DC power supply 10b for outputting a DC voltage Vp necessary for supplying a power supply voltage higher than the peak amplitude of the input signal to the driver amplifier 1 and the peak amplifier 3 are provided. Yes.

  Furthermore, the amplifier according to the present embodiment includes a directional coupler 11 for extracting a part of the signal input from the RF input terminal, an amplitude envelope detection circuit 13 for detecting the amplitude envelope of the input signal, A threshold setting terminal 14 for applying a threshold voltage, a voltage signal converted by the amplitude envelope detection circuit and a threshold voltage are compared, a comparator 15 that outputs a voltage signal exceeding the threshold, and a DC voltage Vp supplied from the DC power supply 10b Is modulated with the voltage signal output from the comparator 15 and supplied to the peak amplifier 3 and the driver amplifier 1.

  Furthermore, in the amplifier according to the present embodiment, the time until the main signal output from the directional coupler 11 is input to the driver amplifier 1 is processed by the amplitude envelope detection circuit 13, the comparator 15, and the voltage modulator 16. The delay circuit 12a in which the delay amount is set so as to coincide with the delay amount due to, and the time until the main signal output from the directional coupler 11 is input to the carrier amplifier 2 and the peak amplifier 3 is the amplitude envelope detection circuit 13 and a delay circuit 12b in which the delay amount is set so as to coincide with the delay amount by the processing of the comparator 15 and the voltage modulator 16.

  Next, the operation of the present embodiment will be described. A part of the input signal from the RF input terminal is supplied to the amplitude envelope detection circuit 13 by the directional coupler 11. The amplitude envelope detection circuit 13 converts the amplitude envelope of the input signal into a voltage signal and supplies it to the comparator 15.

  On the other hand, a threshold voltage is also input from the threshold voltage setting terminal 14 and supplied to the comparator 15. In the comparator 15, the threshold voltage is compared with the amplitude envelope voltage signal, and a voltage signal exceeding the threshold voltage is output to the voltage modulator 16. In the voltage modulator 16, the DC voltage Vp supplied from the DC power supply 10 b is amplitude-modulated by the voltage signal output from the comparator 15, and the voltage after amplitude modulation is supplied to the peak amplifier 3 and the driver amplifier 1. The driver amplifier 1, the carrier amplifier 2 and the peak amplifier 3 are supplied with a fixed DC voltage Vc as a power supply voltage from the DC power supply 10a through the RF choke coils 9a, 9b and 9c, respectively. The DC voltage Vc is set to a lower limit voltage value that allows signal distortion due to nonlinearity of the carrier amplifier 2, for example.

  The threshold voltage input to the threshold voltage setting terminal 14 is set to a value corresponding to the amplitude envelope value of the input signal at which the peak amplifier 3 starts the amplification operation. For example, the threshold voltage is set to a value corresponding to the output voltage Vc of the DC power supply 10a. Is set. A voltage obtained by adding the DC voltage Vc supplied from the DC power supply 10 a and the amplitude modulation voltage output from the voltage modulator 16 is supplied to the peak amplifier 3 and the driver amplifier 1 as the power supply voltage. .

  Therefore, as shown in FIG. 6, the power supply voltage supplied to the peak amplifier 3 is a DC voltage Vp whose maximum value is higher than the peak amplitude value of the input signal, and a value that changes according to the amplitude envelope of the input signal. Thus, the power consumed by the peak amplifier 3 is reduced (existing technical effect), and at the same time, as shown in FIG. 2, the power supply voltage supplied to the driver amplifier 1 also changes according to the amplitude envelope of the input signal. Value. Therefore, the power consumed by the driver amplifier 1 can also be reduced.

  In order to clarify the power consumption reduction effect, in FIG. 2, a constant voltage value that needs to be supplied to the driver amplifier 1 when the present invention is not applied is shown as Vd.

  Note that the delay amount of the delay circuit 12 a is determined by the time until the main signal output from the directional coupler 11 is input to the driver amplifier 1 in the amplitude envelope detection circuit 13, the comparator 15, and the voltage modulator 16. It is set to match the amount of delay due to processing. The delay amount of the delay circuit 12b is determined by the time taken until the main signal output from the directional coupler 11 is input to the carrier amplifier 2 and the peak amplifier 3, the amplitude envelope detection circuit 13, the comparator 15, and the voltage modulation. As described above, it is set so as to coincide with the delay amount by the processing of the device 16.

As described above, according to the embodiment of the present invention, the power consumption of the driver amplifier 1 can be reduced, and as a result, the efficiency of the entire power amplifier can be improved as compared with the conventional case. Further, there is by using the existing technology, without adding a large circuits, power consumption of the driver amplifier, an effect that can increase the overall efficiency of the power amplifier.

It is a block diagram which shows the structure of the amplifier by embodiment of this invention. It is a wave form diagram for demonstrating operation | movement of embodiment of this invention. It is a block diagram which shows an example of the Doherty amplifier relevant to this invention. FIG. 4 is a waveform diagram for explaining the operation of the circuit of FIG. 3. It is a block diagram which shows the other example of the Doherty amplifier relevant to this invention. FIG. 6 is a waveform diagram for explaining the operation of the circuit of FIG. 5.

Explanation of symbols

1 Driver amplifier
2 Carrier amplifier
3 Peak amplifier
4,5 1/4 wavelength transmission line
6 Input branch circuit
7 Output synthesis circuit 10a, 10b DC power supply 8a-8f DC decoupling capacitor 9a-9c Choke coil
11 Directional coupler 12a, 12b Delay circuit
13 Amplitude envelope detection circuit
14 Threshold setting terminal
15 comparator
16 Voltage modulator

Claims (3)

A power amplifier including carrier amplification means, peak amplification means, and drive amplification means for driving these carrier amplification means and peak amplification means,
A first DC power supply for supplying a common power supply voltage to the carrier amplification means, the peak amplification means, and the drive amplification means;
A second DC power source that generates a DC voltage higher than the peak of the input signal;
Voltage modulation means for modulating and outputting the power supply voltage of the second DC power supply with a voltage corresponding to the amplitude envelope exceeding the predetermined threshold when the amplitude envelope of the input signal of the drive amplification means exceeds a predetermined threshold,
A power amplifier, wherein an output voltage of the voltage modulation means is supplied as a power supply voltage for both the peak amplification means and the drive amplification means.   The power amplifier according to claim 1, wherein the threshold value is a value corresponding to a power supply voltage of the first DC power supply.   3. The power amplifier according to claim 1, further comprising delay means for delaying the input signal supplied to the drive amplification means in accordance with a delay caused by processing of the voltage modulation means.

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