JP5402887B2 - High frequency amplifier - Google Patents

Description

  The present invention relates to a high-frequency amplifier used in, for example, a VHF band, a UHF band, a microwave band, a millimeter wave band, and the like.

  Hereinafter, for convenience of description, a high-power microwave high-power amplifier used in the microwave band will be described as an example of the high-frequency amplifier.

In general, in a microwave high-power amplifier, in order to obtain a high output, a semiconductor element such as a field effect transistor (hereinafter referred to as an FET) or a heterojunction bipolar transistor (hereinafter referred to as an HBT) is used. Operate in parallel. When these semiconductor elements are connected in parallel and their outputs are combined, generally, a power distribution circuit is connected to the input side of the parallel connection circuit of the semiconductor amplifying elements, and a power combining circuit is connected to the output side. Te, for configuring the circuit as an amplifier, a closed loop is formed within the circuit. When an unbalanced mode occurs in a closed loop circuit due to thermal noise of a semiconductor element or the like, there is a problem that a loop oscillation due to the unbalanced mode occurs in the closed loop at a specific frequency and the amplifier performs an abnormal amplification operation. In particular, the frequency of f _0/2 in the closed loop (f ₀ is the input frequency to the high frequency amplifier) When unbalanced mode occurs, mixing by f ₀ and f _0/2 is performed in the semiconductor device, and f ₀ f _0/2 which is a component of the difference between f _0/2 occurs, since it is superimposed on the normal thermal noise, there is a problem that from the oscillator is likely to other frequencies.

  In order to solve this problem, for example, Patent Document 1 discloses a configuration of a high-frequency amplifier that suppresses oscillation by connecting a so-called isolation resistor in a closed loop circuit and absorbing the unbalanced mode in the isolation resistor. Has been.

Japanese Patent No. 4361313 (pages 4 to 5, FIG. 1)

  However, the conventional high-frequency amplifier may not be able to suppress unbalanced mode oscillation even when an isolation resistor is loaded. For example, this is the case as shown below.

In the high-frequency amplifier disclosed in Patent Document 1, assuming that the impedance of the input matching circuit side viewed from the connection point between the isolation resistor and the closed loop is Z _t1 , and the resistance value of the isolation resistor is _{Ro 1} , the FET matches the input matching circuit. The impedance _Zout as seen from the side is expressed by the following equation.

式（１）において、Ｚ_t1がＲ_o1に比べて十分に小さい場合、Ｚ_out≒Ｚ_t1となりアイソレーション抵抗がないときと等価になる。従って、不平衡モードの電力はアイソレーション抵抗で吸収されず、ＦＥＴ側に全反射され、発振を引き起こす。このように、従来の高周波増幅器では、アイソレーション抵抗による不平衡モードの電力吸収効果が十分には得られない場合があり、発振を完全には抑制できない問題があった。

In the formula (1), Z _t1 may R _o1 sufficiently smaller than the, is equivalent and can Z _out ≒ Z _t1 next isolation resistance Do the Most. Therefore, the power in the unbalanced mode is not absorbed by the isolation resistor but is totally reflected on the FET side, causing oscillation. As described above, in the conventional high-frequency amplifier, there is a case where the power absorption effect of the unbalanced mode due to the isolation resistance cannot be sufficiently obtained, and there is a problem that the oscillation cannot be completely suppressed.

  The present invention has been made to solve the above-described problems, and in a high-frequency amplifier that synthesizes outputs of amplifying elements connected in parallel, a high-frequency amplifier that can more appropriately suppress unbalanced mode oscillation. To get.

A high frequency amplifier according to the present invention is connected to an output side of a power distribution circuit that distributes an input signal and outputs the distributed signal, and outputs each output signal from the power distribution circuit. A set of amplifying elements to be amplified and an output signal from the one set of amplifying elements are combined to form a closed loop circuit in cooperation with the power distribution circuit and the one set of amplifying elements. A power combining circuit connected to the output side of the amplifying element, and an unbalanced mode generated in the closed loop circuit connected in parallel to at least one of the power distribution circuit or the power combining circuit on the output side of the power distribution circuit A combined impedance of the first passive circuit that absorbs the power of the first power supply circuit and the power distribution circuit related to the unbalanced mode and the power combining circuit related to the unbalanced mode An impedance value that makes the combined impedance of at least one of the impedances larger than the corresponding impedance of the power distribution circuit or the impedance of the power combining circuit, and adjusts the amount of power absorbed by the first passive circuit As described above, the closed loop circuit includes a second passive circuit connected in parallel to the first passive circuit .

  According to the present invention, in a high-frequency amplifier that synthesizes the outputs of amplifying elements connected in parallel, the amount of unbalanced mode power generated in a closed-loop circuit including the amplifying element is adjusted, so Oscillation due to the mode can be suppressed more appropriately.

1 is a circuit configuration diagram of a high-frequency amplifier according to Embodiment 1 of the present invention. It is an equivalent circuit diagram with respect to the unbalanced mode of the high frequency amplifier which concerns on Embodiment 1 of this invention. It is a circuit block diagram of the high frequency amplifier which concerns on Embodiment 2 of this invention. It is an equivalent circuit diagram with respect to the unbalanced mode of the high frequency amplifier which concerns on Embodiment 2 of this invention. It is a calculation result of the loop gain of the unbalanced mode of the high frequency amplifier which concerns on Embodiment 2 of this invention. A capacitance dependent calculation result of the capacitor of the loop gain at f _0/2 of the unbalanced mode high-frequency amplifier according to a second embodiment of the present invention. It is a circuit block diagram of the high frequency amplifier which concerns on Embodiment 3 of this invention. It is an equivalent circuit diagram with respect to the unbalanced mode of the high frequency amplifier which concerns on Embodiment 3 of this invention. It is a circuit block diagram of the high frequency amplifier which concerns on Embodiment 4 of this invention. It is an equivalent circuit diagram with respect to the unbalanced mode of the high frequency amplifier which concerns on Embodiment 4 of this invention. It is a layout diagram of the high frequency amplifier according to the fifth embodiment of the present invention. It is a layout figure of the high frequency amplifier which concerns on Embodiment 6 of this invention. It is a circuit block diagram of the high frequency amplifier which concerns on Embodiment 7 of this invention. It is a circuit block diagram of the high frequency amplifier which concerns on Embodiment 8 of this invention.

  Hereinafter, a high-frequency amplifier according to an embodiment of the present invention will be described with reference to the drawings. In each figure shown in each embodiment, the same numerals indicate the same or corresponding parts. The high-frequency amplifier shown here includes a plurality of transistors as amplification elements, a power distribution circuit for combining them in parallel, and a power combining circuit. Here, the case where a field effect transistor (FET) is used as an example is illustrated, but the present invention is not limited to this, and can be similarly applied when a bipolar transistor or the like is used instead of the FET. It is.

  Here, the case where the present invention is applied to the output side of the FET in the closed loop circuit will be described, but the present invention can also be applied to the input side of the FET in the closed loop, both on the input side and the output side. The present invention may be applied. Moreover, you may combine all or one part of the structure shown by each embodiment, unless it deviates from the meaning of this invention.

Embodiment 1 FIG.
FIG. 1 shows a circuit configuration diagram of a high-frequency amplifier according to Embodiment 1 of the present invention. In FIG. 1, a high-frequency amplifier includes an input terminal 10 for inputting a signal to the high-frequency amplifier, a power distribution circuit 11 for distributing the input signal, and signals amplified by FETs 12a and 12b and FETs 12a and 12b as amplification elements for amplifying the signal. 1 is provided, and an output terminal 14 for outputting the synthesized signal is provided, and a closed loop circuit is formed that is vertically symmetric with respect to the symmetry plane indicated by the dotted line in FIG. The power distribution circuit 11 and the power combining circuit 13 include transmission lines 15a and 15b and transmission lines 16a and 16b for propagating signals, respectively.

The isolation resistor 17 constituting the first passive circuit is connected in parallel with the power combining circuit 13, that is, one end is connected to one circuit side (the output side of the FET 12a) distributed by the power distribution circuit, The other end is connected to the other circuit side to which the other end is distributed (the output side of the FET 12b) so as to be vertically symmetrical with respect to the symmetry plane indicated by the dotted line in FIG. The second passive circuit 18 (hereinafter referred to as a passive circuit 18 as appropriate), which is a characteristic configuration of the present application, is loaded in parallel with the isolation resistor 17, that is, both ends are connected to the output sides of the FETs 12a and 12b, respectively, and the power is combined. It is loaded at a position between the circuit 13 and the input side, and is composed of passive elements such as capacitors, inductors, and transmission lines.

  Here, the symbols of a pair of FETs are distinguished by adding alphabets after the numerals 12a and 12b and numbers, but when these are collectively referred to or representatively shown without distinction, no alphabet is added. It describes as follows. The same applies to other reference numerals shown in the following embodiments. In FIG. 1, a branch point on the circuit of the power distribution circuit 11 is A, a combination point (coupling point) on the circuit of the power combination circuit 13 is B, an input terminal 10, a branch point A, a power distribution circuit 11, a combination point. The reference plane including the (coupling point) B and the output terminal 14 is described as a symmetry plane.

Next, the operation will be described. First, the operation related to the balanced mode of this circuit will be described. When a signal of frequency f ₀ is input from the input terminal 10, the signal equally distributed by the power distribution circuit 11 is input to the FETs 12 a and 12 b through the transmission line 15 and amplified. The amplified signal passes through the transmission line 16, is synthesized by the output synthesis circuit, and is output from the output terminal 14. Since the input signal is distributed with the same amplitude and phase by the power distribution circuit 11 to be in a balanced mode, the both ends of the isolation resistor 17 and the passive circuit 18 have the same amplitude and phase, and the isolation resistor 17 and the passive circuit 18 are Almost no effect.

  Next, the operation related to the unbalanced mode will be described. Here, the unbalanced mode is caused by, for example, thermal noise from an FET or a transmission line. As thermal noise components, there are a balanced mode ee and an unbalanced mode eo. Here, the unbalanced mode that directly causes loop oscillation will be mainly described.

A case where the isolation resistor 17 and the passive circuit 18 are not present in the circuit shown in FIG. 1 will be described. This is the same configuration as the above-described prior art. The unbalanced mode eo amplified by the FET 12 passes through the transmission line 16 and reaches the point B in FIG. At point B, the phase is inverted and total reflection is performed, so that the unbalanced mode eo is fed back to the FET 12 side. The fed back unbalanced mode eo reaches the point A through the FET 12 . Similarly, at point A, the phase is reversed and total reflection occurs. Thus, the unbalanced mode eo causes oscillation by repeating reflection at the points A and B and amplification by the FET in the circuit. Oscillation of the unbalanced mode is referred to as a feedback loop to look like reflection path of the unbalanced mode eo is as if to draw a loop of FIG. This loop oscillation can be suppressed by connecting the isolation resistor to a predetermined opposite position of the closed loop circuit. In other words, the unbalanced mode has the same amplitude and opposite phase at both ends of the isolation resistor, so that it is absorbed by being synthesized on the isolation resistor 17 and loop oscillation can be suppressed. However, when an isolation resistor is simply provided in the closed loop circuit, there are cases where oscillation in the unbalanced mode cannot be suppressed as described above.

Therefore, as shown in FIG. 1, the passive circuit 18 is connected in parallel with the isolation resistor 17 in the closed loop circuit. An equivalent circuit for the unbalanced mode of the circuit shown in FIG. 1 is shown in FIG. Impedance for unbalanced mode of the power combining circuit 13, i.e., the synthetic impedance viewed the transmission line 16 side from the connection point of the passive circuit 18 and the closed loop circuit in Figure 2 Z _t1, the power distribution circuit 13 and a passive circuit 18 The impedance, that is, the impedance when the transmission line 16 and the passive circuit 18 are viewed from the connection point between the passive circuit 18 and the closed loop circuit in FIG. 2 is Z _t2, and the impedance when the entire output circuit is viewed is Z _out . Further, the resistance value of the isolation resistor 17 is 2R _o1, and the admittance of the passive circuit 18 is Y _R / 2. At this time, Z _t2 and Z _out are expressed by the following equations.

式（２）から１＋Ｚ_t1Ｙ_R＜１のときＺ_t1＜Ｚ_t2であり、この条件を満たす受動回路を装荷することにより、受動回路１８と電力合成回路１３の不平衡モードに対する合成インピーダンスを、受動回路１８がない場合と比べ大きくすることができる。また、Ｙ_RをＺ_t1に対して共振させるように選んだとき、すなわち、１＋Ｚ_t1Ｙ_R＝０となるようにＹ_Rを選ぶことにより、Ｚ_t2⇒∞となりインピーダンスＺ_t2を最も大きくすることができる。

From Equation (2), when 1 + Z _t1 Y _R <1, Z _t1 <Z _t2 , and by loading a passive circuit that satisfies this condition, the combined impedance of the passive circuit 18 and the power combining circuit 13 with respect to the unbalanced mode is The size can be increased as compared with the case without the passive circuit 18. When Y _R is selected to resonate with Z _t1 , that is, by selecting Y _R so that 1 + Z _t1 Y _R = 0, Z _t2 ⇒∞ and impedance Z _t2 is maximized. Can do.

Then, from equation (3), Z _t2 is equivalent to that the Z _out ≒ R _o1 next when sufficiently larger than the R _o1, only isolation resistor 17 to FET12 are loaded. Therefore, even when Z _t1 is sufficiently smaller than R _o1 , the power in the unbalanced mode is absorbed by the resistor and loop oscillation does not occur. Here, it is possible to Z _t2 even if not sufficiently large as compared to R _o1, to increase the Z _t2 by loading the passive circuit 18 having a Y _R that satisfies 1 + Z _t1 Y _R <1 condition, The power that absorbs the unbalanced mode by the isolation resistor 17 can be increased as compared with the case where the passive circuit 18 is not loaded, and the effect of suppressing loop oscillation can be obtained.

  Since the high-frequency amplifier according to Embodiment 1 of the present invention has the above-described configuration, by loading a passive circuit that increases the impedance with respect to the unbalanced mode in parallel with the isolation resistor, the isolation resistor is used. The power absorption effect in the unbalanced mode can be enhanced and oscillation can be suppressed.

  In addition, although the case where a passive circuit is provided on the power combining circuit side of the FET and the combined impedance for the unbalanced mode of the passive circuit and the power combining circuit is increased is described here, a passive circuit is provided on the power distribution circuit side. The same effect can be obtained with a configuration in which the combined impedance of the passive circuit and the power distribution circuit is increased. When an interstage matching circuit is provided, the combined impedance of the passive circuit and the interstage matching circuit may be increased. In addition, although the configuration in which the isolation resistor is arranged on the FET side of the passive circuit is shown here, the arrangement may be reversed, that is, the isolation resistor may be arranged on the power combining circuit side of the passive circuit.

Embodiment 2. FIG.
FIG. 3 shows a circuit configuration of the high-frequency amplifier according to Embodiment 2 of the present invention. The basic configuration is the same as that of the first embodiment, and a capacitor 19 is used as a second passive circuit loaded in parallel with the isolation resistor 17 as the first passive circuit.

Next, the operation will be described. As in the case of the first embodiment, the signal input from the input terminal 10 is amplified by the FET 12 and output from the output terminal 14. Further, the thermal noise generated from the FET 12 or the like causes an unbalanced mode. FIG. 4 shows an equivalent circuit for the unbalanced mode of the circuit shown in FIG. In FIG. 4, the transmission line 16 has a characteristic impedance Z _o1 , its electrical length θ _o1 , an isolation resistor 17 2R _o1 , and a capacitor 19 C _R / 2. At this time, the impedance Z _{t1 with} respect to the unbalanced mode viewed from the transmission line 16 is expressed by the following equation.

式（４）を式（２）に代入し、Ｙ_R=ｊωＣ_Rとすると電力合成回路１３およびキャパシタ１９の合成インピーダンスＺ_t2は以下の式で表される。

Equation (4) into equation (2), the combined impedance Z _t2 of Y _R = When j [omega] C _R power combining circuit 13 and the capacitor 19 is expressed by the following equation.

From equation (5), it can be seen that when 1−ωZ _o1 C _R tanθ _o1 <1, Z _t1 <Z _t2 , and the combined impedance of the power combining circuit 13 and the capacitor 19 can be made larger than when the capacitor 19 is not provided. . By loading a capacitor that satisfies this condition, the absorption effect of the unbalanced mode by the isolation resistor 17 can be enhanced and the loop oscillation can be suppressed, as in the case of the first embodiment. When 1−ωZ _o1 C _R tanθ _o1 = 0, Z _t2 ⇒∞, and the impedance Z _t2 can be maximized.

FIG. 5 shows the calculation result of the loop gain in the unbalanced mode between the high-frequency amplifier according to the second embodiment and the conventional circuit. For calculation, FET model with Z _i1 = 8.4Ω, θ _i1 = 90 °, Z _o1 = 20Ω, θ _o1 = 90 °, R _o1 = 50Ω, C _R = 2.2 pF and gate width = 1.75 mm is used. It was. In FIG. 5, the horizontal axis represents the frequency, and the vertical axis represents the loop gain. The dotted line indicates the loop gain of the unbalanced mode of the conventional circuit, and the solid line indicates the calculation result of the loop gain of the circuit according to the second embodiment of the present invention. Yes. The oscillation condition is a loop gain> 0 dB.

  In the conventional circuit, the loop gain is> 0 dB in the vicinity of f = 4.5 GHz, whereas the loop gain of the high-frequency amplifier according to the present embodiment is 0 dB or less at all frequencies, and it is confirmed from calculation that no oscillation occurs. It was done.

Figure 6 shows the relationship between the capacitance value of the loop gain and the capacitor in the case where the frequency is f _0/2. In FIG. 6, the abscissa indicates the capacitance value of the capacitor 19 and the ordinate indicates the loop gain. When the loop gain is greater than 0 (one-dot chain line in the figure), loop oscillation occurs. From FIG. 6 , it can be seen that by setting C _R = 2.02 pF, the loop gain can be greatly reduced and can be reduced to −10 dB or less. This capacitance value is a value at which the capacitor 19 in FIG. 4 resonates in parallel with the transmission line 16 at f _0/2 .

Thus, in the high-frequency amplifier according to the second embodiment of the present invention, the capacitance value of the capacitor 19 can be lowered most loop gain by selecting a value resonating with the transmission line 16 at f _0/2, the frequency f ₀ The oscillation in the unbalanced mode that becomes / 2 can be suppressed.

  Here, the case where a capacitor is provided on the power combining circuit side of the FET and the combined impedance for the unbalanced mode of the capacitor and the power combining circuit is increased has been described. However, a capacitor is provided on the power distribution circuit side, The same effect can be obtained with a configuration in which the combined impedance with the power distribution circuit is increased. If an interstage matching circuit is provided, the combined impedance of the capacitor and the interstage matching circuit may be increased.

  Although the configuration in which the isolation resistor is arranged on the FET side of the capacitor is shown here, the arrangement may be reversed, that is, the isolation resistor may be arranged on the power combining circuit side of the capacitor. In addition, although the example in which the second passive circuit is configured only by the capacitor is shown here, the second passive circuit may be configured in combination with an inductor described later or a transmission line such as a microstrip line.

Embodiment 3 FIG.
FIG. 7 is a circuit configuration diagram of a high-frequency amplifier according to Embodiment 3 of the present invention. The basic configuration is substantially the same as that of the first embodiment, but an inductor 20 is used as a second passive circuit loaded in parallel with the isolation resistor 17 as the first passive circuit, and the transmission line 16a, 16b instead different in loaded with capacitors 21 a, 21 b of. Here, the capacitors 21 a and 21 b may be considered as a part of the power combining circuit, and an output matching circuit may be provided outside the output terminal 14 for matching. In FIG. 7, the resistance value of the isolation resistor 17 is 2R _o1 , the inductance of the inductor 20 is 2L _o1 , and the capacitance value of the capacitor 21 is C _o1 .

Next, the operation will be described. As in the first embodiment, the signal input from the input terminal 10 is amplified by the FET 12 and output from the output terminal 14. Further, an unbalanced mode occurs due to thermal noise of the FET 12 or the like. An equivalent circuit for the unbalanced mode of FIG. 7 is shown in FIG. Z _t1 and Z _{t2 in} FIG. 8 are expressed by the following equations.

From Equation (7), when 1− (1 / (ω ² C _o1 L _o1 )) <1, Z _t1 <Z _t2 , and by loading an inductor that satisfies this condition, the inductor 20 and the power combining circuit 13 The impedance with respect to the unbalanced mode can be increased as compared with the case where the inductor is not loaded. Also, when you choose L _o1 so as to resonate with Z _t1, i.e., by choosing L _o1 so that ^{1- (1 / (ω 2 C} o1 L o1)) = 0, Z t2 ⇒ ∞ and impedance Z _t2 can be _maximized .

Since the high-frequency amplifier according to the third embodiment of the present invention has the above-described configuration, it is possible to suppress the oscillation by enhancing the absorption effect of the unbalanced mode due to the isolation resistance as in the first embodiment. The inductor 20 can be realized by a chip inductor, a microstrip line, a spiral inductor formed by a coplanar line, or the like.

  In addition, although the case where an inductor is provided on the power combining circuit side of the FET and the combined impedance for the unbalanced mode of the inductor and the power combining circuit is increased has been described here, an inductor is provided on the power distribution circuit side, A similar effect can be obtained with a configuration in which the combined impedance with the power distribution circuit is increased. If an interstage matching circuit is provided, the combined impedance of the inductor and the interstage matching circuit may be increased. Also, here, the configuration in which the isolation resistor is arranged on the FET side of the inductor is shown, but conversely, that is, the isolation resistor may be arranged on the power combining circuit side of the inductor.

Embodiment 4.
FIG. 9 shows a circuit configuration diagram of a high-frequency amplifier according to Embodiment 4 of the present invention. The basic configuration is almost the same as that shown in the third embodiment. The difference from the third embodiment is that a transmission line 22 such as a microstrip line is used instead of the inductor 20 as the second passive circuit. In FIG. 9, the resistance value of the isolation resistor 17 is 2R _o1 , the characteristic impedance of the transmission line 22 is Z _R1 , the electrical length is 2θ _R1, and the capacitance value of the capacitor 21 is C _o1 .

Next, the operation will be described. As in the first embodiment, the signal input from the input terminal 10 is amplified by the FET 12 and output from the output terminal 14. Further, an unbalanced mode occurs due to thermal noise of the FET 12 or the like. FIG. 10 shows an equivalent circuit for the unbalanced mode of the circuit shown in FIG. Z _t1 and Z _{t2 in} FIG. 10 are expressed by the following equations.

式（９）から１−（１／（ωＣ_o1Ｚ_R1tanθ_R1））＜１のときＺ_t1＜Ｚ_t2であり，この条件を満たす伝送線路を装荷することにより、伝送線路２２と閉ループ回路との接続点からみた、電力合成回路側の不平衡モードに対するインピーダンスを、伝送線路を装荷しない場合と比べ大きくすることができる。また、Ｚ_R1およびθ_R1をＺ_t1に対して共振させるように選んだとき、すなわち、１−（１／（ωＣ_o1Ｚ_R1tanθ_R1））＝０となるようにＺ_R1およびθ_R1を選ぶことにより、Ｚ_t2⇒∞となりインピーダンスＺ_t2を最も大きくすることができる。

From equation (9), when 1− (1 / (ωC _o1 Z _R1 tanθ _R1 )) <1, Z _t1 <Z _t2 , and by loading the transmission line satisfying this condition, the transmission line 22 and the closed loop circuit The impedance with respect to the unbalanced mode on the power combining circuit side as seen from the connection point can be made larger than when no transmission line is loaded. Also, when you choose Z _R1 and theta _R1 so as to resonate with Z _t1, i.e., choosing the Z _R1 and theta _R1 so that _{1- (1 / (ωC o1 Z} R1 tanθ R1)) = 0 Thus, Z _t2 ⇒∞, and the impedance Z _t2 can be maximized.

As described above, in the high-frequency amplifier according to the fourth embodiment of the present invention, the impedance of Z _t2 can be increased as in the third embodiment, and the absorption effect of the unbalanced mode due to the isolation resistance is enhanced, and the loop oscillation is performed. Can be suppressed.

  In this example, a transmission line is provided on the power combining circuit side of the FET and the combined impedance for the unbalanced mode between the transmission line and the power combining circuit is increased. However, a transmission line is provided on the power distribution circuit side. The same effect can be obtained even when the combined impedance of the transmission line and the power distribution circuit is increased. When an interstage matching circuit is provided, the combined impedance of the transmission line and the interstage matching circuit may be increased. In addition, although the configuration in which the isolation resistor is arranged on the FET side of the transmission line is shown here, the arrangement may be reversed, that is, the isolation resistor may be arranged on the power combining circuit side of the transmission line.

Embodiment 5.
FIG. 11 shows a configuration diagram of a high-frequency amplifier according to Embodiment 5 of the present invention. In the high frequency amplifier using a capacitor as the passive circuit shown in the second embodiment, the configuration diagram shown in FIG. 11 is the same as the amplifying element in the isolation resistance as the first passive circuit and the capacitor as the second passive circuit. A layout when formed on a substrate is shown. In FIG. 11, the high-frequency amplifier includes FETs 12 a and 12 b, an isolation resistor 17, and a capacitor 19 as a passive circuit on a semiconductor substrate 23. Further, FETs 12a, at 12b, the gate pad 24a, 24b and the gate electrode 29 is connected, the drain pad 25A～25 b and the drain electrode 29 are connected. The source electrode 30 is connected to the source pads 26a to 26c and is grounded through the via holes 27a to 27c. The source pad 26b is shared by the FETs 12a and 12b. A thin film resistor is used as the isolation resistor 17 and a MIM (Metal-Insulator-Metal) capacitor is used as the capacitor 19 connected in parallel with the isolation resistor. The input terminal 10, the power distribution circuit 11, the power combining circuit 13, and the output terminal 14 which are omitted here may be configured on the same substrate, or may be configured on different dielectric substrates.

  Since the high-frequency amplifier according to the fifth embodiment of the present invention has the above-described configuration, the basic circuit configuration is the same as that of the high-frequency amplifier shown in the second embodiment, and the same effects as those of the second embodiment are obtained. Have Further, by forming the thin film resistor and the MIM capacitor on the same substrate as the amplification element, the high frequency amplifier can be reduced in size. Further, it is not necessary to prepare resistors and capacitors in the external circuit, the number of parts can be reduced, and the cost can be reduced.

Embodiment 6.
FIG. 12 shows a configuration diagram of a high-frequency amplifier according to Embodiment 6 of the present invention. The configuration diagram shown in FIG. 12 shows a layout when each circuit is configured by a semiconductor substrate and a dielectric substrate in the high-frequency amplifier according to the second embodiment. In FIG. 12, in addition to the configuration of FIG. 11, wires 31a to 31d and a dielectric substrate 36 are provided, and the transmission line 16 and the like are configured by a conductor pattern on the dielectric substrate. A thin film resistor on the dielectric substrate is provided as an isolation resistor 17 that absorbs the unbalanced mode, and an MIM capacitor on the dielectric substrate is provided as a capacitor 19 that increases the impedance of the power combining circuit. The input terminal 10 and the power distribution circuit 11 omitted here may be configured on the same substrate or may be configured on different dielectric substrates.

  An isolation resistor 17 and a capacitor 19 are configured by bonding a wire to the thin film resistor and the MIM capacitor on the dielectric substrate.

  Since the high-frequency amplifier according to the sixth embodiment of the present invention has the above-described configuration, the basic circuit configuration is the same as that of the second embodiment and has the same effects as those of the second embodiment. Furthermore, by preparing a plurality of thin film resistors and MIM capacitors on the dielectric substrate, the resistance value and the capacitance value can be easily adjusted, and the absorption effect of the unbalanced mode by the isolation resistance can be varied. can get.

Embodiment 7.
FIG. 13 shows a circuit configuration diagram of a high-frequency amplifier according to Embodiment 7 of the present invention. In the circuit shown in FIG. 13, the two circuits shown in FIG. 3 are arranged one above the other, and these circuits are connected in parallel by transmission lines 32a and 32b, transmission lines 33a and 33b, a power distribution circuit 36, and a power combining circuit 37. . An isolation resistor 34 is provided as a first passive circuit, and a capacitor 35 is provided as a second passive circuit.

  In order to increase the output of the high-frequency amplifier, it is conceivable to prepare a plurality of circuits shown in FIG. Loop oscillation in each basic amplifier circuit can be suppressed by using a circuit as shown in the second embodiment. For example, in each basic amplifier circuit, a balanced mode is set. When viewed between the basic amplifier circuits, when the phase differs by 180 degrees and the unbalanced mode is set, loop oscillation may occur. In order to suppress loop oscillation even in such a case, the high frequency amplifier shown in the seventh embodiment further includes an isolation resistor 34 and a capacitor 35 after the basic amplifier circuits are combined in parallel. By selecting the element value of the capacitor 35 so as to increase the combined impedance of the capacitor 35 and the power combining circuit 37, the power absorbed by the isolation resistor 34 can be increased compared to the case where the capacitor 35 is not loaded. .

As described above, the high-frequency amplifier according to the seventh embodiment has the same effect as that of the second embodiment. Further, this configuration can increase the number of FETs combined in parallel while suppressing loop oscillation, and thus has the effect of increasing the output. Although the case where four FETs are synthesized is illustrated here, the present invention is not limited to this, and can be applied to ^2N synthesis.

  Here, the case where a capacitor is used as the second passive circuit as shown in the second embodiment has been described. However, as shown in the third or fourth embodiment, an inductor, a transmission line, or a combination thereof is used. Even in this case, the same effect can be obtained.

Embodiment 8.
FIG. 14 is a circuit configuration diagram of a high-frequency amplifier according to Embodiment 8 of the present invention. The basic configuration is the same as that of FIG. 13 except that the loading position of the isolation resistor as the central first passive circuit and the capacitor as the second passive circuit is different.

  The basic configuration of the high-frequency amplifier according to the eighth embodiment is the same as that of the high-frequency amplifier shown in the seventh embodiment, and has the same effects as the seventh embodiment. Furthermore, in this configuration, since an isolation resistor and a capacitor are loaded between the FETs, the number of FETs can be arbitrarily selected, and the degree of freedom in amplifier design can be increased. Thereby, an effect that the output power of the amplifier can be freely selected is obtained.

  Here, the case where a capacitor is used as the second passive circuit as shown in the second embodiment has been described. However, as shown in the third or fourth embodiment, an inductor, a transmission line, or a combination thereof is used. Even in this case, the same effect can be obtained.

DESCRIPTION OF SYMBOLS 10 Input terminal, 11 Power distribution circuit, 12a-d FET, 13 Power composition circuit, 14 Output terminal, 15a-d Transmission line, 16a-d Transmission line, 17, 17a-c Isolation resistance (1st passive circuit) , 18 second passive circuit, 19, 19a-c capacitor, 20 inductor, 21a, b capacitor, 22 transmission line, 23 dielectric substrate, 24a, b gate pad, 25a, b drain pad, 26a-c source pad, 27a~c via hole, 28 gate electrode, 29 drain electrode, 30 source electrode, 31A～d conductive wires, 32a, b the transmission lines, 33a, b the transmission line, 3 4 isolation resistor, 35 a capacitor, 36 a dielectric substrate

Claims (10)

A power distribution circuit that distributes an input signal and outputs the distributed signal;
A set of amplifying elements connected to the output side of the power distribution circuit and amplifying each output signal from the power distribution circuit;
The output signals from the one set of amplifying elements are combined and connected to the output side of the one set of amplifying elements so as to form a closed loop circuit in cooperation with the power distribution circuit and the one set of amplifying elements. A power combining circuit;
A first passive circuit that is connected in parallel to at least one of the power distribution circuit or the power combining circuit on the output side of the power distribution circuit and absorbs unbalanced mode power generated in the closed loop circuit;
The combined impedance of at least one of the combined impedance with the power distribution circuit regarding the unbalanced mode and the combined impedance with the power combining circuit regarding the unbalanced mode is the impedance of the corresponding power distribution circuit or the impedance of the power combining circuit. A second passive circuit having an impedance value that is larger than the first passive circuit and connected in parallel to the first passive circuit in the closed loop circuit so as to adjust the amount of power absorbed by the first passive circuit; ,
A high frequency amplifier comprising:   The second passive circuit has an impedance viewed from the connection point between the first passive circuit and the closed-loop circuit on the side opposite to the one set of amplifying elements, compared with a case where the second passive circuit is not provided. 2. The high frequency amplifier according to claim 1, wherein the impedance value is selected so as to increase. The closed loop circuit including the power distribution circuit , the power combining circuit, and the set of amplifying elements is configured to be symmetric with respect to a symmetry plane,
The first and second passive circuits are connected to positions where both ends are on the closed-loop circuit and symmetric with respect to the symmetry plane;
The high-frequency amplifier according to claim 1, wherein:   The second passive circuit resonates with an at least one of the power distribution circuit or the power combining circuit at a frequency lower than a use frequency at which the amplifying element operates with respect to an unbalanced mode generated in the closed loop circuit. The high-frequency amplifier according to claim 1, wherein the high-frequency amplifier is provided.   5. The high frequency according to claim 4, wherein the second passive circuit has an impedance value selected so as to resonate with an unbalanced mode having a frequency that is approximately ½ of a use frequency of the amplifying element. amplifier.   The high-frequency amplifier according to claim 1, wherein the one set of amplifying elements is a semiconductor element.   The high-frequency amplifier according to claim 1, wherein the second passive circuit includes a capacitor.   The high-frequency amplifier according to claim 1, wherein the second passive circuit includes an inductor.   The high-frequency amplifier according to claim 1, wherein the second passive circuit includes only a transmission line.   10. The high-frequency amplifier according to claim 1, wherein the first passive circuit and the second passive circuit are configured on the same substrate as the set of amplifying elements.

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