JP5412911B2 - Indicator - Google Patents

Description

  The present invention relates to a display body using an active matrix.

  In recent years, public display bodies using large liquid crystal displays (hereinafter referred to as LCDs) have appeared. These indicate that the use of large LCDs is spreading beyond televisions, and it can be seen that larger displays are required in the future.

  The LCD has a structure in which a liquid crystal material is sandwiched between two opposing substrates. Here, of the two opposing substrates, the substrate on the viewer side is referred to as a front plate, and the other substrate is referred to as a back plate. Many LCDs have a color filter (CF) and a common electrode on the front plate, and millions of pixel electrodes on the back plate. Further, a circuit called an active matrix is provided on the back plate in order to drive the pixel electrodes.

  The active matrix is also called a TFT (Thin Film Transistor), and a thin film field effect transistor is provided for each pixel electrode. This thin film field effect transistor (hereinafter referred to as a transistor) has three terminals of a source, a gate, and a drain. The source terminal and the gate terminal are connected to a control driver IC, and the drain terminal is connected to a pixel electrode. . By applying a signal to the gate terminal, on / off of charge transfer between the source and the drain is controlled. In addition, a storage capacitor electrode is also provided in the active matrix so as to form a capacitor in a pair with the pixel electrode in order to hold a voltage generated in the pixel electrode.

  Usually, an active matrix is manufactured on a glass substrate by combining a dry process such as a vacuum evaporation method and a sputtering method and a wet process such as a photolithography method for performing exposure, development, and etching. Alkali glass substrates are exclusively used due to various requirements such as heat resistance and flatness, but active matrix formation on non-glass substrates has also been attempted by optimizing process conditions and devising transfer methods. (See Patent Document 1).

  Silicon has been used for many years as an active layer material for transistors constituting an active matrix. Recently, organic semiconductors, oxide semiconductors, and nanoparticle semiconductors have attracted attention as alternative materials. It is disclosed that an active matrix can be formed on a substrate made of a material other than a glass substrate by using these materials and optimizing the process together (see Patent Document 2).

  It is also considered to use a printed circuit board as a non-glass substrate. In this case, as a feature not found in a glass substrate, it is possible to provide electrical bonding and arrangement of electronic components on the non-display surface side. (See Patent Document 3).

  According to this technology, a printed circuit board having mechanical strength can be applied to the back plate in place of the glass that conventionally requires attention.

JP-A-8-288522 JP-T-2006-516754 JP 2007-108459 A

  However, according to this technology, the portion that acts as a transistor, which is a component of the active matrix, is near the non-display surface of the display body or the outermost surface of the back plate. As a result, the active matrix is easily damaged or malfunctions.

  The present invention has been made in view of this problem, and an object thereof is to provide a display body that is advantageous in mechanically and electromagnetically protecting an active matrix provided on a printed circuit board. In addition, a non-display portion (hereinafter referred to as a frame) in the outer portion of the display surface is reduced, and a display body advantageous for obtaining a large display body without producing a single large display body. The purpose is to provide.

In order to achieve the above object, the invention of claim 1 includes a front plate located on the viewer side and a back plate disposed to face the front plate, and the back plate faces the front plate. A display body having a pixel electrode formed on a surface to be driven and an active matrix for driving the pixel electrode, wherein the back plate is formed of a printed board, and the printed board has the pixel electrode formed thereon A pixel electrode layer; a first insulating layer covering the pixel electrode layer; a source line layer and a gate line layer; a second insulating layer covering the source line layer and the gate line layer; and a transistor layer constituting the active matrix A third insulating layer covering the transistor layer, a grounded ground layer covering the third insulating layer, and a fourth insulating layer covering the ground layer are stacked in this order in a direction away from the front plate. Te The pixel electrode layer and the transistor layer are electrically connected via a first through hole penetrating the first and second insulating layers, and the source line layer and the transistor layer are The gate line layer and the transistor layer are electrically connected via a third through hole penetrating the second insulating layer. The second through hole penetrating the second insulating layer is electrically connected. It is characterized by.
The invention according to claim 2 is the display body according to claim 1, wherein the source line layer and the gate line layer are provided at different positions in the stacking direction.
The invention according to claim 3 is the display body according to claim 1, wherein the source line layer and the gate line layer are provided at the same place in the stacking direction.
According to a fourth aspect of the present invention, a storage capacitor connected to the drain terminal of the transistor and a storage capacitor terminal connected to the storage capacitor are provided in the transistor layer, and the storage is covered with the second insulating layer. The capacitor line layer is further provided, and the storage capacitor line layer and the storage capacitor terminal are electrically connected via a fourth through hole penetrating the second insulating layer. The display body according to any one of Items 1 to 3.
The invention according to claim 5 is characterized in that a connection device between the display body and an external device, and an electronic component mounted on the display body are provided on a surface of the back plate opposite to the front plate. The display body according to any one of claims 1 to 4.
The invention according to claim 6 is the display body according to claim 5, wherein a plurality of the display bodies are connected side by side in the vertical and horizontal directions to form a larger display surface.

  Since the transistor layer constituting the active matrix is covered with the fourth insulating layer and the ground layer, it is advantageous in protecting the active matrix mechanically and electromagnetically.

It is the schematic of the cross-sectional structure for one pixel electrode of the backplate by this invention. It is the schematic of the cross-sectional structure for one pixel electrode of the backplate by a prior art.

Hereinafter, the present invention will be described in more detail.
In FIG. 1, the cross-sectional structure schematic of the backplate of this invention is shown. This is for one pixel electrode. The present invention can be designed in various ways as long as it is based on the operating principle of the active matrix, and is not limited to the structure shown in FIG. Further, in practice, it has a three-dimensional structure as described below, but for the sake of explanation, FIG.

  Usually, when an active matrix is formed on a glass substrate, a transistor is provided adjacent to a pixel electrode on the same surface as the pixel electrode. This is because the process is only required on one side and it is difficult to form a through hole in hard glass.

  As a result, the active matrix including the pixel electrode is positioned inside the display body constituted by two glass substrates facing each other, and the active matrix is protected by the glass that is strong and hardly charged. .

  On the other hand, when an active matrix is formed on a printed circuit board, unlike glass, a through hole can be easily formed and a multilayered structure can be adopted. Therefore, as in the case of the glass substrate, the pixel electrode and the active matrix can be formed on different surfaces in addition to the configuration in which the pixel electrode and the active matrix are formed on the same surface.

  Similarly, the active matrix can be broken down into different layers. In other words, not only the transistor but also a wiring connected thereto can be provided on a different surface from the pixel electrode 101 and the transistor (a structure including 103, 105, 106, 109, and 110). The wiring first requires a gate line 104 and a source line 102 connected to the gate terminal 105 and the source terminal 103, respectively, and these wirings are insulated from each other and are arranged in the substrate so as to intersect vertically and horizontally. The drain terminal 106 and the pixel electrode 101 are connected by a through hole. Since the storage capacitor 111 is connected to the storage capacitor of the adjacent pixel electrode, the storage capacitor line 108 is also required.

  The pixel electrode 101 needs to be located on one outermost surface of the substrate. In addition, in order to function as an active matrix, a transistor layer (a layer of a structure including a source terminal 103, a gate terminal 105, a drain terminal 106, a gate insulating layer 109, and an active layer 110), a gate line layer ( Gate line 104 layer) and source line layer (source line 102 layer) are required. The storage capacitor 111 is manufactured by applying a method in which conductive materials are overlapped with each other through an insulating dielectric material, a method in which conductive materials are adjacent to each other through an insulating dielectric material, a method in which chip capacitor components are mounted, and the like. (Figure 1 corresponds to the latter two approaches). Depending on the design, the storage capacitor line layer can be mixed with a gate line layer or a source line layer as shown in FIG. Each layer is overlapped via the insulating material 113, and the electrical connection between the layers is made through a through hole provided in the insulating layer which is a layer of the insulating material. Since the line connecting the drain terminal 106 and the pixel electrode 101 is also provided through the through hole, an independent drain line layer (a layer of lines connected to the drain terminal 106) is not necessary, but may be provided by design.

  There is no limitation on the order in which the layers overlap, but a transistor layer (a layer of a structure including a source terminal 103, a gate terminal 105, a drain terminal 106, a gate insulating layer 109, and an active layer 110) is used as a pixel electrode layer (pixel electrode). It is easiest to make the outermost surface opposite to the layer 101). Unlike other layers that are basically composed only of a conductive material, a transistor layer (a layer of a structure including a source terminal 103, a gate terminal 105, a drain terminal 106, a gate insulating layer 109, and an active layer 110) A layer pattern made of three kinds of materials, ie, a gate terminal 105 made of a conductive material, a source terminal 103, a drain terminal 106, an active layer 110 made of a semiconductor material, and a gate insulating layer 109 made of an insulating material, has high positional accuracy and thickness accuracy. It is because it is required to combine with. The method for forming a transistor of the present invention can be appropriately used in accordance with a constituent material of the transistor, such as dry process, photolithography, ink jet, screen printing, or transfer.

  FIG. 1 depicts a bottom gate transistor. There are various structures of the transistor such as a bottom gate type and a top gate type, and the structure of the transistor of the present invention may be any structure. However, in order to operate as an active matrix, it is necessary to have an enhancement type in which no channel is generated when there is no gate voltage.

  Examples of conductive materials include conductive metals such as copper, silver, gold, aluminum, nickel, and chromium, metal oxides such as tin-doped indium oxide and zinc oxide, polyacetylene, polythiophene, polyaniline, and polyparaphenylene vinylene. Carbon materials such as molecules, graphite, carbon nanotubes, fullerenes, and mixtures thereof can be applied.

  Semiconductor materials include group IV semiconductors such as silicon and germanium, group II-VI semiconductors such as zinc selenide, cadmium sulfide, and zinc oxide, group III-V semiconductors such as gallium arsenide, indium iodide, and gallium nitride, and silicon carbide. Group IV compound semiconductors such as I-III-VI semiconductors such as chalcopyrite semiconductors, acenes such as tetracene and pentacene, oligothiophene derivatives, phthalocyanines, perylene derivatives, rubrene, and other poly (3-alkylthiophenes) Representative organic semiconductors such as polythiophene, polyfluorene, polyphenylene vinylene, polytriallylamine, and mixtures thereof can be applied.

  As the insulating material, glass, glass fiber, insulating oxide such as silicon oxide, polyester, epoxy resin, melamine resin, phenol resin, synthetic resin such as polyurethane, silicone resin, and a mixture thereof can be applied.

  As described above, when the transistor layer is provided on the outermost surface, it is easy to manufacture, but as it is, the transistor layer is easily subjected to external mechanical stress and electromagnetic stress. Therefore, the transistor layer is covered with a layer 114 of an insulating material, and further covered with a layer 112 of a conductive material (hereinafter referred to as a ground layer). Here, the thickness of the insulating material layer 114 may be any thickness as long as electrical insulation is ensured and mechanical stress from the outside can be reduced. This thickness varies depending on the mechanical and electrical properties of the applied material, but it may be several tens to several hundreds of microns. The ground layer 112 is a planar ground layer having no pattern, and is preferably electrically grounded. In order to protect the ground layer 112 itself from external mechanical stress, the ground layer may be covered with a further layer 115 of insulating material.

This will be described in more detail with reference to FIG.
The display body includes a front plate (not shown) located on the viewer side and a back plate disposed to face the front plate.
The back plate includes a pixel electrode 101 formed on a surface facing the front plate, and an active matrix that drives the pixel electrode 101.
The back plate is composed of a printed circuit board.
The printed circuit board includes a pixel electrode layer, a first insulating layer 113a, a source line layer and a gate line layer, two second insulating layers 113b and 113c, a transistor layer, a third insulating layer 114, and a ground layer 112. The fourth insulating layer 115 is laminated in this order in a direction away from the front plate.

The pixel electrode layer is a layer in which the pixel electrode 101 is formed.
The first insulating layer 113a is an insulating layer that covers the pixel electrode layer.
The source line layer is a layer in which the source line 102 is formed.
The gate line layer is a layer in which the gate line 104 is formed.
The second insulating layers 113b and 113c are insulating layers that cover the source line layer and the gate layer.
In this embodiment mode, the source line layer and the gate line layer are provided at different positions in the stacking direction.
Therefore, the source line layer is covered with one second insulating layer 113b of the two second insulating layers 113b and 113c.
The gate line layer is covered with the other second insulating layer 113c of the two second insulating layers 113b and 113c.
As another mode, the vertical relationship in the figure of the source line layer and the gate line layer can be designed even when the vertical direction is reversed.
Further, the source line layer and the gate line layer may be provided at the same place in the stacking direction.

The transistor layer forms an active matrix, and includes a source terminal 103, a gate terminal 105, a drain terminal 106, a gate insulating layer 109, and an active layer 110.
Further, a storage capacitor 111 connected to the drain terminal 106 of the transistor and a storage capacitor terminal 107 connected to the storage capacitor 111 are provided in the transistor layer.
A storage capacitor line layer in which the storage capacitor line 108 is formed is formed between the two second insulating layers 113b and 113c.
That is, the storage capacitor line layer is covered with the second insulating layer 113b.

The pixel electrode 101 and the drain terminal 106 are electrically connected via a first through hole penetrating the first and second insulating layers 113a, 113b, and 113c.
That is, the pixel electrode layer and the transistor layer are electrically connected through the first through hole that penetrates the first and second insulating layers 113a, 113b, and 113c.

The source line 102 and the source terminal 103 are electrically connected through a second through hole penetrating the second insulating layers 113b and 113c.
That is, the source line layer and the transistor layer are electrically connected via the second through hole that penetrates the second insulating layers 113b and 113c.

The gate line 104 and the gate terminal 105 are electrically connected through a third through hole that penetrates the second insulating layer 113c.
That is, the gate line layer and the transistor layer are electrically connected via the third through hole penetrating the second insulating layer 113c.

The storage capacitor line 108 and the storage capacitor terminal 107 are electrically connected through a fourth through hole penetrating the second insulating layer 113c.
That is, the storage capacitor line layer and the storage capacitor terminal 107 are electrically connected via the fourth through hole that penetrates the second insulating layer 113c.

  In an active matrix using a conventional glass substrate, all wiring, electronic elements such as transistors, connection devices such as connection terminals and connectors, and electronic components such as driver ICs are mounted only on one side of the substrate. In particular, the connection device and the electronic component are mounted with a predetermined region provided outside the display surface, that is, at the end of the display body. In the present invention, since a printed circuit board with a high degree of freedom in wiring design is used, the connection device and the electronic component can be mounted on the surface opposite to the display surface (hereinafter referred to as the back surface). For this reason, a frame can be narrowed to the limit.

  By narrowing the frame, the display bodies of the present invention can be arranged vertically and horizontally without gaps, and a larger display surface can be configured without a sense of incongruity. Also in this case, since the connection device and the electronic component are on the back surface, the display body can be easily installed.

  Examples of the display method to which the present invention can be applied include liquid crystal, organic electroluminescence, and electronic paper. However, the display method is not particularly limited as long as the active matrix can be applied.

  According to the present embodiment, the presence of the ground layer protects the transistor layer important for the active matrix to perform its function mechanically and electromagnetically, so that there is no failure or malfunction. In addition, since the electromagnetic waves generated by the active matrix itself are blocked, there is no influence on other electronic devices. When a material having excellent thermal conductivity, such as copper or aluminum, is used for the ground layer, it contributes to uniform heat distribution of the display body, so that the operation stability of the display body is improved. As a result, the reliability of the back plate of the active matrix based on the printed circuit board is also improved, so that the display body using the conventional glass substrate can be switched to a display body that is harder to break. In addition, since the electrical connection part and parts can move from the end of the display body to the back surface, the display bodies can be easily connected to each other, and a larger display body can be obtained without increasing the size of one display body. Can be configured.

FIG. 2 is a view showing a conventional display body.
As shown in FIG. 2, in the conventional display body, the printed circuit board is formed with the layer in which the pixel electrode 201 is formed, the insulating layer 213, the source line layer in which the source line 202 is formed, and the gate line 204. The gate line layer and the transistor layer constituting the active matrix (the structure layer composed of the source terminal 203, the gate terminal 205, the drain terminal 206, the gate insulating layer 209, and the active layer 210) are arranged in this order from the front plate. It is configured to be stacked in the direction of leaving.
A storage capacitor line layer in which the storage capacitor line 208 is formed is formed in the insulating layer 213.
Further, the storage capacitor line 208 and the storage capacitor terminal 207 are electrically connected through a through hole that penetrates the insulating layer 213.
In such a configuration, since the transistor layer constituting the active matrix is exposed, the active matrix is not protected mechanically and electromagnetically, which is disadvantageous in preventing failure and malfunction.

  The copper foil of the FR-4 standard double-sided copper-clad laminate having 12 μm thick copper foil on the both sides of the epoxy resin substrate 113b reinforced with glass cloth as the core material, the source line pattern and the gate line pattern respectively. Patterning of the striped copper foil to be the source line 102 and the gate line 104 was performed by a photolithography method using a photomask having the same. Simultaneously with the gate line 104, the storage capacitor line 108 was formed on the same surface.

  Insulating layers 113a and 113c were bonded to both surfaces of the substrate, and copper foil was bonded to both outer surfaces thereof. The bonded copper foil is subjected to a photolithographic method using a photomask having a pixel electrode pattern and a transistor pattern (source terminal, gate terminal, and drain terminal patterns), respectively, and the pixel electrode 101, the source terminal 103, the gate terminal 105, Patterning to become the drain terminal 106 was performed. Simultaneously with the formation of the transistor pattern, the storage capacitor terminal 107 was also patterned.

  Using NC drills, through holes connecting source line 102 and source terminal 103, gate line 104 and gate terminal 105, drain terminal 106 and pixel electrode 101, storage capacitor line 108 and storage capacitor terminal 107 are formed, and copper is electrolessly They were plated and electrically connected to each other.

  A polyimide ink (Neoprim manufactured by Mitsubishi Gas Chemical Co., Ltd.) was applied as a gate insulating layer so as to cover predetermined portions of the source terminal 103, the gate terminal 105, and the drain terminal 106, thereby forming a gate insulating film 109 having a thickness of 1 μm.

  Next, a solution prepared by dissolving Lisicon SP200 (made by Merck), which is an organic semiconductor material, with tetralin (made by Kanto Chemical Co., Ltd.) to 0.5 wt% is applied on the gate insulating layer 109 with a dispenser. Layer 110 was formed.

  A chip capacitor was mounted as the storage capacitor 111 so as to connect the drain terminal 106 and the storage capacitor terminal 107.

  An epoxy layer is formed on the transistor layer (including the source terminal 103, the gate terminal 105, the drain terminal 106, the gate insulating layer 109, and the active layer 110, which includes the storage capacitor terminal 107 and the storage capacitor 111). An FR-4 standard single-sided copper-clad laminate having a 12-μm thick copper foil on one side was bonded to the epoxy resin substrate 114 reinforced with glass cloth through the resin. The copper foil of this single-sided copper clad laminate was used as the ground layer 112. Thereafter, an acrylic paint was applied to the ground layer 112 to form a back plate.

  A microcapsule type electrophoretic display medium film Vizplex Imaging Film (manufactured by E Ink) was attached to the surface of the pixel electrode 101 of the back plate as electronic paper. This was connected to an external drive circuit and the active matrix was operated, and it was confirmed that a predetermined display appeared on the electronic paper. It was confirmed that even if the charged resin material was brought closer to the ground layer side, the display operation was not affected.

  DESCRIPTION OF SYMBOLS 101 ... Pixel electrode, 102 ... Source line, 103 ... Source terminal, 104 ... Gate line, 105 ... Gate terminal, 106 ... Drain terminal, 107 ... Storage capacitor terminal, 108 ... Storage capacitor line, 109 ... Gate insulating layer, 110 ... Active layer, 111... Storage capacitor, 112... Ground layer, 113 a... First insulating layer, 113 b, 113 c... Second insulating layer, 114 ... Third insulating layer, 115.

Claims (6)

A front plate located on the viewer side, and a back plate disposed to face the front plate,
The back plate is a display body having a pixel electrode formed on a surface facing the front plate, and an active matrix for driving the pixel electrode,
The back plate is composed of a printed circuit board,
The printed circuit board is
A pixel electrode layer on which the pixel electrode is formed;
A first insulating layer covering the pixel electrode layer;
A source line layer and a gate line layer;
A second insulating layer covering the source line layer and the gate line layer;
A transistor layer constituting the active matrix;
A third insulating layer covering the transistor layer;
An earthed ground layer covering the third insulating layer;
The fourth insulating layer covering the ground layer is laminated in this order in a direction away from the front plate,
The pixel electrode layer and the transistor layer are electrically connected via a first through hole penetrating the first and second insulating layers,
The source line layer and the transistor layer are electrically connected via a second through hole penetrating the second insulating layer,
The gate line layer and the transistor layer are electrically connected via a third through hole penetrating the second insulating layer.
A display body characterized by that. The source line layer and the gate line layer are provided at different positions in the stacking direction,
The display body according to claim 1. The source line layer and the gate line layer are provided at the same place in the stacking direction.
The display body according to claim 1. The transistor layer is provided with a storage capacitor connected to the drain terminal of the transistor, and a storage capacitor terminal connected to the storage capacitor,
A storage capacitor line layer covered with the second insulating layer;
The storage capacitor line layer and the storage capacitor terminal are electrically connected via a fourth through hole penetrating the second insulating layer.
The display body according to claim 1, wherein the display body is a display body. A connection device between the display body and an external device, and an electronic component mounted on the display body are provided on a surface of the back plate opposite to the front plate.
The display body according to claim 1, wherein the display body is a display body.   The display body according to claim 5, wherein a plurality of the display bodies are connected side by side in the vertical and horizontal directions to form a larger display surface.

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